sa1100.c 23 KB

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  1. /*
  2. * Driver for SA11x0 serial ports
  3. *
  4. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  5. *
  6. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  23. #define SUPPORT_SYSRQ
  24. #endif
  25. #include <linux/module.h>
  26. #include <linux/ioport.h>
  27. #include <linux/init.h>
  28. #include <linux/console.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/tty.h>
  32. #include <linux/tty_flip.h>
  33. #include <linux/serial_core.h>
  34. #include <linux/serial.h>
  35. #include <linux/io.h>
  36. #include <asm/irq.h>
  37. #include <mach/hardware.h>
  38. #include <mach/irqs.h>
  39. #include <asm/mach/serial_sa1100.h>
  40. /* We've been assigned a range on the "Low-density serial ports" major */
  41. #define SERIAL_SA1100_MAJOR 204
  42. #define MINOR_START 5
  43. #define NR_PORTS 3
  44. #define SA1100_ISR_PASS_LIMIT 256
  45. /*
  46. * Convert from ignore_status_mask or read_status_mask to UTSR[01]
  47. */
  48. #define SM_TO_UTSR0(x) ((x) & 0xff)
  49. #define SM_TO_UTSR1(x) ((x) >> 8)
  50. #define UTSR0_TO_SM(x) ((x))
  51. #define UTSR1_TO_SM(x) ((x) << 8)
  52. #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
  53. #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
  54. #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
  55. #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
  56. #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
  57. #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
  58. #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
  59. #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
  60. #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
  61. #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
  62. #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
  63. #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
  64. #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
  65. #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
  66. /*
  67. * This is the size of our serial port register set.
  68. */
  69. #define UART_PORT_SIZE 0x24
  70. /*
  71. * This determines how often we check the modem status signals
  72. * for any change. They generally aren't connected to an IRQ
  73. * so we have to poll them. We also check immediately before
  74. * filling the TX fifo incase CTS has been dropped.
  75. */
  76. #define MCTRL_TIMEOUT (250*HZ/1000)
  77. struct sa1100_port {
  78. struct uart_port port;
  79. struct timer_list timer;
  80. unsigned int old_status;
  81. };
  82. /*
  83. * Handle any change of modem status signal since we were last called.
  84. */
  85. static void sa1100_mctrl_check(struct sa1100_port *sport)
  86. {
  87. unsigned int status, changed;
  88. status = sport->port.ops->get_mctrl(&sport->port);
  89. changed = status ^ sport->old_status;
  90. if (changed == 0)
  91. return;
  92. sport->old_status = status;
  93. if (changed & TIOCM_RI)
  94. sport->port.icount.rng++;
  95. if (changed & TIOCM_DSR)
  96. sport->port.icount.dsr++;
  97. if (changed & TIOCM_CAR)
  98. uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
  99. if (changed & TIOCM_CTS)
  100. uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
  101. wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
  102. }
  103. /*
  104. * This is our per-port timeout handler, for checking the
  105. * modem status signals.
  106. */
  107. static void sa1100_timeout(unsigned long data)
  108. {
  109. struct sa1100_port *sport = (struct sa1100_port *)data;
  110. unsigned long flags;
  111. if (sport->port.state) {
  112. spin_lock_irqsave(&sport->port.lock, flags);
  113. sa1100_mctrl_check(sport);
  114. spin_unlock_irqrestore(&sport->port.lock, flags);
  115. mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
  116. }
  117. }
  118. /*
  119. * interrupts disabled on entry
  120. */
  121. static void sa1100_stop_tx(struct uart_port *port)
  122. {
  123. struct sa1100_port *sport = (struct sa1100_port *)port;
  124. u32 utcr3;
  125. utcr3 = UART_GET_UTCR3(sport);
  126. UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
  127. sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
  128. }
  129. /*
  130. * port locked and interrupts disabled
  131. */
  132. static void sa1100_start_tx(struct uart_port *port)
  133. {
  134. struct sa1100_port *sport = (struct sa1100_port *)port;
  135. u32 utcr3;
  136. utcr3 = UART_GET_UTCR3(sport);
  137. sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
  138. UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
  139. }
  140. /*
  141. * Interrupts enabled
  142. */
  143. static void sa1100_stop_rx(struct uart_port *port)
  144. {
  145. struct sa1100_port *sport = (struct sa1100_port *)port;
  146. u32 utcr3;
  147. utcr3 = UART_GET_UTCR3(sport);
  148. UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
  149. }
  150. /*
  151. * Set the modem control timer to fire immediately.
  152. */
  153. static void sa1100_enable_ms(struct uart_port *port)
  154. {
  155. struct sa1100_port *sport = (struct sa1100_port *)port;
  156. mod_timer(&sport->timer, jiffies);
  157. }
  158. static void
  159. sa1100_rx_chars(struct sa1100_port *sport)
  160. {
  161. struct tty_struct *tty = sport->port.state->port.tty;
  162. unsigned int status, ch, flg;
  163. status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
  164. UTSR0_TO_SM(UART_GET_UTSR0(sport));
  165. while (status & UTSR1_TO_SM(UTSR1_RNE)) {
  166. ch = UART_GET_CHAR(sport);
  167. sport->port.icount.rx++;
  168. flg = TTY_NORMAL;
  169. /*
  170. * note that the error handling code is
  171. * out of the main execution path
  172. */
  173. if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
  174. if (status & UTSR1_TO_SM(UTSR1_PRE))
  175. sport->port.icount.parity++;
  176. else if (status & UTSR1_TO_SM(UTSR1_FRE))
  177. sport->port.icount.frame++;
  178. if (status & UTSR1_TO_SM(UTSR1_ROR))
  179. sport->port.icount.overrun++;
  180. status &= sport->port.read_status_mask;
  181. if (status & UTSR1_TO_SM(UTSR1_PRE))
  182. flg = TTY_PARITY;
  183. else if (status & UTSR1_TO_SM(UTSR1_FRE))
  184. flg = TTY_FRAME;
  185. #ifdef SUPPORT_SYSRQ
  186. sport->port.sysrq = 0;
  187. #endif
  188. }
  189. if (uart_handle_sysrq_char(&sport->port, ch))
  190. goto ignore_char;
  191. uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
  192. ignore_char:
  193. status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
  194. UTSR0_TO_SM(UART_GET_UTSR0(sport));
  195. }
  196. tty_flip_buffer_push(tty);
  197. }
  198. static void sa1100_tx_chars(struct sa1100_port *sport)
  199. {
  200. struct circ_buf *xmit = &sport->port.state->xmit;
  201. if (sport->port.x_char) {
  202. UART_PUT_CHAR(sport, sport->port.x_char);
  203. sport->port.icount.tx++;
  204. sport->port.x_char = 0;
  205. return;
  206. }
  207. /*
  208. * Check the modem control lines before
  209. * transmitting anything.
  210. */
  211. sa1100_mctrl_check(sport);
  212. if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
  213. sa1100_stop_tx(&sport->port);
  214. return;
  215. }
  216. /*
  217. * Tried using FIFO (not checking TNF) for fifo fill:
  218. * still had the '4 bytes repeated' problem.
  219. */
  220. while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
  221. UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
  222. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  223. sport->port.icount.tx++;
  224. if (uart_circ_empty(xmit))
  225. break;
  226. }
  227. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  228. uart_write_wakeup(&sport->port);
  229. if (uart_circ_empty(xmit))
  230. sa1100_stop_tx(&sport->port);
  231. }
  232. static irqreturn_t sa1100_int(int irq, void *dev_id)
  233. {
  234. struct sa1100_port *sport = dev_id;
  235. unsigned int status, pass_counter = 0;
  236. spin_lock(&sport->port.lock);
  237. status = UART_GET_UTSR0(sport);
  238. status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
  239. do {
  240. if (status & (UTSR0_RFS | UTSR0_RID)) {
  241. /* Clear the receiver idle bit, if set */
  242. if (status & UTSR0_RID)
  243. UART_PUT_UTSR0(sport, UTSR0_RID);
  244. sa1100_rx_chars(sport);
  245. }
  246. /* Clear the relevant break bits */
  247. if (status & (UTSR0_RBB | UTSR0_REB))
  248. UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
  249. if (status & UTSR0_RBB)
  250. sport->port.icount.brk++;
  251. if (status & UTSR0_REB)
  252. uart_handle_break(&sport->port);
  253. if (status & UTSR0_TFS)
  254. sa1100_tx_chars(sport);
  255. if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
  256. break;
  257. status = UART_GET_UTSR0(sport);
  258. status &= SM_TO_UTSR0(sport->port.read_status_mask) |
  259. ~UTSR0_TFS;
  260. } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
  261. spin_unlock(&sport->port.lock);
  262. return IRQ_HANDLED;
  263. }
  264. /*
  265. * Return TIOCSER_TEMT when transmitter is not busy.
  266. */
  267. static unsigned int sa1100_tx_empty(struct uart_port *port)
  268. {
  269. struct sa1100_port *sport = (struct sa1100_port *)port;
  270. return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
  271. }
  272. static unsigned int sa1100_get_mctrl(struct uart_port *port)
  273. {
  274. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  275. }
  276. static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  277. {
  278. }
  279. /*
  280. * Interrupts always disabled.
  281. */
  282. static void sa1100_break_ctl(struct uart_port *port, int break_state)
  283. {
  284. struct sa1100_port *sport = (struct sa1100_port *)port;
  285. unsigned long flags;
  286. unsigned int utcr3;
  287. spin_lock_irqsave(&sport->port.lock, flags);
  288. utcr3 = UART_GET_UTCR3(sport);
  289. if (break_state == -1)
  290. utcr3 |= UTCR3_BRK;
  291. else
  292. utcr3 &= ~UTCR3_BRK;
  293. UART_PUT_UTCR3(sport, utcr3);
  294. spin_unlock_irqrestore(&sport->port.lock, flags);
  295. }
  296. static int sa1100_startup(struct uart_port *port)
  297. {
  298. struct sa1100_port *sport = (struct sa1100_port *)port;
  299. int retval;
  300. /*
  301. * Allocate the IRQ
  302. */
  303. retval = request_irq(sport->port.irq, sa1100_int, 0,
  304. "sa11x0-uart", sport);
  305. if (retval)
  306. return retval;
  307. /*
  308. * Finally, clear and enable interrupts
  309. */
  310. UART_PUT_UTSR0(sport, -1);
  311. UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
  312. /*
  313. * Enable modem status interrupts
  314. */
  315. spin_lock_irq(&sport->port.lock);
  316. sa1100_enable_ms(&sport->port);
  317. spin_unlock_irq(&sport->port.lock);
  318. return 0;
  319. }
  320. static void sa1100_shutdown(struct uart_port *port)
  321. {
  322. struct sa1100_port *sport = (struct sa1100_port *)port;
  323. /*
  324. * Stop our timer.
  325. */
  326. del_timer_sync(&sport->timer);
  327. /*
  328. * Free the interrupt
  329. */
  330. free_irq(sport->port.irq, sport);
  331. /*
  332. * Disable all interrupts, port and break condition.
  333. */
  334. UART_PUT_UTCR3(sport, 0);
  335. }
  336. static void
  337. sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
  338. struct ktermios *old)
  339. {
  340. struct sa1100_port *sport = (struct sa1100_port *)port;
  341. unsigned long flags;
  342. unsigned int utcr0, old_utcr3, baud, quot;
  343. unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
  344. /*
  345. * We only support CS7 and CS8.
  346. */
  347. while ((termios->c_cflag & CSIZE) != CS7 &&
  348. (termios->c_cflag & CSIZE) != CS8) {
  349. termios->c_cflag &= ~CSIZE;
  350. termios->c_cflag |= old_csize;
  351. old_csize = CS8;
  352. }
  353. if ((termios->c_cflag & CSIZE) == CS8)
  354. utcr0 = UTCR0_DSS;
  355. else
  356. utcr0 = 0;
  357. if (termios->c_cflag & CSTOPB)
  358. utcr0 |= UTCR0_SBS;
  359. if (termios->c_cflag & PARENB) {
  360. utcr0 |= UTCR0_PE;
  361. if (!(termios->c_cflag & PARODD))
  362. utcr0 |= UTCR0_OES;
  363. }
  364. /*
  365. * Ask the core to calculate the divisor for us.
  366. */
  367. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  368. quot = uart_get_divisor(port, baud);
  369. spin_lock_irqsave(&sport->port.lock, flags);
  370. sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
  371. sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
  372. if (termios->c_iflag & INPCK)
  373. sport->port.read_status_mask |=
  374. UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
  375. if (termios->c_iflag & (BRKINT | PARMRK))
  376. sport->port.read_status_mask |=
  377. UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
  378. /*
  379. * Characters to ignore
  380. */
  381. sport->port.ignore_status_mask = 0;
  382. if (termios->c_iflag & IGNPAR)
  383. sport->port.ignore_status_mask |=
  384. UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
  385. if (termios->c_iflag & IGNBRK) {
  386. sport->port.ignore_status_mask |=
  387. UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
  388. /*
  389. * If we're ignoring parity and break indicators,
  390. * ignore overruns too (for real raw support).
  391. */
  392. if (termios->c_iflag & IGNPAR)
  393. sport->port.ignore_status_mask |=
  394. UTSR1_TO_SM(UTSR1_ROR);
  395. }
  396. del_timer_sync(&sport->timer);
  397. /*
  398. * Update the per-port timeout.
  399. */
  400. uart_update_timeout(port, termios->c_cflag, baud);
  401. /*
  402. * disable interrupts and drain transmitter
  403. */
  404. old_utcr3 = UART_GET_UTCR3(sport);
  405. UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
  406. while (UART_GET_UTSR1(sport) & UTSR1_TBY)
  407. barrier();
  408. /* then, disable everything */
  409. UART_PUT_UTCR3(sport, 0);
  410. /* set the parity, stop bits and data size */
  411. UART_PUT_UTCR0(sport, utcr0);
  412. /* set the baud rate */
  413. quot -= 1;
  414. UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
  415. UART_PUT_UTCR2(sport, (quot & 0xff));
  416. UART_PUT_UTSR0(sport, -1);
  417. UART_PUT_UTCR3(sport, old_utcr3);
  418. if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
  419. sa1100_enable_ms(&sport->port);
  420. spin_unlock_irqrestore(&sport->port.lock, flags);
  421. }
  422. static const char *sa1100_type(struct uart_port *port)
  423. {
  424. struct sa1100_port *sport = (struct sa1100_port *)port;
  425. return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
  426. }
  427. /*
  428. * Release the memory region(s) being used by 'port'.
  429. */
  430. static void sa1100_release_port(struct uart_port *port)
  431. {
  432. struct sa1100_port *sport = (struct sa1100_port *)port;
  433. release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
  434. }
  435. /*
  436. * Request the memory region(s) being used by 'port'.
  437. */
  438. static int sa1100_request_port(struct uart_port *port)
  439. {
  440. struct sa1100_port *sport = (struct sa1100_port *)port;
  441. return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
  442. "sa11x0-uart") != NULL ? 0 : -EBUSY;
  443. }
  444. /*
  445. * Configure/autoconfigure the port.
  446. */
  447. static void sa1100_config_port(struct uart_port *port, int flags)
  448. {
  449. struct sa1100_port *sport = (struct sa1100_port *)port;
  450. if (flags & UART_CONFIG_TYPE &&
  451. sa1100_request_port(&sport->port) == 0)
  452. sport->port.type = PORT_SA1100;
  453. }
  454. /*
  455. * Verify the new serial_struct (for TIOCSSERIAL).
  456. * The only change we allow are to the flags and type, and
  457. * even then only between PORT_SA1100 and PORT_UNKNOWN
  458. */
  459. static int
  460. sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
  461. {
  462. struct sa1100_port *sport = (struct sa1100_port *)port;
  463. int ret = 0;
  464. if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
  465. ret = -EINVAL;
  466. if (sport->port.irq != ser->irq)
  467. ret = -EINVAL;
  468. if (ser->io_type != SERIAL_IO_MEM)
  469. ret = -EINVAL;
  470. if (sport->port.uartclk / 16 != ser->baud_base)
  471. ret = -EINVAL;
  472. if ((void *)sport->port.mapbase != ser->iomem_base)
  473. ret = -EINVAL;
  474. if (sport->port.iobase != ser->port)
  475. ret = -EINVAL;
  476. if (ser->hub6 != 0)
  477. ret = -EINVAL;
  478. return ret;
  479. }
  480. static struct uart_ops sa1100_pops = {
  481. .tx_empty = sa1100_tx_empty,
  482. .set_mctrl = sa1100_set_mctrl,
  483. .get_mctrl = sa1100_get_mctrl,
  484. .stop_tx = sa1100_stop_tx,
  485. .start_tx = sa1100_start_tx,
  486. .stop_rx = sa1100_stop_rx,
  487. .enable_ms = sa1100_enable_ms,
  488. .break_ctl = sa1100_break_ctl,
  489. .startup = sa1100_startup,
  490. .shutdown = sa1100_shutdown,
  491. .set_termios = sa1100_set_termios,
  492. .type = sa1100_type,
  493. .release_port = sa1100_release_port,
  494. .request_port = sa1100_request_port,
  495. .config_port = sa1100_config_port,
  496. .verify_port = sa1100_verify_port,
  497. };
  498. static struct sa1100_port sa1100_ports[NR_PORTS];
  499. /*
  500. * Setup the SA1100 serial ports. Note that we don't include the IrDA
  501. * port here since we have our own SIR/FIR driver (see drivers/net/irda)
  502. *
  503. * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
  504. * Which serial port this ends up being depends on the machine you're
  505. * running this kernel on. I'm not convinced that this is a good idea,
  506. * but that's the way it traditionally works.
  507. *
  508. * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
  509. * used here.
  510. */
  511. static void __init sa1100_init_ports(void)
  512. {
  513. static int first = 1;
  514. int i;
  515. if (!first)
  516. return;
  517. first = 0;
  518. for (i = 0; i < NR_PORTS; i++) {
  519. sa1100_ports[i].port.uartclk = 3686400;
  520. sa1100_ports[i].port.ops = &sa1100_pops;
  521. sa1100_ports[i].port.fifosize = 8;
  522. sa1100_ports[i].port.line = i;
  523. sa1100_ports[i].port.iotype = UPIO_MEM;
  524. init_timer(&sa1100_ports[i].timer);
  525. sa1100_ports[i].timer.function = sa1100_timeout;
  526. sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
  527. }
  528. /*
  529. * make transmit lines outputs, so that when the port
  530. * is closed, the output is in the MARK state.
  531. */
  532. PPDR |= PPC_TXD1 | PPC_TXD3;
  533. PPSR |= PPC_TXD1 | PPC_TXD3;
  534. }
  535. void __devinit sa1100_register_uart_fns(struct sa1100_port_fns *fns)
  536. {
  537. if (fns->get_mctrl)
  538. sa1100_pops.get_mctrl = fns->get_mctrl;
  539. if (fns->set_mctrl)
  540. sa1100_pops.set_mctrl = fns->set_mctrl;
  541. sa1100_pops.pm = fns->pm;
  542. sa1100_pops.set_wake = fns->set_wake;
  543. }
  544. void __init sa1100_register_uart(int idx, int port)
  545. {
  546. if (idx >= NR_PORTS) {
  547. printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
  548. return;
  549. }
  550. switch (port) {
  551. case 1:
  552. sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
  553. sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
  554. sa1100_ports[idx].port.irq = IRQ_Ser1UART;
  555. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  556. break;
  557. case 2:
  558. sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
  559. sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
  560. sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
  561. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  562. break;
  563. case 3:
  564. sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
  565. sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
  566. sa1100_ports[idx].port.irq = IRQ_Ser3UART;
  567. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  568. break;
  569. default:
  570. printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
  571. }
  572. }
  573. #ifdef CONFIG_SERIAL_SA1100_CONSOLE
  574. static void sa1100_console_putchar(struct uart_port *port, int ch)
  575. {
  576. struct sa1100_port *sport = (struct sa1100_port *)port;
  577. while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
  578. barrier();
  579. UART_PUT_CHAR(sport, ch);
  580. }
  581. /*
  582. * Interrupts are disabled on entering
  583. */
  584. static void
  585. sa1100_console_write(struct console *co, const char *s, unsigned int count)
  586. {
  587. struct sa1100_port *sport = &sa1100_ports[co->index];
  588. unsigned int old_utcr3, status;
  589. /*
  590. * First, save UTCR3 and then disable interrupts
  591. */
  592. old_utcr3 = UART_GET_UTCR3(sport);
  593. UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
  594. UTCR3_TXE);
  595. uart_console_write(&sport->port, s, count, sa1100_console_putchar);
  596. /*
  597. * Finally, wait for transmitter to become empty
  598. * and restore UTCR3
  599. */
  600. do {
  601. status = UART_GET_UTSR1(sport);
  602. } while (status & UTSR1_TBY);
  603. UART_PUT_UTCR3(sport, old_utcr3);
  604. }
  605. /*
  606. * If the port was already initialised (eg, by a boot loader),
  607. * try to determine the current setup.
  608. */
  609. static void __init
  610. sa1100_console_get_options(struct sa1100_port *sport, int *baud,
  611. int *parity, int *bits)
  612. {
  613. unsigned int utcr3;
  614. utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
  615. if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
  616. /* ok, the port was enabled */
  617. unsigned int utcr0, quot;
  618. utcr0 = UART_GET_UTCR0(sport);
  619. *parity = 'n';
  620. if (utcr0 & UTCR0_PE) {
  621. if (utcr0 & UTCR0_OES)
  622. *parity = 'e';
  623. else
  624. *parity = 'o';
  625. }
  626. if (utcr0 & UTCR0_DSS)
  627. *bits = 8;
  628. else
  629. *bits = 7;
  630. quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
  631. quot &= 0xfff;
  632. *baud = sport->port.uartclk / (16 * (quot + 1));
  633. }
  634. }
  635. static int __init
  636. sa1100_console_setup(struct console *co, char *options)
  637. {
  638. struct sa1100_port *sport;
  639. int baud = 9600;
  640. int bits = 8;
  641. int parity = 'n';
  642. int flow = 'n';
  643. /*
  644. * Check whether an invalid uart number has been specified, and
  645. * if so, search for the first available port that does have
  646. * console support.
  647. */
  648. if (co->index == -1 || co->index >= NR_PORTS)
  649. co->index = 0;
  650. sport = &sa1100_ports[co->index];
  651. if (options)
  652. uart_parse_options(options, &baud, &parity, &bits, &flow);
  653. else
  654. sa1100_console_get_options(sport, &baud, &parity, &bits);
  655. return uart_set_options(&sport->port, co, baud, parity, bits, flow);
  656. }
  657. static struct uart_driver sa1100_reg;
  658. static struct console sa1100_console = {
  659. .name = "ttySA",
  660. .write = sa1100_console_write,
  661. .device = uart_console_device,
  662. .setup = sa1100_console_setup,
  663. .flags = CON_PRINTBUFFER,
  664. .index = -1,
  665. .data = &sa1100_reg,
  666. };
  667. static int __init sa1100_rs_console_init(void)
  668. {
  669. sa1100_init_ports();
  670. register_console(&sa1100_console);
  671. return 0;
  672. }
  673. console_initcall(sa1100_rs_console_init);
  674. #define SA1100_CONSOLE &sa1100_console
  675. #else
  676. #define SA1100_CONSOLE NULL
  677. #endif
  678. static struct uart_driver sa1100_reg = {
  679. .owner = THIS_MODULE,
  680. .driver_name = "ttySA",
  681. .dev_name = "ttySA",
  682. .major = SERIAL_SA1100_MAJOR,
  683. .minor = MINOR_START,
  684. .nr = NR_PORTS,
  685. .cons = SA1100_CONSOLE,
  686. };
  687. static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
  688. {
  689. struct sa1100_port *sport = platform_get_drvdata(dev);
  690. if (sport)
  691. uart_suspend_port(&sa1100_reg, &sport->port);
  692. return 0;
  693. }
  694. static int sa1100_serial_resume(struct platform_device *dev)
  695. {
  696. struct sa1100_port *sport = platform_get_drvdata(dev);
  697. if (sport)
  698. uart_resume_port(&sa1100_reg, &sport->port);
  699. return 0;
  700. }
  701. static int sa1100_serial_probe(struct platform_device *dev)
  702. {
  703. struct resource *res = dev->resource;
  704. int i;
  705. for (i = 0; i < dev->num_resources; i++, res++)
  706. if (res->flags & IORESOURCE_MEM)
  707. break;
  708. if (i < dev->num_resources) {
  709. for (i = 0; i < NR_PORTS; i++) {
  710. if (sa1100_ports[i].port.mapbase != res->start)
  711. continue;
  712. sa1100_ports[i].port.dev = &dev->dev;
  713. uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
  714. platform_set_drvdata(dev, &sa1100_ports[i]);
  715. break;
  716. }
  717. }
  718. return 0;
  719. }
  720. static int sa1100_serial_remove(struct platform_device *pdev)
  721. {
  722. struct sa1100_port *sport = platform_get_drvdata(pdev);
  723. platform_set_drvdata(pdev, NULL);
  724. if (sport)
  725. uart_remove_one_port(&sa1100_reg, &sport->port);
  726. return 0;
  727. }
  728. static struct platform_driver sa11x0_serial_driver = {
  729. .probe = sa1100_serial_probe,
  730. .remove = sa1100_serial_remove,
  731. .suspend = sa1100_serial_suspend,
  732. .resume = sa1100_serial_resume,
  733. .driver = {
  734. .name = "sa11x0-uart",
  735. .owner = THIS_MODULE,
  736. },
  737. };
  738. static int __init sa1100_serial_init(void)
  739. {
  740. int ret;
  741. printk(KERN_INFO "Serial: SA11x0 driver\n");
  742. sa1100_init_ports();
  743. ret = uart_register_driver(&sa1100_reg);
  744. if (ret == 0) {
  745. ret = platform_driver_register(&sa11x0_serial_driver);
  746. if (ret)
  747. uart_unregister_driver(&sa1100_reg);
  748. }
  749. return ret;
  750. }
  751. static void __exit sa1100_serial_exit(void)
  752. {
  753. platform_driver_unregister(&sa11x0_serial_driver);
  754. uart_unregister_driver(&sa1100_reg);
  755. }
  756. module_init(sa1100_serial_init);
  757. module_exit(sa1100_serial_exit);
  758. MODULE_AUTHOR("Deep Blue Solutions Ltd");
  759. MODULE_DESCRIPTION("SA1100 generic serial port driver");
  760. MODULE_LICENSE("GPL");
  761. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
  762. MODULE_ALIAS("platform:sa11x0-uart");