hpsa.c 143 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  96. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  100. /* board_id = Subsystem Device ID & Vendor ID
  101. * product = Marketing Name for the board
  102. * access = Address of the struct of function pointers
  103. */
  104. static struct board_type products[] = {
  105. {0x3241103C, "Smart Array P212", &SA5_access},
  106. {0x3243103C, "Smart Array P410", &SA5_access},
  107. {0x3245103C, "Smart Array P410i", &SA5_access},
  108. {0x3247103C, "Smart Array P411", &SA5_access},
  109. {0x3249103C, "Smart Array P812", &SA5_access},
  110. {0x324a103C, "Smart Array P712m", &SA5_access},
  111. {0x324b103C, "Smart Array P711m", &SA5_access},
  112. {0x3350103C, "Smart Array", &SA5_access},
  113. {0x3351103C, "Smart Array", &SA5_access},
  114. {0x3352103C, "Smart Array", &SA5_access},
  115. {0x3353103C, "Smart Array", &SA5_access},
  116. {0x3354103C, "Smart Array", &SA5_access},
  117. {0x3355103C, "Smart Array", &SA5_access},
  118. {0x3356103C, "Smart Array", &SA5_access},
  119. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  120. };
  121. static int number_of_controllers;
  122. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  123. static spinlock_t lockup_detector_lock;
  124. static struct task_struct *hpsa_lockup_detector;
  125. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  126. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  127. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  128. static void start_io(struct ctlr_info *h);
  129. #ifdef CONFIG_COMPAT
  130. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  131. #endif
  132. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  133. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  134. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  135. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  136. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  137. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  138. int cmd_type);
  139. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  140. static void hpsa_scan_start(struct Scsi_Host *);
  141. static int hpsa_scan_finished(struct Scsi_Host *sh,
  142. unsigned long elapsed_time);
  143. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  144. int qdepth, int reason);
  145. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  146. static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
  147. static int hpsa_slave_alloc(struct scsi_device *sdev);
  148. static void hpsa_slave_destroy(struct scsi_device *sdev);
  149. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  150. static int check_for_unit_attention(struct ctlr_info *h,
  151. struct CommandList *c);
  152. static void check_ioctl_unit_attention(struct ctlr_info *h,
  153. struct CommandList *c);
  154. /* performant mode helper functions */
  155. static void calc_bucket_map(int *bucket, int num_buckets,
  156. int nsgs, int *bucket_map);
  157. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  158. static inline u32 next_command(struct ctlr_info *h, u8 q);
  159. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  160. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  161. u64 *cfg_offset);
  162. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  163. unsigned long *memory_bar);
  164. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  165. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  166. void __iomem *vaddr, int wait_for_ready);
  167. static inline void finish_cmd(struct CommandList *c);
  168. #define BOARD_NOT_READY 0
  169. #define BOARD_READY 1
  170. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  171. {
  172. unsigned long *priv = shost_priv(sdev->host);
  173. return (struct ctlr_info *) *priv;
  174. }
  175. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  176. {
  177. unsigned long *priv = shost_priv(sh);
  178. return (struct ctlr_info *) *priv;
  179. }
  180. static int check_for_unit_attention(struct ctlr_info *h,
  181. struct CommandList *c)
  182. {
  183. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  184. return 0;
  185. switch (c->err_info->SenseInfo[12]) {
  186. case STATE_CHANGED:
  187. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  188. "detected, command retried\n", h->ctlr);
  189. break;
  190. case LUN_FAILED:
  191. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  192. "detected, action required\n", h->ctlr);
  193. break;
  194. case REPORT_LUNS_CHANGED:
  195. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  196. "changed, action required\n", h->ctlr);
  197. /*
  198. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  199. * target (array) devices.
  200. */
  201. break;
  202. case POWER_OR_RESET:
  203. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  204. "or device reset detected\n", h->ctlr);
  205. break;
  206. case UNIT_ATTENTION_CLEARED:
  207. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  208. "cleared by another initiator\n", h->ctlr);
  209. break;
  210. default:
  211. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  212. "unit attention detected\n", h->ctlr);
  213. break;
  214. }
  215. return 1;
  216. }
  217. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  218. {
  219. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  220. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  221. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  222. return 0;
  223. dev_warn(&h->pdev->dev, HPSA "device busy");
  224. return 1;
  225. }
  226. static ssize_t host_store_rescan(struct device *dev,
  227. struct device_attribute *attr,
  228. const char *buf, size_t count)
  229. {
  230. struct ctlr_info *h;
  231. struct Scsi_Host *shost = class_to_shost(dev);
  232. h = shost_to_hba(shost);
  233. hpsa_scan_start(h->scsi_host);
  234. return count;
  235. }
  236. static ssize_t host_show_firmware_revision(struct device *dev,
  237. struct device_attribute *attr, char *buf)
  238. {
  239. struct ctlr_info *h;
  240. struct Scsi_Host *shost = class_to_shost(dev);
  241. unsigned char *fwrev;
  242. h = shost_to_hba(shost);
  243. if (!h->hba_inquiry_data)
  244. return 0;
  245. fwrev = &h->hba_inquiry_data[32];
  246. return snprintf(buf, 20, "%c%c%c%c\n",
  247. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  248. }
  249. static ssize_t host_show_commands_outstanding(struct device *dev,
  250. struct device_attribute *attr, char *buf)
  251. {
  252. struct Scsi_Host *shost = class_to_shost(dev);
  253. struct ctlr_info *h = shost_to_hba(shost);
  254. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  255. }
  256. static ssize_t host_show_transport_mode(struct device *dev,
  257. struct device_attribute *attr, char *buf)
  258. {
  259. struct ctlr_info *h;
  260. struct Scsi_Host *shost = class_to_shost(dev);
  261. h = shost_to_hba(shost);
  262. return snprintf(buf, 20, "%s\n",
  263. h->transMethod & CFGTBL_Trans_Performant ?
  264. "performant" : "simple");
  265. }
  266. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  267. static u32 unresettable_controller[] = {
  268. 0x324a103C, /* Smart Array P712m */
  269. 0x324b103C, /* SmartArray P711m */
  270. 0x3223103C, /* Smart Array P800 */
  271. 0x3234103C, /* Smart Array P400 */
  272. 0x3235103C, /* Smart Array P400i */
  273. 0x3211103C, /* Smart Array E200i */
  274. 0x3212103C, /* Smart Array E200 */
  275. 0x3213103C, /* Smart Array E200i */
  276. 0x3214103C, /* Smart Array E200i */
  277. 0x3215103C, /* Smart Array E200i */
  278. 0x3237103C, /* Smart Array E500 */
  279. 0x323D103C, /* Smart Array P700m */
  280. 0x40800E11, /* Smart Array 5i */
  281. 0x409C0E11, /* Smart Array 6400 */
  282. 0x409D0E11, /* Smart Array 6400 EM */
  283. 0x40700E11, /* Smart Array 5300 */
  284. 0x40820E11, /* Smart Array 532 */
  285. 0x40830E11, /* Smart Array 5312 */
  286. 0x409A0E11, /* Smart Array 641 */
  287. 0x409B0E11, /* Smart Array 642 */
  288. 0x40910E11, /* Smart Array 6i */
  289. };
  290. /* List of controllers which cannot even be soft reset */
  291. static u32 soft_unresettable_controller[] = {
  292. 0x40800E11, /* Smart Array 5i */
  293. 0x40700E11, /* Smart Array 5300 */
  294. 0x40820E11, /* Smart Array 532 */
  295. 0x40830E11, /* Smart Array 5312 */
  296. 0x409A0E11, /* Smart Array 641 */
  297. 0x409B0E11, /* Smart Array 642 */
  298. 0x40910E11, /* Smart Array 6i */
  299. /* Exclude 640x boards. These are two pci devices in one slot
  300. * which share a battery backed cache module. One controls the
  301. * cache, the other accesses the cache through the one that controls
  302. * it. If we reset the one controlling the cache, the other will
  303. * likely not be happy. Just forbid resetting this conjoined mess.
  304. * The 640x isn't really supported by hpsa anyway.
  305. */
  306. 0x409C0E11, /* Smart Array 6400 */
  307. 0x409D0E11, /* Smart Array 6400 EM */
  308. };
  309. static int ctlr_is_hard_resettable(u32 board_id)
  310. {
  311. int i;
  312. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  313. if (unresettable_controller[i] == board_id)
  314. return 0;
  315. return 1;
  316. }
  317. static int ctlr_is_soft_resettable(u32 board_id)
  318. {
  319. int i;
  320. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  321. if (soft_unresettable_controller[i] == board_id)
  322. return 0;
  323. return 1;
  324. }
  325. static int ctlr_is_resettable(u32 board_id)
  326. {
  327. return ctlr_is_hard_resettable(board_id) ||
  328. ctlr_is_soft_resettable(board_id);
  329. }
  330. static ssize_t host_show_resettable(struct device *dev,
  331. struct device_attribute *attr, char *buf)
  332. {
  333. struct ctlr_info *h;
  334. struct Scsi_Host *shost = class_to_shost(dev);
  335. h = shost_to_hba(shost);
  336. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  337. }
  338. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  339. {
  340. return (scsi3addr[3] & 0xC0) == 0x40;
  341. }
  342. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  343. "1(ADM)", "UNKNOWN"
  344. };
  345. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  346. static ssize_t raid_level_show(struct device *dev,
  347. struct device_attribute *attr, char *buf)
  348. {
  349. ssize_t l = 0;
  350. unsigned char rlevel;
  351. struct ctlr_info *h;
  352. struct scsi_device *sdev;
  353. struct hpsa_scsi_dev_t *hdev;
  354. unsigned long flags;
  355. sdev = to_scsi_device(dev);
  356. h = sdev_to_hba(sdev);
  357. spin_lock_irqsave(&h->lock, flags);
  358. hdev = sdev->hostdata;
  359. if (!hdev) {
  360. spin_unlock_irqrestore(&h->lock, flags);
  361. return -ENODEV;
  362. }
  363. /* Is this even a logical drive? */
  364. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  365. spin_unlock_irqrestore(&h->lock, flags);
  366. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  367. return l;
  368. }
  369. rlevel = hdev->raid_level;
  370. spin_unlock_irqrestore(&h->lock, flags);
  371. if (rlevel > RAID_UNKNOWN)
  372. rlevel = RAID_UNKNOWN;
  373. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  374. return l;
  375. }
  376. static ssize_t lunid_show(struct device *dev,
  377. struct device_attribute *attr, char *buf)
  378. {
  379. struct ctlr_info *h;
  380. struct scsi_device *sdev;
  381. struct hpsa_scsi_dev_t *hdev;
  382. unsigned long flags;
  383. unsigned char lunid[8];
  384. sdev = to_scsi_device(dev);
  385. h = sdev_to_hba(sdev);
  386. spin_lock_irqsave(&h->lock, flags);
  387. hdev = sdev->hostdata;
  388. if (!hdev) {
  389. spin_unlock_irqrestore(&h->lock, flags);
  390. return -ENODEV;
  391. }
  392. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  393. spin_unlock_irqrestore(&h->lock, flags);
  394. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  395. lunid[0], lunid[1], lunid[2], lunid[3],
  396. lunid[4], lunid[5], lunid[6], lunid[7]);
  397. }
  398. static ssize_t unique_id_show(struct device *dev,
  399. struct device_attribute *attr, char *buf)
  400. {
  401. struct ctlr_info *h;
  402. struct scsi_device *sdev;
  403. struct hpsa_scsi_dev_t *hdev;
  404. unsigned long flags;
  405. unsigned char sn[16];
  406. sdev = to_scsi_device(dev);
  407. h = sdev_to_hba(sdev);
  408. spin_lock_irqsave(&h->lock, flags);
  409. hdev = sdev->hostdata;
  410. if (!hdev) {
  411. spin_unlock_irqrestore(&h->lock, flags);
  412. return -ENODEV;
  413. }
  414. memcpy(sn, hdev->device_id, sizeof(sn));
  415. spin_unlock_irqrestore(&h->lock, flags);
  416. return snprintf(buf, 16 * 2 + 2,
  417. "%02X%02X%02X%02X%02X%02X%02X%02X"
  418. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  419. sn[0], sn[1], sn[2], sn[3],
  420. sn[4], sn[5], sn[6], sn[7],
  421. sn[8], sn[9], sn[10], sn[11],
  422. sn[12], sn[13], sn[14], sn[15]);
  423. }
  424. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  425. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  426. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  427. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  428. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  429. host_show_firmware_revision, NULL);
  430. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  431. host_show_commands_outstanding, NULL);
  432. static DEVICE_ATTR(transport_mode, S_IRUGO,
  433. host_show_transport_mode, NULL);
  434. static DEVICE_ATTR(resettable, S_IRUGO,
  435. host_show_resettable, NULL);
  436. static struct device_attribute *hpsa_sdev_attrs[] = {
  437. &dev_attr_raid_level,
  438. &dev_attr_lunid,
  439. &dev_attr_unique_id,
  440. NULL,
  441. };
  442. static struct device_attribute *hpsa_shost_attrs[] = {
  443. &dev_attr_rescan,
  444. &dev_attr_firmware_revision,
  445. &dev_attr_commands_outstanding,
  446. &dev_attr_transport_mode,
  447. &dev_attr_resettable,
  448. NULL,
  449. };
  450. static struct scsi_host_template hpsa_driver_template = {
  451. .module = THIS_MODULE,
  452. .name = HPSA,
  453. .proc_name = HPSA,
  454. .queuecommand = hpsa_scsi_queue_command,
  455. .scan_start = hpsa_scan_start,
  456. .scan_finished = hpsa_scan_finished,
  457. .change_queue_depth = hpsa_change_queue_depth,
  458. .this_id = -1,
  459. .use_clustering = ENABLE_CLUSTERING,
  460. .eh_abort_handler = hpsa_eh_abort_handler,
  461. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  462. .ioctl = hpsa_ioctl,
  463. .slave_alloc = hpsa_slave_alloc,
  464. .slave_destroy = hpsa_slave_destroy,
  465. #ifdef CONFIG_COMPAT
  466. .compat_ioctl = hpsa_compat_ioctl,
  467. #endif
  468. .sdev_attrs = hpsa_sdev_attrs,
  469. .shost_attrs = hpsa_shost_attrs,
  470. .max_sectors = 8192,
  471. };
  472. /* Enqueuing and dequeuing functions for cmdlists. */
  473. static inline void addQ(struct list_head *list, struct CommandList *c)
  474. {
  475. list_add_tail(&c->list, list);
  476. }
  477. static inline u32 next_command(struct ctlr_info *h, u8 q)
  478. {
  479. u32 a;
  480. struct reply_pool *rq = &h->reply_queue[q];
  481. unsigned long flags;
  482. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  483. return h->access.command_completed(h, q);
  484. if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
  485. a = rq->head[rq->current_entry];
  486. rq->current_entry++;
  487. spin_lock_irqsave(&h->lock, flags);
  488. h->commands_outstanding--;
  489. spin_unlock_irqrestore(&h->lock, flags);
  490. } else {
  491. a = FIFO_EMPTY;
  492. }
  493. /* Check for wraparound */
  494. if (rq->current_entry == h->max_commands) {
  495. rq->current_entry = 0;
  496. rq->wraparound ^= 1;
  497. }
  498. return a;
  499. }
  500. /* set_performant_mode: Modify the tag for cciss performant
  501. * set bit 0 for pull model, bits 3-1 for block fetch
  502. * register number
  503. */
  504. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  505. {
  506. if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
  507. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  508. if (likely(h->msix_vector))
  509. c->Header.ReplyQueue =
  510. smp_processor_id() % h->nreply_queues;
  511. }
  512. }
  513. static int is_firmware_flash_cmd(u8 *cdb)
  514. {
  515. return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
  516. }
  517. /*
  518. * During firmware flash, the heartbeat register may not update as frequently
  519. * as it should. So we dial down lockup detection during firmware flash. and
  520. * dial it back up when firmware flash completes.
  521. */
  522. #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
  523. #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
  524. static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
  525. struct CommandList *c)
  526. {
  527. if (!is_firmware_flash_cmd(c->Request.CDB))
  528. return;
  529. atomic_inc(&h->firmware_flash_in_progress);
  530. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
  531. }
  532. static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
  533. struct CommandList *c)
  534. {
  535. if (is_firmware_flash_cmd(c->Request.CDB) &&
  536. atomic_dec_and_test(&h->firmware_flash_in_progress))
  537. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  538. }
  539. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  540. struct CommandList *c)
  541. {
  542. unsigned long flags;
  543. set_performant_mode(h, c);
  544. dial_down_lockup_detection_during_fw_flash(h, c);
  545. spin_lock_irqsave(&h->lock, flags);
  546. addQ(&h->reqQ, c);
  547. h->Qdepth++;
  548. spin_unlock_irqrestore(&h->lock, flags);
  549. start_io(h);
  550. }
  551. static inline void removeQ(struct CommandList *c)
  552. {
  553. if (WARN_ON(list_empty(&c->list)))
  554. return;
  555. list_del_init(&c->list);
  556. }
  557. static inline int is_hba_lunid(unsigned char scsi3addr[])
  558. {
  559. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  560. }
  561. static inline int is_scsi_rev_5(struct ctlr_info *h)
  562. {
  563. if (!h->hba_inquiry_data)
  564. return 0;
  565. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  566. return 1;
  567. return 0;
  568. }
  569. static int hpsa_find_target_lun(struct ctlr_info *h,
  570. unsigned char scsi3addr[], int bus, int *target, int *lun)
  571. {
  572. /* finds an unused bus, target, lun for a new physical device
  573. * assumes h->devlock is held
  574. */
  575. int i, found = 0;
  576. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  577. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  578. for (i = 0; i < h->ndevices; i++) {
  579. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  580. __set_bit(h->dev[i]->target, lun_taken);
  581. }
  582. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  583. if (i < HPSA_MAX_DEVICES) {
  584. /* *bus = 1; */
  585. *target = i;
  586. *lun = 0;
  587. found = 1;
  588. }
  589. return !found;
  590. }
  591. /* Add an entry into h->dev[] array. */
  592. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  593. struct hpsa_scsi_dev_t *device,
  594. struct hpsa_scsi_dev_t *added[], int *nadded)
  595. {
  596. /* assumes h->devlock is held */
  597. int n = h->ndevices;
  598. int i;
  599. unsigned char addr1[8], addr2[8];
  600. struct hpsa_scsi_dev_t *sd;
  601. if (n >= HPSA_MAX_DEVICES) {
  602. dev_err(&h->pdev->dev, "too many devices, some will be "
  603. "inaccessible.\n");
  604. return -1;
  605. }
  606. /* physical devices do not have lun or target assigned until now. */
  607. if (device->lun != -1)
  608. /* Logical device, lun is already assigned. */
  609. goto lun_assigned;
  610. /* If this device a non-zero lun of a multi-lun device
  611. * byte 4 of the 8-byte LUN addr will contain the logical
  612. * unit no, zero otherise.
  613. */
  614. if (device->scsi3addr[4] == 0) {
  615. /* This is not a non-zero lun of a multi-lun device */
  616. if (hpsa_find_target_lun(h, device->scsi3addr,
  617. device->bus, &device->target, &device->lun) != 0)
  618. return -1;
  619. goto lun_assigned;
  620. }
  621. /* This is a non-zero lun of a multi-lun device.
  622. * Search through our list and find the device which
  623. * has the same 8 byte LUN address, excepting byte 4.
  624. * Assign the same bus and target for this new LUN.
  625. * Use the logical unit number from the firmware.
  626. */
  627. memcpy(addr1, device->scsi3addr, 8);
  628. addr1[4] = 0;
  629. for (i = 0; i < n; i++) {
  630. sd = h->dev[i];
  631. memcpy(addr2, sd->scsi3addr, 8);
  632. addr2[4] = 0;
  633. /* differ only in byte 4? */
  634. if (memcmp(addr1, addr2, 8) == 0) {
  635. device->bus = sd->bus;
  636. device->target = sd->target;
  637. device->lun = device->scsi3addr[4];
  638. break;
  639. }
  640. }
  641. if (device->lun == -1) {
  642. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  643. " suspect firmware bug or unsupported hardware "
  644. "configuration.\n");
  645. return -1;
  646. }
  647. lun_assigned:
  648. h->dev[n] = device;
  649. h->ndevices++;
  650. added[*nadded] = device;
  651. (*nadded)++;
  652. /* initially, (before registering with scsi layer) we don't
  653. * know our hostno and we don't want to print anything first
  654. * time anyway (the scsi layer's inquiries will show that info)
  655. */
  656. /* if (hostno != -1) */
  657. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  658. scsi_device_type(device->devtype), hostno,
  659. device->bus, device->target, device->lun);
  660. return 0;
  661. }
  662. /* Update an entry in h->dev[] array. */
  663. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  664. int entry, struct hpsa_scsi_dev_t *new_entry)
  665. {
  666. /* assumes h->devlock is held */
  667. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  668. /* Raid level changed. */
  669. h->dev[entry]->raid_level = new_entry->raid_level;
  670. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  671. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  672. new_entry->target, new_entry->lun);
  673. }
  674. /* Replace an entry from h->dev[] array. */
  675. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  676. int entry, struct hpsa_scsi_dev_t *new_entry,
  677. struct hpsa_scsi_dev_t *added[], int *nadded,
  678. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  679. {
  680. /* assumes h->devlock is held */
  681. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  682. removed[*nremoved] = h->dev[entry];
  683. (*nremoved)++;
  684. /*
  685. * New physical devices won't have target/lun assigned yet
  686. * so we need to preserve the values in the slot we are replacing.
  687. */
  688. if (new_entry->target == -1) {
  689. new_entry->target = h->dev[entry]->target;
  690. new_entry->lun = h->dev[entry]->lun;
  691. }
  692. h->dev[entry] = new_entry;
  693. added[*nadded] = new_entry;
  694. (*nadded)++;
  695. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  696. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  697. new_entry->target, new_entry->lun);
  698. }
  699. /* Remove an entry from h->dev[] array. */
  700. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  701. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  702. {
  703. /* assumes h->devlock is held */
  704. int i;
  705. struct hpsa_scsi_dev_t *sd;
  706. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  707. sd = h->dev[entry];
  708. removed[*nremoved] = h->dev[entry];
  709. (*nremoved)++;
  710. for (i = entry; i < h->ndevices-1; i++)
  711. h->dev[i] = h->dev[i+1];
  712. h->ndevices--;
  713. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  714. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  715. sd->lun);
  716. }
  717. #define SCSI3ADDR_EQ(a, b) ( \
  718. (a)[7] == (b)[7] && \
  719. (a)[6] == (b)[6] && \
  720. (a)[5] == (b)[5] && \
  721. (a)[4] == (b)[4] && \
  722. (a)[3] == (b)[3] && \
  723. (a)[2] == (b)[2] && \
  724. (a)[1] == (b)[1] && \
  725. (a)[0] == (b)[0])
  726. static void fixup_botched_add(struct ctlr_info *h,
  727. struct hpsa_scsi_dev_t *added)
  728. {
  729. /* called when scsi_add_device fails in order to re-adjust
  730. * h->dev[] to match the mid layer's view.
  731. */
  732. unsigned long flags;
  733. int i, j;
  734. spin_lock_irqsave(&h->lock, flags);
  735. for (i = 0; i < h->ndevices; i++) {
  736. if (h->dev[i] == added) {
  737. for (j = i; j < h->ndevices-1; j++)
  738. h->dev[j] = h->dev[j+1];
  739. h->ndevices--;
  740. break;
  741. }
  742. }
  743. spin_unlock_irqrestore(&h->lock, flags);
  744. kfree(added);
  745. }
  746. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  747. struct hpsa_scsi_dev_t *dev2)
  748. {
  749. /* we compare everything except lun and target as these
  750. * are not yet assigned. Compare parts likely
  751. * to differ first
  752. */
  753. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  754. sizeof(dev1->scsi3addr)) != 0)
  755. return 0;
  756. if (memcmp(dev1->device_id, dev2->device_id,
  757. sizeof(dev1->device_id)) != 0)
  758. return 0;
  759. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  760. return 0;
  761. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  762. return 0;
  763. if (dev1->devtype != dev2->devtype)
  764. return 0;
  765. if (dev1->bus != dev2->bus)
  766. return 0;
  767. return 1;
  768. }
  769. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  770. struct hpsa_scsi_dev_t *dev2)
  771. {
  772. /* Device attributes that can change, but don't mean
  773. * that the device is a different device, nor that the OS
  774. * needs to be told anything about the change.
  775. */
  776. if (dev1->raid_level != dev2->raid_level)
  777. return 1;
  778. return 0;
  779. }
  780. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  781. * and return needle location in *index. If scsi3addr matches, but not
  782. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  783. * location in *index.
  784. * In the case of a minor device attribute change, such as RAID level, just
  785. * return DEVICE_UPDATED, along with the updated device's location in index.
  786. * If needle not found, return DEVICE_NOT_FOUND.
  787. */
  788. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  789. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  790. int *index)
  791. {
  792. int i;
  793. #define DEVICE_NOT_FOUND 0
  794. #define DEVICE_CHANGED 1
  795. #define DEVICE_SAME 2
  796. #define DEVICE_UPDATED 3
  797. for (i = 0; i < haystack_size; i++) {
  798. if (haystack[i] == NULL) /* previously removed. */
  799. continue;
  800. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  801. *index = i;
  802. if (device_is_the_same(needle, haystack[i])) {
  803. if (device_updated(needle, haystack[i]))
  804. return DEVICE_UPDATED;
  805. return DEVICE_SAME;
  806. } else {
  807. return DEVICE_CHANGED;
  808. }
  809. }
  810. }
  811. *index = -1;
  812. return DEVICE_NOT_FOUND;
  813. }
  814. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  815. struct hpsa_scsi_dev_t *sd[], int nsds)
  816. {
  817. /* sd contains scsi3 addresses and devtypes, and inquiry
  818. * data. This function takes what's in sd to be the current
  819. * reality and updates h->dev[] to reflect that reality.
  820. */
  821. int i, entry, device_change, changes = 0;
  822. struct hpsa_scsi_dev_t *csd;
  823. unsigned long flags;
  824. struct hpsa_scsi_dev_t **added, **removed;
  825. int nadded, nremoved;
  826. struct Scsi_Host *sh = NULL;
  827. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  828. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  829. if (!added || !removed) {
  830. dev_warn(&h->pdev->dev, "out of memory in "
  831. "adjust_hpsa_scsi_table\n");
  832. goto free_and_out;
  833. }
  834. spin_lock_irqsave(&h->devlock, flags);
  835. /* find any devices in h->dev[] that are not in
  836. * sd[] and remove them from h->dev[], and for any
  837. * devices which have changed, remove the old device
  838. * info and add the new device info.
  839. * If minor device attributes change, just update
  840. * the existing device structure.
  841. */
  842. i = 0;
  843. nremoved = 0;
  844. nadded = 0;
  845. while (i < h->ndevices) {
  846. csd = h->dev[i];
  847. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  848. if (device_change == DEVICE_NOT_FOUND) {
  849. changes++;
  850. hpsa_scsi_remove_entry(h, hostno, i,
  851. removed, &nremoved);
  852. continue; /* remove ^^^, hence i not incremented */
  853. } else if (device_change == DEVICE_CHANGED) {
  854. changes++;
  855. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  856. added, &nadded, removed, &nremoved);
  857. /* Set it to NULL to prevent it from being freed
  858. * at the bottom of hpsa_update_scsi_devices()
  859. */
  860. sd[entry] = NULL;
  861. } else if (device_change == DEVICE_UPDATED) {
  862. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  863. }
  864. i++;
  865. }
  866. /* Now, make sure every device listed in sd[] is also
  867. * listed in h->dev[], adding them if they aren't found
  868. */
  869. for (i = 0; i < nsds; i++) {
  870. if (!sd[i]) /* if already added above. */
  871. continue;
  872. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  873. h->ndevices, &entry);
  874. if (device_change == DEVICE_NOT_FOUND) {
  875. changes++;
  876. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  877. added, &nadded) != 0)
  878. break;
  879. sd[i] = NULL; /* prevent from being freed later. */
  880. } else if (device_change == DEVICE_CHANGED) {
  881. /* should never happen... */
  882. changes++;
  883. dev_warn(&h->pdev->dev,
  884. "device unexpectedly changed.\n");
  885. /* but if it does happen, we just ignore that device */
  886. }
  887. }
  888. spin_unlock_irqrestore(&h->devlock, flags);
  889. /* Don't notify scsi mid layer of any changes the first time through
  890. * (or if there are no changes) scsi_scan_host will do it later the
  891. * first time through.
  892. */
  893. if (hostno == -1 || !changes)
  894. goto free_and_out;
  895. sh = h->scsi_host;
  896. /* Notify scsi mid layer of any removed devices */
  897. for (i = 0; i < nremoved; i++) {
  898. struct scsi_device *sdev =
  899. scsi_device_lookup(sh, removed[i]->bus,
  900. removed[i]->target, removed[i]->lun);
  901. if (sdev != NULL) {
  902. scsi_remove_device(sdev);
  903. scsi_device_put(sdev);
  904. } else {
  905. /* We don't expect to get here.
  906. * future cmds to this device will get selection
  907. * timeout as if the device was gone.
  908. */
  909. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  910. " for removal.", hostno, removed[i]->bus,
  911. removed[i]->target, removed[i]->lun);
  912. }
  913. kfree(removed[i]);
  914. removed[i] = NULL;
  915. }
  916. /* Notify scsi mid layer of any added devices */
  917. for (i = 0; i < nadded; i++) {
  918. if (scsi_add_device(sh, added[i]->bus,
  919. added[i]->target, added[i]->lun) == 0)
  920. continue;
  921. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  922. "device not added.\n", hostno, added[i]->bus,
  923. added[i]->target, added[i]->lun);
  924. /* now we have to remove it from h->dev,
  925. * since it didn't get added to scsi mid layer
  926. */
  927. fixup_botched_add(h, added[i]);
  928. }
  929. free_and_out:
  930. kfree(added);
  931. kfree(removed);
  932. }
  933. /*
  934. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  935. * Assume's h->devlock is held.
  936. */
  937. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  938. int bus, int target, int lun)
  939. {
  940. int i;
  941. struct hpsa_scsi_dev_t *sd;
  942. for (i = 0; i < h->ndevices; i++) {
  943. sd = h->dev[i];
  944. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  945. return sd;
  946. }
  947. return NULL;
  948. }
  949. /* link sdev->hostdata to our per-device structure. */
  950. static int hpsa_slave_alloc(struct scsi_device *sdev)
  951. {
  952. struct hpsa_scsi_dev_t *sd;
  953. unsigned long flags;
  954. struct ctlr_info *h;
  955. h = sdev_to_hba(sdev);
  956. spin_lock_irqsave(&h->devlock, flags);
  957. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  958. sdev_id(sdev), sdev->lun);
  959. if (sd != NULL)
  960. sdev->hostdata = sd;
  961. spin_unlock_irqrestore(&h->devlock, flags);
  962. return 0;
  963. }
  964. static void hpsa_slave_destroy(struct scsi_device *sdev)
  965. {
  966. /* nothing to do. */
  967. }
  968. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  969. {
  970. int i;
  971. if (!h->cmd_sg_list)
  972. return;
  973. for (i = 0; i < h->nr_cmds; i++) {
  974. kfree(h->cmd_sg_list[i]);
  975. h->cmd_sg_list[i] = NULL;
  976. }
  977. kfree(h->cmd_sg_list);
  978. h->cmd_sg_list = NULL;
  979. }
  980. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  981. {
  982. int i;
  983. if (h->chainsize <= 0)
  984. return 0;
  985. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  986. GFP_KERNEL);
  987. if (!h->cmd_sg_list)
  988. return -ENOMEM;
  989. for (i = 0; i < h->nr_cmds; i++) {
  990. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  991. h->chainsize, GFP_KERNEL);
  992. if (!h->cmd_sg_list[i])
  993. goto clean;
  994. }
  995. return 0;
  996. clean:
  997. hpsa_free_sg_chain_blocks(h);
  998. return -ENOMEM;
  999. }
  1000. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  1001. struct CommandList *c)
  1002. {
  1003. struct SGDescriptor *chain_sg, *chain_block;
  1004. u64 temp64;
  1005. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1006. chain_block = h->cmd_sg_list[c->cmdindex];
  1007. chain_sg->Ext = HPSA_SG_CHAIN;
  1008. chain_sg->Len = sizeof(*chain_sg) *
  1009. (c->Header.SGTotal - h->max_cmd_sg_entries);
  1010. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  1011. PCI_DMA_TODEVICE);
  1012. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  1013. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  1014. }
  1015. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  1016. struct CommandList *c)
  1017. {
  1018. struct SGDescriptor *chain_sg;
  1019. union u64bit temp64;
  1020. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  1021. return;
  1022. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1023. temp64.val32.lower = chain_sg->Addr.lower;
  1024. temp64.val32.upper = chain_sg->Addr.upper;
  1025. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  1026. }
  1027. static void complete_scsi_command(struct CommandList *cp)
  1028. {
  1029. struct scsi_cmnd *cmd;
  1030. struct ctlr_info *h;
  1031. struct ErrorInfo *ei;
  1032. unsigned char sense_key;
  1033. unsigned char asc; /* additional sense code */
  1034. unsigned char ascq; /* additional sense code qualifier */
  1035. unsigned long sense_data_size;
  1036. ei = cp->err_info;
  1037. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1038. h = cp->h;
  1039. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1040. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1041. hpsa_unmap_sg_chain_block(h, cp);
  1042. cmd->result = (DID_OK << 16); /* host byte */
  1043. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1044. cmd->result |= ei->ScsiStatus;
  1045. /* copy the sense data whether we need to or not. */
  1046. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1047. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1048. else
  1049. sense_data_size = sizeof(ei->SenseInfo);
  1050. if (ei->SenseLen < sense_data_size)
  1051. sense_data_size = ei->SenseLen;
  1052. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1053. scsi_set_resid(cmd, ei->ResidualCnt);
  1054. if (ei->CommandStatus == 0) {
  1055. cmd->scsi_done(cmd);
  1056. cmd_free(h, cp);
  1057. return;
  1058. }
  1059. /* an error has occurred */
  1060. switch (ei->CommandStatus) {
  1061. case CMD_TARGET_STATUS:
  1062. if (ei->ScsiStatus) {
  1063. /* Get sense key */
  1064. sense_key = 0xf & ei->SenseInfo[2];
  1065. /* Get additional sense code */
  1066. asc = ei->SenseInfo[12];
  1067. /* Get addition sense code qualifier */
  1068. ascq = ei->SenseInfo[13];
  1069. }
  1070. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1071. if (check_for_unit_attention(h, cp)) {
  1072. cmd->result = DID_SOFT_ERROR << 16;
  1073. break;
  1074. }
  1075. if (sense_key == ILLEGAL_REQUEST) {
  1076. /*
  1077. * SCSI REPORT_LUNS is commonly unsupported on
  1078. * Smart Array. Suppress noisy complaint.
  1079. */
  1080. if (cp->Request.CDB[0] == REPORT_LUNS)
  1081. break;
  1082. /* If ASC/ASCQ indicate Logical Unit
  1083. * Not Supported condition,
  1084. */
  1085. if ((asc == 0x25) && (ascq == 0x0)) {
  1086. dev_warn(&h->pdev->dev, "cp %p "
  1087. "has check condition\n", cp);
  1088. break;
  1089. }
  1090. }
  1091. if (sense_key == NOT_READY) {
  1092. /* If Sense is Not Ready, Logical Unit
  1093. * Not ready, Manual Intervention
  1094. * required
  1095. */
  1096. if ((asc == 0x04) && (ascq == 0x03)) {
  1097. dev_warn(&h->pdev->dev, "cp %p "
  1098. "has check condition: unit "
  1099. "not ready, manual "
  1100. "intervention required\n", cp);
  1101. break;
  1102. }
  1103. }
  1104. if (sense_key == ABORTED_COMMAND) {
  1105. /* Aborted command is retryable */
  1106. dev_warn(&h->pdev->dev, "cp %p "
  1107. "has check condition: aborted command: "
  1108. "ASC: 0x%x, ASCQ: 0x%x\n",
  1109. cp, asc, ascq);
  1110. cmd->result = DID_SOFT_ERROR << 16;
  1111. break;
  1112. }
  1113. /* Must be some other type of check condition */
  1114. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1115. "unknown type: "
  1116. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1117. "Returning result: 0x%x, "
  1118. "cmd=[%02x %02x %02x %02x %02x "
  1119. "%02x %02x %02x %02x %02x %02x "
  1120. "%02x %02x %02x %02x %02x]\n",
  1121. cp, sense_key, asc, ascq,
  1122. cmd->result,
  1123. cmd->cmnd[0], cmd->cmnd[1],
  1124. cmd->cmnd[2], cmd->cmnd[3],
  1125. cmd->cmnd[4], cmd->cmnd[5],
  1126. cmd->cmnd[6], cmd->cmnd[7],
  1127. cmd->cmnd[8], cmd->cmnd[9],
  1128. cmd->cmnd[10], cmd->cmnd[11],
  1129. cmd->cmnd[12], cmd->cmnd[13],
  1130. cmd->cmnd[14], cmd->cmnd[15]);
  1131. break;
  1132. }
  1133. /* Problem was not a check condition
  1134. * Pass it up to the upper layers...
  1135. */
  1136. if (ei->ScsiStatus) {
  1137. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1138. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1139. "Returning result: 0x%x\n",
  1140. cp, ei->ScsiStatus,
  1141. sense_key, asc, ascq,
  1142. cmd->result);
  1143. } else { /* scsi status is zero??? How??? */
  1144. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1145. "Returning no connection.\n", cp),
  1146. /* Ordinarily, this case should never happen,
  1147. * but there is a bug in some released firmware
  1148. * revisions that allows it to happen if, for
  1149. * example, a 4100 backplane loses power and
  1150. * the tape drive is in it. We assume that
  1151. * it's a fatal error of some kind because we
  1152. * can't show that it wasn't. We will make it
  1153. * look like selection timeout since that is
  1154. * the most common reason for this to occur,
  1155. * and it's severe enough.
  1156. */
  1157. cmd->result = DID_NO_CONNECT << 16;
  1158. }
  1159. break;
  1160. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1161. break;
  1162. case CMD_DATA_OVERRUN:
  1163. dev_warn(&h->pdev->dev, "cp %p has"
  1164. " completed with data overrun "
  1165. "reported\n", cp);
  1166. break;
  1167. case CMD_INVALID: {
  1168. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1169. print_cmd(cp); */
  1170. /* We get CMD_INVALID if you address a non-existent device
  1171. * instead of a selection timeout (no response). You will
  1172. * see this if you yank out a drive, then try to access it.
  1173. * This is kind of a shame because it means that any other
  1174. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1175. * missing target. */
  1176. cmd->result = DID_NO_CONNECT << 16;
  1177. }
  1178. break;
  1179. case CMD_PROTOCOL_ERR:
  1180. dev_warn(&h->pdev->dev, "cp %p has "
  1181. "protocol error \n", cp);
  1182. break;
  1183. case CMD_HARDWARE_ERR:
  1184. cmd->result = DID_ERROR << 16;
  1185. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1186. break;
  1187. case CMD_CONNECTION_LOST:
  1188. cmd->result = DID_ERROR << 16;
  1189. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1190. break;
  1191. case CMD_ABORTED:
  1192. cmd->result = DID_ABORT << 16;
  1193. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1194. cp, ei->ScsiStatus);
  1195. break;
  1196. case CMD_ABORT_FAILED:
  1197. cmd->result = DID_ERROR << 16;
  1198. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1199. break;
  1200. case CMD_UNSOLICITED_ABORT:
  1201. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1202. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1203. "abort\n", cp);
  1204. break;
  1205. case CMD_TIMEOUT:
  1206. cmd->result = DID_TIME_OUT << 16;
  1207. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1208. break;
  1209. case CMD_UNABORTABLE:
  1210. cmd->result = DID_ERROR << 16;
  1211. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1212. break;
  1213. default:
  1214. cmd->result = DID_ERROR << 16;
  1215. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1216. cp, ei->CommandStatus);
  1217. }
  1218. cmd->scsi_done(cmd);
  1219. cmd_free(h, cp);
  1220. }
  1221. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1222. struct CommandList *c, int sg_used, int data_direction)
  1223. {
  1224. int i;
  1225. union u64bit addr64;
  1226. for (i = 0; i < sg_used; i++) {
  1227. addr64.val32.lower = c->SG[i].Addr.lower;
  1228. addr64.val32.upper = c->SG[i].Addr.upper;
  1229. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1230. data_direction);
  1231. }
  1232. }
  1233. static void hpsa_map_one(struct pci_dev *pdev,
  1234. struct CommandList *cp,
  1235. unsigned char *buf,
  1236. size_t buflen,
  1237. int data_direction)
  1238. {
  1239. u64 addr64;
  1240. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1241. cp->Header.SGList = 0;
  1242. cp->Header.SGTotal = 0;
  1243. return;
  1244. }
  1245. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1246. cp->SG[0].Addr.lower =
  1247. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1248. cp->SG[0].Addr.upper =
  1249. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1250. cp->SG[0].Len = buflen;
  1251. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1252. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1253. }
  1254. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1255. struct CommandList *c)
  1256. {
  1257. DECLARE_COMPLETION_ONSTACK(wait);
  1258. c->waiting = &wait;
  1259. enqueue_cmd_and_start_io(h, c);
  1260. wait_for_completion(&wait);
  1261. }
  1262. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1263. struct CommandList *c)
  1264. {
  1265. unsigned long flags;
  1266. /* If controller lockup detected, fake a hardware error. */
  1267. spin_lock_irqsave(&h->lock, flags);
  1268. if (unlikely(h->lockup_detected)) {
  1269. spin_unlock_irqrestore(&h->lock, flags);
  1270. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1271. } else {
  1272. spin_unlock_irqrestore(&h->lock, flags);
  1273. hpsa_scsi_do_simple_cmd_core(h, c);
  1274. }
  1275. }
  1276. #define MAX_DRIVER_CMD_RETRIES 25
  1277. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1278. struct CommandList *c, int data_direction)
  1279. {
  1280. int backoff_time = 10, retry_count = 0;
  1281. do {
  1282. memset(c->err_info, 0, sizeof(*c->err_info));
  1283. hpsa_scsi_do_simple_cmd_core(h, c);
  1284. retry_count++;
  1285. if (retry_count > 3) {
  1286. msleep(backoff_time);
  1287. if (backoff_time < 1000)
  1288. backoff_time *= 2;
  1289. }
  1290. } while ((check_for_unit_attention(h, c) ||
  1291. check_for_busy(h, c)) &&
  1292. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1293. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1294. }
  1295. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1296. {
  1297. struct ErrorInfo *ei;
  1298. struct device *d = &cp->h->pdev->dev;
  1299. ei = cp->err_info;
  1300. switch (ei->CommandStatus) {
  1301. case CMD_TARGET_STATUS:
  1302. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1303. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1304. ei->ScsiStatus);
  1305. if (ei->ScsiStatus == 0)
  1306. dev_warn(d, "SCSI status is abnormally zero. "
  1307. "(probably indicates selection timeout "
  1308. "reported incorrectly due to a known "
  1309. "firmware bug, circa July, 2001.)\n");
  1310. break;
  1311. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1312. dev_info(d, "UNDERRUN\n");
  1313. break;
  1314. case CMD_DATA_OVERRUN:
  1315. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1316. break;
  1317. case CMD_INVALID: {
  1318. /* controller unfortunately reports SCSI passthru's
  1319. * to non-existent targets as invalid commands.
  1320. */
  1321. dev_warn(d, "cp %p is reported invalid (probably means "
  1322. "target device no longer present)\n", cp);
  1323. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1324. print_cmd(cp); */
  1325. }
  1326. break;
  1327. case CMD_PROTOCOL_ERR:
  1328. dev_warn(d, "cp %p has protocol error \n", cp);
  1329. break;
  1330. case CMD_HARDWARE_ERR:
  1331. /* cmd->result = DID_ERROR << 16; */
  1332. dev_warn(d, "cp %p had hardware error\n", cp);
  1333. break;
  1334. case CMD_CONNECTION_LOST:
  1335. dev_warn(d, "cp %p had connection lost\n", cp);
  1336. break;
  1337. case CMD_ABORTED:
  1338. dev_warn(d, "cp %p was aborted\n", cp);
  1339. break;
  1340. case CMD_ABORT_FAILED:
  1341. dev_warn(d, "cp %p reports abort failed\n", cp);
  1342. break;
  1343. case CMD_UNSOLICITED_ABORT:
  1344. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1345. break;
  1346. case CMD_TIMEOUT:
  1347. dev_warn(d, "cp %p timed out\n", cp);
  1348. break;
  1349. case CMD_UNABORTABLE:
  1350. dev_warn(d, "Command unabortable\n");
  1351. break;
  1352. default:
  1353. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1354. ei->CommandStatus);
  1355. }
  1356. }
  1357. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1358. unsigned char page, unsigned char *buf,
  1359. unsigned char bufsize)
  1360. {
  1361. int rc = IO_OK;
  1362. struct CommandList *c;
  1363. struct ErrorInfo *ei;
  1364. c = cmd_special_alloc(h);
  1365. if (c == NULL) { /* trouble... */
  1366. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1367. return -ENOMEM;
  1368. }
  1369. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1370. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1371. ei = c->err_info;
  1372. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1373. hpsa_scsi_interpret_error(c);
  1374. rc = -1;
  1375. }
  1376. cmd_special_free(h, c);
  1377. return rc;
  1378. }
  1379. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1380. {
  1381. int rc = IO_OK;
  1382. struct CommandList *c;
  1383. struct ErrorInfo *ei;
  1384. c = cmd_special_alloc(h);
  1385. if (c == NULL) { /* trouble... */
  1386. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1387. return -ENOMEM;
  1388. }
  1389. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1390. hpsa_scsi_do_simple_cmd_core(h, c);
  1391. /* no unmap needed here because no data xfer. */
  1392. ei = c->err_info;
  1393. if (ei->CommandStatus != 0) {
  1394. hpsa_scsi_interpret_error(c);
  1395. rc = -1;
  1396. }
  1397. cmd_special_free(h, c);
  1398. return rc;
  1399. }
  1400. static void hpsa_get_raid_level(struct ctlr_info *h,
  1401. unsigned char *scsi3addr, unsigned char *raid_level)
  1402. {
  1403. int rc;
  1404. unsigned char *buf;
  1405. *raid_level = RAID_UNKNOWN;
  1406. buf = kzalloc(64, GFP_KERNEL);
  1407. if (!buf)
  1408. return;
  1409. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1410. if (rc == 0)
  1411. *raid_level = buf[8];
  1412. if (*raid_level > RAID_UNKNOWN)
  1413. *raid_level = RAID_UNKNOWN;
  1414. kfree(buf);
  1415. return;
  1416. }
  1417. /* Get the device id from inquiry page 0x83 */
  1418. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1419. unsigned char *device_id, int buflen)
  1420. {
  1421. int rc;
  1422. unsigned char *buf;
  1423. if (buflen > 16)
  1424. buflen = 16;
  1425. buf = kzalloc(64, GFP_KERNEL);
  1426. if (!buf)
  1427. return -1;
  1428. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1429. if (rc == 0)
  1430. memcpy(device_id, &buf[8], buflen);
  1431. kfree(buf);
  1432. return rc != 0;
  1433. }
  1434. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1435. struct ReportLUNdata *buf, int bufsize,
  1436. int extended_response)
  1437. {
  1438. int rc = IO_OK;
  1439. struct CommandList *c;
  1440. unsigned char scsi3addr[8];
  1441. struct ErrorInfo *ei;
  1442. c = cmd_special_alloc(h);
  1443. if (c == NULL) { /* trouble... */
  1444. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1445. return -1;
  1446. }
  1447. /* address the controller */
  1448. memset(scsi3addr, 0, sizeof(scsi3addr));
  1449. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1450. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1451. if (extended_response)
  1452. c->Request.CDB[1] = extended_response;
  1453. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1454. ei = c->err_info;
  1455. if (ei->CommandStatus != 0 &&
  1456. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1457. hpsa_scsi_interpret_error(c);
  1458. rc = -1;
  1459. }
  1460. cmd_special_free(h, c);
  1461. return rc;
  1462. }
  1463. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1464. struct ReportLUNdata *buf,
  1465. int bufsize, int extended_response)
  1466. {
  1467. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1468. }
  1469. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1470. struct ReportLUNdata *buf, int bufsize)
  1471. {
  1472. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1473. }
  1474. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1475. int bus, int target, int lun)
  1476. {
  1477. device->bus = bus;
  1478. device->target = target;
  1479. device->lun = lun;
  1480. }
  1481. static int hpsa_update_device_info(struct ctlr_info *h,
  1482. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1483. unsigned char *is_OBDR_device)
  1484. {
  1485. #define OBDR_SIG_OFFSET 43
  1486. #define OBDR_TAPE_SIG "$DR-10"
  1487. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1488. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1489. unsigned char *inq_buff;
  1490. unsigned char *obdr_sig;
  1491. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1492. if (!inq_buff)
  1493. goto bail_out;
  1494. /* Do an inquiry to the device to see what it is. */
  1495. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1496. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1497. /* Inquiry failed (msg printed already) */
  1498. dev_err(&h->pdev->dev,
  1499. "hpsa_update_device_info: inquiry failed\n");
  1500. goto bail_out;
  1501. }
  1502. this_device->devtype = (inq_buff[0] & 0x1f);
  1503. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1504. memcpy(this_device->vendor, &inq_buff[8],
  1505. sizeof(this_device->vendor));
  1506. memcpy(this_device->model, &inq_buff[16],
  1507. sizeof(this_device->model));
  1508. memset(this_device->device_id, 0,
  1509. sizeof(this_device->device_id));
  1510. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1511. sizeof(this_device->device_id));
  1512. if (this_device->devtype == TYPE_DISK &&
  1513. is_logical_dev_addr_mode(scsi3addr))
  1514. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1515. else
  1516. this_device->raid_level = RAID_UNKNOWN;
  1517. if (is_OBDR_device) {
  1518. /* See if this is a One-Button-Disaster-Recovery device
  1519. * by looking for "$DR-10" at offset 43 in inquiry data.
  1520. */
  1521. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1522. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1523. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1524. OBDR_SIG_LEN) == 0);
  1525. }
  1526. kfree(inq_buff);
  1527. return 0;
  1528. bail_out:
  1529. kfree(inq_buff);
  1530. return 1;
  1531. }
  1532. static unsigned char *ext_target_model[] = {
  1533. "MSA2012",
  1534. "MSA2024",
  1535. "MSA2312",
  1536. "MSA2324",
  1537. "P2000 G3 SAS",
  1538. NULL,
  1539. };
  1540. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1541. {
  1542. int i;
  1543. for (i = 0; ext_target_model[i]; i++)
  1544. if (strncmp(device->model, ext_target_model[i],
  1545. strlen(ext_target_model[i])) == 0)
  1546. return 1;
  1547. return 0;
  1548. }
  1549. /* Helper function to assign bus, target, lun mapping of devices.
  1550. * Puts non-external target logical volumes on bus 0, external target logical
  1551. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1552. * Logical drive target and lun are assigned at this time, but
  1553. * physical device lun and target assignment are deferred (assigned
  1554. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1555. */
  1556. static void figure_bus_target_lun(struct ctlr_info *h,
  1557. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1558. {
  1559. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1560. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1561. /* physical device, target and lun filled in later */
  1562. if (is_hba_lunid(lunaddrbytes))
  1563. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1564. else
  1565. /* defer target, lun assignment for physical devices */
  1566. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1567. return;
  1568. }
  1569. /* It's a logical device */
  1570. if (is_ext_target(h, device)) {
  1571. /* external target way, put logicals on bus 1
  1572. * and match target/lun numbers box
  1573. * reports, other smart array, bus 0, target 0, match lunid
  1574. */
  1575. hpsa_set_bus_target_lun(device,
  1576. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1577. return;
  1578. }
  1579. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1580. }
  1581. /*
  1582. * If there is no lun 0 on a target, linux won't find any devices.
  1583. * For the external targets (arrays), we have to manually detect the enclosure
  1584. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1585. * it for some reason. *tmpdevice is the target we're adding,
  1586. * this_device is a pointer into the current element of currentsd[]
  1587. * that we're building up in update_scsi_devices(), below.
  1588. * lunzerobits is a bitmap that tracks which targets already have a
  1589. * lun 0 assigned.
  1590. * Returns 1 if an enclosure was added, 0 if not.
  1591. */
  1592. static int add_ext_target_dev(struct ctlr_info *h,
  1593. struct hpsa_scsi_dev_t *tmpdevice,
  1594. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1595. unsigned long lunzerobits[], int *n_ext_target_devs)
  1596. {
  1597. unsigned char scsi3addr[8];
  1598. if (test_bit(tmpdevice->target, lunzerobits))
  1599. return 0; /* There is already a lun 0 on this target. */
  1600. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1601. return 0; /* It's the logical targets that may lack lun 0. */
  1602. if (!is_ext_target(h, tmpdevice))
  1603. return 0; /* Only external target devices have this problem. */
  1604. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1605. return 0;
  1606. memset(scsi3addr, 0, 8);
  1607. scsi3addr[3] = tmpdevice->target;
  1608. if (is_hba_lunid(scsi3addr))
  1609. return 0; /* Don't add the RAID controller here. */
  1610. if (is_scsi_rev_5(h))
  1611. return 0; /* p1210m doesn't need to do this. */
  1612. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1613. dev_warn(&h->pdev->dev, "Maximum number of external "
  1614. "target devices exceeded. Check your hardware "
  1615. "configuration.");
  1616. return 0;
  1617. }
  1618. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1619. return 0;
  1620. (*n_ext_target_devs)++;
  1621. hpsa_set_bus_target_lun(this_device,
  1622. tmpdevice->bus, tmpdevice->target, 0);
  1623. set_bit(tmpdevice->target, lunzerobits);
  1624. return 1;
  1625. }
  1626. /*
  1627. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1628. * logdev. The number of luns in physdev and logdev are returned in
  1629. * *nphysicals and *nlogicals, respectively.
  1630. * Returns 0 on success, -1 otherwise.
  1631. */
  1632. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1633. int reportlunsize,
  1634. struct ReportLUNdata *physdev, u32 *nphysicals,
  1635. struct ReportLUNdata *logdev, u32 *nlogicals)
  1636. {
  1637. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1638. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1639. return -1;
  1640. }
  1641. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1642. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1643. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1644. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1645. *nphysicals - HPSA_MAX_PHYS_LUN);
  1646. *nphysicals = HPSA_MAX_PHYS_LUN;
  1647. }
  1648. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1649. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1650. return -1;
  1651. }
  1652. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1653. /* Reject Logicals in excess of our max capability. */
  1654. if (*nlogicals > HPSA_MAX_LUN) {
  1655. dev_warn(&h->pdev->dev,
  1656. "maximum logical LUNs (%d) exceeded. "
  1657. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1658. *nlogicals - HPSA_MAX_LUN);
  1659. *nlogicals = HPSA_MAX_LUN;
  1660. }
  1661. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1662. dev_warn(&h->pdev->dev,
  1663. "maximum logical + physical LUNs (%d) exceeded. "
  1664. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1665. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1666. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1667. }
  1668. return 0;
  1669. }
  1670. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1671. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1672. struct ReportLUNdata *logdev_list)
  1673. {
  1674. /* Helper function, figure out where the LUN ID info is coming from
  1675. * given index i, lists of physical and logical devices, where in
  1676. * the list the raid controller is supposed to appear (first or last)
  1677. */
  1678. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1679. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1680. if (i == raid_ctlr_position)
  1681. return RAID_CTLR_LUNID;
  1682. if (i < logicals_start)
  1683. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1684. if (i < last_device)
  1685. return &logdev_list->LUN[i - nphysicals -
  1686. (raid_ctlr_position == 0)][0];
  1687. BUG();
  1688. return NULL;
  1689. }
  1690. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1691. {
  1692. /* the idea here is we could get notified
  1693. * that some devices have changed, so we do a report
  1694. * physical luns and report logical luns cmd, and adjust
  1695. * our list of devices accordingly.
  1696. *
  1697. * The scsi3addr's of devices won't change so long as the
  1698. * adapter is not reset. That means we can rescan and
  1699. * tell which devices we already know about, vs. new
  1700. * devices, vs. disappearing devices.
  1701. */
  1702. struct ReportLUNdata *physdev_list = NULL;
  1703. struct ReportLUNdata *logdev_list = NULL;
  1704. u32 nphysicals = 0;
  1705. u32 nlogicals = 0;
  1706. u32 ndev_allocated = 0;
  1707. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1708. int ncurrent = 0;
  1709. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1710. int i, n_ext_target_devs, ndevs_to_allocate;
  1711. int raid_ctlr_position;
  1712. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1713. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1714. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1715. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1716. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1717. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1718. dev_err(&h->pdev->dev, "out of memory\n");
  1719. goto out;
  1720. }
  1721. memset(lunzerobits, 0, sizeof(lunzerobits));
  1722. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1723. logdev_list, &nlogicals))
  1724. goto out;
  1725. /* We might see up to the maximum number of logical and physical disks
  1726. * plus external target devices, and a device for the local RAID
  1727. * controller.
  1728. */
  1729. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1730. /* Allocate the per device structures */
  1731. for (i = 0; i < ndevs_to_allocate; i++) {
  1732. if (i >= HPSA_MAX_DEVICES) {
  1733. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1734. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1735. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1736. break;
  1737. }
  1738. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1739. if (!currentsd[i]) {
  1740. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1741. __FILE__, __LINE__);
  1742. goto out;
  1743. }
  1744. ndev_allocated++;
  1745. }
  1746. if (unlikely(is_scsi_rev_5(h)))
  1747. raid_ctlr_position = 0;
  1748. else
  1749. raid_ctlr_position = nphysicals + nlogicals;
  1750. /* adjust our table of devices */
  1751. n_ext_target_devs = 0;
  1752. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1753. u8 *lunaddrbytes, is_OBDR = 0;
  1754. /* Figure out where the LUN ID info is coming from */
  1755. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1756. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1757. /* skip masked physical devices. */
  1758. if (lunaddrbytes[3] & 0xC0 &&
  1759. i < nphysicals + (raid_ctlr_position == 0))
  1760. continue;
  1761. /* Get device type, vendor, model, device id */
  1762. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1763. &is_OBDR))
  1764. continue; /* skip it if we can't talk to it. */
  1765. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1766. this_device = currentsd[ncurrent];
  1767. /*
  1768. * For external target devices, we have to insert a LUN 0 which
  1769. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1770. * is nonetheless an enclosure device there. We have to
  1771. * present that otherwise linux won't find anything if
  1772. * there is no lun 0.
  1773. */
  1774. if (add_ext_target_dev(h, tmpdevice, this_device,
  1775. lunaddrbytes, lunzerobits,
  1776. &n_ext_target_devs)) {
  1777. ncurrent++;
  1778. this_device = currentsd[ncurrent];
  1779. }
  1780. *this_device = *tmpdevice;
  1781. switch (this_device->devtype) {
  1782. case TYPE_ROM:
  1783. /* We don't *really* support actual CD-ROM devices,
  1784. * just "One Button Disaster Recovery" tape drive
  1785. * which temporarily pretends to be a CD-ROM drive.
  1786. * So we check that the device is really an OBDR tape
  1787. * device by checking for "$DR-10" in bytes 43-48 of
  1788. * the inquiry data.
  1789. */
  1790. if (is_OBDR)
  1791. ncurrent++;
  1792. break;
  1793. case TYPE_DISK:
  1794. if (i < nphysicals)
  1795. break;
  1796. ncurrent++;
  1797. break;
  1798. case TYPE_TAPE:
  1799. case TYPE_MEDIUM_CHANGER:
  1800. ncurrent++;
  1801. break;
  1802. case TYPE_RAID:
  1803. /* Only present the Smartarray HBA as a RAID controller.
  1804. * If it's a RAID controller other than the HBA itself
  1805. * (an external RAID controller, MSA500 or similar)
  1806. * don't present it.
  1807. */
  1808. if (!is_hba_lunid(lunaddrbytes))
  1809. break;
  1810. ncurrent++;
  1811. break;
  1812. default:
  1813. break;
  1814. }
  1815. if (ncurrent >= HPSA_MAX_DEVICES)
  1816. break;
  1817. }
  1818. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1819. out:
  1820. kfree(tmpdevice);
  1821. for (i = 0; i < ndev_allocated; i++)
  1822. kfree(currentsd[i]);
  1823. kfree(currentsd);
  1824. kfree(physdev_list);
  1825. kfree(logdev_list);
  1826. }
  1827. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1828. * dma mapping and fills in the scatter gather entries of the
  1829. * hpsa command, cp.
  1830. */
  1831. static int hpsa_scatter_gather(struct ctlr_info *h,
  1832. struct CommandList *cp,
  1833. struct scsi_cmnd *cmd)
  1834. {
  1835. unsigned int len;
  1836. struct scatterlist *sg;
  1837. u64 addr64;
  1838. int use_sg, i, sg_index, chained;
  1839. struct SGDescriptor *curr_sg;
  1840. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1841. use_sg = scsi_dma_map(cmd);
  1842. if (use_sg < 0)
  1843. return use_sg;
  1844. if (!use_sg)
  1845. goto sglist_finished;
  1846. curr_sg = cp->SG;
  1847. chained = 0;
  1848. sg_index = 0;
  1849. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1850. if (i == h->max_cmd_sg_entries - 1 &&
  1851. use_sg > h->max_cmd_sg_entries) {
  1852. chained = 1;
  1853. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1854. sg_index = 0;
  1855. }
  1856. addr64 = (u64) sg_dma_address(sg);
  1857. len = sg_dma_len(sg);
  1858. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1859. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1860. curr_sg->Len = len;
  1861. curr_sg->Ext = 0; /* we are not chaining */
  1862. curr_sg++;
  1863. }
  1864. if (use_sg + chained > h->maxSG)
  1865. h->maxSG = use_sg + chained;
  1866. if (chained) {
  1867. cp->Header.SGList = h->max_cmd_sg_entries;
  1868. cp->Header.SGTotal = (u16) (use_sg + 1);
  1869. hpsa_map_sg_chain_block(h, cp);
  1870. return 0;
  1871. }
  1872. sglist_finished:
  1873. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1874. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1875. return 0;
  1876. }
  1877. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1878. void (*done)(struct scsi_cmnd *))
  1879. {
  1880. struct ctlr_info *h;
  1881. struct hpsa_scsi_dev_t *dev;
  1882. unsigned char scsi3addr[8];
  1883. struct CommandList *c;
  1884. unsigned long flags;
  1885. /* Get the ptr to our adapter structure out of cmd->host. */
  1886. h = sdev_to_hba(cmd->device);
  1887. dev = cmd->device->hostdata;
  1888. if (!dev) {
  1889. cmd->result = DID_NO_CONNECT << 16;
  1890. done(cmd);
  1891. return 0;
  1892. }
  1893. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1894. spin_lock_irqsave(&h->lock, flags);
  1895. if (unlikely(h->lockup_detected)) {
  1896. spin_unlock_irqrestore(&h->lock, flags);
  1897. cmd->result = DID_ERROR << 16;
  1898. done(cmd);
  1899. return 0;
  1900. }
  1901. spin_unlock_irqrestore(&h->lock, flags);
  1902. c = cmd_alloc(h);
  1903. if (c == NULL) { /* trouble... */
  1904. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1905. return SCSI_MLQUEUE_HOST_BUSY;
  1906. }
  1907. /* Fill in the command list header */
  1908. cmd->scsi_done = done; /* save this for use by completion code */
  1909. /* save c in case we have to abort it */
  1910. cmd->host_scribble = (unsigned char *) c;
  1911. c->cmd_type = CMD_SCSI;
  1912. c->scsi_cmd = cmd;
  1913. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1914. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1915. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1916. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1917. /* Fill in the request block... */
  1918. c->Request.Timeout = 0;
  1919. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1920. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1921. c->Request.CDBLen = cmd->cmd_len;
  1922. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1923. c->Request.Type.Type = TYPE_CMD;
  1924. c->Request.Type.Attribute = ATTR_SIMPLE;
  1925. switch (cmd->sc_data_direction) {
  1926. case DMA_TO_DEVICE:
  1927. c->Request.Type.Direction = XFER_WRITE;
  1928. break;
  1929. case DMA_FROM_DEVICE:
  1930. c->Request.Type.Direction = XFER_READ;
  1931. break;
  1932. case DMA_NONE:
  1933. c->Request.Type.Direction = XFER_NONE;
  1934. break;
  1935. case DMA_BIDIRECTIONAL:
  1936. /* This can happen if a buggy application does a scsi passthru
  1937. * and sets both inlen and outlen to non-zero. ( see
  1938. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1939. */
  1940. c->Request.Type.Direction = XFER_RSVD;
  1941. /* This is technically wrong, and hpsa controllers should
  1942. * reject it with CMD_INVALID, which is the most correct
  1943. * response, but non-fibre backends appear to let it
  1944. * slide by, and give the same results as if this field
  1945. * were set correctly. Either way is acceptable for
  1946. * our purposes here.
  1947. */
  1948. break;
  1949. default:
  1950. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1951. cmd->sc_data_direction);
  1952. BUG();
  1953. break;
  1954. }
  1955. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1956. cmd_free(h, c);
  1957. return SCSI_MLQUEUE_HOST_BUSY;
  1958. }
  1959. enqueue_cmd_and_start_io(h, c);
  1960. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1961. return 0;
  1962. }
  1963. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1964. static void hpsa_scan_start(struct Scsi_Host *sh)
  1965. {
  1966. struct ctlr_info *h = shost_to_hba(sh);
  1967. unsigned long flags;
  1968. /* wait until any scan already in progress is finished. */
  1969. while (1) {
  1970. spin_lock_irqsave(&h->scan_lock, flags);
  1971. if (h->scan_finished)
  1972. break;
  1973. spin_unlock_irqrestore(&h->scan_lock, flags);
  1974. wait_event(h->scan_wait_queue, h->scan_finished);
  1975. /* Note: We don't need to worry about a race between this
  1976. * thread and driver unload because the midlayer will
  1977. * have incremented the reference count, so unload won't
  1978. * happen if we're in here.
  1979. */
  1980. }
  1981. h->scan_finished = 0; /* mark scan as in progress */
  1982. spin_unlock_irqrestore(&h->scan_lock, flags);
  1983. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1984. spin_lock_irqsave(&h->scan_lock, flags);
  1985. h->scan_finished = 1; /* mark scan as finished. */
  1986. wake_up_all(&h->scan_wait_queue);
  1987. spin_unlock_irqrestore(&h->scan_lock, flags);
  1988. }
  1989. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1990. unsigned long elapsed_time)
  1991. {
  1992. struct ctlr_info *h = shost_to_hba(sh);
  1993. unsigned long flags;
  1994. int finished;
  1995. spin_lock_irqsave(&h->scan_lock, flags);
  1996. finished = h->scan_finished;
  1997. spin_unlock_irqrestore(&h->scan_lock, flags);
  1998. return finished;
  1999. }
  2000. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  2001. int qdepth, int reason)
  2002. {
  2003. struct ctlr_info *h = sdev_to_hba(sdev);
  2004. if (reason != SCSI_QDEPTH_DEFAULT)
  2005. return -ENOTSUPP;
  2006. if (qdepth < 1)
  2007. qdepth = 1;
  2008. else
  2009. if (qdepth > h->nr_cmds)
  2010. qdepth = h->nr_cmds;
  2011. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  2012. return sdev->queue_depth;
  2013. }
  2014. static void hpsa_unregister_scsi(struct ctlr_info *h)
  2015. {
  2016. /* we are being forcibly unloaded, and may not refuse. */
  2017. scsi_remove_host(h->scsi_host);
  2018. scsi_host_put(h->scsi_host);
  2019. h->scsi_host = NULL;
  2020. }
  2021. static int hpsa_register_scsi(struct ctlr_info *h)
  2022. {
  2023. struct Scsi_Host *sh;
  2024. int error;
  2025. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  2026. if (sh == NULL)
  2027. goto fail;
  2028. sh->io_port = 0;
  2029. sh->n_io_port = 0;
  2030. sh->this_id = -1;
  2031. sh->max_channel = 3;
  2032. sh->max_cmd_len = MAX_COMMAND_SIZE;
  2033. sh->max_lun = HPSA_MAX_LUN;
  2034. sh->max_id = HPSA_MAX_LUN;
  2035. sh->can_queue = h->nr_cmds;
  2036. sh->cmd_per_lun = h->nr_cmds;
  2037. sh->sg_tablesize = h->maxsgentries;
  2038. h->scsi_host = sh;
  2039. sh->hostdata[0] = (unsigned long) h;
  2040. sh->irq = h->intr[h->intr_mode];
  2041. sh->unique_id = sh->irq;
  2042. error = scsi_add_host(sh, &h->pdev->dev);
  2043. if (error)
  2044. goto fail_host_put;
  2045. scsi_scan_host(sh);
  2046. return 0;
  2047. fail_host_put:
  2048. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2049. " failed for controller %d\n", __func__, h->ctlr);
  2050. scsi_host_put(sh);
  2051. return error;
  2052. fail:
  2053. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2054. " failed for controller %d\n", __func__, h->ctlr);
  2055. return -ENOMEM;
  2056. }
  2057. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2058. unsigned char lunaddr[])
  2059. {
  2060. int rc = 0;
  2061. int count = 0;
  2062. int waittime = 1; /* seconds */
  2063. struct CommandList *c;
  2064. c = cmd_special_alloc(h);
  2065. if (!c) {
  2066. dev_warn(&h->pdev->dev, "out of memory in "
  2067. "wait_for_device_to_become_ready.\n");
  2068. return IO_ERROR;
  2069. }
  2070. /* Send test unit ready until device ready, or give up. */
  2071. while (count < HPSA_TUR_RETRY_LIMIT) {
  2072. /* Wait for a bit. do this first, because if we send
  2073. * the TUR right away, the reset will just abort it.
  2074. */
  2075. msleep(1000 * waittime);
  2076. count++;
  2077. /* Increase wait time with each try, up to a point. */
  2078. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2079. waittime = waittime * 2;
  2080. /* Send the Test Unit Ready */
  2081. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2082. hpsa_scsi_do_simple_cmd_core(h, c);
  2083. /* no unmap needed here because no data xfer. */
  2084. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2085. break;
  2086. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2087. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2088. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2089. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2090. break;
  2091. dev_warn(&h->pdev->dev, "waiting %d secs "
  2092. "for device to become ready.\n", waittime);
  2093. rc = 1; /* device not ready. */
  2094. }
  2095. if (rc)
  2096. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2097. else
  2098. dev_warn(&h->pdev->dev, "device is ready.\n");
  2099. cmd_special_free(h, c);
  2100. return rc;
  2101. }
  2102. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2103. * complaining. Doing a host- or bus-reset can't do anything good here.
  2104. */
  2105. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2106. {
  2107. int rc;
  2108. struct ctlr_info *h;
  2109. struct hpsa_scsi_dev_t *dev;
  2110. /* find the controller to which the command to be aborted was sent */
  2111. h = sdev_to_hba(scsicmd->device);
  2112. if (h == NULL) /* paranoia */
  2113. return FAILED;
  2114. dev = scsicmd->device->hostdata;
  2115. if (!dev) {
  2116. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2117. "device lookup failed.\n");
  2118. return FAILED;
  2119. }
  2120. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2121. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2122. /* send a reset to the SCSI LUN which the command was sent to */
  2123. rc = hpsa_send_reset(h, dev->scsi3addr);
  2124. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2125. return SUCCESS;
  2126. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2127. return FAILED;
  2128. }
  2129. static void swizzle_abort_tag(u8 *tag)
  2130. {
  2131. u8 original_tag[8];
  2132. memcpy(original_tag, tag, 8);
  2133. tag[0] = original_tag[3];
  2134. tag[1] = original_tag[2];
  2135. tag[2] = original_tag[1];
  2136. tag[3] = original_tag[0];
  2137. tag[4] = original_tag[7];
  2138. tag[5] = original_tag[6];
  2139. tag[6] = original_tag[5];
  2140. tag[7] = original_tag[4];
  2141. }
  2142. static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
  2143. struct CommandList *abort, int swizzle)
  2144. {
  2145. int rc = IO_OK;
  2146. struct CommandList *c;
  2147. struct ErrorInfo *ei;
  2148. c = cmd_special_alloc(h);
  2149. if (c == NULL) { /* trouble... */
  2150. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  2151. return -ENOMEM;
  2152. }
  2153. fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
  2154. if (swizzle)
  2155. swizzle_abort_tag(&c->Request.CDB[4]);
  2156. hpsa_scsi_do_simple_cmd_core(h, c);
  2157. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
  2158. __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
  2159. /* no unmap needed here because no data xfer. */
  2160. ei = c->err_info;
  2161. switch (ei->CommandStatus) {
  2162. case CMD_SUCCESS:
  2163. break;
  2164. case CMD_UNABORTABLE: /* Very common, don't make noise. */
  2165. rc = -1;
  2166. break;
  2167. default:
  2168. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
  2169. __func__, abort->Header.Tag.upper,
  2170. abort->Header.Tag.lower);
  2171. hpsa_scsi_interpret_error(c);
  2172. rc = -1;
  2173. break;
  2174. }
  2175. cmd_special_free(h, c);
  2176. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
  2177. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2178. return rc;
  2179. }
  2180. /*
  2181. * hpsa_find_cmd_in_queue
  2182. *
  2183. * Used to determine whether a command (find) is still present
  2184. * in queue_head. Optionally excludes the last element of queue_head.
  2185. *
  2186. * This is used to avoid unnecessary aborts. Commands in h->reqQ have
  2187. * not yet been submitted, and so can be aborted by the driver without
  2188. * sending an abort to the hardware.
  2189. *
  2190. * Returns pointer to command if found in queue, NULL otherwise.
  2191. */
  2192. static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
  2193. struct scsi_cmnd *find, struct list_head *queue_head)
  2194. {
  2195. unsigned long flags;
  2196. struct CommandList *c = NULL; /* ptr into cmpQ */
  2197. if (!find)
  2198. return 0;
  2199. spin_lock_irqsave(&h->lock, flags);
  2200. list_for_each_entry(c, queue_head, list) {
  2201. if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
  2202. continue;
  2203. if (c->scsi_cmd == find) {
  2204. spin_unlock_irqrestore(&h->lock, flags);
  2205. return c;
  2206. }
  2207. }
  2208. spin_unlock_irqrestore(&h->lock, flags);
  2209. return NULL;
  2210. }
  2211. static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
  2212. u8 *tag, struct list_head *queue_head)
  2213. {
  2214. unsigned long flags;
  2215. struct CommandList *c;
  2216. spin_lock_irqsave(&h->lock, flags);
  2217. list_for_each_entry(c, queue_head, list) {
  2218. if (memcmp(&c->Header.Tag, tag, 8) != 0)
  2219. continue;
  2220. spin_unlock_irqrestore(&h->lock, flags);
  2221. return c;
  2222. }
  2223. spin_unlock_irqrestore(&h->lock, flags);
  2224. return NULL;
  2225. }
  2226. /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
  2227. * tell which kind we're dealing with, so we send the abort both ways. There
  2228. * shouldn't be any collisions between swizzled and unswizzled tags due to the
  2229. * way we construct our tags but we check anyway in case the assumptions which
  2230. * make this true someday become false.
  2231. */
  2232. static int hpsa_send_abort_both_ways(struct ctlr_info *h,
  2233. unsigned char *scsi3addr, struct CommandList *abort)
  2234. {
  2235. u8 swizzled_tag[8];
  2236. struct CommandList *c;
  2237. int rc = 0, rc2 = 0;
  2238. /* we do not expect to find the swizzled tag in our queue, but
  2239. * check anyway just to be sure the assumptions which make this
  2240. * the case haven't become wrong.
  2241. */
  2242. memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
  2243. swizzle_abort_tag(swizzled_tag);
  2244. c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
  2245. if (c != NULL) {
  2246. dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
  2247. return hpsa_send_abort(h, scsi3addr, abort, 0);
  2248. }
  2249. rc = hpsa_send_abort(h, scsi3addr, abort, 0);
  2250. /* if the command is still in our queue, we can't conclude that it was
  2251. * aborted (it might have just completed normally) but in any case
  2252. * we don't need to try to abort it another way.
  2253. */
  2254. c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
  2255. if (c)
  2256. rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
  2257. return rc && rc2;
  2258. }
  2259. /* Send an abort for the specified command.
  2260. * If the device and controller support it,
  2261. * send a task abort request.
  2262. */
  2263. static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
  2264. {
  2265. int i, rc;
  2266. struct ctlr_info *h;
  2267. struct hpsa_scsi_dev_t *dev;
  2268. struct CommandList *abort; /* pointer to command to be aborted */
  2269. struct CommandList *found;
  2270. struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
  2271. char msg[256]; /* For debug messaging. */
  2272. int ml = 0;
  2273. /* Find the controller of the command to be aborted */
  2274. h = sdev_to_hba(sc->device);
  2275. if (WARN(h == NULL,
  2276. "ABORT REQUEST FAILED, Controller lookup failed.\n"))
  2277. return FAILED;
  2278. /* Check that controller supports some kind of task abort */
  2279. if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
  2280. !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
  2281. return FAILED;
  2282. memset(msg, 0, sizeof(msg));
  2283. ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
  2284. h->scsi_host->host_no, sc->device->channel,
  2285. sc->device->id, sc->device->lun);
  2286. /* Find the device of the command to be aborted */
  2287. dev = sc->device->hostdata;
  2288. if (!dev) {
  2289. dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
  2290. msg);
  2291. return FAILED;
  2292. }
  2293. /* Get SCSI command to be aborted */
  2294. abort = (struct CommandList *) sc->host_scribble;
  2295. if (abort == NULL) {
  2296. dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
  2297. msg);
  2298. return FAILED;
  2299. }
  2300. ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
  2301. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2302. as = (struct scsi_cmnd *) abort->scsi_cmd;
  2303. if (as != NULL)
  2304. ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
  2305. as->cmnd[0], as->serial_number);
  2306. dev_dbg(&h->pdev->dev, "%s\n", msg);
  2307. dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
  2308. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2309. /* Search reqQ to See if command is queued but not submitted,
  2310. * if so, complete the command with aborted status and remove
  2311. * it from the reqQ.
  2312. */
  2313. found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
  2314. if (found) {
  2315. found->err_info->CommandStatus = CMD_ABORTED;
  2316. finish_cmd(found);
  2317. dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
  2318. msg);
  2319. return SUCCESS;
  2320. }
  2321. /* not in reqQ, if also not in cmpQ, must have already completed */
  2322. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2323. if (!found) {
  2324. dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n",
  2325. msg);
  2326. return SUCCESS;
  2327. }
  2328. /*
  2329. * Command is in flight, or possibly already completed
  2330. * by the firmware (but not to the scsi mid layer) but we can't
  2331. * distinguish which. Send the abort down.
  2332. */
  2333. rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
  2334. if (rc != 0) {
  2335. dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
  2336. dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
  2337. h->scsi_host->host_no,
  2338. dev->bus, dev->target, dev->lun);
  2339. return FAILED;
  2340. }
  2341. dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
  2342. /* If the abort(s) above completed and actually aborted the
  2343. * command, then the command to be aborted should already be
  2344. * completed. If not, wait around a bit more to see if they
  2345. * manage to complete normally.
  2346. */
  2347. #define ABORT_COMPLETE_WAIT_SECS 30
  2348. for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
  2349. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2350. if (!found)
  2351. return SUCCESS;
  2352. msleep(100);
  2353. }
  2354. dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
  2355. msg, ABORT_COMPLETE_WAIT_SECS);
  2356. return FAILED;
  2357. }
  2358. /*
  2359. * For operations that cannot sleep, a command block is allocated at init,
  2360. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2361. * which ones are free or in use. Lock must be held when calling this.
  2362. * cmd_free() is the complement.
  2363. */
  2364. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2365. {
  2366. struct CommandList *c;
  2367. int i;
  2368. union u64bit temp64;
  2369. dma_addr_t cmd_dma_handle, err_dma_handle;
  2370. unsigned long flags;
  2371. spin_lock_irqsave(&h->lock, flags);
  2372. do {
  2373. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2374. if (i == h->nr_cmds) {
  2375. spin_unlock_irqrestore(&h->lock, flags);
  2376. return NULL;
  2377. }
  2378. } while (test_and_set_bit
  2379. (i & (BITS_PER_LONG - 1),
  2380. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2381. h->nr_allocs++;
  2382. spin_unlock_irqrestore(&h->lock, flags);
  2383. c = h->cmd_pool + i;
  2384. memset(c, 0, sizeof(*c));
  2385. cmd_dma_handle = h->cmd_pool_dhandle
  2386. + i * sizeof(*c);
  2387. c->err_info = h->errinfo_pool + i;
  2388. memset(c->err_info, 0, sizeof(*c->err_info));
  2389. err_dma_handle = h->errinfo_pool_dhandle
  2390. + i * sizeof(*c->err_info);
  2391. c->cmdindex = i;
  2392. INIT_LIST_HEAD(&c->list);
  2393. c->busaddr = (u32) cmd_dma_handle;
  2394. temp64.val = (u64) err_dma_handle;
  2395. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2396. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2397. c->ErrDesc.Len = sizeof(*c->err_info);
  2398. c->h = h;
  2399. return c;
  2400. }
  2401. /* For operations that can wait for kmalloc to possibly sleep,
  2402. * this routine can be called. Lock need not be held to call
  2403. * cmd_special_alloc. cmd_special_free() is the complement.
  2404. */
  2405. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2406. {
  2407. struct CommandList *c;
  2408. union u64bit temp64;
  2409. dma_addr_t cmd_dma_handle, err_dma_handle;
  2410. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2411. if (c == NULL)
  2412. return NULL;
  2413. memset(c, 0, sizeof(*c));
  2414. c->cmdindex = -1;
  2415. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2416. &err_dma_handle);
  2417. if (c->err_info == NULL) {
  2418. pci_free_consistent(h->pdev,
  2419. sizeof(*c), c, cmd_dma_handle);
  2420. return NULL;
  2421. }
  2422. memset(c->err_info, 0, sizeof(*c->err_info));
  2423. INIT_LIST_HEAD(&c->list);
  2424. c->busaddr = (u32) cmd_dma_handle;
  2425. temp64.val = (u64) err_dma_handle;
  2426. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2427. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2428. c->ErrDesc.Len = sizeof(*c->err_info);
  2429. c->h = h;
  2430. return c;
  2431. }
  2432. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2433. {
  2434. int i;
  2435. unsigned long flags;
  2436. i = c - h->cmd_pool;
  2437. spin_lock_irqsave(&h->lock, flags);
  2438. clear_bit(i & (BITS_PER_LONG - 1),
  2439. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2440. h->nr_frees++;
  2441. spin_unlock_irqrestore(&h->lock, flags);
  2442. }
  2443. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2444. {
  2445. union u64bit temp64;
  2446. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2447. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2448. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2449. c->err_info, (dma_addr_t) temp64.val);
  2450. pci_free_consistent(h->pdev, sizeof(*c),
  2451. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2452. }
  2453. #ifdef CONFIG_COMPAT
  2454. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2455. {
  2456. IOCTL32_Command_struct __user *arg32 =
  2457. (IOCTL32_Command_struct __user *) arg;
  2458. IOCTL_Command_struct arg64;
  2459. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2460. int err;
  2461. u32 cp;
  2462. memset(&arg64, 0, sizeof(arg64));
  2463. err = 0;
  2464. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2465. sizeof(arg64.LUN_info));
  2466. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2467. sizeof(arg64.Request));
  2468. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2469. sizeof(arg64.error_info));
  2470. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2471. err |= get_user(cp, &arg32->buf);
  2472. arg64.buf = compat_ptr(cp);
  2473. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2474. if (err)
  2475. return -EFAULT;
  2476. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2477. if (err)
  2478. return err;
  2479. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2480. sizeof(arg32->error_info));
  2481. if (err)
  2482. return -EFAULT;
  2483. return err;
  2484. }
  2485. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2486. int cmd, void *arg)
  2487. {
  2488. BIG_IOCTL32_Command_struct __user *arg32 =
  2489. (BIG_IOCTL32_Command_struct __user *) arg;
  2490. BIG_IOCTL_Command_struct arg64;
  2491. BIG_IOCTL_Command_struct __user *p =
  2492. compat_alloc_user_space(sizeof(arg64));
  2493. int err;
  2494. u32 cp;
  2495. memset(&arg64, 0, sizeof(arg64));
  2496. err = 0;
  2497. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2498. sizeof(arg64.LUN_info));
  2499. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2500. sizeof(arg64.Request));
  2501. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2502. sizeof(arg64.error_info));
  2503. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2504. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2505. err |= get_user(cp, &arg32->buf);
  2506. arg64.buf = compat_ptr(cp);
  2507. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2508. if (err)
  2509. return -EFAULT;
  2510. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2511. if (err)
  2512. return err;
  2513. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2514. sizeof(arg32->error_info));
  2515. if (err)
  2516. return -EFAULT;
  2517. return err;
  2518. }
  2519. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2520. {
  2521. switch (cmd) {
  2522. case CCISS_GETPCIINFO:
  2523. case CCISS_GETINTINFO:
  2524. case CCISS_SETINTINFO:
  2525. case CCISS_GETNODENAME:
  2526. case CCISS_SETNODENAME:
  2527. case CCISS_GETHEARTBEAT:
  2528. case CCISS_GETBUSTYPES:
  2529. case CCISS_GETFIRMVER:
  2530. case CCISS_GETDRIVVER:
  2531. case CCISS_REVALIDVOLS:
  2532. case CCISS_DEREGDISK:
  2533. case CCISS_REGNEWDISK:
  2534. case CCISS_REGNEWD:
  2535. case CCISS_RESCANDISK:
  2536. case CCISS_GETLUNINFO:
  2537. return hpsa_ioctl(dev, cmd, arg);
  2538. case CCISS_PASSTHRU32:
  2539. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2540. case CCISS_BIG_PASSTHRU32:
  2541. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2542. default:
  2543. return -ENOIOCTLCMD;
  2544. }
  2545. }
  2546. #endif
  2547. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2548. {
  2549. struct hpsa_pci_info pciinfo;
  2550. if (!argp)
  2551. return -EINVAL;
  2552. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2553. pciinfo.bus = h->pdev->bus->number;
  2554. pciinfo.dev_fn = h->pdev->devfn;
  2555. pciinfo.board_id = h->board_id;
  2556. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2557. return -EFAULT;
  2558. return 0;
  2559. }
  2560. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2561. {
  2562. DriverVer_type DriverVer;
  2563. unsigned char vmaj, vmin, vsubmin;
  2564. int rc;
  2565. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2566. &vmaj, &vmin, &vsubmin);
  2567. if (rc != 3) {
  2568. dev_info(&h->pdev->dev, "driver version string '%s' "
  2569. "unrecognized.", HPSA_DRIVER_VERSION);
  2570. vmaj = 0;
  2571. vmin = 0;
  2572. vsubmin = 0;
  2573. }
  2574. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2575. if (!argp)
  2576. return -EINVAL;
  2577. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2578. return -EFAULT;
  2579. return 0;
  2580. }
  2581. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2582. {
  2583. IOCTL_Command_struct iocommand;
  2584. struct CommandList *c;
  2585. char *buff = NULL;
  2586. union u64bit temp64;
  2587. if (!argp)
  2588. return -EINVAL;
  2589. if (!capable(CAP_SYS_RAWIO))
  2590. return -EPERM;
  2591. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2592. return -EFAULT;
  2593. if ((iocommand.buf_size < 1) &&
  2594. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2595. return -EINVAL;
  2596. }
  2597. if (iocommand.buf_size > 0) {
  2598. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2599. if (buff == NULL)
  2600. return -EFAULT;
  2601. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2602. /* Copy the data into the buffer we created */
  2603. if (copy_from_user(buff, iocommand.buf,
  2604. iocommand.buf_size)) {
  2605. kfree(buff);
  2606. return -EFAULT;
  2607. }
  2608. } else {
  2609. memset(buff, 0, iocommand.buf_size);
  2610. }
  2611. }
  2612. c = cmd_special_alloc(h);
  2613. if (c == NULL) {
  2614. kfree(buff);
  2615. return -ENOMEM;
  2616. }
  2617. /* Fill in the command type */
  2618. c->cmd_type = CMD_IOCTL_PEND;
  2619. /* Fill in Command Header */
  2620. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2621. if (iocommand.buf_size > 0) { /* buffer to fill */
  2622. c->Header.SGList = 1;
  2623. c->Header.SGTotal = 1;
  2624. } else { /* no buffers to fill */
  2625. c->Header.SGList = 0;
  2626. c->Header.SGTotal = 0;
  2627. }
  2628. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2629. /* use the kernel address the cmd block for tag */
  2630. c->Header.Tag.lower = c->busaddr;
  2631. /* Fill in Request block */
  2632. memcpy(&c->Request, &iocommand.Request,
  2633. sizeof(c->Request));
  2634. /* Fill in the scatter gather information */
  2635. if (iocommand.buf_size > 0) {
  2636. temp64.val = pci_map_single(h->pdev, buff,
  2637. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2638. c->SG[0].Addr.lower = temp64.val32.lower;
  2639. c->SG[0].Addr.upper = temp64.val32.upper;
  2640. c->SG[0].Len = iocommand.buf_size;
  2641. c->SG[0].Ext = 0; /* we are not chaining*/
  2642. }
  2643. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2644. if (iocommand.buf_size > 0)
  2645. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2646. check_ioctl_unit_attention(h, c);
  2647. /* Copy the error information out */
  2648. memcpy(&iocommand.error_info, c->err_info,
  2649. sizeof(iocommand.error_info));
  2650. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2651. kfree(buff);
  2652. cmd_special_free(h, c);
  2653. return -EFAULT;
  2654. }
  2655. if (iocommand.Request.Type.Direction == XFER_READ &&
  2656. iocommand.buf_size > 0) {
  2657. /* Copy the data out of the buffer we created */
  2658. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2659. kfree(buff);
  2660. cmd_special_free(h, c);
  2661. return -EFAULT;
  2662. }
  2663. }
  2664. kfree(buff);
  2665. cmd_special_free(h, c);
  2666. return 0;
  2667. }
  2668. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2669. {
  2670. BIG_IOCTL_Command_struct *ioc;
  2671. struct CommandList *c;
  2672. unsigned char **buff = NULL;
  2673. int *buff_size = NULL;
  2674. union u64bit temp64;
  2675. BYTE sg_used = 0;
  2676. int status = 0;
  2677. int i;
  2678. u32 left;
  2679. u32 sz;
  2680. BYTE __user *data_ptr;
  2681. if (!argp)
  2682. return -EINVAL;
  2683. if (!capable(CAP_SYS_RAWIO))
  2684. return -EPERM;
  2685. ioc = (BIG_IOCTL_Command_struct *)
  2686. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2687. if (!ioc) {
  2688. status = -ENOMEM;
  2689. goto cleanup1;
  2690. }
  2691. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2692. status = -EFAULT;
  2693. goto cleanup1;
  2694. }
  2695. if ((ioc->buf_size < 1) &&
  2696. (ioc->Request.Type.Direction != XFER_NONE)) {
  2697. status = -EINVAL;
  2698. goto cleanup1;
  2699. }
  2700. /* Check kmalloc limits using all SGs */
  2701. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2702. status = -EINVAL;
  2703. goto cleanup1;
  2704. }
  2705. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2706. status = -EINVAL;
  2707. goto cleanup1;
  2708. }
  2709. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2710. if (!buff) {
  2711. status = -ENOMEM;
  2712. goto cleanup1;
  2713. }
  2714. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2715. if (!buff_size) {
  2716. status = -ENOMEM;
  2717. goto cleanup1;
  2718. }
  2719. left = ioc->buf_size;
  2720. data_ptr = ioc->buf;
  2721. while (left) {
  2722. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2723. buff_size[sg_used] = sz;
  2724. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2725. if (buff[sg_used] == NULL) {
  2726. status = -ENOMEM;
  2727. goto cleanup1;
  2728. }
  2729. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2730. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2731. status = -ENOMEM;
  2732. goto cleanup1;
  2733. }
  2734. } else
  2735. memset(buff[sg_used], 0, sz);
  2736. left -= sz;
  2737. data_ptr += sz;
  2738. sg_used++;
  2739. }
  2740. c = cmd_special_alloc(h);
  2741. if (c == NULL) {
  2742. status = -ENOMEM;
  2743. goto cleanup1;
  2744. }
  2745. c->cmd_type = CMD_IOCTL_PEND;
  2746. c->Header.ReplyQueue = 0;
  2747. c->Header.SGList = c->Header.SGTotal = sg_used;
  2748. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2749. c->Header.Tag.lower = c->busaddr;
  2750. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2751. if (ioc->buf_size > 0) {
  2752. int i;
  2753. for (i = 0; i < sg_used; i++) {
  2754. temp64.val = pci_map_single(h->pdev, buff[i],
  2755. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2756. c->SG[i].Addr.lower = temp64.val32.lower;
  2757. c->SG[i].Addr.upper = temp64.val32.upper;
  2758. c->SG[i].Len = buff_size[i];
  2759. /* we are not chaining */
  2760. c->SG[i].Ext = 0;
  2761. }
  2762. }
  2763. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2764. if (sg_used)
  2765. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2766. check_ioctl_unit_attention(h, c);
  2767. /* Copy the error information out */
  2768. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2769. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2770. cmd_special_free(h, c);
  2771. status = -EFAULT;
  2772. goto cleanup1;
  2773. }
  2774. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2775. /* Copy the data out of the buffer we created */
  2776. BYTE __user *ptr = ioc->buf;
  2777. for (i = 0; i < sg_used; i++) {
  2778. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2779. cmd_special_free(h, c);
  2780. status = -EFAULT;
  2781. goto cleanup1;
  2782. }
  2783. ptr += buff_size[i];
  2784. }
  2785. }
  2786. cmd_special_free(h, c);
  2787. status = 0;
  2788. cleanup1:
  2789. if (buff) {
  2790. for (i = 0; i < sg_used; i++)
  2791. kfree(buff[i]);
  2792. kfree(buff);
  2793. }
  2794. kfree(buff_size);
  2795. kfree(ioc);
  2796. return status;
  2797. }
  2798. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2799. struct CommandList *c)
  2800. {
  2801. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2802. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2803. (void) check_for_unit_attention(h, c);
  2804. }
  2805. /*
  2806. * ioctl
  2807. */
  2808. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2809. {
  2810. struct ctlr_info *h;
  2811. void __user *argp = (void __user *)arg;
  2812. h = sdev_to_hba(dev);
  2813. switch (cmd) {
  2814. case CCISS_DEREGDISK:
  2815. case CCISS_REGNEWDISK:
  2816. case CCISS_REGNEWD:
  2817. hpsa_scan_start(h->scsi_host);
  2818. return 0;
  2819. case CCISS_GETPCIINFO:
  2820. return hpsa_getpciinfo_ioctl(h, argp);
  2821. case CCISS_GETDRIVVER:
  2822. return hpsa_getdrivver_ioctl(h, argp);
  2823. case CCISS_PASSTHRU:
  2824. return hpsa_passthru_ioctl(h, argp);
  2825. case CCISS_BIG_PASSTHRU:
  2826. return hpsa_big_passthru_ioctl(h, argp);
  2827. default:
  2828. return -ENOTTY;
  2829. }
  2830. }
  2831. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2832. unsigned char *scsi3addr, u8 reset_type)
  2833. {
  2834. struct CommandList *c;
  2835. c = cmd_alloc(h);
  2836. if (!c)
  2837. return -ENOMEM;
  2838. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2839. RAID_CTLR_LUNID, TYPE_MSG);
  2840. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2841. c->waiting = NULL;
  2842. enqueue_cmd_and_start_io(h, c);
  2843. /* Don't wait for completion, the reset won't complete. Don't free
  2844. * the command either. This is the last command we will send before
  2845. * re-initializing everything, so it doesn't matter and won't leak.
  2846. */
  2847. return 0;
  2848. }
  2849. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2850. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2851. int cmd_type)
  2852. {
  2853. int pci_dir = XFER_NONE;
  2854. struct CommandList *a; /* for commands to be aborted */
  2855. c->cmd_type = CMD_IOCTL_PEND;
  2856. c->Header.ReplyQueue = 0;
  2857. if (buff != NULL && size > 0) {
  2858. c->Header.SGList = 1;
  2859. c->Header.SGTotal = 1;
  2860. } else {
  2861. c->Header.SGList = 0;
  2862. c->Header.SGTotal = 0;
  2863. }
  2864. c->Header.Tag.lower = c->busaddr;
  2865. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2866. c->Request.Type.Type = cmd_type;
  2867. if (cmd_type == TYPE_CMD) {
  2868. switch (cmd) {
  2869. case HPSA_INQUIRY:
  2870. /* are we trying to read a vital product page */
  2871. if (page_code != 0) {
  2872. c->Request.CDB[1] = 0x01;
  2873. c->Request.CDB[2] = page_code;
  2874. }
  2875. c->Request.CDBLen = 6;
  2876. c->Request.Type.Attribute = ATTR_SIMPLE;
  2877. c->Request.Type.Direction = XFER_READ;
  2878. c->Request.Timeout = 0;
  2879. c->Request.CDB[0] = HPSA_INQUIRY;
  2880. c->Request.CDB[4] = size & 0xFF;
  2881. break;
  2882. case HPSA_REPORT_LOG:
  2883. case HPSA_REPORT_PHYS:
  2884. /* Talking to controller so It's a physical command
  2885. mode = 00 target = 0. Nothing to write.
  2886. */
  2887. c->Request.CDBLen = 12;
  2888. c->Request.Type.Attribute = ATTR_SIMPLE;
  2889. c->Request.Type.Direction = XFER_READ;
  2890. c->Request.Timeout = 0;
  2891. c->Request.CDB[0] = cmd;
  2892. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2893. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2894. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2895. c->Request.CDB[9] = size & 0xFF;
  2896. break;
  2897. case HPSA_CACHE_FLUSH:
  2898. c->Request.CDBLen = 12;
  2899. c->Request.Type.Attribute = ATTR_SIMPLE;
  2900. c->Request.Type.Direction = XFER_WRITE;
  2901. c->Request.Timeout = 0;
  2902. c->Request.CDB[0] = BMIC_WRITE;
  2903. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2904. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2905. c->Request.CDB[8] = size & 0xFF;
  2906. break;
  2907. case TEST_UNIT_READY:
  2908. c->Request.CDBLen = 6;
  2909. c->Request.Type.Attribute = ATTR_SIMPLE;
  2910. c->Request.Type.Direction = XFER_NONE;
  2911. c->Request.Timeout = 0;
  2912. break;
  2913. default:
  2914. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2915. BUG();
  2916. return;
  2917. }
  2918. } else if (cmd_type == TYPE_MSG) {
  2919. switch (cmd) {
  2920. case HPSA_DEVICE_RESET_MSG:
  2921. c->Request.CDBLen = 16;
  2922. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2923. c->Request.Type.Attribute = ATTR_SIMPLE;
  2924. c->Request.Type.Direction = XFER_NONE;
  2925. c->Request.Timeout = 0; /* Don't time out */
  2926. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2927. c->Request.CDB[0] = cmd;
  2928. c->Request.CDB[1] = 0x03; /* Reset target above */
  2929. /* If bytes 4-7 are zero, it means reset the */
  2930. /* LunID device */
  2931. c->Request.CDB[4] = 0x00;
  2932. c->Request.CDB[5] = 0x00;
  2933. c->Request.CDB[6] = 0x00;
  2934. c->Request.CDB[7] = 0x00;
  2935. break;
  2936. case HPSA_ABORT_MSG:
  2937. a = buff; /* point to command to be aborted */
  2938. dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
  2939. a->Header.Tag.upper, a->Header.Tag.lower,
  2940. c->Header.Tag.upper, c->Header.Tag.lower);
  2941. c->Request.CDBLen = 16;
  2942. c->Request.Type.Type = TYPE_MSG;
  2943. c->Request.Type.Attribute = ATTR_SIMPLE;
  2944. c->Request.Type.Direction = XFER_WRITE;
  2945. c->Request.Timeout = 0; /* Don't time out */
  2946. c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
  2947. c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
  2948. c->Request.CDB[2] = 0x00; /* reserved */
  2949. c->Request.CDB[3] = 0x00; /* reserved */
  2950. /* Tag to abort goes in CDB[4]-CDB[11] */
  2951. c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
  2952. c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
  2953. c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
  2954. c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
  2955. c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
  2956. c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
  2957. c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
  2958. c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
  2959. c->Request.CDB[12] = 0x00; /* reserved */
  2960. c->Request.CDB[13] = 0x00; /* reserved */
  2961. c->Request.CDB[14] = 0x00; /* reserved */
  2962. c->Request.CDB[15] = 0x00; /* reserved */
  2963. break;
  2964. default:
  2965. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2966. cmd);
  2967. BUG();
  2968. }
  2969. } else {
  2970. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2971. BUG();
  2972. }
  2973. switch (c->Request.Type.Direction) {
  2974. case XFER_READ:
  2975. pci_dir = PCI_DMA_FROMDEVICE;
  2976. break;
  2977. case XFER_WRITE:
  2978. pci_dir = PCI_DMA_TODEVICE;
  2979. break;
  2980. case XFER_NONE:
  2981. pci_dir = PCI_DMA_NONE;
  2982. break;
  2983. default:
  2984. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2985. }
  2986. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2987. return;
  2988. }
  2989. /*
  2990. * Map (physical) PCI mem into (virtual) kernel space
  2991. */
  2992. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2993. {
  2994. ulong page_base = ((ulong) base) & PAGE_MASK;
  2995. ulong page_offs = ((ulong) base) - page_base;
  2996. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2997. return page_remapped ? (page_remapped + page_offs) : NULL;
  2998. }
  2999. /* Takes cmds off the submission queue and sends them to the hardware,
  3000. * then puts them on the queue of cmds waiting for completion.
  3001. */
  3002. static void start_io(struct ctlr_info *h)
  3003. {
  3004. struct CommandList *c;
  3005. unsigned long flags;
  3006. spin_lock_irqsave(&h->lock, flags);
  3007. while (!list_empty(&h->reqQ)) {
  3008. c = list_entry(h->reqQ.next, struct CommandList, list);
  3009. /* can't do anything if fifo is full */
  3010. if ((h->access.fifo_full(h))) {
  3011. dev_warn(&h->pdev->dev, "fifo full\n");
  3012. break;
  3013. }
  3014. /* Get the first entry from the Request Q */
  3015. removeQ(c);
  3016. h->Qdepth--;
  3017. /* Put job onto the completed Q */
  3018. addQ(&h->cmpQ, c);
  3019. /* Must increment commands_outstanding before unlocking
  3020. * and submitting to avoid race checking for fifo full
  3021. * condition.
  3022. */
  3023. h->commands_outstanding++;
  3024. if (h->commands_outstanding > h->max_outstanding)
  3025. h->max_outstanding = h->commands_outstanding;
  3026. /* Tell the controller execute command */
  3027. spin_unlock_irqrestore(&h->lock, flags);
  3028. h->access.submit_command(h, c);
  3029. spin_lock_irqsave(&h->lock, flags);
  3030. }
  3031. spin_unlock_irqrestore(&h->lock, flags);
  3032. }
  3033. static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
  3034. {
  3035. return h->access.command_completed(h, q);
  3036. }
  3037. static inline bool interrupt_pending(struct ctlr_info *h)
  3038. {
  3039. return h->access.intr_pending(h);
  3040. }
  3041. static inline long interrupt_not_for_us(struct ctlr_info *h)
  3042. {
  3043. return (h->access.intr_pending(h) == 0) ||
  3044. (h->interrupts_enabled == 0);
  3045. }
  3046. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  3047. u32 raw_tag)
  3048. {
  3049. if (unlikely(tag_index >= h->nr_cmds)) {
  3050. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3051. return 1;
  3052. }
  3053. return 0;
  3054. }
  3055. static inline void finish_cmd(struct CommandList *c)
  3056. {
  3057. unsigned long flags;
  3058. spin_lock_irqsave(&c->h->lock, flags);
  3059. removeQ(c);
  3060. spin_unlock_irqrestore(&c->h->lock, flags);
  3061. dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
  3062. if (likely(c->cmd_type == CMD_SCSI))
  3063. complete_scsi_command(c);
  3064. else if (c->cmd_type == CMD_IOCTL_PEND)
  3065. complete(c->waiting);
  3066. }
  3067. static inline u32 hpsa_tag_contains_index(u32 tag)
  3068. {
  3069. return tag & DIRECT_LOOKUP_BIT;
  3070. }
  3071. static inline u32 hpsa_tag_to_index(u32 tag)
  3072. {
  3073. return tag >> DIRECT_LOOKUP_SHIFT;
  3074. }
  3075. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  3076. {
  3077. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  3078. #define HPSA_SIMPLE_ERROR_BITS 0x03
  3079. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3080. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  3081. return tag & ~HPSA_PERF_ERROR_BITS;
  3082. }
  3083. /* process completion of an indexed ("direct lookup") command */
  3084. static inline void process_indexed_cmd(struct ctlr_info *h,
  3085. u32 raw_tag)
  3086. {
  3087. u32 tag_index;
  3088. struct CommandList *c;
  3089. tag_index = hpsa_tag_to_index(raw_tag);
  3090. if (!bad_tag(h, tag_index, raw_tag)) {
  3091. c = h->cmd_pool + tag_index;
  3092. finish_cmd(c);
  3093. }
  3094. }
  3095. /* process completion of a non-indexed command */
  3096. static inline void process_nonindexed_cmd(struct ctlr_info *h,
  3097. u32 raw_tag)
  3098. {
  3099. u32 tag;
  3100. struct CommandList *c = NULL;
  3101. unsigned long flags;
  3102. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  3103. spin_lock_irqsave(&h->lock, flags);
  3104. list_for_each_entry(c, &h->cmpQ, list) {
  3105. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  3106. spin_unlock_irqrestore(&h->lock, flags);
  3107. finish_cmd(c);
  3108. return;
  3109. }
  3110. }
  3111. spin_unlock_irqrestore(&h->lock, flags);
  3112. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3113. }
  3114. /* Some controllers, like p400, will give us one interrupt
  3115. * after a soft reset, even if we turned interrupts off.
  3116. * Only need to check for this in the hpsa_xxx_discard_completions
  3117. * functions.
  3118. */
  3119. static int ignore_bogus_interrupt(struct ctlr_info *h)
  3120. {
  3121. if (likely(!reset_devices))
  3122. return 0;
  3123. if (likely(h->interrupts_enabled))
  3124. return 0;
  3125. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  3126. "(known firmware bug.) Ignoring.\n");
  3127. return 1;
  3128. }
  3129. /*
  3130. * Convert &h->q[x] (passed to interrupt handlers) back to h.
  3131. * Relies on (h-q[x] == x) being true for x such that
  3132. * 0 <= x < MAX_REPLY_QUEUES.
  3133. */
  3134. static struct ctlr_info *queue_to_hba(u8 *queue)
  3135. {
  3136. return container_of((queue - *queue), struct ctlr_info, q[0]);
  3137. }
  3138. static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
  3139. {
  3140. struct ctlr_info *h = queue_to_hba(queue);
  3141. u8 q = *(u8 *) queue;
  3142. u32 raw_tag;
  3143. if (ignore_bogus_interrupt(h))
  3144. return IRQ_NONE;
  3145. if (interrupt_not_for_us(h))
  3146. return IRQ_NONE;
  3147. h->last_intr_timestamp = get_jiffies_64();
  3148. while (interrupt_pending(h)) {
  3149. raw_tag = get_next_completion(h, q);
  3150. while (raw_tag != FIFO_EMPTY)
  3151. raw_tag = next_command(h, q);
  3152. }
  3153. return IRQ_HANDLED;
  3154. }
  3155. static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
  3156. {
  3157. struct ctlr_info *h = queue_to_hba(queue);
  3158. u32 raw_tag;
  3159. u8 q = *(u8 *) queue;
  3160. if (ignore_bogus_interrupt(h))
  3161. return IRQ_NONE;
  3162. h->last_intr_timestamp = get_jiffies_64();
  3163. raw_tag = get_next_completion(h, q);
  3164. while (raw_tag != FIFO_EMPTY)
  3165. raw_tag = next_command(h, q);
  3166. return IRQ_HANDLED;
  3167. }
  3168. static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
  3169. {
  3170. struct ctlr_info *h = queue_to_hba((u8 *) queue);
  3171. u32 raw_tag;
  3172. u8 q = *(u8 *) queue;
  3173. if (interrupt_not_for_us(h))
  3174. return IRQ_NONE;
  3175. h->last_intr_timestamp = get_jiffies_64();
  3176. while (interrupt_pending(h)) {
  3177. raw_tag = get_next_completion(h, q);
  3178. while (raw_tag != FIFO_EMPTY) {
  3179. if (likely(hpsa_tag_contains_index(raw_tag)))
  3180. process_indexed_cmd(h, raw_tag);
  3181. else
  3182. process_nonindexed_cmd(h, raw_tag);
  3183. raw_tag = next_command(h, q);
  3184. }
  3185. }
  3186. return IRQ_HANDLED;
  3187. }
  3188. static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
  3189. {
  3190. struct ctlr_info *h = queue_to_hba(queue);
  3191. u32 raw_tag;
  3192. u8 q = *(u8 *) queue;
  3193. h->last_intr_timestamp = get_jiffies_64();
  3194. raw_tag = get_next_completion(h, q);
  3195. while (raw_tag != FIFO_EMPTY) {
  3196. if (likely(hpsa_tag_contains_index(raw_tag)))
  3197. process_indexed_cmd(h, raw_tag);
  3198. else
  3199. process_nonindexed_cmd(h, raw_tag);
  3200. raw_tag = next_command(h, q);
  3201. }
  3202. return IRQ_HANDLED;
  3203. }
  3204. /* Send a message CDB to the firmware. Careful, this only works
  3205. * in simple mode, not performant mode due to the tag lookup.
  3206. * We only ever use this immediately after a controller reset.
  3207. */
  3208. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  3209. unsigned char type)
  3210. {
  3211. struct Command {
  3212. struct CommandListHeader CommandHeader;
  3213. struct RequestBlock Request;
  3214. struct ErrDescriptor ErrorDescriptor;
  3215. };
  3216. struct Command *cmd;
  3217. static const size_t cmd_sz = sizeof(*cmd) +
  3218. sizeof(cmd->ErrorDescriptor);
  3219. dma_addr_t paddr64;
  3220. uint32_t paddr32, tag;
  3221. void __iomem *vaddr;
  3222. int i, err;
  3223. vaddr = pci_ioremap_bar(pdev, 0);
  3224. if (vaddr == NULL)
  3225. return -ENOMEM;
  3226. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3227. * CCISS commands, so they must be allocated from the lower 4GiB of
  3228. * memory.
  3229. */
  3230. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3231. if (err) {
  3232. iounmap(vaddr);
  3233. return -ENOMEM;
  3234. }
  3235. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3236. if (cmd == NULL) {
  3237. iounmap(vaddr);
  3238. return -ENOMEM;
  3239. }
  3240. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3241. * although there's no guarantee, we assume that the address is at
  3242. * least 4-byte aligned (most likely, it's page-aligned).
  3243. */
  3244. paddr32 = paddr64;
  3245. cmd->CommandHeader.ReplyQueue = 0;
  3246. cmd->CommandHeader.SGList = 0;
  3247. cmd->CommandHeader.SGTotal = 0;
  3248. cmd->CommandHeader.Tag.lower = paddr32;
  3249. cmd->CommandHeader.Tag.upper = 0;
  3250. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3251. cmd->Request.CDBLen = 16;
  3252. cmd->Request.Type.Type = TYPE_MSG;
  3253. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3254. cmd->Request.Type.Direction = XFER_NONE;
  3255. cmd->Request.Timeout = 0; /* Don't time out */
  3256. cmd->Request.CDB[0] = opcode;
  3257. cmd->Request.CDB[1] = type;
  3258. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  3259. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  3260. cmd->ErrorDescriptor.Addr.upper = 0;
  3261. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  3262. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3263. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  3264. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3265. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  3266. break;
  3267. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  3268. }
  3269. iounmap(vaddr);
  3270. /* we leak the DMA buffer here ... no choice since the controller could
  3271. * still complete the command.
  3272. */
  3273. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  3274. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  3275. opcode, type);
  3276. return -ETIMEDOUT;
  3277. }
  3278. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3279. if (tag & HPSA_ERROR_BIT) {
  3280. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3281. opcode, type);
  3282. return -EIO;
  3283. }
  3284. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3285. opcode, type);
  3286. return 0;
  3287. }
  3288. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  3289. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  3290. void * __iomem vaddr, u32 use_doorbell)
  3291. {
  3292. u16 pmcsr;
  3293. int pos;
  3294. if (use_doorbell) {
  3295. /* For everything after the P600, the PCI power state method
  3296. * of resetting the controller doesn't work, so we have this
  3297. * other way using the doorbell register.
  3298. */
  3299. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3300. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3301. } else { /* Try to do it the PCI power state way */
  3302. /* Quoting from the Open CISS Specification: "The Power
  3303. * Management Control/Status Register (CSR) controls the power
  3304. * state of the device. The normal operating state is D0,
  3305. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3306. * the controller, place the interface device in D3 then to D0,
  3307. * this causes a secondary PCI reset which will reset the
  3308. * controller." */
  3309. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3310. if (pos == 0) {
  3311. dev_err(&pdev->dev,
  3312. "hpsa_reset_controller: "
  3313. "PCI PM not supported\n");
  3314. return -ENODEV;
  3315. }
  3316. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3317. /* enter the D3hot power management state */
  3318. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3319. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3320. pmcsr |= PCI_D3hot;
  3321. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3322. msleep(500);
  3323. /* enter the D0 power management state */
  3324. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3325. pmcsr |= PCI_D0;
  3326. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3327. /*
  3328. * The P600 requires a small delay when changing states.
  3329. * Otherwise we may think the board did not reset and we bail.
  3330. * This for kdump only and is particular to the P600.
  3331. */
  3332. msleep(500);
  3333. }
  3334. return 0;
  3335. }
  3336. static __devinit void init_driver_version(char *driver_version, int len)
  3337. {
  3338. memset(driver_version, 0, len);
  3339. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3340. }
  3341. static __devinit int write_driver_ver_to_cfgtable(
  3342. struct CfgTable __iomem *cfgtable)
  3343. {
  3344. char *driver_version;
  3345. int i, size = sizeof(cfgtable->driver_version);
  3346. driver_version = kmalloc(size, GFP_KERNEL);
  3347. if (!driver_version)
  3348. return -ENOMEM;
  3349. init_driver_version(driver_version, size);
  3350. for (i = 0; i < size; i++)
  3351. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3352. kfree(driver_version);
  3353. return 0;
  3354. }
  3355. static __devinit void read_driver_ver_from_cfgtable(
  3356. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3357. {
  3358. int i;
  3359. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3360. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3361. }
  3362. static __devinit int controller_reset_failed(
  3363. struct CfgTable __iomem *cfgtable)
  3364. {
  3365. char *driver_ver, *old_driver_ver;
  3366. int rc, size = sizeof(cfgtable->driver_version);
  3367. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3368. if (!old_driver_ver)
  3369. return -ENOMEM;
  3370. driver_ver = old_driver_ver + size;
  3371. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3372. * should have been changed, otherwise we know the reset failed.
  3373. */
  3374. init_driver_version(old_driver_ver, size);
  3375. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3376. rc = !memcmp(driver_ver, old_driver_ver, size);
  3377. kfree(old_driver_ver);
  3378. return rc;
  3379. }
  3380. /* This does a hard reset of the controller using PCI power management
  3381. * states or the using the doorbell register.
  3382. */
  3383. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3384. {
  3385. u64 cfg_offset;
  3386. u32 cfg_base_addr;
  3387. u64 cfg_base_addr_index;
  3388. void __iomem *vaddr;
  3389. unsigned long paddr;
  3390. u32 misc_fw_support;
  3391. int rc;
  3392. struct CfgTable __iomem *cfgtable;
  3393. u32 use_doorbell;
  3394. u32 board_id;
  3395. u16 command_register;
  3396. /* For controllers as old as the P600, this is very nearly
  3397. * the same thing as
  3398. *
  3399. * pci_save_state(pci_dev);
  3400. * pci_set_power_state(pci_dev, PCI_D3hot);
  3401. * pci_set_power_state(pci_dev, PCI_D0);
  3402. * pci_restore_state(pci_dev);
  3403. *
  3404. * For controllers newer than the P600, the pci power state
  3405. * method of resetting doesn't work so we have another way
  3406. * using the doorbell register.
  3407. */
  3408. rc = hpsa_lookup_board_id(pdev, &board_id);
  3409. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3410. dev_warn(&pdev->dev, "Not resetting device.\n");
  3411. return -ENODEV;
  3412. }
  3413. /* if controller is soft- but not hard resettable... */
  3414. if (!ctlr_is_hard_resettable(board_id))
  3415. return -ENOTSUPP; /* try soft reset later. */
  3416. /* Save the PCI command register */
  3417. pci_read_config_word(pdev, 4, &command_register);
  3418. /* Turn the board off. This is so that later pci_restore_state()
  3419. * won't turn the board on before the rest of config space is ready.
  3420. */
  3421. pci_disable_device(pdev);
  3422. pci_save_state(pdev);
  3423. /* find the first memory BAR, so we can find the cfg table */
  3424. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3425. if (rc)
  3426. return rc;
  3427. vaddr = remap_pci_mem(paddr, 0x250);
  3428. if (!vaddr)
  3429. return -ENOMEM;
  3430. /* find cfgtable in order to check if reset via doorbell is supported */
  3431. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3432. &cfg_base_addr_index, &cfg_offset);
  3433. if (rc)
  3434. goto unmap_vaddr;
  3435. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3436. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3437. if (!cfgtable) {
  3438. rc = -ENOMEM;
  3439. goto unmap_vaddr;
  3440. }
  3441. rc = write_driver_ver_to_cfgtable(cfgtable);
  3442. if (rc)
  3443. goto unmap_vaddr;
  3444. /* If reset via doorbell register is supported, use that.
  3445. * There are two such methods. Favor the newest method.
  3446. */
  3447. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3448. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3449. if (use_doorbell) {
  3450. use_doorbell = DOORBELL_CTLR_RESET2;
  3451. } else {
  3452. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3453. if (use_doorbell) {
  3454. dev_warn(&pdev->dev, "Soft reset not supported. "
  3455. "Firmware update is required.\n");
  3456. rc = -ENOTSUPP; /* try soft reset */
  3457. goto unmap_cfgtable;
  3458. }
  3459. }
  3460. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3461. if (rc)
  3462. goto unmap_cfgtable;
  3463. pci_restore_state(pdev);
  3464. rc = pci_enable_device(pdev);
  3465. if (rc) {
  3466. dev_warn(&pdev->dev, "failed to enable device.\n");
  3467. goto unmap_cfgtable;
  3468. }
  3469. pci_write_config_word(pdev, 4, command_register);
  3470. /* Some devices (notably the HP Smart Array 5i Controller)
  3471. need a little pause here */
  3472. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3473. /* Wait for board to become not ready, then ready. */
  3474. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3475. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3476. if (rc) {
  3477. dev_warn(&pdev->dev,
  3478. "failed waiting for board to reset."
  3479. " Will try soft reset.\n");
  3480. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3481. goto unmap_cfgtable;
  3482. }
  3483. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3484. if (rc) {
  3485. dev_warn(&pdev->dev,
  3486. "failed waiting for board to become ready "
  3487. "after hard reset\n");
  3488. goto unmap_cfgtable;
  3489. }
  3490. rc = controller_reset_failed(vaddr);
  3491. if (rc < 0)
  3492. goto unmap_cfgtable;
  3493. if (rc) {
  3494. dev_warn(&pdev->dev, "Unable to successfully reset "
  3495. "controller. Will try soft reset.\n");
  3496. rc = -ENOTSUPP;
  3497. } else {
  3498. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3499. }
  3500. unmap_cfgtable:
  3501. iounmap(cfgtable);
  3502. unmap_vaddr:
  3503. iounmap(vaddr);
  3504. return rc;
  3505. }
  3506. /*
  3507. * We cannot read the structure directly, for portability we must use
  3508. * the io functions.
  3509. * This is for debug only.
  3510. */
  3511. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3512. {
  3513. #ifdef HPSA_DEBUG
  3514. int i;
  3515. char temp_name[17];
  3516. dev_info(dev, "Controller Configuration information\n");
  3517. dev_info(dev, "------------------------------------\n");
  3518. for (i = 0; i < 4; i++)
  3519. temp_name[i] = readb(&(tb->Signature[i]));
  3520. temp_name[4] = '\0';
  3521. dev_info(dev, " Signature = %s\n", temp_name);
  3522. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3523. dev_info(dev, " Transport methods supported = 0x%x\n",
  3524. readl(&(tb->TransportSupport)));
  3525. dev_info(dev, " Transport methods active = 0x%x\n",
  3526. readl(&(tb->TransportActive)));
  3527. dev_info(dev, " Requested transport Method = 0x%x\n",
  3528. readl(&(tb->HostWrite.TransportRequest)));
  3529. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3530. readl(&(tb->HostWrite.CoalIntDelay)));
  3531. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3532. readl(&(tb->HostWrite.CoalIntCount)));
  3533. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3534. readl(&(tb->CmdsOutMax)));
  3535. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3536. for (i = 0; i < 16; i++)
  3537. temp_name[i] = readb(&(tb->ServerName[i]));
  3538. temp_name[16] = '\0';
  3539. dev_info(dev, " Server Name = %s\n", temp_name);
  3540. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3541. readl(&(tb->HeartBeat)));
  3542. #endif /* HPSA_DEBUG */
  3543. }
  3544. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3545. {
  3546. int i, offset, mem_type, bar_type;
  3547. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3548. return 0;
  3549. offset = 0;
  3550. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3551. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3552. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3553. offset += 4;
  3554. else {
  3555. mem_type = pci_resource_flags(pdev, i) &
  3556. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3557. switch (mem_type) {
  3558. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3559. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3560. offset += 4; /* 32 bit */
  3561. break;
  3562. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3563. offset += 8;
  3564. break;
  3565. default: /* reserved in PCI 2.2 */
  3566. dev_warn(&pdev->dev,
  3567. "base address is invalid\n");
  3568. return -1;
  3569. break;
  3570. }
  3571. }
  3572. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3573. return i + 1;
  3574. }
  3575. return -1;
  3576. }
  3577. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3578. * controllers that are capable. If not, we use IO-APIC mode.
  3579. */
  3580. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3581. {
  3582. #ifdef CONFIG_PCI_MSI
  3583. int err, i;
  3584. struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
  3585. for (i = 0; i < MAX_REPLY_QUEUES; i++) {
  3586. hpsa_msix_entries[i].vector = 0;
  3587. hpsa_msix_entries[i].entry = i;
  3588. }
  3589. /* Some boards advertise MSI but don't really support it */
  3590. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3591. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3592. goto default_int_mode;
  3593. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3594. dev_info(&h->pdev->dev, "MSIX\n");
  3595. err = pci_enable_msix(h->pdev, hpsa_msix_entries,
  3596. MAX_REPLY_QUEUES);
  3597. if (!err) {
  3598. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3599. h->intr[i] = hpsa_msix_entries[i].vector;
  3600. h->msix_vector = 1;
  3601. return;
  3602. }
  3603. if (err > 0) {
  3604. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3605. "available\n", err);
  3606. goto default_int_mode;
  3607. } else {
  3608. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3609. err);
  3610. goto default_int_mode;
  3611. }
  3612. }
  3613. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3614. dev_info(&h->pdev->dev, "MSI\n");
  3615. if (!pci_enable_msi(h->pdev))
  3616. h->msi_vector = 1;
  3617. else
  3618. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3619. }
  3620. default_int_mode:
  3621. #endif /* CONFIG_PCI_MSI */
  3622. /* if we get here we're going to use the default interrupt mode */
  3623. h->intr[h->intr_mode] = h->pdev->irq;
  3624. }
  3625. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3626. {
  3627. int i;
  3628. u32 subsystem_vendor_id, subsystem_device_id;
  3629. subsystem_vendor_id = pdev->subsystem_vendor;
  3630. subsystem_device_id = pdev->subsystem_device;
  3631. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3632. subsystem_vendor_id;
  3633. for (i = 0; i < ARRAY_SIZE(products); i++)
  3634. if (*board_id == products[i].board_id)
  3635. return i;
  3636. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3637. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3638. !hpsa_allow_any) {
  3639. dev_warn(&pdev->dev, "unrecognized board ID: "
  3640. "0x%08x, ignoring.\n", *board_id);
  3641. return -ENODEV;
  3642. }
  3643. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3644. }
  3645. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3646. unsigned long *memory_bar)
  3647. {
  3648. int i;
  3649. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3650. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3651. /* addressing mode bits already removed */
  3652. *memory_bar = pci_resource_start(pdev, i);
  3653. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3654. *memory_bar);
  3655. return 0;
  3656. }
  3657. dev_warn(&pdev->dev, "no memory BAR found\n");
  3658. return -ENODEV;
  3659. }
  3660. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3661. void __iomem *vaddr, int wait_for_ready)
  3662. {
  3663. int i, iterations;
  3664. u32 scratchpad;
  3665. if (wait_for_ready)
  3666. iterations = HPSA_BOARD_READY_ITERATIONS;
  3667. else
  3668. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3669. for (i = 0; i < iterations; i++) {
  3670. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3671. if (wait_for_ready) {
  3672. if (scratchpad == HPSA_FIRMWARE_READY)
  3673. return 0;
  3674. } else {
  3675. if (scratchpad != HPSA_FIRMWARE_READY)
  3676. return 0;
  3677. }
  3678. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3679. }
  3680. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3681. return -ENODEV;
  3682. }
  3683. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3684. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3685. u64 *cfg_offset)
  3686. {
  3687. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3688. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3689. *cfg_base_addr &= (u32) 0x0000ffff;
  3690. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3691. if (*cfg_base_addr_index == -1) {
  3692. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3693. return -ENODEV;
  3694. }
  3695. return 0;
  3696. }
  3697. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3698. {
  3699. u64 cfg_offset;
  3700. u32 cfg_base_addr;
  3701. u64 cfg_base_addr_index;
  3702. u32 trans_offset;
  3703. int rc;
  3704. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3705. &cfg_base_addr_index, &cfg_offset);
  3706. if (rc)
  3707. return rc;
  3708. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3709. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3710. if (!h->cfgtable)
  3711. return -ENOMEM;
  3712. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3713. if (rc)
  3714. return rc;
  3715. /* Find performant mode table. */
  3716. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3717. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3718. cfg_base_addr_index)+cfg_offset+trans_offset,
  3719. sizeof(*h->transtable));
  3720. if (!h->transtable)
  3721. return -ENOMEM;
  3722. return 0;
  3723. }
  3724. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3725. {
  3726. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3727. /* Limit commands in memory limited kdump scenario. */
  3728. if (reset_devices && h->max_commands > 32)
  3729. h->max_commands = 32;
  3730. if (h->max_commands < 16) {
  3731. dev_warn(&h->pdev->dev, "Controller reports "
  3732. "max supported commands of %d, an obvious lie. "
  3733. "Using 16. Ensure that firmware is up to date.\n",
  3734. h->max_commands);
  3735. h->max_commands = 16;
  3736. }
  3737. }
  3738. /* Interrogate the hardware for some limits:
  3739. * max commands, max SG elements without chaining, and with chaining,
  3740. * SG chain block size, etc.
  3741. */
  3742. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3743. {
  3744. hpsa_get_max_perf_mode_cmds(h);
  3745. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3746. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3747. /*
  3748. * Limit in-command s/g elements to 32 save dma'able memory.
  3749. * Howvever spec says if 0, use 31
  3750. */
  3751. h->max_cmd_sg_entries = 31;
  3752. if (h->maxsgentries > 512) {
  3753. h->max_cmd_sg_entries = 32;
  3754. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3755. h->maxsgentries--; /* save one for chain pointer */
  3756. } else {
  3757. h->maxsgentries = 31; /* default to traditional values */
  3758. h->chainsize = 0;
  3759. }
  3760. /* Find out what task management functions are supported and cache */
  3761. h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
  3762. }
  3763. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3764. {
  3765. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3766. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3767. return false;
  3768. }
  3769. return true;
  3770. }
  3771. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3772. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3773. {
  3774. #ifdef CONFIG_X86
  3775. u32 prefetch;
  3776. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3777. prefetch |= 0x100;
  3778. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3779. #endif
  3780. }
  3781. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3782. * in a prefetch beyond physical memory.
  3783. */
  3784. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3785. {
  3786. u32 dma_prefetch;
  3787. if (h->board_id != 0x3225103C)
  3788. return;
  3789. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3790. dma_prefetch |= 0x8000;
  3791. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3792. }
  3793. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3794. {
  3795. int i;
  3796. u32 doorbell_value;
  3797. unsigned long flags;
  3798. /* under certain very rare conditions, this can take awhile.
  3799. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3800. * as we enter this code.)
  3801. */
  3802. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3803. spin_lock_irqsave(&h->lock, flags);
  3804. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3805. spin_unlock_irqrestore(&h->lock, flags);
  3806. if (!(doorbell_value & CFGTBL_ChangeReq))
  3807. break;
  3808. /* delay and try again */
  3809. usleep_range(10000, 20000);
  3810. }
  3811. }
  3812. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3813. {
  3814. u32 trans_support;
  3815. trans_support = readl(&(h->cfgtable->TransportSupport));
  3816. if (!(trans_support & SIMPLE_MODE))
  3817. return -ENOTSUPP;
  3818. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3819. /* Update the field, and then ring the doorbell */
  3820. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3821. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3822. hpsa_wait_for_mode_change_ack(h);
  3823. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3824. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3825. dev_warn(&h->pdev->dev,
  3826. "unable to get board into simple mode\n");
  3827. return -ENODEV;
  3828. }
  3829. h->transMethod = CFGTBL_Trans_Simple;
  3830. return 0;
  3831. }
  3832. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3833. {
  3834. int prod_index, err;
  3835. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3836. if (prod_index < 0)
  3837. return -ENODEV;
  3838. h->product_name = products[prod_index].product_name;
  3839. h->access = *(products[prod_index].access);
  3840. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3841. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3842. err = pci_enable_device(h->pdev);
  3843. if (err) {
  3844. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3845. return err;
  3846. }
  3847. /* Enable bus mastering (pci_disable_device may disable this) */
  3848. pci_set_master(h->pdev);
  3849. err = pci_request_regions(h->pdev, HPSA);
  3850. if (err) {
  3851. dev_err(&h->pdev->dev,
  3852. "cannot obtain PCI resources, aborting\n");
  3853. return err;
  3854. }
  3855. hpsa_interrupt_mode(h);
  3856. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3857. if (err)
  3858. goto err_out_free_res;
  3859. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3860. if (!h->vaddr) {
  3861. err = -ENOMEM;
  3862. goto err_out_free_res;
  3863. }
  3864. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3865. if (err)
  3866. goto err_out_free_res;
  3867. err = hpsa_find_cfgtables(h);
  3868. if (err)
  3869. goto err_out_free_res;
  3870. hpsa_find_board_params(h);
  3871. if (!hpsa_CISS_signature_present(h)) {
  3872. err = -ENODEV;
  3873. goto err_out_free_res;
  3874. }
  3875. hpsa_enable_scsi_prefetch(h);
  3876. hpsa_p600_dma_prefetch_quirk(h);
  3877. err = hpsa_enter_simple_mode(h);
  3878. if (err)
  3879. goto err_out_free_res;
  3880. return 0;
  3881. err_out_free_res:
  3882. if (h->transtable)
  3883. iounmap(h->transtable);
  3884. if (h->cfgtable)
  3885. iounmap(h->cfgtable);
  3886. if (h->vaddr)
  3887. iounmap(h->vaddr);
  3888. pci_disable_device(h->pdev);
  3889. pci_release_regions(h->pdev);
  3890. return err;
  3891. }
  3892. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3893. {
  3894. int rc;
  3895. #define HBA_INQUIRY_BYTE_COUNT 64
  3896. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3897. if (!h->hba_inquiry_data)
  3898. return;
  3899. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3900. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3901. if (rc != 0) {
  3902. kfree(h->hba_inquiry_data);
  3903. h->hba_inquiry_data = NULL;
  3904. }
  3905. }
  3906. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3907. {
  3908. int rc, i;
  3909. if (!reset_devices)
  3910. return 0;
  3911. /* Reset the controller with a PCI power-cycle or via doorbell */
  3912. rc = hpsa_kdump_hard_reset_controller(pdev);
  3913. /* -ENOTSUPP here means we cannot reset the controller
  3914. * but it's already (and still) up and running in
  3915. * "performant mode". Or, it might be 640x, which can't reset
  3916. * due to concerns about shared bbwc between 6402/6404 pair.
  3917. */
  3918. if (rc == -ENOTSUPP)
  3919. return rc; /* just try to do the kdump anyhow. */
  3920. if (rc)
  3921. return -ENODEV;
  3922. /* Now try to get the controller to respond to a no-op */
  3923. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3924. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3925. if (hpsa_noop(pdev) == 0)
  3926. break;
  3927. else
  3928. dev_warn(&pdev->dev, "no-op failed%s\n",
  3929. (i < 11 ? "; re-trying" : ""));
  3930. }
  3931. return 0;
  3932. }
  3933. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3934. {
  3935. h->cmd_pool_bits = kzalloc(
  3936. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3937. sizeof(unsigned long), GFP_KERNEL);
  3938. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3939. h->nr_cmds * sizeof(*h->cmd_pool),
  3940. &(h->cmd_pool_dhandle));
  3941. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3942. h->nr_cmds * sizeof(*h->errinfo_pool),
  3943. &(h->errinfo_pool_dhandle));
  3944. if ((h->cmd_pool_bits == NULL)
  3945. || (h->cmd_pool == NULL)
  3946. || (h->errinfo_pool == NULL)) {
  3947. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3948. return -ENOMEM;
  3949. }
  3950. return 0;
  3951. }
  3952. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3953. {
  3954. kfree(h->cmd_pool_bits);
  3955. if (h->cmd_pool)
  3956. pci_free_consistent(h->pdev,
  3957. h->nr_cmds * sizeof(struct CommandList),
  3958. h->cmd_pool, h->cmd_pool_dhandle);
  3959. if (h->errinfo_pool)
  3960. pci_free_consistent(h->pdev,
  3961. h->nr_cmds * sizeof(struct ErrorInfo),
  3962. h->errinfo_pool,
  3963. h->errinfo_pool_dhandle);
  3964. }
  3965. static int hpsa_request_irq(struct ctlr_info *h,
  3966. irqreturn_t (*msixhandler)(int, void *),
  3967. irqreturn_t (*intxhandler)(int, void *))
  3968. {
  3969. int rc, i;
  3970. /*
  3971. * initialize h->q[x] = x so that interrupt handlers know which
  3972. * queue to process.
  3973. */
  3974. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3975. h->q[i] = (u8) i;
  3976. if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
  3977. /* If performant mode and MSI-X, use multiple reply queues */
  3978. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3979. rc = request_irq(h->intr[i], msixhandler,
  3980. 0, h->devname,
  3981. &h->q[i]);
  3982. } else {
  3983. /* Use single reply pool */
  3984. if (h->msix_vector || h->msi_vector) {
  3985. rc = request_irq(h->intr[h->intr_mode],
  3986. msixhandler, 0, h->devname,
  3987. &h->q[h->intr_mode]);
  3988. } else {
  3989. rc = request_irq(h->intr[h->intr_mode],
  3990. intxhandler, IRQF_SHARED, h->devname,
  3991. &h->q[h->intr_mode]);
  3992. }
  3993. }
  3994. if (rc) {
  3995. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3996. h->intr[h->intr_mode], h->devname);
  3997. return -ENODEV;
  3998. }
  3999. return 0;
  4000. }
  4001. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  4002. {
  4003. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  4004. HPSA_RESET_TYPE_CONTROLLER)) {
  4005. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  4006. return -EIO;
  4007. }
  4008. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  4009. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  4010. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  4011. return -1;
  4012. }
  4013. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  4014. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  4015. dev_warn(&h->pdev->dev, "Board failed to become ready "
  4016. "after soft reset.\n");
  4017. return -1;
  4018. }
  4019. return 0;
  4020. }
  4021. static void free_irqs(struct ctlr_info *h)
  4022. {
  4023. int i;
  4024. if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
  4025. /* Single reply queue, only one irq to free */
  4026. i = h->intr_mode;
  4027. free_irq(h->intr[i], &h->q[i]);
  4028. return;
  4029. }
  4030. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4031. free_irq(h->intr[i], &h->q[i]);
  4032. }
  4033. static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
  4034. {
  4035. free_irqs(h);
  4036. #ifdef CONFIG_PCI_MSI
  4037. if (h->msix_vector) {
  4038. if (h->pdev->msix_enabled)
  4039. pci_disable_msix(h->pdev);
  4040. } else if (h->msi_vector) {
  4041. if (h->pdev->msi_enabled)
  4042. pci_disable_msi(h->pdev);
  4043. }
  4044. #endif /* CONFIG_PCI_MSI */
  4045. }
  4046. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  4047. {
  4048. hpsa_free_irqs_and_disable_msix(h);
  4049. hpsa_free_sg_chain_blocks(h);
  4050. hpsa_free_cmd_pool(h);
  4051. kfree(h->blockFetchTable);
  4052. pci_free_consistent(h->pdev, h->reply_pool_size,
  4053. h->reply_pool, h->reply_pool_dhandle);
  4054. if (h->vaddr)
  4055. iounmap(h->vaddr);
  4056. if (h->transtable)
  4057. iounmap(h->transtable);
  4058. if (h->cfgtable)
  4059. iounmap(h->cfgtable);
  4060. pci_release_regions(h->pdev);
  4061. kfree(h);
  4062. }
  4063. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  4064. {
  4065. assert_spin_locked(&lockup_detector_lock);
  4066. if (!hpsa_lockup_detector)
  4067. return;
  4068. if (h->lockup_detected)
  4069. return; /* already stopped the lockup detector */
  4070. list_del(&h->lockup_list);
  4071. }
  4072. /* Called when controller lockup detected. */
  4073. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  4074. {
  4075. struct CommandList *c = NULL;
  4076. assert_spin_locked(&h->lock);
  4077. /* Mark all outstanding commands as failed and complete them. */
  4078. while (!list_empty(list)) {
  4079. c = list_entry(list->next, struct CommandList, list);
  4080. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  4081. finish_cmd(c);
  4082. }
  4083. }
  4084. static void controller_lockup_detected(struct ctlr_info *h)
  4085. {
  4086. unsigned long flags;
  4087. assert_spin_locked(&lockup_detector_lock);
  4088. remove_ctlr_from_lockup_detector_list(h);
  4089. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4090. spin_lock_irqsave(&h->lock, flags);
  4091. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  4092. spin_unlock_irqrestore(&h->lock, flags);
  4093. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  4094. h->lockup_detected);
  4095. pci_disable_device(h->pdev);
  4096. spin_lock_irqsave(&h->lock, flags);
  4097. fail_all_cmds_on_list(h, &h->cmpQ);
  4098. fail_all_cmds_on_list(h, &h->reqQ);
  4099. spin_unlock_irqrestore(&h->lock, flags);
  4100. }
  4101. static void detect_controller_lockup(struct ctlr_info *h)
  4102. {
  4103. u64 now;
  4104. u32 heartbeat;
  4105. unsigned long flags;
  4106. assert_spin_locked(&lockup_detector_lock);
  4107. now = get_jiffies_64();
  4108. /* If we've received an interrupt recently, we're ok. */
  4109. if (time_after64(h->last_intr_timestamp +
  4110. (h->heartbeat_sample_interval), now))
  4111. return;
  4112. /*
  4113. * If we've already checked the heartbeat recently, we're ok.
  4114. * This could happen if someone sends us a signal. We
  4115. * otherwise don't care about signals in this thread.
  4116. */
  4117. if (time_after64(h->last_heartbeat_timestamp +
  4118. (h->heartbeat_sample_interval), now))
  4119. return;
  4120. /* If heartbeat has not changed since we last looked, we're not ok. */
  4121. spin_lock_irqsave(&h->lock, flags);
  4122. heartbeat = readl(&h->cfgtable->HeartBeat);
  4123. spin_unlock_irqrestore(&h->lock, flags);
  4124. if (h->last_heartbeat == heartbeat) {
  4125. controller_lockup_detected(h);
  4126. return;
  4127. }
  4128. /* We're ok. */
  4129. h->last_heartbeat = heartbeat;
  4130. h->last_heartbeat_timestamp = now;
  4131. }
  4132. static int detect_controller_lockup_thread(void *notused)
  4133. {
  4134. struct ctlr_info *h;
  4135. unsigned long flags;
  4136. while (1) {
  4137. struct list_head *this, *tmp;
  4138. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  4139. if (kthread_should_stop())
  4140. break;
  4141. spin_lock_irqsave(&lockup_detector_lock, flags);
  4142. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  4143. h = list_entry(this, struct ctlr_info, lockup_list);
  4144. detect_controller_lockup(h);
  4145. }
  4146. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4147. }
  4148. return 0;
  4149. }
  4150. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  4151. {
  4152. unsigned long flags;
  4153. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  4154. spin_lock_irqsave(&lockup_detector_lock, flags);
  4155. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  4156. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4157. }
  4158. static void start_controller_lockup_detector(struct ctlr_info *h)
  4159. {
  4160. /* Start the lockup detector thread if not already started */
  4161. if (!hpsa_lockup_detector) {
  4162. spin_lock_init(&lockup_detector_lock);
  4163. hpsa_lockup_detector =
  4164. kthread_run(detect_controller_lockup_thread,
  4165. NULL, HPSA);
  4166. }
  4167. if (!hpsa_lockup_detector) {
  4168. dev_warn(&h->pdev->dev,
  4169. "Could not start lockup detector thread\n");
  4170. return;
  4171. }
  4172. add_ctlr_to_lockup_detector_list(h);
  4173. }
  4174. static void stop_controller_lockup_detector(struct ctlr_info *h)
  4175. {
  4176. unsigned long flags;
  4177. spin_lock_irqsave(&lockup_detector_lock, flags);
  4178. remove_ctlr_from_lockup_detector_list(h);
  4179. /* If the list of ctlr's to monitor is empty, stop the thread */
  4180. if (list_empty(&hpsa_ctlr_list)) {
  4181. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4182. kthread_stop(hpsa_lockup_detector);
  4183. spin_lock_irqsave(&lockup_detector_lock, flags);
  4184. hpsa_lockup_detector = NULL;
  4185. }
  4186. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4187. }
  4188. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  4189. const struct pci_device_id *ent)
  4190. {
  4191. int dac, rc;
  4192. struct ctlr_info *h;
  4193. int try_soft_reset = 0;
  4194. unsigned long flags;
  4195. if (number_of_controllers == 0)
  4196. printk(KERN_INFO DRIVER_NAME "\n");
  4197. rc = hpsa_init_reset_devices(pdev);
  4198. if (rc) {
  4199. if (rc != -ENOTSUPP)
  4200. return rc;
  4201. /* If the reset fails in a particular way (it has no way to do
  4202. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  4203. * a soft reset once we get the controller configured up to the
  4204. * point that it can accept a command.
  4205. */
  4206. try_soft_reset = 1;
  4207. rc = 0;
  4208. }
  4209. reinit_after_soft_reset:
  4210. /* Command structures must be aligned on a 32-byte boundary because
  4211. * the 5 lower bits of the address are used by the hardware. and by
  4212. * the driver. See comments in hpsa.h for more info.
  4213. */
  4214. #define COMMANDLIST_ALIGNMENT 32
  4215. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  4216. h = kzalloc(sizeof(*h), GFP_KERNEL);
  4217. if (!h)
  4218. return -ENOMEM;
  4219. h->pdev = pdev;
  4220. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  4221. INIT_LIST_HEAD(&h->cmpQ);
  4222. INIT_LIST_HEAD(&h->reqQ);
  4223. spin_lock_init(&h->lock);
  4224. spin_lock_init(&h->scan_lock);
  4225. rc = hpsa_pci_init(h);
  4226. if (rc != 0)
  4227. goto clean1;
  4228. sprintf(h->devname, HPSA "%d", number_of_controllers);
  4229. h->ctlr = number_of_controllers;
  4230. number_of_controllers++;
  4231. /* configure PCI DMA stuff */
  4232. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  4233. if (rc == 0) {
  4234. dac = 1;
  4235. } else {
  4236. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4237. if (rc == 0) {
  4238. dac = 0;
  4239. } else {
  4240. dev_err(&pdev->dev, "no suitable DMA available\n");
  4241. goto clean1;
  4242. }
  4243. }
  4244. /* make sure the board interrupts are off */
  4245. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4246. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  4247. goto clean2;
  4248. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  4249. h->devname, pdev->device,
  4250. h->intr[h->intr_mode], dac ? "" : " not");
  4251. if (hpsa_allocate_cmd_pool(h))
  4252. goto clean4;
  4253. if (hpsa_allocate_sg_chain_blocks(h))
  4254. goto clean4;
  4255. init_waitqueue_head(&h->scan_wait_queue);
  4256. h->scan_finished = 1; /* no scan currently in progress */
  4257. pci_set_drvdata(pdev, h);
  4258. h->ndevices = 0;
  4259. h->scsi_host = NULL;
  4260. spin_lock_init(&h->devlock);
  4261. hpsa_put_ctlr_into_performant_mode(h);
  4262. /* At this point, the controller is ready to take commands.
  4263. * Now, if reset_devices and the hard reset didn't work, try
  4264. * the soft reset and see if that works.
  4265. */
  4266. if (try_soft_reset) {
  4267. /* This is kind of gross. We may or may not get a completion
  4268. * from the soft reset command, and if we do, then the value
  4269. * from the fifo may or may not be valid. So, we wait 10 secs
  4270. * after the reset throwing away any completions we get during
  4271. * that time. Unregister the interrupt handler and register
  4272. * fake ones to scoop up any residual completions.
  4273. */
  4274. spin_lock_irqsave(&h->lock, flags);
  4275. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4276. spin_unlock_irqrestore(&h->lock, flags);
  4277. free_irqs(h);
  4278. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  4279. hpsa_intx_discard_completions);
  4280. if (rc) {
  4281. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  4282. "soft reset.\n");
  4283. goto clean4;
  4284. }
  4285. rc = hpsa_kdump_soft_reset(h);
  4286. if (rc)
  4287. /* Neither hard nor soft reset worked, we're hosed. */
  4288. goto clean4;
  4289. dev_info(&h->pdev->dev, "Board READY.\n");
  4290. dev_info(&h->pdev->dev,
  4291. "Waiting for stale completions to drain.\n");
  4292. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4293. msleep(10000);
  4294. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4295. rc = controller_reset_failed(h->cfgtable);
  4296. if (rc)
  4297. dev_info(&h->pdev->dev,
  4298. "Soft reset appears to have failed.\n");
  4299. /* since the controller's reset, we have to go back and re-init
  4300. * everything. Easiest to just forget what we've done and do it
  4301. * all over again.
  4302. */
  4303. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4304. try_soft_reset = 0;
  4305. if (rc)
  4306. /* don't go to clean4, we already unallocated */
  4307. return -ENODEV;
  4308. goto reinit_after_soft_reset;
  4309. }
  4310. /* Turn the interrupts on so we can service requests */
  4311. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4312. hpsa_hba_inquiry(h);
  4313. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4314. start_controller_lockup_detector(h);
  4315. return 1;
  4316. clean4:
  4317. hpsa_free_sg_chain_blocks(h);
  4318. hpsa_free_cmd_pool(h);
  4319. free_irqs(h);
  4320. clean2:
  4321. clean1:
  4322. kfree(h);
  4323. return rc;
  4324. }
  4325. static void hpsa_flush_cache(struct ctlr_info *h)
  4326. {
  4327. char *flush_buf;
  4328. struct CommandList *c;
  4329. flush_buf = kzalloc(4, GFP_KERNEL);
  4330. if (!flush_buf)
  4331. return;
  4332. c = cmd_special_alloc(h);
  4333. if (!c) {
  4334. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4335. goto out_of_memory;
  4336. }
  4337. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4338. RAID_CTLR_LUNID, TYPE_CMD);
  4339. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4340. if (c->err_info->CommandStatus != 0)
  4341. dev_warn(&h->pdev->dev,
  4342. "error flushing cache on controller\n");
  4343. cmd_special_free(h, c);
  4344. out_of_memory:
  4345. kfree(flush_buf);
  4346. }
  4347. static void hpsa_shutdown(struct pci_dev *pdev)
  4348. {
  4349. struct ctlr_info *h;
  4350. h = pci_get_drvdata(pdev);
  4351. /* Turn board interrupts off and send the flush cache command
  4352. * sendcmd will turn off interrupt, and send the flush...
  4353. * To write all data in the battery backed cache to disks
  4354. */
  4355. hpsa_flush_cache(h);
  4356. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4357. hpsa_free_irqs_and_disable_msix(h);
  4358. }
  4359. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4360. {
  4361. int i;
  4362. for (i = 0; i < h->ndevices; i++)
  4363. kfree(h->dev[i]);
  4364. }
  4365. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4366. {
  4367. struct ctlr_info *h;
  4368. if (pci_get_drvdata(pdev) == NULL) {
  4369. dev_err(&pdev->dev, "unable to remove device\n");
  4370. return;
  4371. }
  4372. h = pci_get_drvdata(pdev);
  4373. stop_controller_lockup_detector(h);
  4374. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4375. hpsa_shutdown(pdev);
  4376. iounmap(h->vaddr);
  4377. iounmap(h->transtable);
  4378. iounmap(h->cfgtable);
  4379. hpsa_free_device_info(h);
  4380. hpsa_free_sg_chain_blocks(h);
  4381. pci_free_consistent(h->pdev,
  4382. h->nr_cmds * sizeof(struct CommandList),
  4383. h->cmd_pool, h->cmd_pool_dhandle);
  4384. pci_free_consistent(h->pdev,
  4385. h->nr_cmds * sizeof(struct ErrorInfo),
  4386. h->errinfo_pool, h->errinfo_pool_dhandle);
  4387. pci_free_consistent(h->pdev, h->reply_pool_size,
  4388. h->reply_pool, h->reply_pool_dhandle);
  4389. kfree(h->cmd_pool_bits);
  4390. kfree(h->blockFetchTable);
  4391. kfree(h->hba_inquiry_data);
  4392. pci_disable_device(pdev);
  4393. pci_release_regions(pdev);
  4394. pci_set_drvdata(pdev, NULL);
  4395. kfree(h);
  4396. }
  4397. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4398. __attribute__((unused)) pm_message_t state)
  4399. {
  4400. return -ENOSYS;
  4401. }
  4402. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4403. {
  4404. return -ENOSYS;
  4405. }
  4406. static struct pci_driver hpsa_pci_driver = {
  4407. .name = HPSA,
  4408. .probe = hpsa_init_one,
  4409. .remove = __devexit_p(hpsa_remove_one),
  4410. .id_table = hpsa_pci_device_id, /* id_table */
  4411. .shutdown = hpsa_shutdown,
  4412. .suspend = hpsa_suspend,
  4413. .resume = hpsa_resume,
  4414. };
  4415. /* Fill in bucket_map[], given nsgs (the max number of
  4416. * scatter gather elements supported) and bucket[],
  4417. * which is an array of 8 integers. The bucket[] array
  4418. * contains 8 different DMA transfer sizes (in 16
  4419. * byte increments) which the controller uses to fetch
  4420. * commands. This function fills in bucket_map[], which
  4421. * maps a given number of scatter gather elements to one of
  4422. * the 8 DMA transfer sizes. The point of it is to allow the
  4423. * controller to only do as much DMA as needed to fetch the
  4424. * command, with the DMA transfer size encoded in the lower
  4425. * bits of the command address.
  4426. */
  4427. static void calc_bucket_map(int bucket[], int num_buckets,
  4428. int nsgs, int *bucket_map)
  4429. {
  4430. int i, j, b, size;
  4431. /* even a command with 0 SGs requires 4 blocks */
  4432. #define MINIMUM_TRANSFER_BLOCKS 4
  4433. #define NUM_BUCKETS 8
  4434. /* Note, bucket_map must have nsgs+1 entries. */
  4435. for (i = 0; i <= nsgs; i++) {
  4436. /* Compute size of a command with i SG entries */
  4437. size = i + MINIMUM_TRANSFER_BLOCKS;
  4438. b = num_buckets; /* Assume the biggest bucket */
  4439. /* Find the bucket that is just big enough */
  4440. for (j = 0; j < 8; j++) {
  4441. if (bucket[j] >= size) {
  4442. b = j;
  4443. break;
  4444. }
  4445. }
  4446. /* for a command with i SG entries, use bucket b. */
  4447. bucket_map[i] = b;
  4448. }
  4449. }
  4450. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4451. u32 use_short_tags)
  4452. {
  4453. int i;
  4454. unsigned long register_value;
  4455. /* This is a bit complicated. There are 8 registers on
  4456. * the controller which we write to to tell it 8 different
  4457. * sizes of commands which there may be. It's a way of
  4458. * reducing the DMA done to fetch each command. Encoded into
  4459. * each command's tag are 3 bits which communicate to the controller
  4460. * which of the eight sizes that command fits within. The size of
  4461. * each command depends on how many scatter gather entries there are.
  4462. * Each SG entry requires 16 bytes. The eight registers are programmed
  4463. * with the number of 16-byte blocks a command of that size requires.
  4464. * The smallest command possible requires 5 such 16 byte blocks.
  4465. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4466. * blocks. Note, this only extends to the SG entries contained
  4467. * within the command block, and does not extend to chained blocks
  4468. * of SG elements. bft[] contains the eight values we write to
  4469. * the registers. They are not evenly distributed, but have more
  4470. * sizes for small commands, and fewer sizes for larger commands.
  4471. */
  4472. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4473. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4474. /* 5 = 1 s/g entry or 4k
  4475. * 6 = 2 s/g entry or 8k
  4476. * 8 = 4 s/g entry or 16k
  4477. * 10 = 6 s/g entry or 24k
  4478. */
  4479. /* Controller spec: zero out this buffer. */
  4480. memset(h->reply_pool, 0, h->reply_pool_size);
  4481. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4482. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4483. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4484. for (i = 0; i < 8; i++)
  4485. writel(bft[i], &h->transtable->BlockFetch[i]);
  4486. /* size of controller ring buffer */
  4487. writel(h->max_commands, &h->transtable->RepQSize);
  4488. writel(h->nreply_queues, &h->transtable->RepQCount);
  4489. writel(0, &h->transtable->RepQCtrAddrLow32);
  4490. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4491. for (i = 0; i < h->nreply_queues; i++) {
  4492. writel(0, &h->transtable->RepQAddr[i].upper);
  4493. writel(h->reply_pool_dhandle +
  4494. (h->max_commands * sizeof(u64) * i),
  4495. &h->transtable->RepQAddr[i].lower);
  4496. }
  4497. writel(CFGTBL_Trans_Performant | use_short_tags |
  4498. CFGTBL_Trans_enable_directed_msix,
  4499. &(h->cfgtable->HostWrite.TransportRequest));
  4500. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4501. hpsa_wait_for_mode_change_ack(h);
  4502. register_value = readl(&(h->cfgtable->TransportActive));
  4503. if (!(register_value & CFGTBL_Trans_Performant)) {
  4504. dev_warn(&h->pdev->dev, "unable to get board into"
  4505. " performant mode\n");
  4506. return;
  4507. }
  4508. /* Change the access methods to the performant access methods */
  4509. h->access = SA5_performant_access;
  4510. h->transMethod = CFGTBL_Trans_Performant;
  4511. }
  4512. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4513. {
  4514. u32 trans_support;
  4515. int i;
  4516. if (hpsa_simple_mode)
  4517. return;
  4518. trans_support = readl(&(h->cfgtable->TransportSupport));
  4519. if (!(trans_support & PERFORMANT_MODE))
  4520. return;
  4521. h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
  4522. hpsa_get_max_perf_mode_cmds(h);
  4523. /* Performant mode ring buffer and supporting data structures */
  4524. h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
  4525. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4526. &(h->reply_pool_dhandle));
  4527. for (i = 0; i < h->nreply_queues; i++) {
  4528. h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
  4529. h->reply_queue[i].size = h->max_commands;
  4530. h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
  4531. h->reply_queue[i].current_entry = 0;
  4532. }
  4533. /* Need a block fetch table for performant mode */
  4534. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4535. sizeof(u32)), GFP_KERNEL);
  4536. if ((h->reply_pool == NULL)
  4537. || (h->blockFetchTable == NULL))
  4538. goto clean_up;
  4539. hpsa_enter_performant_mode(h,
  4540. trans_support & CFGTBL_Trans_use_short_tags);
  4541. return;
  4542. clean_up:
  4543. if (h->reply_pool)
  4544. pci_free_consistent(h->pdev, h->reply_pool_size,
  4545. h->reply_pool, h->reply_pool_dhandle);
  4546. kfree(h->blockFetchTable);
  4547. }
  4548. /*
  4549. * This is it. Register the PCI driver information for the cards we control
  4550. * the OS will call our registered routines when it finds one of our cards.
  4551. */
  4552. static int __init hpsa_init(void)
  4553. {
  4554. return pci_register_driver(&hpsa_pci_driver);
  4555. }
  4556. static void __exit hpsa_cleanup(void)
  4557. {
  4558. pci_unregister_driver(&hpsa_pci_driver);
  4559. }
  4560. module_init(hpsa_init);
  4561. module_exit(hpsa_cleanup);