qdio_main.c 45 KB

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  1. /*
  2. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  3. *
  4. * Copyright IBM Corp. 2000, 2008
  5. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  6. * Jan Glauber <jang@linux.vnet.ibm.com>
  7. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/kernel.h>
  12. #include <linux/timer.h>
  13. #include <linux/delay.h>
  14. #include <linux/gfp.h>
  15. #include <linux/io.h>
  16. #include <linux/atomic.h>
  17. #include <asm/debug.h>
  18. #include <asm/qdio.h>
  19. #include <asm/ipl.h>
  20. #include "cio.h"
  21. #include "css.h"
  22. #include "device.h"
  23. #include "qdio.h"
  24. #include "qdio_debug.h"
  25. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  26. "Jan Glauber <jang@linux.vnet.ibm.com>");
  27. MODULE_DESCRIPTION("QDIO base support");
  28. MODULE_LICENSE("GPL");
  29. static inline int do_siga_sync(unsigned long schid,
  30. unsigned int out_mask, unsigned int in_mask,
  31. unsigned int fc)
  32. {
  33. register unsigned long __fc asm ("0") = fc;
  34. register unsigned long __schid asm ("1") = schid;
  35. register unsigned long out asm ("2") = out_mask;
  36. register unsigned long in asm ("3") = in_mask;
  37. int cc;
  38. asm volatile(
  39. " siga 0\n"
  40. " ipm %0\n"
  41. " srl %0,28\n"
  42. : "=d" (cc)
  43. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  44. return cc;
  45. }
  46. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  47. unsigned int fc)
  48. {
  49. register unsigned long __fc asm ("0") = fc;
  50. register unsigned long __schid asm ("1") = schid;
  51. register unsigned long __mask asm ("2") = mask;
  52. int cc;
  53. asm volatile(
  54. " siga 0\n"
  55. " ipm %0\n"
  56. " srl %0,28\n"
  57. : "=d" (cc)
  58. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
  59. return cc;
  60. }
  61. /**
  62. * do_siga_output - perform SIGA-w/wt function
  63. * @schid: subchannel id or in case of QEBSM the subchannel token
  64. * @mask: which output queues to process
  65. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  66. * @fc: function code to perform
  67. *
  68. * Returns condition code.
  69. * Note: For IQDC unicast queues only the highest priority queue is processed.
  70. */
  71. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  72. unsigned int *bb, unsigned int fc,
  73. unsigned long aob)
  74. {
  75. register unsigned long __fc asm("0") = fc;
  76. register unsigned long __schid asm("1") = schid;
  77. register unsigned long __mask asm("2") = mask;
  78. register unsigned long __aob asm("3") = aob;
  79. int cc;
  80. asm volatile(
  81. " siga 0\n"
  82. " ipm %0\n"
  83. " srl %0,28\n"
  84. : "=d" (cc), "+d" (__fc), "+d" (__aob)
  85. : "d" (__schid), "d" (__mask)
  86. : "cc");
  87. *bb = __fc >> 31;
  88. return cc;
  89. }
  90. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  91. {
  92. /* all done or next buffer state different */
  93. if (ccq == 0 || ccq == 32)
  94. return 0;
  95. /* no buffer processed */
  96. if (ccq == 97)
  97. return 1;
  98. /* not all buffers processed */
  99. if (ccq == 96)
  100. return 2;
  101. /* notify devices immediately */
  102. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  103. return -EIO;
  104. }
  105. /**
  106. * qdio_do_eqbs - extract buffer states for QEBSM
  107. * @q: queue to manipulate
  108. * @state: state of the extracted buffers
  109. * @start: buffer number to start at
  110. * @count: count of buffers to examine
  111. * @auto_ack: automatically acknowledge buffers
  112. *
  113. * Returns the number of successfully extracted equal buffer states.
  114. * Stops processing if a state is different from the last buffers state.
  115. */
  116. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  117. int start, int count, int auto_ack)
  118. {
  119. int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
  120. unsigned int ccq = 0;
  121. BUG_ON(!q->irq_ptr->sch_token);
  122. qperf_inc(q, eqbs);
  123. if (!q->is_input_q)
  124. nr += q->irq_ptr->nr_input_qs;
  125. again:
  126. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  127. auto_ack);
  128. rc = qdio_check_ccq(q, ccq);
  129. if (!rc)
  130. return count - tmp_count;
  131. if (rc == 1) {
  132. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  133. goto again;
  134. }
  135. if (rc == 2) {
  136. BUG_ON(tmp_count == count);
  137. qperf_inc(q, eqbs_partial);
  138. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  139. tmp_count);
  140. /*
  141. * Retry once, if that fails bail out and process the
  142. * extracted buffers before trying again.
  143. */
  144. if (!retried++)
  145. goto again;
  146. else
  147. return count - tmp_count;
  148. }
  149. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  150. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  151. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
  152. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  153. return 0;
  154. }
  155. /**
  156. * qdio_do_sqbs - set buffer states for QEBSM
  157. * @q: queue to manipulate
  158. * @state: new state of the buffers
  159. * @start: first buffer number to change
  160. * @count: how many buffers to change
  161. *
  162. * Returns the number of successfully changed buffers.
  163. * Does retrying until the specified count of buffer states is set or an
  164. * error occurs.
  165. */
  166. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  167. int count)
  168. {
  169. unsigned int ccq = 0;
  170. int tmp_count = count, tmp_start = start;
  171. int nr = q->nr;
  172. int rc;
  173. if (!count)
  174. return 0;
  175. BUG_ON(!q->irq_ptr->sch_token);
  176. qperf_inc(q, sqbs);
  177. if (!q->is_input_q)
  178. nr += q->irq_ptr->nr_input_qs;
  179. again:
  180. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  181. rc = qdio_check_ccq(q, ccq);
  182. if (!rc) {
  183. WARN_ON(tmp_count);
  184. return count - tmp_count;
  185. }
  186. if (rc == 1 || rc == 2) {
  187. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  188. qperf_inc(q, sqbs_partial);
  189. goto again;
  190. }
  191. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  192. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  193. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
  194. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  195. return 0;
  196. }
  197. /* returns number of examined buffers and their common state in *state */
  198. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  199. unsigned char *state, unsigned int count,
  200. int auto_ack, int merge_pending)
  201. {
  202. unsigned char __state = 0;
  203. int i;
  204. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  205. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  206. if (is_qebsm(q))
  207. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  208. for (i = 0; i < count; i++) {
  209. if (!__state) {
  210. __state = q->slsb.val[bufnr];
  211. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  212. __state = SLSB_P_OUTPUT_EMPTY;
  213. } else if (merge_pending) {
  214. if ((q->slsb.val[bufnr] & __state) != __state)
  215. break;
  216. } else if (q->slsb.val[bufnr] != __state)
  217. break;
  218. bufnr = next_buf(bufnr);
  219. }
  220. *state = __state;
  221. return i;
  222. }
  223. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  224. unsigned char *state, int auto_ack)
  225. {
  226. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  227. }
  228. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  229. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  230. unsigned char state, int count)
  231. {
  232. int i;
  233. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  234. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  235. if (is_qebsm(q))
  236. return qdio_do_sqbs(q, state, bufnr, count);
  237. for (i = 0; i < count; i++) {
  238. xchg(&q->slsb.val[bufnr], state);
  239. bufnr = next_buf(bufnr);
  240. }
  241. return count;
  242. }
  243. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  244. unsigned char state)
  245. {
  246. return set_buf_states(q, bufnr, state, 1);
  247. }
  248. /* set slsb states to initial state */
  249. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  250. {
  251. struct qdio_q *q;
  252. int i;
  253. for_each_input_queue(irq_ptr, q, i)
  254. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  255. QDIO_MAX_BUFFERS_PER_Q);
  256. for_each_output_queue(irq_ptr, q, i)
  257. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  258. QDIO_MAX_BUFFERS_PER_Q);
  259. }
  260. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  261. unsigned int input)
  262. {
  263. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  264. unsigned int fc = QDIO_SIGA_SYNC;
  265. int cc;
  266. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  267. qperf_inc(q, siga_sync);
  268. if (is_qebsm(q)) {
  269. schid = q->irq_ptr->sch_token;
  270. fc |= QDIO_SIGA_QEBSM_FLAG;
  271. }
  272. cc = do_siga_sync(schid, output, input, fc);
  273. if (unlikely(cc))
  274. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  275. return (cc) ? -EIO : 0;
  276. }
  277. static inline int qdio_siga_sync_q(struct qdio_q *q)
  278. {
  279. if (q->is_input_q)
  280. return qdio_siga_sync(q, 0, q->mask);
  281. else
  282. return qdio_siga_sync(q, q->mask, 0);
  283. }
  284. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  285. unsigned long aob)
  286. {
  287. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  288. unsigned int fc = QDIO_SIGA_WRITE;
  289. u64 start_time = 0;
  290. int retries = 0, cc;
  291. unsigned long laob = 0;
  292. if (q->u.out.use_cq && aob != 0) {
  293. fc = QDIO_SIGA_WRITEQ;
  294. laob = aob;
  295. }
  296. if (is_qebsm(q)) {
  297. schid = q->irq_ptr->sch_token;
  298. fc |= QDIO_SIGA_QEBSM_FLAG;
  299. }
  300. again:
  301. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  302. (aob && fc != QDIO_SIGA_WRITEQ));
  303. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  304. /* hipersocket busy condition */
  305. if (unlikely(*busy_bit)) {
  306. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  307. retries++;
  308. if (!start_time) {
  309. start_time = get_clock();
  310. goto again;
  311. }
  312. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  313. goto again;
  314. }
  315. if (retries) {
  316. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  317. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  318. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  319. }
  320. return cc;
  321. }
  322. static inline int qdio_siga_input(struct qdio_q *q)
  323. {
  324. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  325. unsigned int fc = QDIO_SIGA_READ;
  326. int cc;
  327. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  328. qperf_inc(q, siga_read);
  329. if (is_qebsm(q)) {
  330. schid = q->irq_ptr->sch_token;
  331. fc |= QDIO_SIGA_QEBSM_FLAG;
  332. }
  333. cc = do_siga_input(schid, q->mask, fc);
  334. if (unlikely(cc))
  335. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  336. return (cc) ? -EIO : 0;
  337. }
  338. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  339. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  340. static inline void qdio_sync_queues(struct qdio_q *q)
  341. {
  342. /* PCI capable outbound queues will also be scanned so sync them too */
  343. if (pci_out_supported(q))
  344. qdio_siga_sync_all(q);
  345. else
  346. qdio_siga_sync_q(q);
  347. }
  348. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  349. unsigned char *state)
  350. {
  351. if (need_siga_sync(q))
  352. qdio_siga_sync_q(q);
  353. return get_buf_states(q, bufnr, state, 1, 0, 0);
  354. }
  355. static inline void qdio_stop_polling(struct qdio_q *q)
  356. {
  357. if (!q->u.in.polling)
  358. return;
  359. q->u.in.polling = 0;
  360. qperf_inc(q, stop_polling);
  361. /* show the card that we are not polling anymore */
  362. if (is_qebsm(q)) {
  363. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  364. q->u.in.ack_count);
  365. q->u.in.ack_count = 0;
  366. } else
  367. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  368. }
  369. static inline void account_sbals(struct qdio_q *q, int count)
  370. {
  371. int pos = 0;
  372. q->q_stats.nr_sbal_total += count;
  373. if (count == QDIO_MAX_BUFFERS_MASK) {
  374. q->q_stats.nr_sbals[7]++;
  375. return;
  376. }
  377. while (count >>= 1)
  378. pos++;
  379. q->q_stats.nr_sbals[pos]++;
  380. }
  381. static void process_buffer_error(struct qdio_q *q, int count)
  382. {
  383. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  384. SLSB_P_OUTPUT_NOT_INIT;
  385. q->qdio_error = QDIO_ERROR_SLSB_STATE;
  386. /* special handling for no target buffer empty */
  387. if ((!q->is_input_q &&
  388. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  389. qperf_inc(q, target_full);
  390. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  391. q->first_to_check);
  392. goto set;
  393. }
  394. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  395. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  396. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  397. DBF_ERROR("F14:%2x F15:%2x",
  398. q->sbal[q->first_to_check]->element[14].sflags,
  399. q->sbal[q->first_to_check]->element[15].sflags);
  400. set:
  401. /*
  402. * Interrupts may be avoided as long as the error is present
  403. * so change the buffer state immediately to avoid starvation.
  404. */
  405. set_buf_states(q, q->first_to_check, state, count);
  406. }
  407. static inline void inbound_primed(struct qdio_q *q, int count)
  408. {
  409. int new;
  410. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  411. /* for QEBSM the ACK was already set by EQBS */
  412. if (is_qebsm(q)) {
  413. if (!q->u.in.polling) {
  414. q->u.in.polling = 1;
  415. q->u.in.ack_count = count;
  416. q->u.in.ack_start = q->first_to_check;
  417. return;
  418. }
  419. /* delete the previous ACK's */
  420. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  421. q->u.in.ack_count);
  422. q->u.in.ack_count = count;
  423. q->u.in.ack_start = q->first_to_check;
  424. return;
  425. }
  426. /*
  427. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  428. * or by the next inbound run.
  429. */
  430. new = add_buf(q->first_to_check, count - 1);
  431. if (q->u.in.polling) {
  432. /* reset the previous ACK but first set the new one */
  433. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  434. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  435. } else {
  436. q->u.in.polling = 1;
  437. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  438. }
  439. q->u.in.ack_start = new;
  440. count--;
  441. if (!count)
  442. return;
  443. /* need to change ALL buffers to get more interrupts */
  444. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  445. }
  446. static int get_inbound_buffer_frontier(struct qdio_q *q)
  447. {
  448. int count, stop;
  449. unsigned char state = 0;
  450. q->timestamp = get_clock();
  451. /*
  452. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  453. * would return 0.
  454. */
  455. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  456. stop = add_buf(q->first_to_check, count);
  457. if (q->first_to_check == stop)
  458. goto out;
  459. /*
  460. * No siga sync here, as a PCI or we after a thin interrupt
  461. * already sync'ed the queues.
  462. */
  463. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  464. if (!count)
  465. goto out;
  466. switch (state) {
  467. case SLSB_P_INPUT_PRIMED:
  468. inbound_primed(q, count);
  469. q->first_to_check = add_buf(q->first_to_check, count);
  470. if (atomic_sub(count, &q->nr_buf_used) == 0)
  471. qperf_inc(q, inbound_queue_full);
  472. if (q->irq_ptr->perf_stat_enabled)
  473. account_sbals(q, count);
  474. break;
  475. case SLSB_P_INPUT_ERROR:
  476. process_buffer_error(q, count);
  477. q->first_to_check = add_buf(q->first_to_check, count);
  478. atomic_sub(count, &q->nr_buf_used);
  479. if (q->irq_ptr->perf_stat_enabled)
  480. account_sbals_error(q, count);
  481. break;
  482. case SLSB_CU_INPUT_EMPTY:
  483. case SLSB_P_INPUT_NOT_INIT:
  484. case SLSB_P_INPUT_ACK:
  485. if (q->irq_ptr->perf_stat_enabled)
  486. q->q_stats.nr_sbal_nop++;
  487. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  488. break;
  489. default:
  490. BUG();
  491. }
  492. out:
  493. return q->first_to_check;
  494. }
  495. static int qdio_inbound_q_moved(struct qdio_q *q)
  496. {
  497. int bufnr;
  498. bufnr = get_inbound_buffer_frontier(q);
  499. if (bufnr != q->last_move) {
  500. q->last_move = bufnr;
  501. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  502. q->u.in.timestamp = get_clock();
  503. return 1;
  504. } else
  505. return 0;
  506. }
  507. static inline int qdio_inbound_q_done(struct qdio_q *q)
  508. {
  509. unsigned char state = 0;
  510. if (!atomic_read(&q->nr_buf_used))
  511. return 1;
  512. if (need_siga_sync(q))
  513. qdio_siga_sync_q(q);
  514. get_buf_state(q, q->first_to_check, &state, 0);
  515. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  516. /* more work coming */
  517. return 0;
  518. if (is_thinint_irq(q->irq_ptr))
  519. return 1;
  520. /* don't poll under z/VM */
  521. if (MACHINE_IS_VM)
  522. return 1;
  523. /*
  524. * At this point we know, that inbound first_to_check
  525. * has (probably) not moved (see qdio_inbound_processing).
  526. */
  527. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  528. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  529. q->first_to_check);
  530. return 1;
  531. } else
  532. return 0;
  533. }
  534. static inline int contains_aobs(struct qdio_q *q)
  535. {
  536. return !q->is_input_q && q->u.out.use_cq;
  537. }
  538. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  539. int i, struct qaob *aob)
  540. {
  541. int tmp;
  542. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  543. (unsigned long) virt_to_phys(aob));
  544. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  545. (unsigned long) aob->res0[0]);
  546. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  547. (unsigned long) aob->res0[1]);
  548. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  549. (unsigned long) aob->res0[2]);
  550. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  551. (unsigned long) aob->res0[3]);
  552. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  553. (unsigned long) aob->res0[4]);
  554. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  555. (unsigned long) aob->res0[5]);
  556. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  557. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  558. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  559. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  560. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  561. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  562. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  563. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  564. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  565. (unsigned long) aob->sba[tmp]);
  566. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  567. (unsigned long) q->sbal[i]->element[tmp].addr);
  568. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  569. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  570. q->sbal[i]->element[tmp].length);
  571. }
  572. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  573. for (tmp = 0; tmp < 2; ++tmp) {
  574. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  575. (unsigned long) aob->res4[tmp]);
  576. }
  577. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  578. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  579. }
  580. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  581. {
  582. unsigned char state = 0;
  583. int j, b = start;
  584. if (!contains_aobs(q))
  585. return;
  586. for (j = 0; j < count; ++j) {
  587. get_buf_state(q, b, &state, 0);
  588. if (state == SLSB_P_OUTPUT_PENDING) {
  589. struct qaob *aob = q->u.out.aobs[b];
  590. if (aob == NULL)
  591. continue;
  592. BUG_ON(q->u.out.sbal_state == NULL);
  593. q->u.out.sbal_state[b].flags |=
  594. QDIO_OUTBUF_STATE_FLAG_PENDING;
  595. q->u.out.aobs[b] = NULL;
  596. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  597. BUG_ON(q->u.out.sbal_state == NULL);
  598. q->u.out.sbal_state[b].aob = NULL;
  599. }
  600. b = next_buf(b);
  601. }
  602. }
  603. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  604. int bufnr)
  605. {
  606. unsigned long phys_aob = 0;
  607. if (!q->use_cq)
  608. goto out;
  609. if (!q->aobs[bufnr]) {
  610. struct qaob *aob = qdio_allocate_aob();
  611. q->aobs[bufnr] = aob;
  612. }
  613. if (q->aobs[bufnr]) {
  614. BUG_ON(q->sbal_state == NULL);
  615. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  616. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  617. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  618. phys_aob = virt_to_phys(q->aobs[bufnr]);
  619. BUG_ON(phys_aob & 0xFF);
  620. }
  621. out:
  622. return phys_aob;
  623. }
  624. static void qdio_kick_handler(struct qdio_q *q)
  625. {
  626. int start = q->first_to_kick;
  627. int end = q->first_to_check;
  628. int count;
  629. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  630. return;
  631. count = sub_buf(end, start);
  632. if (q->is_input_q) {
  633. qperf_inc(q, inbound_handler);
  634. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  635. } else {
  636. qperf_inc(q, outbound_handler);
  637. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  638. start, count);
  639. }
  640. qdio_handle_aobs(q, start, count);
  641. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  642. q->irq_ptr->int_parm);
  643. /* for the next time */
  644. q->first_to_kick = end;
  645. q->qdio_error = 0;
  646. }
  647. static void __qdio_inbound_processing(struct qdio_q *q)
  648. {
  649. qperf_inc(q, tasklet_inbound);
  650. if (!qdio_inbound_q_moved(q))
  651. return;
  652. qdio_kick_handler(q);
  653. if (!qdio_inbound_q_done(q)) {
  654. /* means poll time is not yet over */
  655. qperf_inc(q, tasklet_inbound_resched);
  656. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  657. tasklet_schedule(&q->tasklet);
  658. return;
  659. }
  660. }
  661. qdio_stop_polling(q);
  662. /*
  663. * We need to check again to not lose initiative after
  664. * resetting the ACK state.
  665. */
  666. if (!qdio_inbound_q_done(q)) {
  667. qperf_inc(q, tasklet_inbound_resched2);
  668. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  669. tasklet_schedule(&q->tasklet);
  670. }
  671. }
  672. void qdio_inbound_processing(unsigned long data)
  673. {
  674. struct qdio_q *q = (struct qdio_q *)data;
  675. __qdio_inbound_processing(q);
  676. }
  677. static int get_outbound_buffer_frontier(struct qdio_q *q)
  678. {
  679. int count, stop;
  680. unsigned char state = 0;
  681. q->timestamp = get_clock();
  682. if (need_siga_sync(q))
  683. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  684. !pci_out_supported(q)) ||
  685. (queue_type(q) == QDIO_IQDIO_QFMT &&
  686. multicast_outbound(q)))
  687. qdio_siga_sync_q(q);
  688. /*
  689. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  690. * would return 0.
  691. */
  692. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  693. stop = add_buf(q->first_to_check, count);
  694. if (q->first_to_check == stop)
  695. goto out;
  696. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  697. if (!count)
  698. goto out;
  699. switch (state) {
  700. case SLSB_P_OUTPUT_PENDING:
  701. BUG();
  702. case SLSB_P_OUTPUT_EMPTY:
  703. /* the adapter got it */
  704. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  705. "out empty:%1d %02x", q->nr, count);
  706. atomic_sub(count, &q->nr_buf_used);
  707. q->first_to_check = add_buf(q->first_to_check, count);
  708. if (q->irq_ptr->perf_stat_enabled)
  709. account_sbals(q, count);
  710. break;
  711. case SLSB_P_OUTPUT_ERROR:
  712. process_buffer_error(q, count);
  713. q->first_to_check = add_buf(q->first_to_check, count);
  714. atomic_sub(count, &q->nr_buf_used);
  715. if (q->irq_ptr->perf_stat_enabled)
  716. account_sbals_error(q, count);
  717. break;
  718. case SLSB_CU_OUTPUT_PRIMED:
  719. /* the adapter has not fetched the output yet */
  720. if (q->irq_ptr->perf_stat_enabled)
  721. q->q_stats.nr_sbal_nop++;
  722. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  723. q->nr);
  724. break;
  725. case SLSB_P_OUTPUT_NOT_INIT:
  726. case SLSB_P_OUTPUT_HALTED:
  727. break;
  728. default:
  729. BUG();
  730. }
  731. out:
  732. return q->first_to_check;
  733. }
  734. /* all buffers processed? */
  735. static inline int qdio_outbound_q_done(struct qdio_q *q)
  736. {
  737. return atomic_read(&q->nr_buf_used) == 0;
  738. }
  739. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  740. {
  741. int bufnr;
  742. bufnr = get_outbound_buffer_frontier(q);
  743. if (bufnr != q->last_move) {
  744. q->last_move = bufnr;
  745. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  746. return 1;
  747. } else
  748. return 0;
  749. }
  750. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  751. {
  752. int retries = 0, cc;
  753. unsigned int busy_bit;
  754. if (!need_siga_out(q))
  755. return 0;
  756. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  757. retry:
  758. qperf_inc(q, siga_write);
  759. cc = qdio_siga_output(q, &busy_bit, aob);
  760. switch (cc) {
  761. case 0:
  762. break;
  763. case 2:
  764. if (busy_bit) {
  765. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  766. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  767. goto retry;
  768. }
  769. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  770. cc = -EBUSY;
  771. } else {
  772. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  773. cc = -ENOBUFS;
  774. }
  775. break;
  776. case 1:
  777. case 3:
  778. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  779. cc = -EIO;
  780. break;
  781. }
  782. if (retries) {
  783. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  784. DBF_ERROR("count:%u", retries);
  785. }
  786. return cc;
  787. }
  788. static void __qdio_outbound_processing(struct qdio_q *q)
  789. {
  790. qperf_inc(q, tasklet_outbound);
  791. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  792. if (qdio_outbound_q_moved(q))
  793. qdio_kick_handler(q);
  794. if (queue_type(q) == QDIO_ZFCP_QFMT)
  795. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  796. goto sched;
  797. if (q->u.out.pci_out_enabled)
  798. return;
  799. /*
  800. * Now we know that queue type is either qeth without pci enabled
  801. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  802. * is noticed and outbound_handler is called after some time.
  803. */
  804. if (qdio_outbound_q_done(q))
  805. del_timer(&q->u.out.timer);
  806. else
  807. if (!timer_pending(&q->u.out.timer))
  808. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  809. return;
  810. sched:
  811. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  812. return;
  813. tasklet_schedule(&q->tasklet);
  814. }
  815. /* outbound tasklet */
  816. void qdio_outbound_processing(unsigned long data)
  817. {
  818. struct qdio_q *q = (struct qdio_q *)data;
  819. __qdio_outbound_processing(q);
  820. }
  821. void qdio_outbound_timer(unsigned long data)
  822. {
  823. struct qdio_q *q = (struct qdio_q *)data;
  824. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  825. return;
  826. tasklet_schedule(&q->tasklet);
  827. }
  828. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  829. {
  830. struct qdio_q *out;
  831. int i;
  832. if (!pci_out_supported(q))
  833. return;
  834. for_each_output_queue(q->irq_ptr, out, i)
  835. if (!qdio_outbound_q_done(out))
  836. tasklet_schedule(&out->tasklet);
  837. }
  838. static void __tiqdio_inbound_processing(struct qdio_q *q)
  839. {
  840. qperf_inc(q, tasklet_inbound);
  841. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  842. qdio_sync_queues(q);
  843. /*
  844. * The interrupt could be caused by a PCI request. Check the
  845. * PCI capable outbound queues.
  846. */
  847. qdio_check_outbound_after_thinint(q);
  848. if (!qdio_inbound_q_moved(q))
  849. return;
  850. qdio_kick_handler(q);
  851. if (!qdio_inbound_q_done(q)) {
  852. qperf_inc(q, tasklet_inbound_resched);
  853. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  854. tasklet_schedule(&q->tasklet);
  855. return;
  856. }
  857. }
  858. qdio_stop_polling(q);
  859. /*
  860. * We need to check again to not lose initiative after
  861. * resetting the ACK state.
  862. */
  863. if (!qdio_inbound_q_done(q)) {
  864. qperf_inc(q, tasklet_inbound_resched2);
  865. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  866. tasklet_schedule(&q->tasklet);
  867. }
  868. }
  869. void tiqdio_inbound_processing(unsigned long data)
  870. {
  871. struct qdio_q *q = (struct qdio_q *)data;
  872. __tiqdio_inbound_processing(q);
  873. }
  874. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  875. enum qdio_irq_states state)
  876. {
  877. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  878. irq_ptr->state = state;
  879. mb();
  880. }
  881. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  882. {
  883. if (irb->esw.esw0.erw.cons) {
  884. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  885. DBF_ERROR_HEX(irb, 64);
  886. DBF_ERROR_HEX(irb->ecw, 64);
  887. }
  888. }
  889. /* PCI interrupt handler */
  890. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  891. {
  892. int i;
  893. struct qdio_q *q;
  894. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  895. return;
  896. for_each_input_queue(irq_ptr, q, i) {
  897. if (q->u.in.queue_start_poll) {
  898. /* skip if polling is enabled or already in work */
  899. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  900. &q->u.in.queue_irq_state)) {
  901. qperf_inc(q, int_discarded);
  902. continue;
  903. }
  904. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  905. q->irq_ptr->int_parm);
  906. } else {
  907. tasklet_schedule(&q->tasklet);
  908. }
  909. }
  910. if (!pci_out_supported(q))
  911. return;
  912. for_each_output_queue(irq_ptr, q, i) {
  913. if (qdio_outbound_q_done(q))
  914. continue;
  915. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  916. qdio_siga_sync_q(q);
  917. tasklet_schedule(&q->tasklet);
  918. }
  919. }
  920. static void qdio_handle_activate_check(struct ccw_device *cdev,
  921. unsigned long intparm, int cstat, int dstat)
  922. {
  923. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  924. struct qdio_q *q;
  925. int count;
  926. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  927. DBF_ERROR("intp :%lx", intparm);
  928. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  929. if (irq_ptr->nr_input_qs) {
  930. q = irq_ptr->input_qs[0];
  931. } else if (irq_ptr->nr_output_qs) {
  932. q = irq_ptr->output_qs[0];
  933. } else {
  934. dump_stack();
  935. goto no_handler;
  936. }
  937. count = sub_buf(q->first_to_check, q->first_to_kick);
  938. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
  939. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  940. no_handler:
  941. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  942. /*
  943. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  944. * Therefore we call the LGR detection function here.
  945. */
  946. lgr_info_log();
  947. }
  948. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  949. int dstat)
  950. {
  951. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  952. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  953. if (cstat)
  954. goto error;
  955. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  956. goto error;
  957. if (!(dstat & DEV_STAT_DEV_END))
  958. goto error;
  959. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  960. return;
  961. error:
  962. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  963. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  964. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  965. }
  966. /* qdio interrupt handler */
  967. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  968. struct irb *irb)
  969. {
  970. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  971. int cstat, dstat;
  972. if (!intparm || !irq_ptr) {
  973. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  974. return;
  975. }
  976. if (irq_ptr->perf_stat_enabled)
  977. irq_ptr->perf_stat.qdio_int++;
  978. if (IS_ERR(irb)) {
  979. switch (PTR_ERR(irb)) {
  980. case -EIO:
  981. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  982. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  983. wake_up(&cdev->private->wait_q);
  984. return;
  985. default:
  986. WARN_ON(1);
  987. return;
  988. }
  989. }
  990. qdio_irq_check_sense(irq_ptr, irb);
  991. cstat = irb->scsw.cmd.cstat;
  992. dstat = irb->scsw.cmd.dstat;
  993. switch (irq_ptr->state) {
  994. case QDIO_IRQ_STATE_INACTIVE:
  995. qdio_establish_handle_irq(cdev, cstat, dstat);
  996. break;
  997. case QDIO_IRQ_STATE_CLEANUP:
  998. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  999. break;
  1000. case QDIO_IRQ_STATE_ESTABLISHED:
  1001. case QDIO_IRQ_STATE_ACTIVE:
  1002. if (cstat & SCHN_STAT_PCI) {
  1003. qdio_int_handler_pci(irq_ptr);
  1004. return;
  1005. }
  1006. if (cstat || dstat)
  1007. qdio_handle_activate_check(cdev, intparm, cstat,
  1008. dstat);
  1009. break;
  1010. case QDIO_IRQ_STATE_STOPPED:
  1011. break;
  1012. default:
  1013. WARN_ON(1);
  1014. }
  1015. wake_up(&cdev->private->wait_q);
  1016. }
  1017. /**
  1018. * qdio_get_ssqd_desc - get qdio subchannel description
  1019. * @cdev: ccw device to get description for
  1020. * @data: where to store the ssqd
  1021. *
  1022. * Returns 0 or an error code. The results of the chsc are stored in the
  1023. * specified structure.
  1024. */
  1025. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1026. struct qdio_ssqd_desc *data)
  1027. {
  1028. if (!cdev || !cdev->private)
  1029. return -EINVAL;
  1030. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1031. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1032. }
  1033. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1034. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1035. {
  1036. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1037. struct qdio_q *q;
  1038. int i;
  1039. for_each_input_queue(irq_ptr, q, i)
  1040. tasklet_kill(&q->tasklet);
  1041. for_each_output_queue(irq_ptr, q, i) {
  1042. del_timer(&q->u.out.timer);
  1043. tasklet_kill(&q->tasklet);
  1044. }
  1045. }
  1046. /**
  1047. * qdio_shutdown - shut down a qdio subchannel
  1048. * @cdev: associated ccw device
  1049. * @how: use halt or clear to shutdown
  1050. */
  1051. int qdio_shutdown(struct ccw_device *cdev, int how)
  1052. {
  1053. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1054. int rc;
  1055. unsigned long flags;
  1056. if (!irq_ptr)
  1057. return -ENODEV;
  1058. BUG_ON(irqs_disabled());
  1059. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1060. mutex_lock(&irq_ptr->setup_mutex);
  1061. /*
  1062. * Subchannel was already shot down. We cannot prevent being called
  1063. * twice since cio may trigger a shutdown asynchronously.
  1064. */
  1065. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1066. mutex_unlock(&irq_ptr->setup_mutex);
  1067. return 0;
  1068. }
  1069. /*
  1070. * Indicate that the device is going down. Scheduling the queue
  1071. * tasklets is forbidden from here on.
  1072. */
  1073. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1074. tiqdio_remove_input_queues(irq_ptr);
  1075. qdio_shutdown_queues(cdev);
  1076. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1077. /* cleanup subchannel */
  1078. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1079. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1080. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1081. else
  1082. /* default behaviour is halt */
  1083. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1084. if (rc) {
  1085. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1086. DBF_ERROR("rc:%4d", rc);
  1087. goto no_cleanup;
  1088. }
  1089. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1090. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1091. wait_event_interruptible_timeout(cdev->private->wait_q,
  1092. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1093. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1094. 10 * HZ);
  1095. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1096. no_cleanup:
  1097. qdio_shutdown_thinint(irq_ptr);
  1098. /* restore interrupt handler */
  1099. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1100. cdev->handler = irq_ptr->orig_handler;
  1101. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1102. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1103. mutex_unlock(&irq_ptr->setup_mutex);
  1104. if (rc)
  1105. return rc;
  1106. return 0;
  1107. }
  1108. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1109. /**
  1110. * qdio_free - free data structures for a qdio subchannel
  1111. * @cdev: associated ccw device
  1112. */
  1113. int qdio_free(struct ccw_device *cdev)
  1114. {
  1115. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1116. if (!irq_ptr)
  1117. return -ENODEV;
  1118. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1119. mutex_lock(&irq_ptr->setup_mutex);
  1120. if (irq_ptr->debug_area != NULL) {
  1121. debug_unregister(irq_ptr->debug_area);
  1122. irq_ptr->debug_area = NULL;
  1123. }
  1124. cdev->private->qdio_data = NULL;
  1125. mutex_unlock(&irq_ptr->setup_mutex);
  1126. qdio_release_memory(irq_ptr);
  1127. return 0;
  1128. }
  1129. EXPORT_SYMBOL_GPL(qdio_free);
  1130. /**
  1131. * qdio_allocate - allocate qdio queues and associated data
  1132. * @init_data: initialization data
  1133. */
  1134. int qdio_allocate(struct qdio_initialize *init_data)
  1135. {
  1136. struct qdio_irq *irq_ptr;
  1137. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1138. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1139. (init_data->no_output_qs && !init_data->output_handler))
  1140. return -EINVAL;
  1141. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1142. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1143. return -EINVAL;
  1144. if ((!init_data->input_sbal_addr_array) ||
  1145. (!init_data->output_sbal_addr_array))
  1146. return -EINVAL;
  1147. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1148. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1149. if (!irq_ptr)
  1150. goto out_err;
  1151. mutex_init(&irq_ptr->setup_mutex);
  1152. qdio_allocate_dbf(init_data, irq_ptr);
  1153. /*
  1154. * Allocate a page for the chsc calls in qdio_establish.
  1155. * Must be pre-allocated since a zfcp recovery will call
  1156. * qdio_establish. In case of low memory and swap on a zfcp disk
  1157. * we may not be able to allocate memory otherwise.
  1158. */
  1159. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1160. if (!irq_ptr->chsc_page)
  1161. goto out_rel;
  1162. /* qdr is used in ccw1.cda which is u32 */
  1163. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1164. if (!irq_ptr->qdr)
  1165. goto out_rel;
  1166. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1167. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1168. init_data->no_output_qs))
  1169. goto out_rel;
  1170. init_data->cdev->private->qdio_data = irq_ptr;
  1171. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1172. return 0;
  1173. out_rel:
  1174. qdio_release_memory(irq_ptr);
  1175. out_err:
  1176. return -ENOMEM;
  1177. }
  1178. EXPORT_SYMBOL_GPL(qdio_allocate);
  1179. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1180. {
  1181. struct qdio_q *q = irq_ptr->input_qs[0];
  1182. int i, use_cq = 0;
  1183. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1184. use_cq = 1;
  1185. for_each_output_queue(irq_ptr, q, i) {
  1186. if (use_cq) {
  1187. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1188. use_cq = 0;
  1189. continue;
  1190. }
  1191. } else
  1192. qdio_disable_async_operation(&q->u.out);
  1193. }
  1194. DBF_EVENT("use_cq:%d", use_cq);
  1195. }
  1196. /**
  1197. * qdio_establish - establish queues on a qdio subchannel
  1198. * @init_data: initialization data
  1199. */
  1200. int qdio_establish(struct qdio_initialize *init_data)
  1201. {
  1202. struct qdio_irq *irq_ptr;
  1203. struct ccw_device *cdev = init_data->cdev;
  1204. unsigned long saveflags;
  1205. int rc;
  1206. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1207. irq_ptr = cdev->private->qdio_data;
  1208. if (!irq_ptr)
  1209. return -ENODEV;
  1210. if (cdev->private->state != DEV_STATE_ONLINE)
  1211. return -EINVAL;
  1212. mutex_lock(&irq_ptr->setup_mutex);
  1213. qdio_setup_irq(init_data);
  1214. rc = qdio_establish_thinint(irq_ptr);
  1215. if (rc) {
  1216. mutex_unlock(&irq_ptr->setup_mutex);
  1217. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1218. return rc;
  1219. }
  1220. /* establish q */
  1221. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1222. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1223. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1224. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1225. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1226. ccw_device_set_options_mask(cdev, 0);
  1227. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1228. if (rc) {
  1229. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1230. DBF_ERROR("rc:%4x", rc);
  1231. }
  1232. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1233. if (rc) {
  1234. mutex_unlock(&irq_ptr->setup_mutex);
  1235. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1236. return rc;
  1237. }
  1238. wait_event_interruptible_timeout(cdev->private->wait_q,
  1239. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1240. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1241. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1242. mutex_unlock(&irq_ptr->setup_mutex);
  1243. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1244. return -EIO;
  1245. }
  1246. qdio_setup_ssqd_info(irq_ptr);
  1247. qdio_detect_hsicq(irq_ptr);
  1248. /* qebsm is now setup if available, initialize buffer states */
  1249. qdio_init_buf_states(irq_ptr);
  1250. mutex_unlock(&irq_ptr->setup_mutex);
  1251. qdio_print_subchannel_info(irq_ptr, cdev);
  1252. qdio_setup_debug_entries(irq_ptr, cdev);
  1253. return 0;
  1254. }
  1255. EXPORT_SYMBOL_GPL(qdio_establish);
  1256. /**
  1257. * qdio_activate - activate queues on a qdio subchannel
  1258. * @cdev: associated cdev
  1259. */
  1260. int qdio_activate(struct ccw_device *cdev)
  1261. {
  1262. struct qdio_irq *irq_ptr;
  1263. int rc;
  1264. unsigned long saveflags;
  1265. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1266. irq_ptr = cdev->private->qdio_data;
  1267. if (!irq_ptr)
  1268. return -ENODEV;
  1269. if (cdev->private->state != DEV_STATE_ONLINE)
  1270. return -EINVAL;
  1271. mutex_lock(&irq_ptr->setup_mutex);
  1272. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1273. rc = -EBUSY;
  1274. goto out;
  1275. }
  1276. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1277. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1278. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1279. irq_ptr->ccw.cda = 0;
  1280. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1281. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1282. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1283. 0, DOIO_DENY_PREFETCH);
  1284. if (rc) {
  1285. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1286. DBF_ERROR("rc:%4x", rc);
  1287. }
  1288. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1289. if (rc)
  1290. goto out;
  1291. if (is_thinint_irq(irq_ptr))
  1292. tiqdio_add_input_queues(irq_ptr);
  1293. /* wait for subchannel to become active */
  1294. msleep(5);
  1295. switch (irq_ptr->state) {
  1296. case QDIO_IRQ_STATE_STOPPED:
  1297. case QDIO_IRQ_STATE_ERR:
  1298. rc = -EIO;
  1299. break;
  1300. default:
  1301. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1302. rc = 0;
  1303. }
  1304. out:
  1305. mutex_unlock(&irq_ptr->setup_mutex);
  1306. return rc;
  1307. }
  1308. EXPORT_SYMBOL_GPL(qdio_activate);
  1309. static inline int buf_in_between(int bufnr, int start, int count)
  1310. {
  1311. int end = add_buf(start, count);
  1312. if (end > start) {
  1313. if (bufnr >= start && bufnr < end)
  1314. return 1;
  1315. else
  1316. return 0;
  1317. }
  1318. /* wrap-around case */
  1319. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1320. (bufnr < end))
  1321. return 1;
  1322. else
  1323. return 0;
  1324. }
  1325. /**
  1326. * handle_inbound - reset processed input buffers
  1327. * @q: queue containing the buffers
  1328. * @callflags: flags
  1329. * @bufnr: first buffer to process
  1330. * @count: how many buffers are emptied
  1331. */
  1332. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1333. int bufnr, int count)
  1334. {
  1335. int used, diff;
  1336. qperf_inc(q, inbound_call);
  1337. if (!q->u.in.polling)
  1338. goto set;
  1339. /* protect against stop polling setting an ACK for an emptied slsb */
  1340. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1341. /* overwriting everything, just delete polling status */
  1342. q->u.in.polling = 0;
  1343. q->u.in.ack_count = 0;
  1344. goto set;
  1345. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1346. if (is_qebsm(q)) {
  1347. /* partial overwrite, just update ack_start */
  1348. diff = add_buf(bufnr, count);
  1349. diff = sub_buf(diff, q->u.in.ack_start);
  1350. q->u.in.ack_count -= diff;
  1351. if (q->u.in.ack_count <= 0) {
  1352. q->u.in.polling = 0;
  1353. q->u.in.ack_count = 0;
  1354. goto set;
  1355. }
  1356. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1357. }
  1358. else
  1359. /* the only ACK will be deleted, so stop polling */
  1360. q->u.in.polling = 0;
  1361. }
  1362. set:
  1363. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1364. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1365. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1366. if (need_siga_in(q))
  1367. return qdio_siga_input(q);
  1368. return 0;
  1369. }
  1370. /**
  1371. * handle_outbound - process filled outbound buffers
  1372. * @q: queue containing the buffers
  1373. * @callflags: flags
  1374. * @bufnr: first buffer to process
  1375. * @count: how many buffers are filled
  1376. */
  1377. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1378. int bufnr, int count)
  1379. {
  1380. unsigned char state = 0;
  1381. int used, rc = 0;
  1382. qperf_inc(q, outbound_call);
  1383. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1384. used = atomic_add_return(count, &q->nr_buf_used);
  1385. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1386. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1387. qperf_inc(q, outbound_queue_full);
  1388. if (callflags & QDIO_FLAG_PCI_OUT) {
  1389. q->u.out.pci_out_enabled = 1;
  1390. qperf_inc(q, pci_request_int);
  1391. } else
  1392. q->u.out.pci_out_enabled = 0;
  1393. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1394. unsigned long phys_aob = 0;
  1395. /* One SIGA-W per buffer required for unicast HSI */
  1396. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1397. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1398. rc = qdio_kick_outbound_q(q, phys_aob);
  1399. } else if (need_siga_sync(q)) {
  1400. rc = qdio_siga_sync_q(q);
  1401. } else {
  1402. /* try to fast requeue buffers */
  1403. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1404. if (state != SLSB_CU_OUTPUT_PRIMED)
  1405. rc = qdio_kick_outbound_q(q, 0);
  1406. else
  1407. qperf_inc(q, fast_requeue);
  1408. }
  1409. /* in case of SIGA errors we must process the error immediately */
  1410. if (used >= q->u.out.scan_threshold || rc)
  1411. tasklet_schedule(&q->tasklet);
  1412. else
  1413. /* free the SBALs in case of no further traffic */
  1414. if (!timer_pending(&q->u.out.timer))
  1415. mod_timer(&q->u.out.timer, jiffies + HZ);
  1416. return rc;
  1417. }
  1418. /**
  1419. * do_QDIO - process input or output buffers
  1420. * @cdev: associated ccw_device for the qdio subchannel
  1421. * @callflags: input or output and special flags from the program
  1422. * @q_nr: queue number
  1423. * @bufnr: buffer number
  1424. * @count: how many buffers to process
  1425. */
  1426. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1427. int q_nr, unsigned int bufnr, unsigned int count)
  1428. {
  1429. struct qdio_irq *irq_ptr;
  1430. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1431. return -EINVAL;
  1432. irq_ptr = cdev->private->qdio_data;
  1433. if (!irq_ptr)
  1434. return -ENODEV;
  1435. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1436. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1437. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1438. return -EIO;
  1439. if (!count)
  1440. return 0;
  1441. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1442. return handle_inbound(irq_ptr->input_qs[q_nr],
  1443. callflags, bufnr, count);
  1444. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1445. return handle_outbound(irq_ptr->output_qs[q_nr],
  1446. callflags, bufnr, count);
  1447. return -EINVAL;
  1448. }
  1449. EXPORT_SYMBOL_GPL(do_QDIO);
  1450. /**
  1451. * qdio_start_irq - process input buffers
  1452. * @cdev: associated ccw_device for the qdio subchannel
  1453. * @nr: input queue number
  1454. *
  1455. * Return codes
  1456. * 0 - success
  1457. * 1 - irqs not started since new data is available
  1458. */
  1459. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1460. {
  1461. struct qdio_q *q;
  1462. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1463. if (!irq_ptr)
  1464. return -ENODEV;
  1465. q = irq_ptr->input_qs[nr];
  1466. WARN_ON(queue_irqs_enabled(q));
  1467. clear_nonshared_ind(irq_ptr);
  1468. qdio_stop_polling(q);
  1469. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1470. /*
  1471. * We need to check again to not lose initiative after
  1472. * resetting the ACK state.
  1473. */
  1474. if (test_nonshared_ind(irq_ptr))
  1475. goto rescan;
  1476. if (!qdio_inbound_q_done(q))
  1477. goto rescan;
  1478. return 0;
  1479. rescan:
  1480. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1481. &q->u.in.queue_irq_state))
  1482. return 0;
  1483. else
  1484. return 1;
  1485. }
  1486. EXPORT_SYMBOL(qdio_start_irq);
  1487. /**
  1488. * qdio_get_next_buffers - process input buffers
  1489. * @cdev: associated ccw_device for the qdio subchannel
  1490. * @nr: input queue number
  1491. * @bufnr: first filled buffer number
  1492. * @error: buffers are in error state
  1493. *
  1494. * Return codes
  1495. * < 0 - error
  1496. * = 0 - no new buffers found
  1497. * > 0 - number of processed buffers
  1498. */
  1499. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1500. int *error)
  1501. {
  1502. struct qdio_q *q;
  1503. int start, end;
  1504. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1505. if (!irq_ptr)
  1506. return -ENODEV;
  1507. q = irq_ptr->input_qs[nr];
  1508. WARN_ON(queue_irqs_enabled(q));
  1509. /*
  1510. * Cannot rely on automatic sync after interrupt since queues may
  1511. * also be examined without interrupt.
  1512. */
  1513. if (need_siga_sync(q))
  1514. qdio_sync_queues(q);
  1515. /* check the PCI capable outbound queues. */
  1516. qdio_check_outbound_after_thinint(q);
  1517. if (!qdio_inbound_q_moved(q))
  1518. return 0;
  1519. /* Note: upper-layer MUST stop processing immediately here ... */
  1520. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1521. return -EIO;
  1522. start = q->first_to_kick;
  1523. end = q->first_to_check;
  1524. *bufnr = start;
  1525. *error = q->qdio_error;
  1526. /* for the next time */
  1527. q->first_to_kick = end;
  1528. q->qdio_error = 0;
  1529. return sub_buf(end, start);
  1530. }
  1531. EXPORT_SYMBOL(qdio_get_next_buffers);
  1532. /**
  1533. * qdio_stop_irq - disable interrupt processing for the device
  1534. * @cdev: associated ccw_device for the qdio subchannel
  1535. * @nr: input queue number
  1536. *
  1537. * Return codes
  1538. * 0 - interrupts were already disabled
  1539. * 1 - interrupts successfully disabled
  1540. */
  1541. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1542. {
  1543. struct qdio_q *q;
  1544. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1545. if (!irq_ptr)
  1546. return -ENODEV;
  1547. q = irq_ptr->input_qs[nr];
  1548. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1549. &q->u.in.queue_irq_state))
  1550. return 0;
  1551. else
  1552. return 1;
  1553. }
  1554. EXPORT_SYMBOL(qdio_stop_irq);
  1555. static int __init init_QDIO(void)
  1556. {
  1557. int rc;
  1558. rc = qdio_debug_init();
  1559. if (rc)
  1560. return rc;
  1561. rc = qdio_setup_init();
  1562. if (rc)
  1563. goto out_debug;
  1564. rc = tiqdio_allocate_memory();
  1565. if (rc)
  1566. goto out_cache;
  1567. rc = tiqdio_register_thinints();
  1568. if (rc)
  1569. goto out_ti;
  1570. return 0;
  1571. out_ti:
  1572. tiqdio_free_memory();
  1573. out_cache:
  1574. qdio_setup_exit();
  1575. out_debug:
  1576. qdio_debug_exit();
  1577. return rc;
  1578. }
  1579. static void __exit exit_QDIO(void)
  1580. {
  1581. tiqdio_unregister_thinints();
  1582. tiqdio_free_memory();
  1583. qdio_setup_exit();
  1584. qdio_debug_exit();
  1585. }
  1586. module_init(init_QDIO);
  1587. module_exit(exit_QDIO);