tps65910-regulator.c 32 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253
  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #include <linux/regulator/of_regulator.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in microvolts */
  32. static const unsigned int VIO_VSEL_table[] = {
  33. 1500000, 1800000, 2500000, 3300000,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in microvolts */
  37. static const unsigned int VDD3_VSEL_table[] = {
  38. 5000000,
  39. };
  40. /* supported VDIG1 voltages in microvolts */
  41. static const unsigned int VDIG1_VSEL_table[] = {
  42. 1200000, 1500000, 1800000, 2700000,
  43. };
  44. /* supported VDIG2 voltages in microvolts */
  45. static const unsigned int VDIG2_VSEL_table[] = {
  46. 1000000, 1100000, 1200000, 1800000,
  47. };
  48. /* supported VPLL voltages in microvolts */
  49. static const unsigned int VPLL_VSEL_table[] = {
  50. 1000000, 1100000, 1800000, 2500000,
  51. };
  52. /* supported VDAC voltages in microvolts */
  53. static const unsigned int VDAC_VSEL_table[] = {
  54. 1800000, 2600000, 2800000, 2850000,
  55. };
  56. /* supported VAUX1 voltages in microvolts */
  57. static const unsigned int VAUX1_VSEL_table[] = {
  58. 1800000, 2500000, 2800000, 2850000,
  59. };
  60. /* supported VAUX2 voltages in microvolts */
  61. static const unsigned int VAUX2_VSEL_table[] = {
  62. 1800000, 2800000, 2900000, 3300000,
  63. };
  64. /* supported VAUX33 voltages in microvolts */
  65. static const unsigned int VAUX33_VSEL_table[] = {
  66. 1800000, 2000000, 2800000, 3300000,
  67. };
  68. /* supported VMMC voltages in microvolts */
  69. static const unsigned int VMMC_VSEL_table[] = {
  70. 1800000, 2800000, 3000000, 3300000,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. const char *vin_name;
  75. u8 n_voltages;
  76. const unsigned int *voltage_table;
  77. int enable_time_us;
  78. };
  79. static struct tps_info tps65910_regs[] = {
  80. {
  81. .name = "vrtc",
  82. .vin_name = "vcc7",
  83. .enable_time_us = 2200,
  84. },
  85. {
  86. .name = "vio",
  87. .vin_name = "vccio",
  88. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  89. .voltage_table = VIO_VSEL_table,
  90. .enable_time_us = 350,
  91. },
  92. {
  93. .name = "vdd1",
  94. .vin_name = "vcc1",
  95. .enable_time_us = 350,
  96. },
  97. {
  98. .name = "vdd2",
  99. .vin_name = "vcc2",
  100. .enable_time_us = 350,
  101. },
  102. {
  103. .name = "vdd3",
  104. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  105. .voltage_table = VDD3_VSEL_table,
  106. .enable_time_us = 200,
  107. },
  108. {
  109. .name = "vdig1",
  110. .vin_name = "vcc6",
  111. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  112. .voltage_table = VDIG1_VSEL_table,
  113. .enable_time_us = 100,
  114. },
  115. {
  116. .name = "vdig2",
  117. .vin_name = "vcc6",
  118. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  119. .voltage_table = VDIG2_VSEL_table,
  120. .enable_time_us = 100,
  121. },
  122. {
  123. .name = "vpll",
  124. .vin_name = "vcc5",
  125. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  126. .voltage_table = VPLL_VSEL_table,
  127. .enable_time_us = 100,
  128. },
  129. {
  130. .name = "vdac",
  131. .vin_name = "vcc5",
  132. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  133. .voltage_table = VDAC_VSEL_table,
  134. .enable_time_us = 100,
  135. },
  136. {
  137. .name = "vaux1",
  138. .vin_name = "vcc4",
  139. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  140. .voltage_table = VAUX1_VSEL_table,
  141. .enable_time_us = 100,
  142. },
  143. {
  144. .name = "vaux2",
  145. .vin_name = "vcc4",
  146. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  147. .voltage_table = VAUX2_VSEL_table,
  148. .enable_time_us = 100,
  149. },
  150. {
  151. .name = "vaux33",
  152. .vin_name = "vcc3",
  153. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  154. .voltage_table = VAUX33_VSEL_table,
  155. .enable_time_us = 100,
  156. },
  157. {
  158. .name = "vmmc",
  159. .vin_name = "vcc3",
  160. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  161. .voltage_table = VMMC_VSEL_table,
  162. .enable_time_us = 100,
  163. },
  164. };
  165. static struct tps_info tps65911_regs[] = {
  166. {
  167. .name = "vrtc",
  168. .vin_name = "vcc7",
  169. .enable_time_us = 2200,
  170. },
  171. {
  172. .name = "vio",
  173. .vin_name = "vccio",
  174. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  175. .voltage_table = VIO_VSEL_table,
  176. .enable_time_us = 350,
  177. },
  178. {
  179. .name = "vdd1",
  180. .vin_name = "vcc1",
  181. .n_voltages = 0x4C,
  182. .enable_time_us = 350,
  183. },
  184. {
  185. .name = "vdd2",
  186. .vin_name = "vcc2",
  187. .n_voltages = 0x4C,
  188. .enable_time_us = 350,
  189. },
  190. {
  191. .name = "vddctrl",
  192. .n_voltages = 0x44,
  193. .enable_time_us = 900,
  194. },
  195. {
  196. .name = "ldo1",
  197. .vin_name = "vcc6",
  198. .n_voltages = 0x33,
  199. .enable_time_us = 420,
  200. },
  201. {
  202. .name = "ldo2",
  203. .vin_name = "vcc6",
  204. .n_voltages = 0x33,
  205. .enable_time_us = 420,
  206. },
  207. {
  208. .name = "ldo3",
  209. .vin_name = "vcc5",
  210. .n_voltages = 0x1A,
  211. .enable_time_us = 230,
  212. },
  213. {
  214. .name = "ldo4",
  215. .vin_name = "vcc5",
  216. .n_voltages = 0x33,
  217. .enable_time_us = 230,
  218. },
  219. {
  220. .name = "ldo5",
  221. .vin_name = "vcc4",
  222. .n_voltages = 0x1A,
  223. .enable_time_us = 230,
  224. },
  225. {
  226. .name = "ldo6",
  227. .vin_name = "vcc3",
  228. .n_voltages = 0x1A,
  229. .enable_time_us = 230,
  230. },
  231. {
  232. .name = "ldo7",
  233. .vin_name = "vcc3",
  234. .n_voltages = 0x1A,
  235. .enable_time_us = 230,
  236. },
  237. {
  238. .name = "ldo8",
  239. .vin_name = "vcc3",
  240. .n_voltages = 0x1A,
  241. .enable_time_us = 230,
  242. },
  243. };
  244. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  245. static unsigned int tps65910_ext_sleep_control[] = {
  246. 0,
  247. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  248. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  249. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  250. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  251. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  252. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  253. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  254. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  255. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  256. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  257. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  258. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  259. };
  260. static unsigned int tps65911_ext_sleep_control[] = {
  261. 0,
  262. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  263. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  264. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  265. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  266. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  267. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  268. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  269. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  270. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  271. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  272. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  273. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  274. };
  275. struct tps65910_reg {
  276. struct regulator_desc *desc;
  277. struct tps65910 *mfd;
  278. struct regulator_dev **rdev;
  279. struct tps_info **info;
  280. int num_regulators;
  281. int mode;
  282. int (*get_ctrl_reg)(int);
  283. unsigned int *ext_sleep_control;
  284. unsigned int board_ext_control[TPS65910_NUM_REGS];
  285. };
  286. static int tps65910_get_ctrl_register(int id)
  287. {
  288. switch (id) {
  289. case TPS65910_REG_VRTC:
  290. return TPS65910_VRTC;
  291. case TPS65910_REG_VIO:
  292. return TPS65910_VIO;
  293. case TPS65910_REG_VDD1:
  294. return TPS65910_VDD1;
  295. case TPS65910_REG_VDD2:
  296. return TPS65910_VDD2;
  297. case TPS65910_REG_VDD3:
  298. return TPS65910_VDD3;
  299. case TPS65910_REG_VDIG1:
  300. return TPS65910_VDIG1;
  301. case TPS65910_REG_VDIG2:
  302. return TPS65910_VDIG2;
  303. case TPS65910_REG_VPLL:
  304. return TPS65910_VPLL;
  305. case TPS65910_REG_VDAC:
  306. return TPS65910_VDAC;
  307. case TPS65910_REG_VAUX1:
  308. return TPS65910_VAUX1;
  309. case TPS65910_REG_VAUX2:
  310. return TPS65910_VAUX2;
  311. case TPS65910_REG_VAUX33:
  312. return TPS65910_VAUX33;
  313. case TPS65910_REG_VMMC:
  314. return TPS65910_VMMC;
  315. default:
  316. return -EINVAL;
  317. }
  318. }
  319. static int tps65911_get_ctrl_register(int id)
  320. {
  321. switch (id) {
  322. case TPS65910_REG_VRTC:
  323. return TPS65910_VRTC;
  324. case TPS65910_REG_VIO:
  325. return TPS65910_VIO;
  326. case TPS65910_REG_VDD1:
  327. return TPS65910_VDD1;
  328. case TPS65910_REG_VDD2:
  329. return TPS65910_VDD2;
  330. case TPS65911_REG_VDDCTRL:
  331. return TPS65911_VDDCTRL;
  332. case TPS65911_REG_LDO1:
  333. return TPS65911_LDO1;
  334. case TPS65911_REG_LDO2:
  335. return TPS65911_LDO2;
  336. case TPS65911_REG_LDO3:
  337. return TPS65911_LDO3;
  338. case TPS65911_REG_LDO4:
  339. return TPS65911_LDO4;
  340. case TPS65911_REG_LDO5:
  341. return TPS65911_LDO5;
  342. case TPS65911_REG_LDO6:
  343. return TPS65911_LDO6;
  344. case TPS65911_REG_LDO7:
  345. return TPS65911_LDO7;
  346. case TPS65911_REG_LDO8:
  347. return TPS65911_LDO8;
  348. default:
  349. return -EINVAL;
  350. }
  351. }
  352. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  353. {
  354. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  355. struct tps65910 *mfd = pmic->mfd;
  356. int reg, value, id = rdev_get_id(dev);
  357. reg = pmic->get_ctrl_reg(id);
  358. if (reg < 0)
  359. return reg;
  360. switch (mode) {
  361. case REGULATOR_MODE_NORMAL:
  362. return tps65910_reg_update_bits(pmic->mfd, reg,
  363. LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
  364. LDO_ST_ON_BIT);
  365. case REGULATOR_MODE_IDLE:
  366. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  367. return tps65910_reg_set_bits(mfd, reg, value);
  368. case REGULATOR_MODE_STANDBY:
  369. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  370. }
  371. return -EINVAL;
  372. }
  373. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  374. {
  375. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  376. int ret, reg, value, id = rdev_get_id(dev);
  377. reg = pmic->get_ctrl_reg(id);
  378. if (reg < 0)
  379. return reg;
  380. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  381. if (ret < 0)
  382. return ret;
  383. if (!(value & LDO_ST_ON_BIT))
  384. return REGULATOR_MODE_STANDBY;
  385. else if (value & LDO_ST_MODE_BIT)
  386. return REGULATOR_MODE_IDLE;
  387. else
  388. return REGULATOR_MODE_NORMAL;
  389. }
  390. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  391. {
  392. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  393. int ret, id = rdev_get_id(dev);
  394. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  395. switch (id) {
  396. case TPS65910_REG_VDD1:
  397. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
  398. if (ret < 0)
  399. return ret;
  400. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
  401. if (ret < 0)
  402. return ret;
  403. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  404. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
  405. if (ret < 0)
  406. return ret;
  407. sr = opvsel & VDD1_OP_CMD_MASK;
  408. opvsel &= VDD1_OP_SEL_MASK;
  409. srvsel &= VDD1_SR_SEL_MASK;
  410. vselmax = 75;
  411. break;
  412. case TPS65910_REG_VDD2:
  413. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
  414. if (ret < 0)
  415. return ret;
  416. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
  417. if (ret < 0)
  418. return ret;
  419. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  420. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
  421. if (ret < 0)
  422. return ret;
  423. sr = opvsel & VDD2_OP_CMD_MASK;
  424. opvsel &= VDD2_OP_SEL_MASK;
  425. srvsel &= VDD2_SR_SEL_MASK;
  426. vselmax = 75;
  427. break;
  428. case TPS65911_REG_VDDCTRL:
  429. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
  430. &opvsel);
  431. if (ret < 0)
  432. return ret;
  433. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
  434. &srvsel);
  435. if (ret < 0)
  436. return ret;
  437. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  438. opvsel &= VDDCTRL_OP_SEL_MASK;
  439. srvsel &= VDDCTRL_SR_SEL_MASK;
  440. vselmax = 64;
  441. break;
  442. }
  443. /* multiplier 0 == 1 but 2,3 normal */
  444. if (!mult)
  445. mult=1;
  446. if (sr) {
  447. /* normalise to valid range */
  448. if (srvsel < 3)
  449. srvsel = 3;
  450. if (srvsel > vselmax)
  451. srvsel = vselmax;
  452. return srvsel - 3;
  453. } else {
  454. /* normalise to valid range*/
  455. if (opvsel < 3)
  456. opvsel = 3;
  457. if (opvsel > vselmax)
  458. opvsel = vselmax;
  459. return opvsel - 3;
  460. }
  461. return -EINVAL;
  462. }
  463. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  464. {
  465. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  466. int ret, reg, value, id = rdev_get_id(dev);
  467. reg = pmic->get_ctrl_reg(id);
  468. if (reg < 0)
  469. return reg;
  470. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  471. if (ret < 0)
  472. return ret;
  473. switch (id) {
  474. case TPS65910_REG_VIO:
  475. case TPS65910_REG_VDIG1:
  476. case TPS65910_REG_VDIG2:
  477. case TPS65910_REG_VPLL:
  478. case TPS65910_REG_VDAC:
  479. case TPS65910_REG_VAUX1:
  480. case TPS65910_REG_VAUX2:
  481. case TPS65910_REG_VAUX33:
  482. case TPS65910_REG_VMMC:
  483. value &= LDO_SEL_MASK;
  484. value >>= LDO_SEL_SHIFT;
  485. break;
  486. default:
  487. return -EINVAL;
  488. }
  489. return value;
  490. }
  491. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  492. {
  493. return dev->desc->volt_table[0];
  494. }
  495. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  496. {
  497. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  498. int ret, id = rdev_get_id(dev);
  499. unsigned int value, reg;
  500. reg = pmic->get_ctrl_reg(id);
  501. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  502. if (ret < 0)
  503. return ret;
  504. switch (id) {
  505. case TPS65911_REG_LDO1:
  506. case TPS65911_REG_LDO2:
  507. case TPS65911_REG_LDO4:
  508. value &= LDO1_SEL_MASK;
  509. value >>= LDO_SEL_SHIFT;
  510. break;
  511. case TPS65911_REG_LDO3:
  512. case TPS65911_REG_LDO5:
  513. case TPS65911_REG_LDO6:
  514. case TPS65911_REG_LDO7:
  515. case TPS65911_REG_LDO8:
  516. value &= LDO3_SEL_MASK;
  517. value >>= LDO_SEL_SHIFT;
  518. break;
  519. case TPS65910_REG_VIO:
  520. value &= LDO_SEL_MASK;
  521. value >>= LDO_SEL_SHIFT;
  522. break;
  523. default:
  524. return -EINVAL;
  525. }
  526. return value;
  527. }
  528. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  529. unsigned selector)
  530. {
  531. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  532. int id = rdev_get_id(dev), vsel;
  533. int dcdc_mult = 0;
  534. switch (id) {
  535. case TPS65910_REG_VDD1:
  536. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  537. if (dcdc_mult == 1)
  538. dcdc_mult--;
  539. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  540. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
  541. VDD1_VGAIN_SEL_MASK,
  542. dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
  543. tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
  544. break;
  545. case TPS65910_REG_VDD2:
  546. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  547. if (dcdc_mult == 1)
  548. dcdc_mult--;
  549. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  550. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
  551. VDD1_VGAIN_SEL_MASK,
  552. dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
  553. tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
  554. break;
  555. case TPS65911_REG_VDDCTRL:
  556. vsel = selector + 3;
  557. tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
  558. }
  559. return 0;
  560. }
  561. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  562. unsigned selector)
  563. {
  564. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  565. int reg, id = rdev_get_id(dev);
  566. reg = pmic->get_ctrl_reg(id);
  567. if (reg < 0)
  568. return reg;
  569. switch (id) {
  570. case TPS65910_REG_VIO:
  571. case TPS65910_REG_VDIG1:
  572. case TPS65910_REG_VDIG2:
  573. case TPS65910_REG_VPLL:
  574. case TPS65910_REG_VDAC:
  575. case TPS65910_REG_VAUX1:
  576. case TPS65910_REG_VAUX2:
  577. case TPS65910_REG_VAUX33:
  578. case TPS65910_REG_VMMC:
  579. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  580. selector << LDO_SEL_SHIFT);
  581. }
  582. return -EINVAL;
  583. }
  584. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  585. unsigned selector)
  586. {
  587. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  588. int reg, id = rdev_get_id(dev);
  589. reg = pmic->get_ctrl_reg(id);
  590. if (reg < 0)
  591. return reg;
  592. switch (id) {
  593. case TPS65911_REG_LDO1:
  594. case TPS65911_REG_LDO2:
  595. case TPS65911_REG_LDO4:
  596. return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
  597. selector << LDO_SEL_SHIFT);
  598. case TPS65911_REG_LDO3:
  599. case TPS65911_REG_LDO5:
  600. case TPS65911_REG_LDO6:
  601. case TPS65911_REG_LDO7:
  602. case TPS65911_REG_LDO8:
  603. return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
  604. selector << LDO_SEL_SHIFT);
  605. case TPS65910_REG_VIO:
  606. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  607. selector << LDO_SEL_SHIFT);
  608. }
  609. return -EINVAL;
  610. }
  611. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  612. unsigned selector)
  613. {
  614. int volt, mult = 1, id = rdev_get_id(dev);
  615. switch (id) {
  616. case TPS65910_REG_VDD1:
  617. case TPS65910_REG_VDD2:
  618. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  619. volt = VDD1_2_MIN_VOLT +
  620. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  621. break;
  622. case TPS65911_REG_VDDCTRL:
  623. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  624. break;
  625. default:
  626. BUG();
  627. return -EINVAL;
  628. }
  629. return volt * 100 * mult;
  630. }
  631. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  632. {
  633. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  634. int step_mv = 0, id = rdev_get_id(dev);
  635. switch(id) {
  636. case TPS65911_REG_LDO1:
  637. case TPS65911_REG_LDO2:
  638. case TPS65911_REG_LDO4:
  639. /* The first 5 values of the selector correspond to 1V */
  640. if (selector < 5)
  641. selector = 0;
  642. else
  643. selector -= 4;
  644. step_mv = 50;
  645. break;
  646. case TPS65911_REG_LDO3:
  647. case TPS65911_REG_LDO5:
  648. case TPS65911_REG_LDO6:
  649. case TPS65911_REG_LDO7:
  650. case TPS65911_REG_LDO8:
  651. /* The first 3 values of the selector correspond to 1V */
  652. if (selector < 3)
  653. selector = 0;
  654. else
  655. selector -= 2;
  656. step_mv = 100;
  657. break;
  658. case TPS65910_REG_VIO:
  659. return pmic->info[id]->voltage_table[selector];
  660. default:
  661. return -EINVAL;
  662. }
  663. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  664. }
  665. /* Regulator ops (except VRTC) */
  666. static struct regulator_ops tps65910_ops_dcdc = {
  667. .is_enabled = regulator_is_enabled_regmap,
  668. .enable = regulator_enable_regmap,
  669. .disable = regulator_disable_regmap,
  670. .set_mode = tps65910_set_mode,
  671. .get_mode = tps65910_get_mode,
  672. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  673. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  674. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  675. .list_voltage = tps65910_list_voltage_dcdc,
  676. };
  677. static struct regulator_ops tps65910_ops_vdd3 = {
  678. .is_enabled = regulator_is_enabled_regmap,
  679. .enable = regulator_enable_regmap,
  680. .disable = regulator_disable_regmap,
  681. .set_mode = tps65910_set_mode,
  682. .get_mode = tps65910_get_mode,
  683. .get_voltage = tps65910_get_voltage_vdd3,
  684. .list_voltage = regulator_list_voltage_table,
  685. };
  686. static struct regulator_ops tps65910_ops = {
  687. .is_enabled = regulator_is_enabled_regmap,
  688. .enable = regulator_enable_regmap,
  689. .disable = regulator_disable_regmap,
  690. .set_mode = tps65910_set_mode,
  691. .get_mode = tps65910_get_mode,
  692. .get_voltage_sel = tps65910_get_voltage_sel,
  693. .set_voltage_sel = tps65910_set_voltage_sel,
  694. .list_voltage = regulator_list_voltage_table,
  695. };
  696. static struct regulator_ops tps65911_ops = {
  697. .is_enabled = regulator_is_enabled_regmap,
  698. .enable = regulator_enable_regmap,
  699. .disable = regulator_disable_regmap,
  700. .set_mode = tps65910_set_mode,
  701. .get_mode = tps65910_get_mode,
  702. .get_voltage_sel = tps65911_get_voltage_sel,
  703. .set_voltage_sel = tps65911_set_voltage_sel,
  704. .list_voltage = tps65911_list_voltage,
  705. };
  706. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  707. int id, int ext_sleep_config)
  708. {
  709. struct tps65910 *mfd = pmic->mfd;
  710. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  711. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  712. int ret;
  713. /*
  714. * Regulator can not be control from multiple external input EN1, EN2
  715. * and EN3 together.
  716. */
  717. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  718. int en_count;
  719. en_count = ((ext_sleep_config &
  720. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  721. en_count += ((ext_sleep_config &
  722. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  723. en_count += ((ext_sleep_config &
  724. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  725. en_count += ((ext_sleep_config &
  726. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  727. if (en_count > 1) {
  728. dev_err(mfd->dev,
  729. "External sleep control flag is not proper\n");
  730. return -EINVAL;
  731. }
  732. }
  733. pmic->board_ext_control[id] = ext_sleep_config;
  734. /* External EN1 control */
  735. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  736. ret = tps65910_reg_set_bits(mfd,
  737. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  738. else
  739. ret = tps65910_reg_clear_bits(mfd,
  740. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  741. if (ret < 0) {
  742. dev_err(mfd->dev,
  743. "Error in configuring external control EN1\n");
  744. return ret;
  745. }
  746. /* External EN2 control */
  747. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  748. ret = tps65910_reg_set_bits(mfd,
  749. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  750. else
  751. ret = tps65910_reg_clear_bits(mfd,
  752. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  753. if (ret < 0) {
  754. dev_err(mfd->dev,
  755. "Error in configuring external control EN2\n");
  756. return ret;
  757. }
  758. /* External EN3 control for TPS65910 LDO only */
  759. if ((tps65910_chip_id(mfd) == TPS65910) &&
  760. (id >= TPS65910_REG_VDIG1)) {
  761. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  762. ret = tps65910_reg_set_bits(mfd,
  763. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  764. else
  765. ret = tps65910_reg_clear_bits(mfd,
  766. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  767. if (ret < 0) {
  768. dev_err(mfd->dev,
  769. "Error in configuring external control EN3\n");
  770. return ret;
  771. }
  772. }
  773. /* Return if no external control is selected */
  774. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  775. /* Clear all sleep controls */
  776. ret = tps65910_reg_clear_bits(mfd,
  777. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  778. if (!ret)
  779. ret = tps65910_reg_clear_bits(mfd,
  780. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  781. if (ret < 0)
  782. dev_err(mfd->dev,
  783. "Error in configuring SLEEP register\n");
  784. return ret;
  785. }
  786. /*
  787. * For regulator that has separate operational and sleep register make
  788. * sure that operational is used and clear sleep register to turn
  789. * regulator off when external control is inactive
  790. */
  791. if ((id == TPS65910_REG_VDD1) ||
  792. (id == TPS65910_REG_VDD2) ||
  793. ((id == TPS65911_REG_VDDCTRL) &&
  794. (tps65910_chip_id(mfd) == TPS65911))) {
  795. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  796. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  797. int opvsel, srvsel;
  798. ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
  799. if (ret < 0)
  800. return ret;
  801. ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
  802. if (ret < 0)
  803. return ret;
  804. if (opvsel & VDD1_OP_CMD_MASK) {
  805. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  806. ret = tps65910_reg_write(pmic->mfd, op_reg_add,
  807. reg_val);
  808. if (ret < 0) {
  809. dev_err(mfd->dev,
  810. "Error in configuring op register\n");
  811. return ret;
  812. }
  813. }
  814. ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
  815. if (ret < 0) {
  816. dev_err(mfd->dev, "Error in settting sr register\n");
  817. return ret;
  818. }
  819. }
  820. ret = tps65910_reg_clear_bits(mfd,
  821. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  822. if (!ret) {
  823. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  824. ret = tps65910_reg_set_bits(mfd,
  825. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  826. else
  827. ret = tps65910_reg_clear_bits(mfd,
  828. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  829. }
  830. if (ret < 0)
  831. dev_err(mfd->dev,
  832. "Error in configuring SLEEP register\n");
  833. return ret;
  834. }
  835. #ifdef CONFIG_OF
  836. static struct of_regulator_match tps65910_matches[] = {
  837. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  838. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  839. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  840. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  841. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  842. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  843. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  844. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  845. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  846. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  847. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  848. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  849. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  850. };
  851. static struct of_regulator_match tps65911_matches[] = {
  852. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  853. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  854. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  855. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  856. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  857. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  858. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  859. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  860. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  861. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  862. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  863. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  864. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  865. };
  866. static struct tps65910_board *tps65910_parse_dt_reg_data(
  867. struct platform_device *pdev,
  868. struct of_regulator_match **tps65910_reg_matches)
  869. {
  870. struct tps65910_board *pmic_plat_data;
  871. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  872. struct device_node *np = pdev->dev.parent->of_node;
  873. struct device_node *regulators;
  874. struct of_regulator_match *matches;
  875. unsigned int prop;
  876. int idx = 0, ret, count;
  877. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  878. GFP_KERNEL);
  879. if (!pmic_plat_data) {
  880. dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
  881. return NULL;
  882. }
  883. regulators = of_find_node_by_name(np, "regulators");
  884. if (!regulators) {
  885. dev_err(&pdev->dev, "regulator node not found\n");
  886. return NULL;
  887. }
  888. switch (tps65910_chip_id(tps65910)) {
  889. case TPS65910:
  890. count = ARRAY_SIZE(tps65910_matches);
  891. matches = tps65910_matches;
  892. break;
  893. case TPS65911:
  894. count = ARRAY_SIZE(tps65911_matches);
  895. matches = tps65911_matches;
  896. break;
  897. default:
  898. dev_err(&pdev->dev, "Invalid tps chip version\n");
  899. return NULL;
  900. }
  901. ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
  902. if (ret < 0) {
  903. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  904. ret);
  905. return NULL;
  906. }
  907. *tps65910_reg_matches = matches;
  908. for (idx = 0; idx < count; idx++) {
  909. if (!matches[idx].init_data || !matches[idx].of_node)
  910. continue;
  911. pmic_plat_data->tps65910_pmic_init_data[idx] =
  912. matches[idx].init_data;
  913. ret = of_property_read_u32(matches[idx].of_node,
  914. "ti,regulator-ext-sleep-control", &prop);
  915. if (!ret)
  916. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  917. }
  918. return pmic_plat_data;
  919. }
  920. #else
  921. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  922. struct platform_device *pdev,
  923. struct of_regulator_match **tps65910_reg_matches)
  924. {
  925. *tps65910_reg_matches = NULL;
  926. return NULL;
  927. }
  928. #endif
  929. static __devinit int tps65910_probe(struct platform_device *pdev)
  930. {
  931. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  932. struct regulator_config config = { };
  933. struct tps_info *info;
  934. struct regulator_init_data *reg_data;
  935. struct regulator_dev *rdev;
  936. struct tps65910_reg *pmic;
  937. struct tps65910_board *pmic_plat_data;
  938. struct of_regulator_match *tps65910_reg_matches = NULL;
  939. int i, err;
  940. pmic_plat_data = dev_get_platdata(tps65910->dev);
  941. if (!pmic_plat_data && tps65910->dev->of_node)
  942. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  943. &tps65910_reg_matches);
  944. if (!pmic_plat_data) {
  945. dev_err(&pdev->dev, "Platform data not found\n");
  946. return -EINVAL;
  947. }
  948. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  949. if (!pmic) {
  950. dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
  951. return -ENOMEM;
  952. }
  953. pmic->mfd = tps65910;
  954. platform_set_drvdata(pdev, pmic);
  955. /* Give control of all register to control port */
  956. tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  957. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  958. switch(tps65910_chip_id(tps65910)) {
  959. case TPS65910:
  960. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  961. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  962. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  963. info = tps65910_regs;
  964. break;
  965. case TPS65911:
  966. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  967. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  968. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  969. info = tps65911_regs;
  970. break;
  971. default:
  972. dev_err(&pdev->dev, "Invalid tps chip version\n");
  973. return -ENODEV;
  974. }
  975. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  976. sizeof(struct regulator_desc), GFP_KERNEL);
  977. if (!pmic->desc) {
  978. dev_err(&pdev->dev, "Memory alloc fails for desc\n");
  979. return -ENOMEM;
  980. }
  981. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  982. sizeof(struct tps_info *), GFP_KERNEL);
  983. if (!pmic->info) {
  984. dev_err(&pdev->dev, "Memory alloc fails for info\n");
  985. return -ENOMEM;
  986. }
  987. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  988. sizeof(struct regulator_dev *), GFP_KERNEL);
  989. if (!pmic->rdev) {
  990. dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
  991. return -ENOMEM;
  992. }
  993. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  994. i++, info++) {
  995. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  996. /* Regulator API handles empty constraints but not NULL
  997. * constraints */
  998. if (!reg_data)
  999. continue;
  1000. /* Register the regulators */
  1001. pmic->info[i] = info;
  1002. pmic->desc[i].name = info->name;
  1003. pmic->desc[i].supply_name = info->vin_name;
  1004. pmic->desc[i].id = i;
  1005. pmic->desc[i].n_voltages = info->n_voltages;
  1006. pmic->desc[i].enable_time = info->enable_time_us;
  1007. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1008. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1009. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1010. VDD1_2_NUM_VOLT_COARSE;
  1011. pmic->desc[i].ramp_delay = 12500;
  1012. } else if (i == TPS65910_REG_VDD3) {
  1013. if (tps65910_chip_id(tps65910) == TPS65910) {
  1014. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1015. pmic->desc[i].volt_table = info->voltage_table;
  1016. } else {
  1017. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1018. pmic->desc[i].ramp_delay = 5000;
  1019. }
  1020. } else {
  1021. if (tps65910_chip_id(tps65910) == TPS65910) {
  1022. pmic->desc[i].ops = &tps65910_ops;
  1023. pmic->desc[i].volt_table = info->voltage_table;
  1024. } else {
  1025. pmic->desc[i].ops = &tps65911_ops;
  1026. }
  1027. }
  1028. err = tps65910_set_ext_sleep_config(pmic, i,
  1029. pmic_plat_data->regulator_ext_sleep_control[i]);
  1030. /*
  1031. * Failing on regulator for configuring externally control
  1032. * is not a serious issue, just throw warning.
  1033. */
  1034. if (err < 0)
  1035. dev_warn(tps65910->dev,
  1036. "Failed to initialise ext control config\n");
  1037. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1038. pmic->desc[i].owner = THIS_MODULE;
  1039. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1040. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1041. config.dev = tps65910->dev;
  1042. config.init_data = reg_data;
  1043. config.driver_data = pmic;
  1044. config.regmap = tps65910->regmap;
  1045. if (tps65910_reg_matches)
  1046. config.of_node = tps65910_reg_matches[i].of_node;
  1047. rdev = regulator_register(&pmic->desc[i], &config);
  1048. if (IS_ERR(rdev)) {
  1049. dev_err(tps65910->dev,
  1050. "failed to register %s regulator\n",
  1051. pdev->name);
  1052. err = PTR_ERR(rdev);
  1053. goto err_unregister_regulator;
  1054. }
  1055. /* Save regulator for cleanup */
  1056. pmic->rdev[i] = rdev;
  1057. }
  1058. return 0;
  1059. err_unregister_regulator:
  1060. while (--i >= 0)
  1061. regulator_unregister(pmic->rdev[i]);
  1062. return err;
  1063. }
  1064. static int __devexit tps65910_remove(struct platform_device *pdev)
  1065. {
  1066. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1067. int i;
  1068. for (i = 0; i < pmic->num_regulators; i++)
  1069. regulator_unregister(pmic->rdev[i]);
  1070. return 0;
  1071. }
  1072. static void tps65910_shutdown(struct platform_device *pdev)
  1073. {
  1074. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1075. int i;
  1076. /*
  1077. * Before bootloader jumps to kernel, it makes sure that required
  1078. * external control signals are in desired state so that given rails
  1079. * can be configure accordingly.
  1080. * If rails are configured to be controlled from external control
  1081. * then before shutting down/rebooting the system, the external
  1082. * control configuration need to be remove from the rails so that
  1083. * its output will be available as per register programming even
  1084. * if external controls are removed. This is require when the POR
  1085. * value of the control signals are not in active state and before
  1086. * bootloader initializes it, the system requires the rail output
  1087. * to be active for booting.
  1088. */
  1089. for (i = 0; i < pmic->num_regulators; i++) {
  1090. int err;
  1091. if (!pmic->rdev[i])
  1092. continue;
  1093. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1094. if (err < 0)
  1095. dev_err(&pdev->dev,
  1096. "Error in clearing external control\n");
  1097. }
  1098. }
  1099. static struct platform_driver tps65910_driver = {
  1100. .driver = {
  1101. .name = "tps65910-pmic",
  1102. .owner = THIS_MODULE,
  1103. },
  1104. .probe = tps65910_probe,
  1105. .remove = __devexit_p(tps65910_remove),
  1106. .shutdown = tps65910_shutdown,
  1107. };
  1108. static int __init tps65910_init(void)
  1109. {
  1110. return platform_driver_register(&tps65910_driver);
  1111. }
  1112. subsys_initcall(tps65910_init);
  1113. static void __exit tps65910_cleanup(void)
  1114. {
  1115. platform_driver_unregister(&tps65910_driver);
  1116. }
  1117. module_exit(tps65910_cleanup);
  1118. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1119. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1120. MODULE_LICENSE("GPL v2");
  1121. MODULE_ALIAS("platform:tps65910-pmic");