smartreflex.c 30 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2012 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #define SMARTREFLEX_NAME_LEN 16
  29. #define NVALUE_NAME_LEN 40
  30. #define SR_DISABLE_TIMEOUT 200
  31. /* sr_list contains all the instances of smartreflex module */
  32. static LIST_HEAD(sr_list);
  33. static struct omap_sr_class_data *sr_class;
  34. static struct omap_sr_pmic_data *sr_pmic_data;
  35. static struct dentry *sr_dbg_dir;
  36. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  37. {
  38. __raw_writel(value, (sr->base + offset));
  39. }
  40. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  41. u32 value)
  42. {
  43. u32 reg_val;
  44. /*
  45. * Smartreflex error config register is special as it contains
  46. * certain status bits which if written a 1 into means a clear
  47. * of those bits. So in order to make sure no accidental write of
  48. * 1 happens to those status bits, do a clear of them in the read
  49. * value. This mean this API doesn't rewrite values in these bits
  50. * if they are currently set, but does allow the caller to write
  51. * those bits.
  52. */
  53. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  54. mask |= ERRCONFIG_STATUS_V1_MASK;
  55. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  56. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  57. reg_val = __raw_readl(sr->base + offset);
  58. reg_val &= ~mask;
  59. value &= mask;
  60. reg_val |= value;
  61. __raw_writel(reg_val, (sr->base + offset));
  62. }
  63. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  64. {
  65. return __raw_readl(sr->base + offset);
  66. }
  67. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  68. {
  69. struct omap_sr *sr_info;
  70. if (!voltdm) {
  71. pr_err("%s: Null voltage domain passed!\n", __func__);
  72. return ERR_PTR(-EINVAL);
  73. }
  74. list_for_each_entry(sr_info, &sr_list, node) {
  75. if (voltdm == sr_info->voltdm)
  76. return sr_info;
  77. }
  78. return ERR_PTR(-ENODATA);
  79. }
  80. static irqreturn_t sr_interrupt(int irq, void *data)
  81. {
  82. struct omap_sr *sr_info = data;
  83. u32 status = 0;
  84. switch (sr_info->ip_type) {
  85. case SR_TYPE_V1:
  86. /* Read the status bits */
  87. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  88. /* Clear them by writing back */
  89. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  90. break;
  91. case SR_TYPE_V2:
  92. /* Read the status bits */
  93. status = sr_read_reg(sr_info, IRQSTATUS);
  94. /* Clear them by writing back */
  95. sr_write_reg(sr_info, IRQSTATUS, status);
  96. break;
  97. default:
  98. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  99. sr_info->ip_type);
  100. return IRQ_NONE;
  101. }
  102. if (sr_class->notify)
  103. sr_class->notify(sr_info, status);
  104. return IRQ_HANDLED;
  105. }
  106. static void sr_set_clk_length(struct omap_sr *sr)
  107. {
  108. struct clk *sys_ck;
  109. u32 sys_clk_speed;
  110. if (cpu_is_omap34xx())
  111. sys_ck = clk_get(NULL, "sys_ck");
  112. else
  113. sys_ck = clk_get(NULL, "sys_clkin_ck");
  114. if (IS_ERR(sys_ck)) {
  115. dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
  116. __func__);
  117. return;
  118. }
  119. sys_clk_speed = clk_get_rate(sys_ck);
  120. clk_put(sys_ck);
  121. switch (sys_clk_speed) {
  122. case 12000000:
  123. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  124. break;
  125. case 13000000:
  126. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  127. break;
  128. case 19200000:
  129. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  130. break;
  131. case 26000000:
  132. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  133. break;
  134. case 38400000:
  135. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  136. break;
  137. default:
  138. dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
  139. __func__, sys_clk_speed);
  140. break;
  141. }
  142. }
  143. static void sr_set_regfields(struct omap_sr *sr)
  144. {
  145. /*
  146. * For time being these values are defined in smartreflex.h
  147. * and populated during init. May be they can be moved to board
  148. * file or pmic specific data structure. In that case these structure
  149. * fields will have to be populated using the pdata or pmic structure.
  150. */
  151. if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  152. sr->err_weight = OMAP3430_SR_ERRWEIGHT;
  153. sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
  154. sr->accum_data = OMAP3430_SR_ACCUMDATA;
  155. if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) {
  156. sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
  157. sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
  158. } else {
  159. sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
  160. sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
  161. }
  162. }
  163. }
  164. static void sr_start_vddautocomp(struct omap_sr *sr)
  165. {
  166. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  167. dev_warn(&sr->pdev->dev,
  168. "%s: smartreflex class driver not registered\n",
  169. __func__);
  170. return;
  171. }
  172. if (!sr_class->enable(sr))
  173. sr->autocomp_active = true;
  174. }
  175. static void sr_stop_vddautocomp(struct omap_sr *sr)
  176. {
  177. if (!sr_class || !(sr_class->disable)) {
  178. dev_warn(&sr->pdev->dev,
  179. "%s: smartreflex class driver not registered\n",
  180. __func__);
  181. return;
  182. }
  183. if (sr->autocomp_active) {
  184. sr_class->disable(sr, 1);
  185. sr->autocomp_active = false;
  186. }
  187. }
  188. /*
  189. * This function handles the intializations which have to be done
  190. * only when both sr device and class driver regiter has
  191. * completed. This will be attempted to be called from both sr class
  192. * driver register and sr device intializtion API's. Only one call
  193. * will ultimately succeed.
  194. *
  195. * Currently this function registers interrupt handler for a particular SR
  196. * if smartreflex class driver is already registered and has
  197. * requested for interrupts and the SR interrupt line in present.
  198. */
  199. static int sr_late_init(struct omap_sr *sr_info)
  200. {
  201. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  202. struct resource *mem;
  203. int ret = 0;
  204. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  205. ret = request_irq(sr_info->irq, sr_interrupt,
  206. 0, sr_info->name, sr_info);
  207. if (ret)
  208. goto error;
  209. disable_irq(sr_info->irq);
  210. }
  211. if (pdata && pdata->enable_on_init)
  212. sr_start_vddautocomp(sr_info);
  213. return ret;
  214. error:
  215. iounmap(sr_info->base);
  216. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  217. release_mem_region(mem->start, resource_size(mem));
  218. list_del(&sr_info->node);
  219. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  220. "interrupt handler. Smartreflex will"
  221. "not function as desired\n", __func__);
  222. kfree(sr_info);
  223. return ret;
  224. }
  225. static void sr_v1_disable(struct omap_sr *sr)
  226. {
  227. int timeout = 0;
  228. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  229. ERRCONFIG_MCUBOUNDINTST;
  230. /* Enable MCUDisableAcknowledge interrupt */
  231. sr_modify_reg(sr, ERRCONFIG_V1,
  232. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  233. /* SRCONFIG - disable SR */
  234. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  235. /* Disable all other SR interrupts and clear the status as needed */
  236. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  237. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  238. sr_modify_reg(sr, ERRCONFIG_V1,
  239. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  240. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  241. errconf_val);
  242. /*
  243. * Wait for SR to be disabled.
  244. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  245. */
  246. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  247. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  248. timeout);
  249. if (timeout >= SR_DISABLE_TIMEOUT)
  250. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  251. __func__);
  252. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  253. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  254. ERRCONFIG_MCUDISACKINTST);
  255. }
  256. static void sr_v2_disable(struct omap_sr *sr)
  257. {
  258. int timeout = 0;
  259. /* Enable MCUDisableAcknowledge interrupt */
  260. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  261. /* SRCONFIG - disable SR */
  262. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  263. /*
  264. * Disable all other SR interrupts and clear the status
  265. * write to status register ONLY on need basis - only if status
  266. * is set.
  267. */
  268. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  269. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  270. ERRCONFIG_VPBOUNDINTST_V2);
  271. else
  272. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  273. 0x0);
  274. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  275. IRQENABLE_MCUVALIDINT |
  276. IRQENABLE_MCUBOUNDSINT));
  277. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  278. IRQSTATUS_MCVALIDINT |
  279. IRQSTATUS_MCBOUNDSINT));
  280. /*
  281. * Wait for SR to be disabled.
  282. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  283. */
  284. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  285. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  286. timeout);
  287. if (timeout >= SR_DISABLE_TIMEOUT)
  288. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  289. __func__);
  290. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  291. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  292. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  293. }
  294. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  295. struct omap_sr *sr, u32 efuse_offs)
  296. {
  297. int i;
  298. if (!sr->nvalue_table) {
  299. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  300. __func__);
  301. return NULL;
  302. }
  303. for (i = 0; i < sr->nvalue_count; i++) {
  304. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  305. return &sr->nvalue_table[i];
  306. }
  307. return NULL;
  308. }
  309. /* Public Functions */
  310. /**
  311. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  312. * error generator module.
  313. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  314. *
  315. * This API is to be called from the smartreflex class driver to
  316. * configure the error generator module inside the smartreflex module.
  317. * SR settings if using the ERROR module inside Smartreflex.
  318. * SR CLASS 3 by default uses only the ERROR module where as
  319. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  320. * module. Returns 0 on success and error value in case of failure.
  321. */
  322. int sr_configure_errgen(struct voltagedomain *voltdm)
  323. {
  324. u32 sr_config, sr_errconfig, errconfig_offs;
  325. u32 vpboundint_en, vpboundint_st;
  326. u32 senp_en = 0, senn_en = 0;
  327. u8 senp_shift, senn_shift;
  328. struct omap_sr *sr = _sr_lookup(voltdm);
  329. if (IS_ERR(sr)) {
  330. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  331. return PTR_ERR(sr);
  332. }
  333. if (!sr->clk_length)
  334. sr_set_clk_length(sr);
  335. senp_en = sr->senp_mod;
  336. senn_en = sr->senn_mod;
  337. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  338. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  339. switch (sr->ip_type) {
  340. case SR_TYPE_V1:
  341. sr_config |= SRCONFIG_DELAYCTRL;
  342. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  343. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  344. errconfig_offs = ERRCONFIG_V1;
  345. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  346. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  347. break;
  348. case SR_TYPE_V2:
  349. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  350. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  351. errconfig_offs = ERRCONFIG_V2;
  352. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  353. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  354. break;
  355. default:
  356. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  357. "module without specifying the ip\n", __func__);
  358. return -EINVAL;
  359. }
  360. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  361. sr_write_reg(sr, SRCONFIG, sr_config);
  362. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  363. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  364. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  365. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  366. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  367. sr_errconfig);
  368. /* Enabling the interrupts if the ERROR module is used */
  369. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  370. vpboundint_en);
  371. return 0;
  372. }
  373. /**
  374. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  375. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  376. *
  377. * This API is to be called from the smartreflex class driver to
  378. * disable the error generator module inside the smartreflex module.
  379. *
  380. * Returns 0 on success and error value in case of failure.
  381. */
  382. int sr_disable_errgen(struct voltagedomain *voltdm)
  383. {
  384. u32 errconfig_offs;
  385. u32 vpboundint_en, vpboundint_st;
  386. struct omap_sr *sr = _sr_lookup(voltdm);
  387. if (IS_ERR(sr)) {
  388. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  389. return PTR_ERR(sr);
  390. }
  391. switch (sr->ip_type) {
  392. case SR_TYPE_V1:
  393. errconfig_offs = ERRCONFIG_V1;
  394. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  395. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  396. break;
  397. case SR_TYPE_V2:
  398. errconfig_offs = ERRCONFIG_V2;
  399. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  400. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  401. break;
  402. default:
  403. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  404. "module without specifying the ip\n", __func__);
  405. return -EINVAL;
  406. }
  407. /* Disable the interrupts of ERROR module */
  408. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  409. /* Disable the Sensor and errorgen */
  410. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  411. return 0;
  412. }
  413. /**
  414. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  415. * minmaxavg module.
  416. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  417. *
  418. * This API is to be called from the smartreflex class driver to
  419. * configure the minmaxavg module inside the smartreflex module.
  420. * SR settings if using the ERROR module inside Smartreflex.
  421. * SR CLASS 3 by default uses only the ERROR module where as
  422. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  423. * module. Returns 0 on success and error value in case of failure.
  424. */
  425. int sr_configure_minmax(struct voltagedomain *voltdm)
  426. {
  427. u32 sr_config, sr_avgwt;
  428. u32 senp_en = 0, senn_en = 0;
  429. u8 senp_shift, senn_shift;
  430. struct omap_sr *sr = _sr_lookup(voltdm);
  431. if (IS_ERR(sr)) {
  432. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  433. return PTR_ERR(sr);
  434. }
  435. if (!sr->clk_length)
  436. sr_set_clk_length(sr);
  437. senp_en = sr->senp_mod;
  438. senn_en = sr->senn_mod;
  439. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  440. SRCONFIG_SENENABLE |
  441. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  442. switch (sr->ip_type) {
  443. case SR_TYPE_V1:
  444. sr_config |= SRCONFIG_DELAYCTRL;
  445. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  446. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  447. break;
  448. case SR_TYPE_V2:
  449. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  450. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  451. break;
  452. default:
  453. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  454. "module without specifying the ip\n", __func__);
  455. return -EINVAL;
  456. }
  457. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  458. sr_write_reg(sr, SRCONFIG, sr_config);
  459. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  460. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  461. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  462. /*
  463. * Enabling the interrupts if MINMAXAVG module is used.
  464. * TODO: check if all the interrupts are mandatory
  465. */
  466. switch (sr->ip_type) {
  467. case SR_TYPE_V1:
  468. sr_modify_reg(sr, ERRCONFIG_V1,
  469. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  470. ERRCONFIG_MCUBOUNDINTEN),
  471. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  472. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  473. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  474. break;
  475. case SR_TYPE_V2:
  476. sr_write_reg(sr, IRQSTATUS,
  477. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  478. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  479. sr_write_reg(sr, IRQENABLE_SET,
  480. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  481. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  482. break;
  483. default:
  484. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  485. "module without specifying the ip\n", __func__);
  486. return -EINVAL;
  487. }
  488. return 0;
  489. }
  490. /**
  491. * sr_enable() - Enables the smartreflex module.
  492. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  493. * @volt: The voltage at which the Voltage domain associated with
  494. * the smartreflex module is operating at.
  495. * This is required only to program the correct Ntarget value.
  496. *
  497. * This API is to be called from the smartreflex class driver to
  498. * enable a smartreflex module. Returns 0 on success. Returns error
  499. * value if the voltage passed is wrong or if ntarget value is wrong.
  500. */
  501. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  502. {
  503. struct omap_volt_data *volt_data;
  504. struct omap_sr *sr = _sr_lookup(voltdm);
  505. struct omap_sr_nvalue_table *nvalue_row;
  506. int ret;
  507. if (IS_ERR(sr)) {
  508. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  509. return PTR_ERR(sr);
  510. }
  511. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  512. if (IS_ERR(volt_data)) {
  513. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  514. "for nominal voltage %ld\n", __func__, volt);
  515. return PTR_ERR(volt_data);
  516. }
  517. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  518. if (!nvalue_row) {
  519. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  520. __func__, volt);
  521. return -ENODATA;
  522. }
  523. /* errminlimit is opp dependent and hence linked to voltage */
  524. sr->err_minlimit = nvalue_row->errminlimit;
  525. pm_runtime_get_sync(&sr->pdev->dev);
  526. /* Check if SR is already enabled. If yes do nothing */
  527. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  528. return 0;
  529. /* Configure SR */
  530. ret = sr_class->configure(sr);
  531. if (ret)
  532. return ret;
  533. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  534. /* SRCONFIG - enable SR */
  535. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  536. return 0;
  537. }
  538. /**
  539. * sr_disable() - Disables the smartreflex module.
  540. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  541. *
  542. * This API is to be called from the smartreflex class driver to
  543. * disable a smartreflex module.
  544. */
  545. void sr_disable(struct voltagedomain *voltdm)
  546. {
  547. struct omap_sr *sr = _sr_lookup(voltdm);
  548. if (IS_ERR(sr)) {
  549. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  550. return;
  551. }
  552. /* Check if SR clocks are already disabled. If yes do nothing */
  553. if (pm_runtime_suspended(&sr->pdev->dev))
  554. return;
  555. /*
  556. * Disable SR if only it is indeed enabled. Else just
  557. * disable the clocks.
  558. */
  559. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  560. switch (sr->ip_type) {
  561. case SR_TYPE_V1:
  562. sr_v1_disable(sr);
  563. break;
  564. case SR_TYPE_V2:
  565. sr_v2_disable(sr);
  566. break;
  567. default:
  568. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  569. sr->ip_type);
  570. }
  571. }
  572. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  573. }
  574. /**
  575. * sr_register_class() - API to register a smartreflex class parameters.
  576. * @class_data: The structure containing various sr class specific data.
  577. *
  578. * This API is to be called by the smartreflex class driver to register itself
  579. * with the smartreflex driver during init. Returns 0 on success else the
  580. * error value.
  581. */
  582. int sr_register_class(struct omap_sr_class_data *class_data)
  583. {
  584. struct omap_sr *sr_info;
  585. if (!class_data) {
  586. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  587. __func__);
  588. return -EINVAL;
  589. }
  590. if (sr_class) {
  591. pr_warning("%s: Smartreflex class driver already registered\n",
  592. __func__);
  593. return -EBUSY;
  594. }
  595. sr_class = class_data;
  596. /*
  597. * Call into late init to do intializations that require
  598. * both sr driver and sr class driver to be initiallized.
  599. */
  600. list_for_each_entry(sr_info, &sr_list, node)
  601. sr_late_init(sr_info);
  602. return 0;
  603. }
  604. /**
  605. * omap_sr_enable() - API to enable SR clocks and to call into the
  606. * registered smartreflex class enable API.
  607. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  608. *
  609. * This API is to be called from the kernel in order to enable
  610. * a particular smartreflex module. This API will do the initial
  611. * configurations to turn on the smartreflex module and in turn call
  612. * into the registered smartreflex class enable API.
  613. */
  614. void omap_sr_enable(struct voltagedomain *voltdm)
  615. {
  616. struct omap_sr *sr = _sr_lookup(voltdm);
  617. if (IS_ERR(sr)) {
  618. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  619. return;
  620. }
  621. if (!sr->autocomp_active)
  622. return;
  623. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  624. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  625. "registered\n", __func__);
  626. return;
  627. }
  628. sr_class->enable(sr);
  629. }
  630. /**
  631. * omap_sr_disable() - API to disable SR without resetting the voltage
  632. * processor voltage
  633. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  634. *
  635. * This API is to be called from the kernel in order to disable
  636. * a particular smartreflex module. This API will in turn call
  637. * into the registered smartreflex class disable API. This API will tell
  638. * the smartreflex class disable not to reset the VP voltage after
  639. * disabling smartreflex.
  640. */
  641. void omap_sr_disable(struct voltagedomain *voltdm)
  642. {
  643. struct omap_sr *sr = _sr_lookup(voltdm);
  644. if (IS_ERR(sr)) {
  645. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  646. return;
  647. }
  648. if (!sr->autocomp_active)
  649. return;
  650. if (!sr_class || !(sr_class->disable)) {
  651. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  652. "registered\n", __func__);
  653. return;
  654. }
  655. sr_class->disable(sr, 0);
  656. }
  657. /**
  658. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  659. * voltage processor voltage
  660. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  661. *
  662. * This API is to be called from the kernel in order to disable
  663. * a particular smartreflex module. This API will in turn call
  664. * into the registered smartreflex class disable API. This API will tell
  665. * the smartreflex class disable to reset the VP voltage after
  666. * disabling smartreflex.
  667. */
  668. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  669. {
  670. struct omap_sr *sr = _sr_lookup(voltdm);
  671. if (IS_ERR(sr)) {
  672. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  673. return;
  674. }
  675. if (!sr->autocomp_active)
  676. return;
  677. if (!sr_class || !(sr_class->disable)) {
  678. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  679. "registered\n", __func__);
  680. return;
  681. }
  682. sr_class->disable(sr, 1);
  683. }
  684. /**
  685. * omap_sr_register_pmic() - API to register pmic specific info.
  686. * @pmic_data: The structure containing pmic specific data.
  687. *
  688. * This API is to be called from the PMIC specific code to register with
  689. * smartreflex driver pmic specific info. Currently the only info required
  690. * is the smartreflex init on the PMIC side.
  691. */
  692. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  693. {
  694. if (!pmic_data) {
  695. pr_warning("%s: Trying to register NULL PMIC data structure"
  696. "with smartreflex\n", __func__);
  697. return;
  698. }
  699. sr_pmic_data = pmic_data;
  700. }
  701. /* PM Debug FS entries to enable and disable smartreflex. */
  702. static int omap_sr_autocomp_show(void *data, u64 *val)
  703. {
  704. struct omap_sr *sr_info = data;
  705. if (!sr_info) {
  706. pr_warning("%s: omap_sr struct not found\n", __func__);
  707. return -EINVAL;
  708. }
  709. *val = sr_info->autocomp_active;
  710. return 0;
  711. }
  712. static int omap_sr_autocomp_store(void *data, u64 val)
  713. {
  714. struct omap_sr *sr_info = data;
  715. if (!sr_info) {
  716. pr_warning("%s: omap_sr struct not found\n", __func__);
  717. return -EINVAL;
  718. }
  719. /* Sanity check */
  720. if (val > 1) {
  721. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  722. return -EINVAL;
  723. }
  724. /* control enable/disable only if there is a delta in value */
  725. if (sr_info->autocomp_active != val) {
  726. if (!val)
  727. sr_stop_vddautocomp(sr_info);
  728. else
  729. sr_start_vddautocomp(sr_info);
  730. }
  731. return 0;
  732. }
  733. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  734. omap_sr_autocomp_store, "%llu\n");
  735. static int __init omap_sr_probe(struct platform_device *pdev)
  736. {
  737. struct omap_sr *sr_info;
  738. struct omap_sr_data *pdata = pdev->dev.platform_data;
  739. struct resource *mem, *irq;
  740. struct dentry *nvalue_dir;
  741. int i, ret = 0;
  742. sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  743. if (!sr_info) {
  744. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  745. __func__);
  746. return -ENOMEM;
  747. }
  748. platform_set_drvdata(pdev, sr_info);
  749. if (!pdata) {
  750. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  751. ret = -EINVAL;
  752. goto err_free_devinfo;
  753. }
  754. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  755. if (!mem) {
  756. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  757. ret = -ENODEV;
  758. goto err_free_devinfo;
  759. }
  760. mem = request_mem_region(mem->start, resource_size(mem),
  761. dev_name(&pdev->dev));
  762. if (!mem) {
  763. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  764. ret = -EBUSY;
  765. goto err_free_devinfo;
  766. }
  767. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  768. pm_runtime_enable(&pdev->dev);
  769. pm_runtime_irq_safe(&pdev->dev);
  770. sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
  771. if (!sr_info->name) {
  772. dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
  773. __func__);
  774. ret = -ENOMEM;
  775. goto err_release_region;
  776. }
  777. sr_info->pdev = pdev;
  778. sr_info->srid = pdev->id;
  779. sr_info->voltdm = pdata->voltdm;
  780. sr_info->nvalue_table = pdata->nvalue_table;
  781. sr_info->nvalue_count = pdata->nvalue_count;
  782. sr_info->senn_mod = pdata->senn_mod;
  783. sr_info->senp_mod = pdata->senp_mod;
  784. sr_info->autocomp_active = false;
  785. sr_info->ip_type = pdata->ip_type;
  786. sr_info->base = ioremap(mem->start, resource_size(mem));
  787. if (!sr_info->base) {
  788. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  789. ret = -ENOMEM;
  790. goto err_release_region;
  791. }
  792. if (irq)
  793. sr_info->irq = irq->start;
  794. sr_set_clk_length(sr_info);
  795. sr_set_regfields(sr_info);
  796. list_add(&sr_info->node, &sr_list);
  797. /*
  798. * Call into late init to do intializations that require
  799. * both sr driver and sr class driver to be initiallized.
  800. */
  801. if (sr_class) {
  802. ret = sr_late_init(sr_info);
  803. if (ret) {
  804. pr_warning("%s: Error in SR late init\n", __func__);
  805. goto err_iounmap;
  806. }
  807. }
  808. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  809. if (!sr_dbg_dir) {
  810. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  811. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  812. ret = PTR_ERR(sr_dbg_dir);
  813. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  814. __func__, ret);
  815. goto err_iounmap;
  816. }
  817. }
  818. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  819. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  820. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  821. __func__);
  822. ret = PTR_ERR(sr_info->dbg_dir);
  823. goto err_free_name;
  824. }
  825. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  826. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  827. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  828. &sr_info->err_weight);
  829. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  830. &sr_info->err_maxlimit);
  831. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  832. if (IS_ERR_OR_NULL(nvalue_dir)) {
  833. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  834. "for n-values\n", __func__);
  835. ret = PTR_ERR(nvalue_dir);
  836. goto err_debugfs;
  837. }
  838. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  839. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  840. __func__, sr_info->name);
  841. ret = -ENODATA;
  842. goto err_debugfs;
  843. }
  844. for (i = 0; i < sr_info->nvalue_count; i++) {
  845. char name[NVALUE_NAME_LEN + 1];
  846. snprintf(name, sizeof(name), "volt_%lu",
  847. sr_info->nvalue_table[i].volt_nominal);
  848. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  849. &(sr_info->nvalue_table[i].nvalue));
  850. snprintf(name, sizeof(name), "errminlimit_%lu",
  851. sr_info->nvalue_table[i].volt_nominal);
  852. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  853. &(sr_info->nvalue_table[i].errminlimit));
  854. }
  855. return ret;
  856. err_debugfs:
  857. debugfs_remove_recursive(sr_info->dbg_dir);
  858. err_free_name:
  859. kfree(sr_info->name);
  860. err_iounmap:
  861. list_del(&sr_info->node);
  862. iounmap(sr_info->base);
  863. err_release_region:
  864. release_mem_region(mem->start, resource_size(mem));
  865. err_free_devinfo:
  866. kfree(sr_info);
  867. return ret;
  868. }
  869. static int __devexit omap_sr_remove(struct platform_device *pdev)
  870. {
  871. struct omap_sr_data *pdata = pdev->dev.platform_data;
  872. struct omap_sr *sr_info;
  873. struct resource *mem;
  874. if (!pdata) {
  875. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  876. return -EINVAL;
  877. }
  878. sr_info = _sr_lookup(pdata->voltdm);
  879. if (IS_ERR(sr_info)) {
  880. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  881. __func__);
  882. return PTR_ERR(sr_info);
  883. }
  884. if (sr_info->autocomp_active)
  885. sr_stop_vddautocomp(sr_info);
  886. if (sr_info->dbg_dir)
  887. debugfs_remove_recursive(sr_info->dbg_dir);
  888. list_del(&sr_info->node);
  889. iounmap(sr_info->base);
  890. kfree(sr_info->name);
  891. kfree(sr_info);
  892. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  893. release_mem_region(mem->start, resource_size(mem));
  894. return 0;
  895. }
  896. static void __devexit omap_sr_shutdown(struct platform_device *pdev)
  897. {
  898. struct omap_sr_data *pdata = pdev->dev.platform_data;
  899. struct omap_sr *sr_info;
  900. if (!pdata) {
  901. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  902. return;
  903. }
  904. sr_info = _sr_lookup(pdata->voltdm);
  905. if (IS_ERR(sr_info)) {
  906. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  907. __func__);
  908. return;
  909. }
  910. if (sr_info->autocomp_active)
  911. sr_stop_vddautocomp(sr_info);
  912. return;
  913. }
  914. static struct platform_driver smartreflex_driver = {
  915. .remove = __devexit_p(omap_sr_remove),
  916. .shutdown = __devexit_p(omap_sr_shutdown),
  917. .driver = {
  918. .name = "smartreflex",
  919. },
  920. };
  921. static int __init sr_init(void)
  922. {
  923. int ret = 0;
  924. /*
  925. * sr_init is a late init. If by then a pmic specific API is not
  926. * registered either there is no need for anything to be done on
  927. * the PMIC side or somebody has forgotten to register a PMIC
  928. * handler. Warn for the second condition.
  929. */
  930. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  931. sr_pmic_data->sr_pmic_init();
  932. else
  933. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  934. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  935. if (ret) {
  936. pr_err("%s: platform driver register failed for SR\n",
  937. __func__);
  938. return ret;
  939. }
  940. return 0;
  941. }
  942. late_initcall(sr_init);
  943. static void __exit sr_exit(void)
  944. {
  945. platform_driver_unregister(&smartreflex_driver);
  946. }
  947. module_exit(sr_exit);
  948. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  949. MODULE_LICENSE("GPL");
  950. MODULE_ALIAS("platform:" DRIVER_NAME);
  951. MODULE_AUTHOR("Texas Instruments Inc");