pinctrl-single.c 23 KB

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  1. /*
  2. * Generic device tree based pinctrl driver for one register per pin
  3. * type pinmux controllers
  4. *
  5. * Copyright (C) 2012 Texas Instruments, Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/io.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/list.h>
  17. #include <linux/of.h>
  18. #include <linux/of_device.h>
  19. #include <linux/of_address.h>
  20. #include <linux/pinctrl/pinctrl.h>
  21. #include <linux/pinctrl/pinmux.h>
  22. #include "core.h"
  23. #define DRIVER_NAME "pinctrl-single"
  24. #define PCS_MUX_NAME "pinctrl-single,pins"
  25. #define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1)
  26. #define PCS_OFF_DISABLED ~0U
  27. /**
  28. * struct pcs_pingroup - pingroups for a function
  29. * @np: pingroup device node pointer
  30. * @name: pingroup name
  31. * @gpins: array of the pins in the group
  32. * @ngpins: number of pins in the group
  33. * @node: list node
  34. */
  35. struct pcs_pingroup {
  36. struct device_node *np;
  37. const char *name;
  38. int *gpins;
  39. int ngpins;
  40. struct list_head node;
  41. };
  42. /**
  43. * struct pcs_func_vals - mux function register offset and value pair
  44. * @reg: register virtual address
  45. * @val: register value
  46. */
  47. struct pcs_func_vals {
  48. void __iomem *reg;
  49. unsigned val;
  50. };
  51. /**
  52. * struct pcs_function - pinctrl function
  53. * @name: pinctrl function name
  54. * @vals: register and vals array
  55. * @nvals: number of entries in vals array
  56. * @pgnames: array of pingroup names the function uses
  57. * @npgnames: number of pingroup names the function uses
  58. * @node: list node
  59. */
  60. struct pcs_function {
  61. const char *name;
  62. struct pcs_func_vals *vals;
  63. unsigned nvals;
  64. const char **pgnames;
  65. int npgnames;
  66. struct list_head node;
  67. };
  68. /**
  69. * struct pcs_data - wrapper for data needed by pinctrl framework
  70. * @pa: pindesc array
  71. * @cur: index to current element
  72. *
  73. * REVISIT: We should be able to drop this eventually by adding
  74. * support for registering pins individually in the pinctrl
  75. * framework for those drivers that don't need a static array.
  76. */
  77. struct pcs_data {
  78. struct pinctrl_pin_desc *pa;
  79. int cur;
  80. };
  81. /**
  82. * struct pcs_name - register name for a pin
  83. * @name: name of the pinctrl register
  84. *
  85. * REVISIT: We may want to make names optional in the pinctrl
  86. * framework as some drivers may not care about pin names to
  87. * avoid kernel bloat. The pin names can be deciphered by user
  88. * space tools using debugfs based on the register address and
  89. * SoC packaging information.
  90. */
  91. struct pcs_name {
  92. char name[PCS_REG_NAME_LEN];
  93. };
  94. /**
  95. * struct pcs_device - pinctrl device instance
  96. * @res: resources
  97. * @base: virtual address of the controller
  98. * @size: size of the ioremapped area
  99. * @dev: device entry
  100. * @pctl: pin controller device
  101. * @mutex: mutex protecting the lists
  102. * @width: bits per mux register
  103. * @fmask: function register mask
  104. * @fshift: function register shift
  105. * @foff: value to turn mux off
  106. * @fmax: max number of functions in fmask
  107. * @names: array of register names for pins
  108. * @pins: physical pins on the SoC
  109. * @pgtree: pingroup index radix tree
  110. * @ftree: function index radix tree
  111. * @pingroups: list of pingroups
  112. * @functions: list of functions
  113. * @ngroups: number of pingroups
  114. * @nfuncs: number of functions
  115. * @desc: pin controller descriptor
  116. * @read: register read function to use
  117. * @write: register write function to use
  118. */
  119. struct pcs_device {
  120. struct resource *res;
  121. void __iomem *base;
  122. unsigned size;
  123. struct device *dev;
  124. struct pinctrl_dev *pctl;
  125. struct mutex mutex;
  126. unsigned width;
  127. unsigned fmask;
  128. unsigned fshift;
  129. unsigned foff;
  130. unsigned fmax;
  131. struct pcs_name *names;
  132. struct pcs_data pins;
  133. struct radix_tree_root pgtree;
  134. struct radix_tree_root ftree;
  135. struct list_head pingroups;
  136. struct list_head functions;
  137. unsigned ngroups;
  138. unsigned nfuncs;
  139. struct pinctrl_desc desc;
  140. unsigned (*read)(void __iomem *reg);
  141. void (*write)(unsigned val, void __iomem *reg);
  142. };
  143. /*
  144. * REVISIT: Reads and writes could eventually use regmap or something
  145. * generic. But at least on omaps, some mux registers are performance
  146. * critical as they may need to be remuxed every time before and after
  147. * idle. Adding tests for register access width for every read and
  148. * write like regmap is doing is not desired, and caching the registers
  149. * does not help in this case.
  150. */
  151. static unsigned __maybe_unused pcs_readb(void __iomem *reg)
  152. {
  153. return readb(reg);
  154. }
  155. static unsigned __maybe_unused pcs_readw(void __iomem *reg)
  156. {
  157. return readw(reg);
  158. }
  159. static unsigned __maybe_unused pcs_readl(void __iomem *reg)
  160. {
  161. return readl(reg);
  162. }
  163. static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
  164. {
  165. writeb(val, reg);
  166. }
  167. static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
  168. {
  169. writew(val, reg);
  170. }
  171. static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
  172. {
  173. writel(val, reg);
  174. }
  175. static int pcs_get_groups_count(struct pinctrl_dev *pctldev)
  176. {
  177. struct pcs_device *pcs;
  178. pcs = pinctrl_dev_get_drvdata(pctldev);
  179. return pcs->ngroups;
  180. }
  181. static const char *pcs_get_group_name(struct pinctrl_dev *pctldev,
  182. unsigned gselector)
  183. {
  184. struct pcs_device *pcs;
  185. struct pcs_pingroup *group;
  186. pcs = pinctrl_dev_get_drvdata(pctldev);
  187. group = radix_tree_lookup(&pcs->pgtree, gselector);
  188. if (!group) {
  189. dev_err(pcs->dev, "%s could not find pingroup%i\n",
  190. __func__, gselector);
  191. return NULL;
  192. }
  193. return group->name;
  194. }
  195. static int pcs_get_group_pins(struct pinctrl_dev *pctldev,
  196. unsigned gselector,
  197. const unsigned **pins,
  198. unsigned *npins)
  199. {
  200. struct pcs_device *pcs;
  201. struct pcs_pingroup *group;
  202. pcs = pinctrl_dev_get_drvdata(pctldev);
  203. group = radix_tree_lookup(&pcs->pgtree, gselector);
  204. if (!group) {
  205. dev_err(pcs->dev, "%s could not find pingroup%i\n",
  206. __func__, gselector);
  207. return -EINVAL;
  208. }
  209. *pins = group->gpins;
  210. *npins = group->ngpins;
  211. return 0;
  212. }
  213. static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
  214. struct seq_file *s,
  215. unsigned offset)
  216. {
  217. seq_printf(s, " " DRIVER_NAME);
  218. }
  219. static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
  220. struct pinctrl_map *map, unsigned num_maps)
  221. {
  222. struct pcs_device *pcs;
  223. pcs = pinctrl_dev_get_drvdata(pctldev);
  224. devm_kfree(pcs->dev, map);
  225. }
  226. static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
  227. struct device_node *np_config,
  228. struct pinctrl_map **map, unsigned *num_maps);
  229. static struct pinctrl_ops pcs_pinctrl_ops = {
  230. .get_groups_count = pcs_get_groups_count,
  231. .get_group_name = pcs_get_group_name,
  232. .get_group_pins = pcs_get_group_pins,
  233. .pin_dbg_show = pcs_pin_dbg_show,
  234. .dt_node_to_map = pcs_dt_node_to_map,
  235. .dt_free_map = pcs_dt_free_map,
  236. };
  237. static int pcs_get_functions_count(struct pinctrl_dev *pctldev)
  238. {
  239. struct pcs_device *pcs;
  240. pcs = pinctrl_dev_get_drvdata(pctldev);
  241. return pcs->nfuncs;
  242. }
  243. static const char *pcs_get_function_name(struct pinctrl_dev *pctldev,
  244. unsigned fselector)
  245. {
  246. struct pcs_device *pcs;
  247. struct pcs_function *func;
  248. pcs = pinctrl_dev_get_drvdata(pctldev);
  249. func = radix_tree_lookup(&pcs->ftree, fselector);
  250. if (!func) {
  251. dev_err(pcs->dev, "%s could not find function%i\n",
  252. __func__, fselector);
  253. return NULL;
  254. }
  255. return func->name;
  256. }
  257. static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
  258. unsigned fselector,
  259. const char * const **groups,
  260. unsigned * const ngroups)
  261. {
  262. struct pcs_device *pcs;
  263. struct pcs_function *func;
  264. pcs = pinctrl_dev_get_drvdata(pctldev);
  265. func = radix_tree_lookup(&pcs->ftree, fselector);
  266. if (!func) {
  267. dev_err(pcs->dev, "%s could not find function%i\n",
  268. __func__, fselector);
  269. return -EINVAL;
  270. }
  271. *groups = func->pgnames;
  272. *ngroups = func->npgnames;
  273. return 0;
  274. }
  275. static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
  276. unsigned group)
  277. {
  278. struct pcs_device *pcs;
  279. struct pcs_function *func;
  280. int i;
  281. pcs = pinctrl_dev_get_drvdata(pctldev);
  282. func = radix_tree_lookup(&pcs->ftree, fselector);
  283. if (!func)
  284. return -EINVAL;
  285. dev_dbg(pcs->dev, "enabling %s function%i\n",
  286. func->name, fselector);
  287. for (i = 0; i < func->nvals; i++) {
  288. struct pcs_func_vals *vals;
  289. unsigned val;
  290. vals = &func->vals[i];
  291. val = pcs->read(vals->reg);
  292. val &= ~pcs->fmask;
  293. val |= vals->val;
  294. pcs->write(val, vals->reg);
  295. }
  296. return 0;
  297. }
  298. static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
  299. unsigned group)
  300. {
  301. struct pcs_device *pcs;
  302. struct pcs_function *func;
  303. int i;
  304. pcs = pinctrl_dev_get_drvdata(pctldev);
  305. func = radix_tree_lookup(&pcs->ftree, fselector);
  306. if (!func) {
  307. dev_err(pcs->dev, "%s could not find function%i\n",
  308. __func__, fselector);
  309. return;
  310. }
  311. /*
  312. * Ignore disable if function-off is not specified. Some hardware
  313. * does not have clearly defined disable function. For pin specific
  314. * off modes, you can use alternate named states as described in
  315. * pinctrl-bindings.txt.
  316. */
  317. if (pcs->foff == PCS_OFF_DISABLED) {
  318. dev_dbg(pcs->dev, "ignoring disable for %s function%i\n",
  319. func->name, fselector);
  320. return;
  321. }
  322. dev_dbg(pcs->dev, "disabling function%i %s\n",
  323. fselector, func->name);
  324. for (i = 0; i < func->nvals; i++) {
  325. struct pcs_func_vals *vals;
  326. unsigned val;
  327. vals = &func->vals[i];
  328. val = pcs->read(vals->reg);
  329. val &= ~pcs->fmask;
  330. val |= pcs->foff << pcs->fshift;
  331. pcs->write(val, vals->reg);
  332. }
  333. }
  334. static int pcs_request_gpio(struct pinctrl_dev *pctldev,
  335. struct pinctrl_gpio_range *range, unsigned offset)
  336. {
  337. return -ENOTSUPP;
  338. }
  339. static struct pinmux_ops pcs_pinmux_ops = {
  340. .get_functions_count = pcs_get_functions_count,
  341. .get_function_name = pcs_get_function_name,
  342. .get_function_groups = pcs_get_function_groups,
  343. .enable = pcs_enable,
  344. .disable = pcs_disable,
  345. .gpio_request_enable = pcs_request_gpio,
  346. };
  347. static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
  348. unsigned pin, unsigned long *config)
  349. {
  350. return -ENOTSUPP;
  351. }
  352. static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
  353. unsigned pin, unsigned long config)
  354. {
  355. return -ENOTSUPP;
  356. }
  357. static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
  358. unsigned group, unsigned long *config)
  359. {
  360. return -ENOTSUPP;
  361. }
  362. static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
  363. unsigned group, unsigned long config)
  364. {
  365. return -ENOTSUPP;
  366. }
  367. static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
  368. struct seq_file *s, unsigned offset)
  369. {
  370. }
  371. static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
  372. struct seq_file *s, unsigned selector)
  373. {
  374. }
  375. static struct pinconf_ops pcs_pinconf_ops = {
  376. .pin_config_get = pcs_pinconf_get,
  377. .pin_config_set = pcs_pinconf_set,
  378. .pin_config_group_get = pcs_pinconf_group_get,
  379. .pin_config_group_set = pcs_pinconf_group_set,
  380. .pin_config_dbg_show = pcs_pinconf_dbg_show,
  381. .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
  382. };
  383. /**
  384. * pcs_add_pin() - add a pin to the static per controller pin array
  385. * @pcs: pcs driver instance
  386. * @offset: register offset from base
  387. */
  388. static int __devinit pcs_add_pin(struct pcs_device *pcs, unsigned offset)
  389. {
  390. struct pinctrl_pin_desc *pin;
  391. struct pcs_name *pn;
  392. int i;
  393. i = pcs->pins.cur;
  394. if (i >= pcs->desc.npins) {
  395. dev_err(pcs->dev, "too many pins, max %i\n",
  396. pcs->desc.npins);
  397. return -ENOMEM;
  398. }
  399. pin = &pcs->pins.pa[i];
  400. pn = &pcs->names[i];
  401. sprintf(pn->name, "%lx",
  402. (unsigned long)pcs->res->start + offset);
  403. pin->name = pn->name;
  404. pin->number = i;
  405. pcs->pins.cur++;
  406. return i;
  407. }
  408. /**
  409. * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver
  410. * @pcs: pcs driver instance
  411. *
  412. * In case of errors, resources are freed in pcs_free_resources.
  413. *
  414. * If your hardware needs holes in the address space, then just set
  415. * up multiple driver instances.
  416. */
  417. static int __devinit pcs_allocate_pin_table(struct pcs_device *pcs)
  418. {
  419. int mux_bytes, nr_pins, i;
  420. mux_bytes = pcs->width / BITS_PER_BYTE;
  421. nr_pins = pcs->size / mux_bytes;
  422. dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins);
  423. pcs->pins.pa = devm_kzalloc(pcs->dev,
  424. sizeof(*pcs->pins.pa) * nr_pins,
  425. GFP_KERNEL);
  426. if (!pcs->pins.pa)
  427. return -ENOMEM;
  428. pcs->names = devm_kzalloc(pcs->dev,
  429. sizeof(struct pcs_name) * nr_pins,
  430. GFP_KERNEL);
  431. if (!pcs->names)
  432. return -ENOMEM;
  433. pcs->desc.pins = pcs->pins.pa;
  434. pcs->desc.npins = nr_pins;
  435. for (i = 0; i < pcs->desc.npins; i++) {
  436. unsigned offset;
  437. int res;
  438. offset = i * mux_bytes;
  439. res = pcs_add_pin(pcs, offset);
  440. if (res < 0) {
  441. dev_err(pcs->dev, "error adding pins: %i\n", res);
  442. return res;
  443. }
  444. }
  445. return 0;
  446. }
  447. /**
  448. * pcs_add_function() - adds a new function to the function list
  449. * @pcs: pcs driver instance
  450. * @np: device node of the mux entry
  451. * @name: name of the function
  452. * @vals: array of mux register value pairs used by the function
  453. * @nvals: number of mux register value pairs
  454. * @pgnames: array of pingroup names for the function
  455. * @npgnames: number of pingroup names
  456. */
  457. static struct pcs_function *pcs_add_function(struct pcs_device *pcs,
  458. struct device_node *np,
  459. const char *name,
  460. struct pcs_func_vals *vals,
  461. unsigned nvals,
  462. const char **pgnames,
  463. unsigned npgnames)
  464. {
  465. struct pcs_function *function;
  466. function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL);
  467. if (!function)
  468. return NULL;
  469. function->name = name;
  470. function->vals = vals;
  471. function->nvals = nvals;
  472. function->pgnames = pgnames;
  473. function->npgnames = npgnames;
  474. mutex_lock(&pcs->mutex);
  475. list_add_tail(&function->node, &pcs->functions);
  476. radix_tree_insert(&pcs->ftree, pcs->nfuncs, function);
  477. pcs->nfuncs++;
  478. mutex_unlock(&pcs->mutex);
  479. return function;
  480. }
  481. static void pcs_remove_function(struct pcs_device *pcs,
  482. struct pcs_function *function)
  483. {
  484. int i;
  485. mutex_lock(&pcs->mutex);
  486. for (i = 0; i < pcs->nfuncs; i++) {
  487. struct pcs_function *found;
  488. found = radix_tree_lookup(&pcs->ftree, i);
  489. if (found == function)
  490. radix_tree_delete(&pcs->ftree, i);
  491. }
  492. list_del(&function->node);
  493. mutex_unlock(&pcs->mutex);
  494. }
  495. /**
  496. * pcs_add_pingroup() - add a pingroup to the pingroup list
  497. * @pcs: pcs driver instance
  498. * @np: device node of the mux entry
  499. * @name: name of the pingroup
  500. * @gpins: array of the pins that belong to the group
  501. * @ngpins: number of pins in the group
  502. */
  503. static int pcs_add_pingroup(struct pcs_device *pcs,
  504. struct device_node *np,
  505. const char *name,
  506. int *gpins,
  507. int ngpins)
  508. {
  509. struct pcs_pingroup *pingroup;
  510. pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL);
  511. if (!pingroup)
  512. return -ENOMEM;
  513. pingroup->name = name;
  514. pingroup->np = np;
  515. pingroup->gpins = gpins;
  516. pingroup->ngpins = ngpins;
  517. mutex_lock(&pcs->mutex);
  518. list_add_tail(&pingroup->node, &pcs->pingroups);
  519. radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup);
  520. pcs->ngroups++;
  521. mutex_unlock(&pcs->mutex);
  522. return 0;
  523. }
  524. /**
  525. * pcs_get_pin_by_offset() - get a pin index based on the register offset
  526. * @pcs: pcs driver instance
  527. * @offset: register offset from the base
  528. *
  529. * Note that this is OK as long as the pins are in a static array.
  530. */
  531. static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
  532. {
  533. unsigned index;
  534. if (offset >= pcs->size) {
  535. dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n",
  536. offset, pcs->size);
  537. return -EINVAL;
  538. }
  539. index = offset / (pcs->width / BITS_PER_BYTE);
  540. return index;
  541. }
  542. /**
  543. * smux_parse_one_pinctrl_entry() - parses a device tree mux entry
  544. * @pcs: pinctrl driver instance
  545. * @np: device node of the mux entry
  546. * @map: map entry
  547. * @pgnames: pingroup names
  548. *
  549. * Note that this binding currently supports only sets of one register + value.
  550. *
  551. * Also note that this driver tries to avoid understanding pin and function
  552. * names because of the extra bloat they would cause especially in the case of
  553. * a large number of pins. This driver just sets what is specified for the board
  554. * in the .dts file. Further user space debugging tools can be developed to
  555. * decipher the pin and function names using debugfs.
  556. *
  557. * If you are concerned about the boot time, set up the static pins in
  558. * the bootloader, and only set up selected pins as device tree entries.
  559. */
  560. static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
  561. struct device_node *np,
  562. struct pinctrl_map **map,
  563. const char **pgnames)
  564. {
  565. struct pcs_func_vals *vals;
  566. const __be32 *mux;
  567. int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
  568. struct pcs_function *function;
  569. mux = of_get_property(np, PCS_MUX_NAME, &size);
  570. if ((!mux) || (size < sizeof(*mux) * 2)) {
  571. dev_err(pcs->dev, "bad data for mux %s\n",
  572. np->name);
  573. return -EINVAL;
  574. }
  575. size /= sizeof(*mux); /* Number of elements in array */
  576. rows = size / 2; /* Each row is a key value pair */
  577. vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
  578. if (!vals)
  579. return -ENOMEM;
  580. pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL);
  581. if (!pins)
  582. goto free_vals;
  583. while (index < size) {
  584. unsigned offset, val;
  585. int pin;
  586. offset = be32_to_cpup(mux + index++);
  587. val = be32_to_cpup(mux + index++);
  588. vals[found].reg = pcs->base + offset;
  589. vals[found].val = val;
  590. pin = pcs_get_pin_by_offset(pcs, offset);
  591. if (pin < 0) {
  592. dev_err(pcs->dev,
  593. "could not add functions for %s %ux\n",
  594. np->name, offset);
  595. break;
  596. }
  597. pins[found++] = pin;
  598. }
  599. pgnames[0] = np->name;
  600. function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
  601. if (!function)
  602. goto free_pins;
  603. res = pcs_add_pingroup(pcs, np, np->name, pins, found);
  604. if (res < 0)
  605. goto free_function;
  606. (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
  607. (*map)->data.mux.group = np->name;
  608. (*map)->data.mux.function = np->name;
  609. return 0;
  610. free_function:
  611. pcs_remove_function(pcs, function);
  612. free_pins:
  613. devm_kfree(pcs->dev, pins);
  614. free_vals:
  615. devm_kfree(pcs->dev, vals);
  616. return res;
  617. }
  618. /**
  619. * pcs_dt_node_to_map() - allocates and parses pinctrl maps
  620. * @pctldev: pinctrl instance
  621. * @np_config: device tree pinmux entry
  622. * @map: array of map entries
  623. * @num_maps: number of maps
  624. */
  625. static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
  626. struct device_node *np_config,
  627. struct pinctrl_map **map, unsigned *num_maps)
  628. {
  629. struct pcs_device *pcs;
  630. const char **pgnames;
  631. int ret;
  632. pcs = pinctrl_dev_get_drvdata(pctldev);
  633. *map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL);
  634. if (!map)
  635. return -ENOMEM;
  636. *num_maps = 0;
  637. pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL);
  638. if (!pgnames) {
  639. ret = -ENOMEM;
  640. goto free_map;
  641. }
  642. ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames);
  643. if (ret < 0) {
  644. dev_err(pcs->dev, "no pins entries for %s\n",
  645. np_config->name);
  646. goto free_pgnames;
  647. }
  648. *num_maps = 1;
  649. return 0;
  650. free_pgnames:
  651. devm_kfree(pcs->dev, pgnames);
  652. free_map:
  653. devm_kfree(pcs->dev, *map);
  654. return ret;
  655. }
  656. /**
  657. * pcs_free_funcs() - free memory used by functions
  658. * @pcs: pcs driver instance
  659. */
  660. static void pcs_free_funcs(struct pcs_device *pcs)
  661. {
  662. struct list_head *pos, *tmp;
  663. int i;
  664. mutex_lock(&pcs->mutex);
  665. for (i = 0; i < pcs->nfuncs; i++) {
  666. struct pcs_function *func;
  667. func = radix_tree_lookup(&pcs->ftree, i);
  668. if (!func)
  669. continue;
  670. radix_tree_delete(&pcs->ftree, i);
  671. }
  672. list_for_each_safe(pos, tmp, &pcs->functions) {
  673. struct pcs_function *function;
  674. function = list_entry(pos, struct pcs_function, node);
  675. list_del(&function->node);
  676. }
  677. mutex_unlock(&pcs->mutex);
  678. }
  679. /**
  680. * pcs_free_pingroups() - free memory used by pingroups
  681. * @pcs: pcs driver instance
  682. */
  683. static void pcs_free_pingroups(struct pcs_device *pcs)
  684. {
  685. struct list_head *pos, *tmp;
  686. int i;
  687. mutex_lock(&pcs->mutex);
  688. for (i = 0; i < pcs->ngroups; i++) {
  689. struct pcs_pingroup *pingroup;
  690. pingroup = radix_tree_lookup(&pcs->pgtree, i);
  691. if (!pingroup)
  692. continue;
  693. radix_tree_delete(&pcs->pgtree, i);
  694. }
  695. list_for_each_safe(pos, tmp, &pcs->pingroups) {
  696. struct pcs_pingroup *pingroup;
  697. pingroup = list_entry(pos, struct pcs_pingroup, node);
  698. list_del(&pingroup->node);
  699. }
  700. mutex_unlock(&pcs->mutex);
  701. }
  702. /**
  703. * pcs_free_resources() - free memory used by this driver
  704. * @pcs: pcs driver instance
  705. */
  706. static void pcs_free_resources(struct pcs_device *pcs)
  707. {
  708. if (pcs->pctl)
  709. pinctrl_unregister(pcs->pctl);
  710. pcs_free_funcs(pcs);
  711. pcs_free_pingroups(pcs);
  712. }
  713. #define PCS_GET_PROP_U32(name, reg, err) \
  714. do { \
  715. ret = of_property_read_u32(np, name, reg); \
  716. if (ret) { \
  717. dev_err(pcs->dev, err); \
  718. return ret; \
  719. } \
  720. } while (0);
  721. static struct of_device_id pcs_of_match[];
  722. static int __devinit pcs_probe(struct platform_device *pdev)
  723. {
  724. struct device_node *np = pdev->dev.of_node;
  725. const struct of_device_id *match;
  726. struct resource *res;
  727. struct pcs_device *pcs;
  728. int ret;
  729. match = of_match_device(pcs_of_match, &pdev->dev);
  730. if (!match)
  731. return -EINVAL;
  732. pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL);
  733. if (!pcs) {
  734. dev_err(&pdev->dev, "could not allocate\n");
  735. return -ENOMEM;
  736. }
  737. pcs->dev = &pdev->dev;
  738. mutex_init(&pcs->mutex);
  739. INIT_LIST_HEAD(&pcs->pingroups);
  740. INIT_LIST_HEAD(&pcs->functions);
  741. PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
  742. "register width not specified\n");
  743. PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask,
  744. "function register mask not specified\n");
  745. pcs->fshift = ffs(pcs->fmask) - 1;
  746. pcs->fmax = pcs->fmask >> pcs->fshift;
  747. ret = of_property_read_u32(np, "pinctrl-single,function-off",
  748. &pcs->foff);
  749. if (ret)
  750. pcs->foff = PCS_OFF_DISABLED;
  751. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  752. if (!res) {
  753. dev_err(pcs->dev, "could not get resource\n");
  754. return -ENODEV;
  755. }
  756. pcs->res = devm_request_mem_region(pcs->dev, res->start,
  757. resource_size(res), DRIVER_NAME);
  758. if (!pcs->res) {
  759. dev_err(pcs->dev, "could not get mem_region\n");
  760. return -EBUSY;
  761. }
  762. pcs->size = resource_size(pcs->res);
  763. pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size);
  764. if (!pcs->base) {
  765. dev_err(pcs->dev, "could not ioremap\n");
  766. return -ENODEV;
  767. }
  768. INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL);
  769. INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL);
  770. platform_set_drvdata(pdev, pcs);
  771. switch (pcs->width) {
  772. case 8:
  773. pcs->read = pcs_readb;
  774. pcs->write = pcs_writeb;
  775. break;
  776. case 16:
  777. pcs->read = pcs_readw;
  778. pcs->write = pcs_writew;
  779. break;
  780. case 32:
  781. pcs->read = pcs_readl;
  782. pcs->write = pcs_writel;
  783. break;
  784. default:
  785. break;
  786. }
  787. pcs->desc.name = DRIVER_NAME;
  788. pcs->desc.pctlops = &pcs_pinctrl_ops;
  789. pcs->desc.pmxops = &pcs_pinmux_ops;
  790. pcs->desc.confops = &pcs_pinconf_ops;
  791. pcs->desc.owner = THIS_MODULE;
  792. ret = pcs_allocate_pin_table(pcs);
  793. if (ret < 0)
  794. goto free;
  795. pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs);
  796. if (!pcs->pctl) {
  797. dev_err(pcs->dev, "could not register single pinctrl driver\n");
  798. ret = -EINVAL;
  799. goto free;
  800. }
  801. dev_info(pcs->dev, "%i pins at pa %p size %u\n",
  802. pcs->desc.npins, pcs->base, pcs->size);
  803. return 0;
  804. free:
  805. pcs_free_resources(pcs);
  806. return ret;
  807. }
  808. static int __devexit pcs_remove(struct platform_device *pdev)
  809. {
  810. struct pcs_device *pcs = platform_get_drvdata(pdev);
  811. if (!pcs)
  812. return 0;
  813. pcs_free_resources(pcs);
  814. return 0;
  815. }
  816. static struct of_device_id pcs_of_match[] __devinitdata = {
  817. { .compatible = DRIVER_NAME, },
  818. { },
  819. };
  820. MODULE_DEVICE_TABLE(of, pcs_of_match);
  821. static struct platform_driver pcs_driver = {
  822. .probe = pcs_probe,
  823. .remove = __devexit_p(pcs_remove),
  824. .driver = {
  825. .owner = THIS_MODULE,
  826. .name = DRIVER_NAME,
  827. .of_match_table = pcs_of_match,
  828. },
  829. };
  830. module_platform_driver(pcs_driver);
  831. MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
  832. MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
  833. MODULE_LICENSE("GPL v2");