portdrv_pci.c 11 KB

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  1. /*
  2. * File: portdrv_pci.c
  3. * Purpose: PCI Express Port Bus Driver
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/init.h>
  15. #include <linux/pcieport_if.h>
  16. #include <linux/aer.h>
  17. #include <linux/dmi.h>
  18. #include <linux/pci-aspm.h>
  19. #include "portdrv.h"
  20. #include "aer/aerdrv.h"
  21. /*
  22. * Version Information
  23. */
  24. #define DRIVER_VERSION "v1.0"
  25. #define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
  26. #define DRIVER_DESC "PCIe Port Bus Driver"
  27. MODULE_AUTHOR(DRIVER_AUTHOR);
  28. MODULE_DESCRIPTION(DRIVER_DESC);
  29. MODULE_LICENSE("GPL");
  30. /* If this switch is set, PCIe port native services should not be enabled. */
  31. bool pcie_ports_disabled;
  32. /*
  33. * If this switch is set, ACPI _OSC will be used to determine whether or not to
  34. * enable PCIe port native services.
  35. */
  36. bool pcie_ports_auto = true;
  37. static int __init pcie_port_setup(char *str)
  38. {
  39. if (!strncmp(str, "compat", 6)) {
  40. pcie_ports_disabled = true;
  41. } else if (!strncmp(str, "native", 6)) {
  42. pcie_ports_disabled = false;
  43. pcie_ports_auto = false;
  44. } else if (!strncmp(str, "auto", 4)) {
  45. pcie_ports_disabled = false;
  46. pcie_ports_auto = true;
  47. }
  48. return 1;
  49. }
  50. __setup("pcie_ports=", pcie_port_setup);
  51. /* global data */
  52. /**
  53. * pcie_clear_root_pme_status - Clear root port PME interrupt status.
  54. * @dev: PCIe root port or event collector.
  55. */
  56. void pcie_clear_root_pme_status(struct pci_dev *dev)
  57. {
  58. int rtsta_pos;
  59. u32 rtsta;
  60. rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
  61. pci_read_config_dword(dev, rtsta_pos, &rtsta);
  62. rtsta |= PCI_EXP_RTSTA_PME;
  63. pci_write_config_dword(dev, rtsta_pos, rtsta);
  64. }
  65. static int pcie_portdrv_restore_config(struct pci_dev *dev)
  66. {
  67. int retval;
  68. retval = pci_enable_device(dev);
  69. if (retval)
  70. return retval;
  71. pci_set_master(dev);
  72. return 0;
  73. }
  74. #ifdef CONFIG_PM
  75. static int pcie_port_resume_noirq(struct device *dev)
  76. {
  77. struct pci_dev *pdev = to_pci_dev(dev);
  78. /*
  79. * Some BIOSes forget to clear Root PME Status bits after system wakeup
  80. * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
  81. * bits now just in case (shouldn't hurt).
  82. */
  83. if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
  84. pcie_clear_root_pme_status(pdev);
  85. return 0;
  86. }
  87. #ifdef CONFIG_PM_RUNTIME
  88. struct d3cold_info {
  89. bool no_d3cold;
  90. unsigned int d3cold_delay;
  91. };
  92. static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
  93. {
  94. struct d3cold_info *info = data;
  95. info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
  96. info->d3cold_delay);
  97. if (pdev->no_d3cold)
  98. info->no_d3cold = true;
  99. return 0;
  100. }
  101. static int pcie_port_runtime_suspend(struct device *dev)
  102. {
  103. struct pci_dev *pdev = to_pci_dev(dev);
  104. struct d3cold_info d3cold_info = {
  105. .no_d3cold = false,
  106. .d3cold_delay = PCI_PM_D3_WAIT,
  107. };
  108. /*
  109. * If any subordinate device disable D3cold, we should not put
  110. * the port into D3cold. The D3cold delay of port should be
  111. * the max of that of all subordinate devices.
  112. */
  113. pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
  114. pdev->no_d3cold = d3cold_info.no_d3cold;
  115. pdev->d3cold_delay = d3cold_info.d3cold_delay;
  116. return 0;
  117. }
  118. static int pcie_port_runtime_resume(struct device *dev)
  119. {
  120. return 0;
  121. }
  122. #else
  123. #define pcie_port_runtime_suspend NULL
  124. #define pcie_port_runtime_resume NULL
  125. #endif
  126. static const struct dev_pm_ops pcie_portdrv_pm_ops = {
  127. .suspend = pcie_port_device_suspend,
  128. .resume = pcie_port_device_resume,
  129. .freeze = pcie_port_device_suspend,
  130. .thaw = pcie_port_device_resume,
  131. .poweroff = pcie_port_device_suspend,
  132. .restore = pcie_port_device_resume,
  133. .resume_noirq = pcie_port_resume_noirq,
  134. .runtime_suspend = pcie_port_runtime_suspend,
  135. .runtime_resume = pcie_port_runtime_resume,
  136. };
  137. #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
  138. #else /* !PM */
  139. #define PCIE_PORTDRV_PM_OPS NULL
  140. #endif /* !PM */
  141. /*
  142. * PCIe port runtime suspend is broken for some chipsets, so use a
  143. * black list to disable runtime PM for these chipsets.
  144. */
  145. static const struct pci_device_id port_runtime_pm_black_list[] = {
  146. { /* end: all zeroes */ }
  147. };
  148. /*
  149. * pcie_portdrv_probe - Probe PCI-Express port devices
  150. * @dev: PCI-Express port device being probed
  151. *
  152. * If detected invokes the pcie_port_device_register() method for
  153. * this port device.
  154. *
  155. */
  156. static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
  157. const struct pci_device_id *id)
  158. {
  159. int status;
  160. if (!pci_is_pcie(dev) ||
  161. ((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
  162. (dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) &&
  163. (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
  164. return -ENODEV;
  165. if (!dev->irq && dev->pin) {
  166. dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
  167. "check vendor BIOS\n", dev->vendor, dev->device);
  168. }
  169. status = pcie_port_device_register(dev);
  170. if (status)
  171. return status;
  172. pci_save_state(dev);
  173. if (!pci_match_id(port_runtime_pm_black_list, dev))
  174. pm_runtime_put_noidle(&dev->dev);
  175. return 0;
  176. }
  177. static void pcie_portdrv_remove(struct pci_dev *dev)
  178. {
  179. if (!pci_match_id(port_runtime_pm_black_list, dev))
  180. pm_runtime_get_noresume(&dev->dev);
  181. pcie_port_device_remove(dev);
  182. pci_disable_device(dev);
  183. }
  184. static int error_detected_iter(struct device *device, void *data)
  185. {
  186. struct pcie_device *pcie_device;
  187. struct pcie_port_service_driver *driver;
  188. struct aer_broadcast_data *result_data;
  189. pci_ers_result_t status;
  190. result_data = (struct aer_broadcast_data *) data;
  191. if (device->bus == &pcie_port_bus_type && device->driver) {
  192. driver = to_service_driver(device->driver);
  193. if (!driver ||
  194. !driver->err_handler ||
  195. !driver->err_handler->error_detected)
  196. return 0;
  197. pcie_device = to_pcie_device(device);
  198. /* Forward error detected message to service drivers */
  199. status = driver->err_handler->error_detected(
  200. pcie_device->port,
  201. result_data->state);
  202. result_data->result =
  203. merge_result(result_data->result, status);
  204. }
  205. return 0;
  206. }
  207. static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
  208. enum pci_channel_state error)
  209. {
  210. struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
  211. int ret;
  212. /* can not fail */
  213. ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
  214. return data.result;
  215. }
  216. static int mmio_enabled_iter(struct device *device, void *data)
  217. {
  218. struct pcie_device *pcie_device;
  219. struct pcie_port_service_driver *driver;
  220. pci_ers_result_t status, *result;
  221. result = (pci_ers_result_t *) data;
  222. if (device->bus == &pcie_port_bus_type && device->driver) {
  223. driver = to_service_driver(device->driver);
  224. if (driver &&
  225. driver->err_handler &&
  226. driver->err_handler->mmio_enabled) {
  227. pcie_device = to_pcie_device(device);
  228. /* Forward error message to service drivers */
  229. status = driver->err_handler->mmio_enabled(
  230. pcie_device->port);
  231. *result = merge_result(*result, status);
  232. }
  233. }
  234. return 0;
  235. }
  236. static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
  237. {
  238. pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
  239. int retval;
  240. /* get true return value from &status */
  241. retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
  242. return status;
  243. }
  244. static int slot_reset_iter(struct device *device, void *data)
  245. {
  246. struct pcie_device *pcie_device;
  247. struct pcie_port_service_driver *driver;
  248. pci_ers_result_t status, *result;
  249. result = (pci_ers_result_t *) data;
  250. if (device->bus == &pcie_port_bus_type && device->driver) {
  251. driver = to_service_driver(device->driver);
  252. if (driver &&
  253. driver->err_handler &&
  254. driver->err_handler->slot_reset) {
  255. pcie_device = to_pcie_device(device);
  256. /* Forward error message to service drivers */
  257. status = driver->err_handler->slot_reset(
  258. pcie_device->port);
  259. *result = merge_result(*result, status);
  260. }
  261. }
  262. return 0;
  263. }
  264. static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
  265. {
  266. pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
  267. int retval;
  268. /* If fatal, restore cfg space for possible link reset at upstream */
  269. if (dev->error_state == pci_channel_io_frozen) {
  270. dev->state_saved = true;
  271. pci_restore_state(dev);
  272. pcie_portdrv_restore_config(dev);
  273. pci_enable_pcie_error_reporting(dev);
  274. }
  275. /* get true return value from &status */
  276. retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);
  277. return status;
  278. }
  279. static int resume_iter(struct device *device, void *data)
  280. {
  281. struct pcie_device *pcie_device;
  282. struct pcie_port_service_driver *driver;
  283. if (device->bus == &pcie_port_bus_type && device->driver) {
  284. driver = to_service_driver(device->driver);
  285. if (driver &&
  286. driver->err_handler &&
  287. driver->err_handler->resume) {
  288. pcie_device = to_pcie_device(device);
  289. /* Forward error message to service drivers */
  290. driver->err_handler->resume(pcie_device->port);
  291. }
  292. }
  293. return 0;
  294. }
  295. static void pcie_portdrv_err_resume(struct pci_dev *dev)
  296. {
  297. int retval;
  298. /* nothing to do with error value, if it ever happens */
  299. retval = device_for_each_child(&dev->dev, NULL, resume_iter);
  300. }
  301. /*
  302. * LINUX Device Driver Model
  303. */
  304. static const struct pci_device_id port_pci_ids[] = { {
  305. /* handle any PCI-Express port */
  306. PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
  307. }, { /* end: all zeroes */ }
  308. };
  309. MODULE_DEVICE_TABLE(pci, port_pci_ids);
  310. static struct pci_error_handlers pcie_portdrv_err_handler = {
  311. .error_detected = pcie_portdrv_error_detected,
  312. .mmio_enabled = pcie_portdrv_mmio_enabled,
  313. .slot_reset = pcie_portdrv_slot_reset,
  314. .resume = pcie_portdrv_err_resume,
  315. };
  316. static struct pci_driver pcie_portdriver = {
  317. .name = "pcieport",
  318. .id_table = &port_pci_ids[0],
  319. .probe = pcie_portdrv_probe,
  320. .remove = pcie_portdrv_remove,
  321. .err_handler = &pcie_portdrv_err_handler,
  322. .driver.pm = PCIE_PORTDRV_PM_OPS,
  323. };
  324. static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
  325. {
  326. pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
  327. d->ident);
  328. pcie_pme_disable_msi();
  329. return 0;
  330. }
  331. static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
  332. /*
  333. * Boxes that should not use MSI for PCIe PME signaling.
  334. */
  335. {
  336. .callback = dmi_pcie_pme_disable_msi,
  337. .ident = "MSI Wind U-100",
  338. .matches = {
  339. DMI_MATCH(DMI_SYS_VENDOR,
  340. "MICRO-STAR INTERNATIONAL CO., LTD"),
  341. DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
  342. },
  343. },
  344. {}
  345. };
  346. static int __init pcie_portdrv_init(void)
  347. {
  348. int retval;
  349. if (pcie_ports_disabled)
  350. return pci_register_driver(&pcie_portdriver);
  351. dmi_check_system(pcie_portdrv_dmi_table);
  352. retval = pcie_port_bus_register();
  353. if (retval) {
  354. printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
  355. goto out;
  356. }
  357. retval = pci_register_driver(&pcie_portdriver);
  358. if (retval)
  359. pcie_port_bus_unregister();
  360. out:
  361. return retval;
  362. }
  363. module_init(pcie_portdrv_init);