core.h 23 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef CORE_H
  18. #define CORE_H
  19. #include <linux/etherdevice.h>
  20. #include <linux/rtnetlink.h>
  21. #include <linux/firmware.h>
  22. #include <linux/sched.h>
  23. #include <linux/circ_buf.h>
  24. #include <net/cfg80211.h>
  25. #include "htc.h"
  26. #include "wmi.h"
  27. #include "bmi.h"
  28. #include "target.h"
  29. #define MAX_ATH6KL 1
  30. #define ATH6KL_MAX_RX_BUFFERS 16
  31. #define ATH6KL_BUFFER_SIZE 1664
  32. #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
  33. #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
  34. #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  35. #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
  36. #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
  37. #define USER_SAVEDKEYS_STAT_INIT 0
  38. #define USER_SAVEDKEYS_STAT_RUN 1
  39. #define ATH6KL_TX_TIMEOUT 10
  40. #define ATH6KL_MAX_ENDPOINTS 4
  41. #define MAX_NODE_NUM 15
  42. #define ATH6KL_APSD_ALL_FRAME 0xFFFF
  43. #define ATH6KL_APSD_NUM_OF_AC 0x4
  44. #define ATH6KL_APSD_FRAME_MASK 0xF
  45. /* Extra bytes for htc header alignment */
  46. #define ATH6KL_HTC_ALIGN_BYTES 3
  47. /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  48. #define MAX_DEF_COOKIE_NUM 180
  49. #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
  50. #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  51. #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  52. #define DISCON_TIMER_INTVAL 10000 /* in msec */
  53. /* Channel dwell time in fg scan */
  54. #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */
  55. /* includes also the null byte */
  56. #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
  57. enum ath6kl_fw_ie_type {
  58. ATH6KL_FW_IE_FW_VERSION = 0,
  59. ATH6KL_FW_IE_TIMESTAMP = 1,
  60. ATH6KL_FW_IE_OTP_IMAGE = 2,
  61. ATH6KL_FW_IE_FW_IMAGE = 3,
  62. ATH6KL_FW_IE_PATCH_IMAGE = 4,
  63. ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  64. ATH6KL_FW_IE_CAPABILITIES = 6,
  65. ATH6KL_FW_IE_PATCH_ADDR = 7,
  66. ATH6KL_FW_IE_BOARD_ADDR = 8,
  67. ATH6KL_FW_IE_VIF_MAX = 9,
  68. };
  69. enum ath6kl_fw_capability {
  70. ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  71. ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
  72. /*
  73. * Firmware is capable of supporting P2P mgmt operations on a
  74. * station interface. After group formation, the station
  75. * interface will become a P2P client/GO interface as the case may be
  76. */
  77. ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
  78. /*
  79. * Firmware has support to cleanup inactive stations
  80. * in AP mode.
  81. */
  82. ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,
  83. /* Firmware has support to override rsn cap of rsn ie */
  84. ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,
  85. /*
  86. * Multicast support in WOW and host awake mode.
  87. * Allow all multicast in host awake mode.
  88. * Apply multicast filter in WOW mode.
  89. */
  90. ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER,
  91. /* Firmware supports enhanced bmiss detection */
  92. ATH6KL_FW_CAPABILITY_BMISS_ENHANCE,
  93. /*
  94. * FW supports matching of ssid in schedule scan
  95. */
  96. ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST,
  97. /* this needs to be last */
  98. ATH6KL_FW_CAPABILITY_MAX,
  99. };
  100. #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  101. struct ath6kl_fw_ie {
  102. __le32 id;
  103. __le32 len;
  104. u8 data[0];
  105. };
  106. enum ath6kl_hw_flags {
  107. ATH6KL_HW_FLAG_64BIT_RATES = BIT(0),
  108. };
  109. #define ATH6KL_FW_API2_FILE "fw-2.bin"
  110. #define ATH6KL_FW_API3_FILE "fw-3.bin"
  111. /* AR6003 1.0 definitions */
  112. #define AR6003_HW_1_0_VERSION 0x300002ba
  113. /* AR6003 2.0 definitions */
  114. #define AR6003_HW_2_0_VERSION 0x30000384
  115. #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
  116. #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0"
  117. #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77"
  118. #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77"
  119. #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  120. #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin"
  121. #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin"
  122. #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
  123. AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin"
  124. /* AR6003 3.0 definitions */
  125. #define AR6003_HW_2_1_1_VERSION 0x30000582
  126. #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1"
  127. #define AR6003_HW_2_1_1_OTP_FILE "otp.bin"
  128. #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin"
  129. #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  130. #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin"
  131. #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
  132. #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin"
  133. #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin"
  134. #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
  135. AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin"
  136. /* AR6004 1.0 definitions */
  137. #define AR6004_HW_1_0_VERSION 0x30000623
  138. #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0"
  139. #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin"
  140. #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin"
  141. #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
  142. AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin"
  143. /* AR6004 1.1 definitions */
  144. #define AR6004_HW_1_1_VERSION 0x30000001
  145. #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1"
  146. #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin"
  147. #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin"
  148. #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
  149. AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin"
  150. /* AR6004 1.2 definitions */
  151. #define AR6004_HW_1_2_VERSION 0x300007e8
  152. #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2"
  153. #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin"
  154. #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin"
  155. #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \
  156. AR6004_HW_1_2_FW_DIR "/bdata.bin"
  157. /* Per STA data, used in AP mode */
  158. #define STA_PS_AWAKE BIT(0)
  159. #define STA_PS_SLEEP BIT(1)
  160. #define STA_PS_POLLED BIT(2)
  161. #define STA_PS_APSD_TRIGGER BIT(3)
  162. #define STA_PS_APSD_EOSP BIT(4)
  163. /* HTC TX packet tagging definitions */
  164. #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
  165. #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
  166. #define AR6003_CUST_DATA_SIZE 16
  167. #define AGGR_WIN_IDX(x, y) ((x) % (y))
  168. #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
  169. #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
  170. #define ATH6KL_MAX_SEQ_NO 0xFFF
  171. #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
  172. #define NUM_OF_TIDS 8
  173. #define AGGR_SZ_DEFAULT 8
  174. #define AGGR_WIN_SZ_MIN 2
  175. #define AGGR_WIN_SZ_MAX 8
  176. #define TID_WINDOW_SZ(_x) ((_x) << 1)
  177. #define AGGR_NUM_OF_FREE_NETBUFS 16
  178. #define AGGR_RX_TIMEOUT 100 /* in ms */
  179. #define WMI_TIMEOUT (2 * HZ)
  180. #define MBOX_YIELD_LIMIT 99
  181. #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */
  182. #define ATH6KL_DEFAULT_BMISS_TIME 1500
  183. #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */
  184. #define ATH6KL_MAX_BMISS_TIME 5000
  185. /* configuration lags */
  186. /*
  187. * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
  188. * ERP IE of beacon to determine the short premable support when
  189. * sending (Re)Assoc req.
  190. * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
  191. * module state transition failure events which happen during
  192. * scan, to the host.
  193. */
  194. #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
  195. #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
  196. #define ATH6KL_CONF_ENABLE_11N BIT(2)
  197. #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
  198. #define ATH6KL_CONF_UART_DEBUG BIT(4)
  199. #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */
  200. enum wlan_low_pwr_state {
  201. WLAN_POWER_STATE_ON,
  202. WLAN_POWER_STATE_CUT_PWR,
  203. WLAN_POWER_STATE_DEEP_SLEEP,
  204. WLAN_POWER_STATE_WOW
  205. };
  206. enum sme_state {
  207. SME_DISCONNECTED,
  208. SME_CONNECTING,
  209. SME_CONNECTED
  210. };
  211. struct skb_hold_q {
  212. struct sk_buff *skb;
  213. bool is_amsdu;
  214. u16 seq_no;
  215. };
  216. struct rxtid {
  217. bool aggr;
  218. bool timer_mon;
  219. u16 win_sz;
  220. u16 seq_next;
  221. u32 hold_q_sz;
  222. struct skb_hold_q *hold_q;
  223. struct sk_buff_head q;
  224. /*
  225. * lock mainly protects seq_next and hold_q. Movement of seq_next
  226. * needs to be protected between aggr_timeout() and
  227. * aggr_process_recv_frm(). hold_q will be holding the pending
  228. * reorder frames and it's access should also be protected.
  229. * Some of the other fields like hold_q_sz, win_sz and aggr are
  230. * initialized/reset when receiving addba/delba req, also while
  231. * deleting aggr state all the pending buffers are flushed before
  232. * resetting these fields, so there should not be any race in accessing
  233. * these fields.
  234. */
  235. spinlock_t lock;
  236. };
  237. struct rxtid_stats {
  238. u32 num_into_aggr;
  239. u32 num_dups;
  240. u32 num_oow;
  241. u32 num_mpdu;
  242. u32 num_amsdu;
  243. u32 num_delivered;
  244. u32 num_timeouts;
  245. u32 num_hole;
  246. u32 num_bar;
  247. };
  248. struct aggr_info_conn {
  249. u8 aggr_sz;
  250. u8 timer_scheduled;
  251. struct timer_list timer;
  252. struct net_device *dev;
  253. struct rxtid rx_tid[NUM_OF_TIDS];
  254. struct rxtid_stats stat[NUM_OF_TIDS];
  255. struct aggr_info *aggr_info;
  256. };
  257. struct aggr_info {
  258. struct aggr_info_conn *aggr_conn;
  259. struct sk_buff_head rx_amsdu_freeq;
  260. };
  261. struct ath6kl_wep_key {
  262. u8 key_index;
  263. u8 key_len;
  264. u8 key[64];
  265. };
  266. #define ATH6KL_KEY_SEQ_LEN 8
  267. struct ath6kl_key {
  268. u8 key[WLAN_MAX_KEY_LEN];
  269. u8 key_len;
  270. u8 seq[ATH6KL_KEY_SEQ_LEN];
  271. u8 seq_len;
  272. u32 cipher;
  273. };
  274. struct ath6kl_node_mapping {
  275. u8 mac_addr[ETH_ALEN];
  276. u8 ep_id;
  277. u8 tx_pend;
  278. };
  279. struct ath6kl_cookie {
  280. struct sk_buff *skb;
  281. u32 map_no;
  282. struct htc_packet htc_pkt;
  283. struct ath6kl_cookie *arc_list_next;
  284. };
  285. struct ath6kl_mgmt_buff {
  286. struct list_head list;
  287. u32 freq;
  288. u32 wait;
  289. u32 id;
  290. bool no_cck;
  291. size_t len;
  292. u8 buf[0];
  293. };
  294. struct ath6kl_sta {
  295. u16 sta_flags;
  296. u8 mac[ETH_ALEN];
  297. u8 aid;
  298. u8 keymgmt;
  299. u8 ucipher;
  300. u8 auth;
  301. u8 wpa_ie[ATH6KL_MAX_IE];
  302. struct sk_buff_head psq;
  303. /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */
  304. spinlock_t psq_lock;
  305. struct list_head mgmt_psq;
  306. size_t mgmt_psq_len;
  307. u8 apsd_info;
  308. struct sk_buff_head apsdq;
  309. struct aggr_info_conn *aggr_conn;
  310. };
  311. struct ath6kl_version {
  312. u32 target_ver;
  313. u32 wlan_ver;
  314. u32 abi_ver;
  315. };
  316. struct ath6kl_bmi {
  317. u32 cmd_credits;
  318. bool done_sent;
  319. u8 *cmd_buf;
  320. u32 max_data_size;
  321. u32 max_cmd_size;
  322. };
  323. struct target_stats {
  324. u64 tx_pkt;
  325. u64 tx_byte;
  326. u64 tx_ucast_pkt;
  327. u64 tx_ucast_byte;
  328. u64 tx_mcast_pkt;
  329. u64 tx_mcast_byte;
  330. u64 tx_bcast_pkt;
  331. u64 tx_bcast_byte;
  332. u64 tx_rts_success_cnt;
  333. u64 tx_pkt_per_ac[4];
  334. u64 tx_err;
  335. u64 tx_fail_cnt;
  336. u64 tx_retry_cnt;
  337. u64 tx_mult_retry_cnt;
  338. u64 tx_rts_fail_cnt;
  339. u64 rx_pkt;
  340. u64 rx_byte;
  341. u64 rx_ucast_pkt;
  342. u64 rx_ucast_byte;
  343. u64 rx_mcast_pkt;
  344. u64 rx_mcast_byte;
  345. u64 rx_bcast_pkt;
  346. u64 rx_bcast_byte;
  347. u64 rx_frgment_pkt;
  348. u64 rx_err;
  349. u64 rx_crc_err;
  350. u64 rx_key_cache_miss;
  351. u64 rx_decrypt_err;
  352. u64 rx_dupl_frame;
  353. u64 tkip_local_mic_fail;
  354. u64 tkip_cnter_measures_invoked;
  355. u64 tkip_replays;
  356. u64 tkip_fmt_err;
  357. u64 ccmp_fmt_err;
  358. u64 ccmp_replays;
  359. u64 pwr_save_fail_cnt;
  360. u64 cs_bmiss_cnt;
  361. u64 cs_low_rssi_cnt;
  362. u64 cs_connect_cnt;
  363. u64 cs_discon_cnt;
  364. s32 tx_ucast_rate;
  365. s32 rx_ucast_rate;
  366. u32 lq_val;
  367. u32 wow_pkt_dropped;
  368. u16 wow_evt_discarded;
  369. s16 noise_floor_calib;
  370. s16 cs_rssi;
  371. s16 cs_ave_beacon_rssi;
  372. u8 cs_ave_beacon_snr;
  373. u8 cs_last_roam_msec;
  374. u8 cs_snr;
  375. u8 wow_host_pkt_wakeups;
  376. u8 wow_host_evt_wakeups;
  377. u32 arp_received;
  378. u32 arp_matched;
  379. u32 arp_replied;
  380. };
  381. struct ath6kl_mbox_info {
  382. u32 htc_addr;
  383. u32 htc_ext_addr;
  384. u32 htc_ext_sz;
  385. u32 block_size;
  386. u32 gmbox_addr;
  387. u32 gmbox_sz;
  388. };
  389. /*
  390. * 802.11i defines an extended IV for use with non-WEP ciphers.
  391. * When the EXTIV bit is set in the key id byte an additional
  392. * 4 bytes immediately follow the IV for TKIP. For CCMP the
  393. * EXTIV bit is likewise set but the 8 bytes represent the
  394. * CCMP header rather than IV+extended-IV.
  395. */
  396. #define ATH6KL_KEYBUF_SIZE 16
  397. #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
  398. #define ATH6KL_KEY_XMIT 0x01
  399. #define ATH6KL_KEY_RECV 0x02
  400. #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
  401. /* Initial group key for AP mode */
  402. struct ath6kl_req_key {
  403. bool valid;
  404. u8 key_index;
  405. int key_type;
  406. u8 key[WLAN_MAX_KEY_LEN];
  407. u8 key_len;
  408. };
  409. enum ath6kl_hif_type {
  410. ATH6KL_HIF_TYPE_SDIO,
  411. ATH6KL_HIF_TYPE_USB,
  412. };
  413. enum ath6kl_htc_type {
  414. ATH6KL_HTC_TYPE_MBOX,
  415. ATH6KL_HTC_TYPE_PIPE,
  416. };
  417. /* Max number of filters that hw supports */
  418. #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
  419. struct ath6kl_mc_filter {
  420. struct list_head list;
  421. char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
  422. };
  423. struct ath6kl_htcap {
  424. bool ht_enable;
  425. u8 ampdu_factor;
  426. unsigned short cap_info;
  427. };
  428. /*
  429. * Driver's maximum limit, note that some firmwares support only one vif
  430. * and the runtime (current) limit must be checked from ar->vif_max.
  431. */
  432. #define ATH6KL_VIF_MAX 3
  433. /* vif flags info */
  434. enum ath6kl_vif_state {
  435. CONNECTED,
  436. CONNECT_PEND,
  437. WMM_ENABLED,
  438. NETQ_STOPPED,
  439. DTIM_EXPIRED,
  440. NETDEV_REGISTERED,
  441. CLEAR_BSSFILTER_ON_BEACON,
  442. DTIM_PERIOD_AVAIL,
  443. WLAN_ENABLED,
  444. STATS_UPDATE_PEND,
  445. HOST_SLEEP_MODE_CMD_PROCESSED,
  446. NETDEV_MCAST_ALL_ON,
  447. NETDEV_MCAST_ALL_OFF,
  448. };
  449. struct ath6kl_vif {
  450. struct list_head list;
  451. struct wireless_dev wdev;
  452. struct net_device *ndev;
  453. struct ath6kl *ar;
  454. /* Lock to protect vif specific net_stats and flags */
  455. spinlock_t if_lock;
  456. u8 fw_vif_idx;
  457. unsigned long flags;
  458. int ssid_len;
  459. u8 ssid[IEEE80211_MAX_SSID_LEN];
  460. u8 dot11_auth_mode;
  461. u8 auth_mode;
  462. u8 prwise_crypto;
  463. u8 prwise_crypto_len;
  464. u8 grp_crypto;
  465. u8 grp_crypto_len;
  466. u8 def_txkey_index;
  467. u8 next_mode;
  468. u8 nw_type;
  469. u8 bssid[ETH_ALEN];
  470. u8 req_bssid[ETH_ALEN];
  471. u16 ch_hint;
  472. u16 bss_ch;
  473. struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
  474. struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
  475. struct aggr_info *aggr_cntxt;
  476. struct ath6kl_htcap htcap[IEEE80211_NUM_BANDS];
  477. struct timer_list disconnect_timer;
  478. struct timer_list sched_scan_timer;
  479. struct cfg80211_scan_request *scan_req;
  480. enum sme_state sme_state;
  481. int reconnect_flag;
  482. u32 last_roc_id;
  483. u32 last_cancel_roc_id;
  484. u32 send_action_id;
  485. bool probe_req_report;
  486. u16 assoc_bss_beacon_int;
  487. u16 listen_intvl_t;
  488. u16 bmiss_time_t;
  489. u16 bg_scan_period;
  490. u8 assoc_bss_dtim_period;
  491. struct net_device_stats net_stats;
  492. struct target_stats target_stats;
  493. struct wmi_connect_cmd profile;
  494. struct list_head mc_filter;
  495. };
  496. static inline struct ath6kl_vif *ath6kl_vif_from_wdev(struct wireless_dev *wdev)
  497. {
  498. return container_of(wdev, struct ath6kl_vif, wdev);
  499. }
  500. #define WOW_LIST_ID 0
  501. #define WOW_HOST_REQ_DELAY 500 /* ms */
  502. #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
  503. /* Flag info */
  504. enum ath6kl_dev_state {
  505. WMI_ENABLED,
  506. WMI_READY,
  507. WMI_CTRL_EP_FULL,
  508. TESTMODE,
  509. DESTROY_IN_PROGRESS,
  510. SKIP_SCAN,
  511. ROAM_TBL_PEND,
  512. FIRST_BOOT,
  513. };
  514. enum ath6kl_state {
  515. ATH6KL_STATE_OFF,
  516. ATH6KL_STATE_ON,
  517. ATH6KL_STATE_SUSPENDING,
  518. ATH6KL_STATE_RESUMING,
  519. ATH6KL_STATE_DEEPSLEEP,
  520. ATH6KL_STATE_CUTPOWER,
  521. ATH6KL_STATE_WOW,
  522. ATH6KL_STATE_SCHED_SCAN,
  523. };
  524. struct ath6kl {
  525. struct device *dev;
  526. struct wiphy *wiphy;
  527. enum ath6kl_state state;
  528. unsigned int testmode;
  529. struct ath6kl_bmi bmi;
  530. const struct ath6kl_hif_ops *hif_ops;
  531. const struct ath6kl_htc_ops *htc_ops;
  532. struct wmi *wmi;
  533. int tx_pending[ENDPOINT_MAX];
  534. int total_tx_data_pend;
  535. struct htc_target *htc_target;
  536. enum ath6kl_hif_type hif_type;
  537. void *hif_priv;
  538. struct list_head vif_list;
  539. /* Lock to avoid race in vif_list entries among add/del/traverse */
  540. spinlock_t list_lock;
  541. u8 num_vif;
  542. unsigned int vif_max;
  543. u8 max_norm_iface;
  544. u8 avail_idx_map;
  545. /*
  546. * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie()
  547. * calls, tx_pending and total_tx_data_pend.
  548. */
  549. spinlock_t lock;
  550. struct semaphore sem;
  551. u8 lrssi_roam_threshold;
  552. struct ath6kl_version version;
  553. u32 target_type;
  554. u8 tx_pwr;
  555. struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
  556. u8 ibss_ps_enable;
  557. bool ibss_if_active;
  558. u8 node_num;
  559. u8 next_ep_id;
  560. struct ath6kl_cookie *cookie_list;
  561. u32 cookie_count;
  562. enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
  563. bool ac_stream_active[WMM_NUM_AC];
  564. u8 ac_stream_pri_map[WMM_NUM_AC];
  565. u8 hiac_stream_active_pri;
  566. u8 ep2ac_map[ENDPOINT_MAX];
  567. enum htc_endpoint_id ctrl_ep;
  568. struct ath6kl_htc_credit_info credit_state_info;
  569. u32 connect_ctrl_flags;
  570. u32 user_key_ctrl;
  571. u8 usr_bss_filter;
  572. struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
  573. u8 sta_list_index;
  574. struct ath6kl_req_key ap_mode_bkey;
  575. struct sk_buff_head mcastpsq;
  576. u32 want_ch_switch;
  577. /*
  578. * FIXME: protects access to mcastpsq but is actually useless as
  579. * all skbe_queue_*() functions provide serialisation themselves
  580. */
  581. spinlock_t mcastpsq_lock;
  582. u8 intra_bss;
  583. struct wmi_ap_mode_stat ap_stats;
  584. u8 ap_country_code[3];
  585. struct list_head amsdu_rx_buffer_queue;
  586. u8 rx_meta_ver;
  587. enum wlan_low_pwr_state wlan_pwr_state;
  588. u8 mac_addr[ETH_ALEN];
  589. #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
  590. struct {
  591. void *rx_report;
  592. size_t rx_report_len;
  593. } tm;
  594. struct ath6kl_hw {
  595. u32 id;
  596. const char *name;
  597. u32 dataset_patch_addr;
  598. u32 app_load_addr;
  599. u32 app_start_override_addr;
  600. u32 board_ext_data_addr;
  601. u32 reserved_ram_size;
  602. u32 board_addr;
  603. u32 refclk_hz;
  604. u32 uarttx_pin;
  605. u32 testscript_addr;
  606. enum wmi_phy_cap cap;
  607. u32 flags;
  608. struct ath6kl_hw_fw {
  609. const char *dir;
  610. const char *otp;
  611. const char *fw;
  612. const char *tcmd;
  613. const char *patch;
  614. const char *utf;
  615. const char *testscript;
  616. } fw;
  617. const char *fw_board;
  618. const char *fw_default_board;
  619. } hw;
  620. u16 conf_flags;
  621. u16 suspend_mode;
  622. u16 wow_suspend_mode;
  623. wait_queue_head_t event_wq;
  624. struct ath6kl_mbox_info mbox_info;
  625. struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
  626. unsigned long flag;
  627. u8 *fw_board;
  628. size_t fw_board_len;
  629. u8 *fw_otp;
  630. size_t fw_otp_len;
  631. u8 *fw;
  632. size_t fw_len;
  633. u8 *fw_patch;
  634. size_t fw_patch_len;
  635. u8 *fw_testscript;
  636. size_t fw_testscript_len;
  637. unsigned int fw_api;
  638. unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
  639. struct workqueue_struct *ath6kl_wq;
  640. struct dentry *debugfs_phy;
  641. bool p2p;
  642. bool wiphy_registered;
  643. #ifdef CONFIG_ATH6KL_DEBUG
  644. struct {
  645. struct sk_buff_head fwlog_queue;
  646. struct completion fwlog_completion;
  647. bool fwlog_open;
  648. u32 fwlog_mask;
  649. unsigned int dbgfs_diag_reg;
  650. u32 diag_reg_addr_wr;
  651. u32 diag_reg_val_wr;
  652. struct {
  653. unsigned int invalid_rate;
  654. } war_stats;
  655. u8 *roam_tbl;
  656. unsigned int roam_tbl_len;
  657. u8 keepalive;
  658. u8 disc_timeout;
  659. } debug;
  660. #endif /* CONFIG_ATH6KL_DEBUG */
  661. };
  662. static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
  663. {
  664. return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
  665. }
  666. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  667. u32 item_offset)
  668. {
  669. u32 addr = 0;
  670. if (ar->target_type == TARGET_TYPE_AR6003)
  671. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  672. else if (ar->target_type == TARGET_TYPE_AR6004)
  673. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  674. return addr;
  675. }
  676. int ath6kl_configure_target(struct ath6kl *ar);
  677. void ath6kl_detect_error(unsigned long ptr);
  678. void disconnect_timer_handler(unsigned long ptr);
  679. void init_netdev(struct net_device *dev);
  680. void ath6kl_cookie_init(struct ath6kl *ar);
  681. void ath6kl_cookie_cleanup(struct ath6kl *ar);
  682. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
  683. void ath6kl_tx_complete(struct htc_target *context,
  684. struct list_head *packet_queue);
  685. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  686. struct htc_packet *packet);
  687. void ath6kl_stop_txrx(struct ath6kl *ar);
  688. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
  689. int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
  690. int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
  691. int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
  692. int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
  693. int ath6kl_read_fwlogs(struct ath6kl *ar);
  694. void ath6kl_init_profile_info(struct ath6kl_vif *vif);
  695. void ath6kl_tx_data_cleanup(struct ath6kl *ar);
  696. struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
  697. void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
  698. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
  699. struct aggr_info *aggr_init(struct ath6kl_vif *vif);
  700. void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
  701. struct aggr_info_conn *aggr_conn);
  702. void ath6kl_rx_refill(struct htc_target *target,
  703. enum htc_endpoint_id endpoint);
  704. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
  705. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  706. enum htc_endpoint_id endpoint,
  707. int len);
  708. void aggr_module_destroy(struct aggr_info *aggr_info);
  709. void aggr_reset_state(struct aggr_info_conn *aggr_conn);
  710. struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);
  711. struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
  712. void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,
  713. enum wmi_phy_cap cap);
  714. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  715. enum htc_endpoint_id eid);
  716. void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
  717. u8 *bssid, u16 listen_int,
  718. u16 beacon_int, enum network_type net_type,
  719. u8 beacon_ie_len, u8 assoc_req_len,
  720. u8 assoc_resp_len, u8 *assoc_info);
  721. void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
  722. void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
  723. u8 keymgmt, u8 ucipher, u8 auth,
  724. u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
  725. void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
  726. u8 *bssid, u8 assoc_resp_len,
  727. u8 *assoc_info, u16 prot_reason_status);
  728. void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
  729. void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
  730. void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
  731. void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
  732. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
  733. enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
  734. void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
  735. void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
  736. void ath6kl_disconnect(struct ath6kl_vif *vif);
  737. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
  738. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  739. u8 win_sz);
  740. void ath6kl_wakeup_event(void *dev);
  741. void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
  742. bool wait_fot_compltn, bool cold_reset);
  743. void ath6kl_init_control_info(struct ath6kl_vif *vif);
  744. struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
  745. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
  746. int ath6kl_init_hw_start(struct ath6kl *ar);
  747. int ath6kl_init_hw_stop(struct ath6kl *ar);
  748. int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
  749. int ath6kl_init_hw_params(struct ath6kl *ar);
  750. void ath6kl_check_wow_status(struct ath6kl *ar);
  751. void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb);
  752. void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);
  753. struct ath6kl *ath6kl_core_create(struct device *dev);
  754. int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type);
  755. void ath6kl_core_cleanup(struct ath6kl *ar);
  756. void ath6kl_core_destroy(struct ath6kl *ar);
  757. #endif /* CORE_H */