rrunner.c 41 KB

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  1. /*
  2. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  3. *
  4. * Copyright (C) 1998-2002 by Jes Sorensen, <jes@wildopensource.com>.
  5. *
  6. * Thanks to Essential Communication for providing us with hardware
  7. * and very comprehensive documentation without which I would not have
  8. * been able to write this driver. A special thank you to John Gibbon
  9. * for sorting out the legal issues, with the NDA, allowing the code to
  10. * be released under the GPL.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  18. * stupid bugs in my code.
  19. *
  20. * Softnet support and various other patches from Val Henson of
  21. * ODS/Essential.
  22. *
  23. * PCI DMA mapping code partly based on work by Francois Romieu.
  24. */
  25. #define DEBUG 1
  26. #define RX_DMA_SKBUFF 1
  27. #define PKT_COPY_THRESHOLD 512
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/errno.h>
  31. #include <linux/ioport.h>
  32. #include <linux/pci.h>
  33. #include <linux/kernel.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/hippidevice.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/mm.h>
  40. #include <linux/slab.h>
  41. #include <net/sock.h>
  42. #include <asm/cache.h>
  43. #include <asm/byteorder.h>
  44. #include <asm/io.h>
  45. #include <asm/irq.h>
  46. #include <asm/uaccess.h>
  47. #define rr_if_busy(dev) netif_queue_stopped(dev)
  48. #define rr_if_running(dev) netif_running(dev)
  49. #include "rrunner.h"
  50. #define RUN_AT(x) (jiffies + (x))
  51. MODULE_AUTHOR("Jes Sorensen <jes@wildopensource.com>");
  52. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  53. MODULE_LICENSE("GPL");
  54. static char version[] __devinitdata = "rrunner.c: v0.50 11/11/2002 Jes Sorensen (jes@wildopensource.com)\n";
  55. static const struct net_device_ops rr_netdev_ops = {
  56. .ndo_open = rr_open,
  57. .ndo_stop = rr_close,
  58. .ndo_do_ioctl = rr_ioctl,
  59. .ndo_start_xmit = rr_start_xmit,
  60. .ndo_change_mtu = hippi_change_mtu,
  61. .ndo_set_mac_address = hippi_mac_addr,
  62. };
  63. /*
  64. * Implementation notes:
  65. *
  66. * The DMA engine only allows for DMA within physical 64KB chunks of
  67. * memory. The current approach of the driver (and stack) is to use
  68. * linear blocks of memory for the skbuffs. However, as the data block
  69. * is always the first part of the skb and skbs are 2^n aligned so we
  70. * are guarantted to get the whole block within one 64KB align 64KB
  71. * chunk.
  72. *
  73. * On the long term, relying on being able to allocate 64KB linear
  74. * chunks of memory is not feasible and the skb handling code and the
  75. * stack will need to know about I/O vectors or something similar.
  76. */
  77. static int __devinit rr_init_one(struct pci_dev *pdev,
  78. const struct pci_device_id *ent)
  79. {
  80. struct net_device *dev;
  81. static int version_disp;
  82. u8 pci_latency;
  83. struct rr_private *rrpriv;
  84. void *tmpptr;
  85. dma_addr_t ring_dma;
  86. int ret = -ENOMEM;
  87. dev = alloc_hippi_dev(sizeof(struct rr_private));
  88. if (!dev)
  89. goto out3;
  90. ret = pci_enable_device(pdev);
  91. if (ret) {
  92. ret = -ENODEV;
  93. goto out2;
  94. }
  95. rrpriv = netdev_priv(dev);
  96. SET_NETDEV_DEV(dev, &pdev->dev);
  97. ret = pci_request_regions(pdev, "rrunner");
  98. if (ret < 0)
  99. goto out;
  100. pci_set_drvdata(pdev, dev);
  101. rrpriv->pci_dev = pdev;
  102. spin_lock_init(&rrpriv->lock);
  103. dev->netdev_ops = &rr_netdev_ops;
  104. /* display version info if adapter is found */
  105. if (!version_disp) {
  106. /* set display flag to TRUE so that */
  107. /* we only display this string ONCE */
  108. version_disp = 1;
  109. printk(version);
  110. }
  111. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  112. if (pci_latency <= 0x58){
  113. pci_latency = 0x58;
  114. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  115. }
  116. pci_set_master(pdev);
  117. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  118. "at 0x%llx, irq %i, PCI latency %i\n", dev->name,
  119. (unsigned long long)pci_resource_start(pdev, 0),
  120. pdev->irq, pci_latency);
  121. /*
  122. * Remap the MMIO regs into kernel space.
  123. */
  124. rrpriv->regs = pci_iomap(pdev, 0, 0x1000);
  125. if (!rrpriv->regs) {
  126. printk(KERN_ERR "%s: Unable to map I/O register, "
  127. "RoadRunner will be disabled.\n", dev->name);
  128. ret = -EIO;
  129. goto out;
  130. }
  131. tmpptr = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
  132. rrpriv->tx_ring = tmpptr;
  133. rrpriv->tx_ring_dma = ring_dma;
  134. if (!tmpptr) {
  135. ret = -ENOMEM;
  136. goto out;
  137. }
  138. tmpptr = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
  139. rrpriv->rx_ring = tmpptr;
  140. rrpriv->rx_ring_dma = ring_dma;
  141. if (!tmpptr) {
  142. ret = -ENOMEM;
  143. goto out;
  144. }
  145. tmpptr = pci_alloc_consistent(pdev, EVT_RING_SIZE, &ring_dma);
  146. rrpriv->evt_ring = tmpptr;
  147. rrpriv->evt_ring_dma = ring_dma;
  148. if (!tmpptr) {
  149. ret = -ENOMEM;
  150. goto out;
  151. }
  152. /*
  153. * Don't access any register before this point!
  154. */
  155. #ifdef __BIG_ENDIAN
  156. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  157. &rrpriv->regs->HostCtrl);
  158. #endif
  159. /*
  160. * Need to add a case for little-endian 64-bit hosts here.
  161. */
  162. rr_init(dev);
  163. ret = register_netdev(dev);
  164. if (ret)
  165. goto out;
  166. return 0;
  167. out:
  168. if (rrpriv->rx_ring)
  169. pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  170. rrpriv->rx_ring_dma);
  171. if (rrpriv->tx_ring)
  172. pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  173. rrpriv->tx_ring_dma);
  174. if (rrpriv->regs)
  175. pci_iounmap(pdev, rrpriv->regs);
  176. if (pdev) {
  177. pci_release_regions(pdev);
  178. pci_set_drvdata(pdev, NULL);
  179. }
  180. out2:
  181. free_netdev(dev);
  182. out3:
  183. return ret;
  184. }
  185. static void __devexit rr_remove_one (struct pci_dev *pdev)
  186. {
  187. struct net_device *dev = pci_get_drvdata(pdev);
  188. struct rr_private *rr = netdev_priv(dev);
  189. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)) {
  190. printk(KERN_ERR "%s: trying to unload running NIC\n",
  191. dev->name);
  192. writel(HALT_NIC, &rr->regs->HostCtrl);
  193. }
  194. unregister_netdev(dev);
  195. pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
  196. rr->evt_ring_dma);
  197. pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
  198. rr->rx_ring_dma);
  199. pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
  200. rr->tx_ring_dma);
  201. pci_iounmap(pdev, rr->regs);
  202. pci_release_regions(pdev);
  203. pci_disable_device(pdev);
  204. pci_set_drvdata(pdev, NULL);
  205. free_netdev(dev);
  206. }
  207. /*
  208. * Commands are considered to be slow, thus there is no reason to
  209. * inline this.
  210. */
  211. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  212. {
  213. struct rr_regs __iomem *regs;
  214. u32 idx;
  215. regs = rrpriv->regs;
  216. /*
  217. * This is temporary - it will go away in the final version.
  218. * We probably also want to make this function inline.
  219. */
  220. if (readl(&regs->HostCtrl) & NIC_HALTED){
  221. printk("issuing command for halted NIC, code 0x%x, "
  222. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  223. if (readl(&regs->Mode) & FATAL_ERR)
  224. printk("error codes Fail1 %02x, Fail2 %02x\n",
  225. readl(&regs->Fail1), readl(&regs->Fail2));
  226. }
  227. idx = rrpriv->info->cmd_ctrl.pi;
  228. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  229. wmb();
  230. idx = (idx - 1) % CMD_RING_ENTRIES;
  231. rrpriv->info->cmd_ctrl.pi = idx;
  232. wmb();
  233. if (readl(&regs->Mode) & FATAL_ERR)
  234. printk("error code %02x\n", readl(&regs->Fail1));
  235. }
  236. /*
  237. * Reset the board in a sensible manner. The NIC is already halted
  238. * when we get here and a spin-lock is held.
  239. */
  240. static int rr_reset(struct net_device *dev)
  241. {
  242. struct rr_private *rrpriv;
  243. struct rr_regs __iomem *regs;
  244. u32 start_pc;
  245. int i;
  246. rrpriv = netdev_priv(dev);
  247. regs = rrpriv->regs;
  248. rr_load_firmware(dev);
  249. writel(0x01000000, &regs->TX_state);
  250. writel(0xff800000, &regs->RX_state);
  251. writel(0, &regs->AssistState);
  252. writel(CLEAR_INTA, &regs->LocalCtrl);
  253. writel(0x01, &regs->BrkPt);
  254. writel(0, &regs->Timer);
  255. writel(0, &regs->TimerRef);
  256. writel(RESET_DMA, &regs->DmaReadState);
  257. writel(RESET_DMA, &regs->DmaWriteState);
  258. writel(0, &regs->DmaWriteHostHi);
  259. writel(0, &regs->DmaWriteHostLo);
  260. writel(0, &regs->DmaReadHostHi);
  261. writel(0, &regs->DmaReadHostLo);
  262. writel(0, &regs->DmaReadLen);
  263. writel(0, &regs->DmaWriteLen);
  264. writel(0, &regs->DmaWriteLcl);
  265. writel(0, &regs->DmaWriteIPchecksum);
  266. writel(0, &regs->DmaReadLcl);
  267. writel(0, &regs->DmaReadIPchecksum);
  268. writel(0, &regs->PciState);
  269. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  270. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  271. #elif (BITS_PER_LONG == 64)
  272. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  273. #else
  274. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  275. #endif
  276. #if 0
  277. /*
  278. * Don't worry, this is just black magic.
  279. */
  280. writel(0xdf000, &regs->RxBase);
  281. writel(0xdf000, &regs->RxPrd);
  282. writel(0xdf000, &regs->RxCon);
  283. writel(0xce000, &regs->TxBase);
  284. writel(0xce000, &regs->TxPrd);
  285. writel(0xce000, &regs->TxCon);
  286. writel(0, &regs->RxIndPro);
  287. writel(0, &regs->RxIndCon);
  288. writel(0, &regs->RxIndRef);
  289. writel(0, &regs->TxIndPro);
  290. writel(0, &regs->TxIndCon);
  291. writel(0, &regs->TxIndRef);
  292. writel(0xcc000, &regs->pad10[0]);
  293. writel(0, &regs->DrCmndPro);
  294. writel(0, &regs->DrCmndCon);
  295. writel(0, &regs->DwCmndPro);
  296. writel(0, &regs->DwCmndCon);
  297. writel(0, &regs->DwCmndRef);
  298. writel(0, &regs->DrDataPro);
  299. writel(0, &regs->DrDataCon);
  300. writel(0, &regs->DrDataRef);
  301. writel(0, &regs->DwDataPro);
  302. writel(0, &regs->DwDataCon);
  303. writel(0, &regs->DwDataRef);
  304. #endif
  305. writel(0xffffffff, &regs->MbEvent);
  306. writel(0, &regs->Event);
  307. writel(0, &regs->TxPi);
  308. writel(0, &regs->IpRxPi);
  309. writel(0, &regs->EvtCon);
  310. writel(0, &regs->EvtPrd);
  311. rrpriv->info->evt_ctrl.pi = 0;
  312. for (i = 0; i < CMD_RING_ENTRIES; i++)
  313. writel(0, &regs->CmdRing[i]);
  314. /*
  315. * Why 32 ? is this not cache line size dependent?
  316. */
  317. writel(RBURST_64|WBURST_64, &regs->PciState);
  318. wmb();
  319. start_pc = rr_read_eeprom_word(rrpriv,
  320. offsetof(struct eeprom, rncd_info.FwStart));
  321. #if (DEBUG > 1)
  322. printk("%s: Executing firmware at address 0x%06x\n",
  323. dev->name, start_pc);
  324. #endif
  325. writel(start_pc + 0x800, &regs->Pc);
  326. wmb();
  327. udelay(5);
  328. writel(start_pc, &regs->Pc);
  329. wmb();
  330. return 0;
  331. }
  332. /*
  333. * Read a string from the EEPROM.
  334. */
  335. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  336. unsigned long offset,
  337. unsigned char *buf,
  338. unsigned long length)
  339. {
  340. struct rr_regs __iomem *regs = rrpriv->regs;
  341. u32 misc, io, host, i;
  342. io = readl(&regs->ExtIo);
  343. writel(0, &regs->ExtIo);
  344. misc = readl(&regs->LocalCtrl);
  345. writel(0, &regs->LocalCtrl);
  346. host = readl(&regs->HostCtrl);
  347. writel(host | HALT_NIC, &regs->HostCtrl);
  348. mb();
  349. for (i = 0; i < length; i++){
  350. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  351. mb();
  352. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  353. mb();
  354. }
  355. writel(host, &regs->HostCtrl);
  356. writel(misc, &regs->LocalCtrl);
  357. writel(io, &regs->ExtIo);
  358. mb();
  359. return i;
  360. }
  361. /*
  362. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  363. * it to our CPU byte-order.
  364. */
  365. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  366. size_t offset)
  367. {
  368. __be32 word;
  369. if ((rr_read_eeprom(rrpriv, offset,
  370. (unsigned char *)&word, 4) == 4))
  371. return be32_to_cpu(word);
  372. return 0;
  373. }
  374. /*
  375. * Write a string to the EEPROM.
  376. *
  377. * This is only called when the firmware is not running.
  378. */
  379. static unsigned int write_eeprom(struct rr_private *rrpriv,
  380. unsigned long offset,
  381. unsigned char *buf,
  382. unsigned long length)
  383. {
  384. struct rr_regs __iomem *regs = rrpriv->regs;
  385. u32 misc, io, data, i, j, ready, error = 0;
  386. io = readl(&regs->ExtIo);
  387. writel(0, &regs->ExtIo);
  388. misc = readl(&regs->LocalCtrl);
  389. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  390. mb();
  391. for (i = 0; i < length; i++){
  392. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  393. mb();
  394. data = buf[i] << 24;
  395. /*
  396. * Only try to write the data if it is not the same
  397. * value already.
  398. */
  399. if ((readl(&regs->WinData) & 0xff000000) != data){
  400. writel(data, &regs->WinData);
  401. ready = 0;
  402. j = 0;
  403. mb();
  404. while(!ready){
  405. udelay(20);
  406. if ((readl(&regs->WinData) & 0xff000000) ==
  407. data)
  408. ready = 1;
  409. mb();
  410. if (j++ > 5000){
  411. printk("data mismatch: %08x, "
  412. "WinData %08x\n", data,
  413. readl(&regs->WinData));
  414. ready = 1;
  415. error = 1;
  416. }
  417. }
  418. }
  419. }
  420. writel(misc, &regs->LocalCtrl);
  421. writel(io, &regs->ExtIo);
  422. mb();
  423. return error;
  424. }
  425. static int __devinit rr_init(struct net_device *dev)
  426. {
  427. struct rr_private *rrpriv;
  428. struct rr_regs __iomem *regs;
  429. u32 sram_size, rev;
  430. rrpriv = netdev_priv(dev);
  431. regs = rrpriv->regs;
  432. rev = readl(&regs->FwRev);
  433. rrpriv->fw_rev = rev;
  434. if (rev > 0x00020024)
  435. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  436. ((rev >> 8) & 0xff), (rev & 0xff));
  437. else if (rev >= 0x00020000) {
  438. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  439. "later is recommended)\n", (rev >> 16),
  440. ((rev >> 8) & 0xff), (rev & 0xff));
  441. }else{
  442. printk(" Firmware revision too old: %i.%i.%i, please "
  443. "upgrade to 2.0.37 or later.\n",
  444. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  445. }
  446. #if (DEBUG > 2)
  447. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  448. #endif
  449. /*
  450. * Read the hardware address from the eeprom. The HW address
  451. * is not really necessary for HIPPI but awfully convenient.
  452. * The pointer arithmetic to put it in dev_addr is ugly, but
  453. * Donald Becker does it this way for the GigE version of this
  454. * card and it's shorter and more portable than any
  455. * other method I've seen. -VAL
  456. */
  457. *(__be16 *)(dev->dev_addr) =
  458. htons(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA)));
  459. *(__be32 *)(dev->dev_addr+2) =
  460. htonl(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA[4])));
  461. printk(" MAC: %pM\n", dev->dev_addr);
  462. sram_size = rr_read_eeprom_word(rrpriv, 8);
  463. printk(" SRAM size 0x%06x\n", sram_size);
  464. return 0;
  465. }
  466. static int rr_init1(struct net_device *dev)
  467. {
  468. struct rr_private *rrpriv;
  469. struct rr_regs __iomem *regs;
  470. unsigned long myjif, flags;
  471. struct cmd cmd;
  472. u32 hostctrl;
  473. int ecode = 0;
  474. short i;
  475. rrpriv = netdev_priv(dev);
  476. regs = rrpriv->regs;
  477. spin_lock_irqsave(&rrpriv->lock, flags);
  478. hostctrl = readl(&regs->HostCtrl);
  479. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  480. wmb();
  481. if (hostctrl & PARITY_ERR){
  482. printk("%s: Parity error halting NIC - this is serious!\n",
  483. dev->name);
  484. spin_unlock_irqrestore(&rrpriv->lock, flags);
  485. ecode = -EFAULT;
  486. goto error;
  487. }
  488. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  489. set_infoaddr(regs, rrpriv->info_dma);
  490. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  491. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  492. rrpriv->info->evt_ctrl.mode = 0;
  493. rrpriv->info->evt_ctrl.pi = 0;
  494. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  495. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  496. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  497. rrpriv->info->cmd_ctrl.mode = 0;
  498. rrpriv->info->cmd_ctrl.pi = 15;
  499. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  500. writel(0, &regs->CmdRing[i]);
  501. }
  502. for (i = 0; i < TX_RING_ENTRIES; i++) {
  503. rrpriv->tx_ring[i].size = 0;
  504. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  505. rrpriv->tx_skbuff[i] = NULL;
  506. }
  507. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  508. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  509. rrpriv->info->tx_ctrl.mode = 0;
  510. rrpriv->info->tx_ctrl.pi = 0;
  511. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  512. /*
  513. * Set dirty_tx before we start receiving interrupts, otherwise
  514. * the interrupt handler might think it is supposed to process
  515. * tx ints before we are up and running, which may cause a null
  516. * pointer access in the int handler.
  517. */
  518. rrpriv->tx_full = 0;
  519. rrpriv->cur_rx = 0;
  520. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  521. rr_reset(dev);
  522. /* Tuning values */
  523. writel(0x5000, &regs->ConRetry);
  524. writel(0x100, &regs->ConRetryTmr);
  525. writel(0x500000, &regs->ConTmout);
  526. writel(0x60, &regs->IntrTmr);
  527. writel(0x500000, &regs->TxDataMvTimeout);
  528. writel(0x200000, &regs->RxDataMvTimeout);
  529. writel(0x80, &regs->WriteDmaThresh);
  530. writel(0x80, &regs->ReadDmaThresh);
  531. rrpriv->fw_running = 0;
  532. wmb();
  533. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  534. writel(hostctrl, &regs->HostCtrl);
  535. wmb();
  536. spin_unlock_irqrestore(&rrpriv->lock, flags);
  537. for (i = 0; i < RX_RING_ENTRIES; i++) {
  538. struct sk_buff *skb;
  539. dma_addr_t addr;
  540. rrpriv->rx_ring[i].mode = 0;
  541. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  542. if (!skb) {
  543. printk(KERN_WARNING "%s: Unable to allocate memory "
  544. "for receive ring - halting NIC\n", dev->name);
  545. ecode = -ENOMEM;
  546. goto error;
  547. }
  548. rrpriv->rx_skbuff[i] = skb;
  549. addr = pci_map_single(rrpriv->pci_dev, skb->data,
  550. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  551. /*
  552. * Sanity test to see if we conflict with the DMA
  553. * limitations of the Roadrunner.
  554. */
  555. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  556. printk("skb alloc error\n");
  557. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  558. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  559. }
  560. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  561. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  562. rrpriv->rx_ctrl[4].mode = 8;
  563. rrpriv->rx_ctrl[4].pi = 0;
  564. wmb();
  565. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  566. udelay(1000);
  567. /*
  568. * Now start the FirmWare.
  569. */
  570. cmd.code = C_START_FW;
  571. cmd.ring = 0;
  572. cmd.index = 0;
  573. rr_issue_cmd(rrpriv, &cmd);
  574. /*
  575. * Give the FirmWare time to chew on the `get running' command.
  576. */
  577. myjif = jiffies + 5 * HZ;
  578. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  579. cpu_relax();
  580. netif_start_queue(dev);
  581. return ecode;
  582. error:
  583. /*
  584. * We might have gotten here because we are out of memory,
  585. * make sure we release everything we allocated before failing
  586. */
  587. for (i = 0; i < RX_RING_ENTRIES; i++) {
  588. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  589. if (skb) {
  590. pci_unmap_single(rrpriv->pci_dev,
  591. rrpriv->rx_ring[i].addr.addrlo,
  592. dev->mtu + HIPPI_HLEN,
  593. PCI_DMA_FROMDEVICE);
  594. rrpriv->rx_ring[i].size = 0;
  595. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  596. dev_kfree_skb(skb);
  597. rrpriv->rx_skbuff[i] = NULL;
  598. }
  599. }
  600. return ecode;
  601. }
  602. /*
  603. * All events are considered to be slow (RX/TX ints do not generate
  604. * events) and are handled here, outside the main interrupt handler,
  605. * to reduce the size of the handler.
  606. */
  607. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  608. {
  609. struct rr_private *rrpriv;
  610. struct rr_regs __iomem *regs;
  611. u32 tmp;
  612. rrpriv = netdev_priv(dev);
  613. regs = rrpriv->regs;
  614. while (prodidx != eidx){
  615. switch (rrpriv->evt_ring[eidx].code){
  616. case E_NIC_UP:
  617. tmp = readl(&regs->FwRev);
  618. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  619. "up and running\n", dev->name,
  620. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  621. rrpriv->fw_running = 1;
  622. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  623. wmb();
  624. break;
  625. case E_LINK_ON:
  626. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  627. break;
  628. case E_LINK_OFF:
  629. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  630. break;
  631. case E_RX_IDLE:
  632. printk(KERN_WARNING "%s: RX data not moving\n",
  633. dev->name);
  634. goto drop;
  635. case E_WATCHDOG:
  636. printk(KERN_INFO "%s: The watchdog is here to see "
  637. "us\n", dev->name);
  638. break;
  639. case E_INTERN_ERR:
  640. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  641. dev->name);
  642. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  643. &regs->HostCtrl);
  644. wmb();
  645. break;
  646. case E_HOST_ERR:
  647. printk(KERN_ERR "%s: Host software error\n",
  648. dev->name);
  649. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  650. &regs->HostCtrl);
  651. wmb();
  652. break;
  653. /*
  654. * TX events.
  655. */
  656. case E_CON_REJ:
  657. printk(KERN_WARNING "%s: Connection rejected\n",
  658. dev->name);
  659. dev->stats.tx_aborted_errors++;
  660. break;
  661. case E_CON_TMOUT:
  662. printk(KERN_WARNING "%s: Connection timeout\n",
  663. dev->name);
  664. break;
  665. case E_DISC_ERR:
  666. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  667. dev->name);
  668. dev->stats.tx_aborted_errors++;
  669. break;
  670. case E_INT_PRTY:
  671. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  672. dev->name);
  673. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  674. &regs->HostCtrl);
  675. wmb();
  676. break;
  677. case E_TX_IDLE:
  678. printk(KERN_WARNING "%s: Transmitter idle\n",
  679. dev->name);
  680. break;
  681. case E_TX_LINK_DROP:
  682. printk(KERN_WARNING "%s: Link lost during transmit\n",
  683. dev->name);
  684. dev->stats.tx_aborted_errors++;
  685. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  686. &regs->HostCtrl);
  687. wmb();
  688. break;
  689. case E_TX_INV_RNG:
  690. printk(KERN_ERR "%s: Invalid send ring block\n",
  691. dev->name);
  692. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  693. &regs->HostCtrl);
  694. wmb();
  695. break;
  696. case E_TX_INV_BUF:
  697. printk(KERN_ERR "%s: Invalid send buffer address\n",
  698. dev->name);
  699. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  700. &regs->HostCtrl);
  701. wmb();
  702. break;
  703. case E_TX_INV_DSC:
  704. printk(KERN_ERR "%s: Invalid descriptor address\n",
  705. dev->name);
  706. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  707. &regs->HostCtrl);
  708. wmb();
  709. break;
  710. /*
  711. * RX events.
  712. */
  713. case E_RX_RNG_OUT:
  714. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  715. break;
  716. case E_RX_PAR_ERR:
  717. printk(KERN_WARNING "%s: Receive parity error\n",
  718. dev->name);
  719. goto drop;
  720. case E_RX_LLRC_ERR:
  721. printk(KERN_WARNING "%s: Receive LLRC error\n",
  722. dev->name);
  723. goto drop;
  724. case E_PKT_LN_ERR:
  725. printk(KERN_WARNING "%s: Receive packet length "
  726. "error\n", dev->name);
  727. goto drop;
  728. case E_DTA_CKSM_ERR:
  729. printk(KERN_WARNING "%s: Data checksum error\n",
  730. dev->name);
  731. goto drop;
  732. case E_SHT_BST:
  733. printk(KERN_WARNING "%s: Unexpected short burst "
  734. "error\n", dev->name);
  735. goto drop;
  736. case E_STATE_ERR:
  737. printk(KERN_WARNING "%s: Recv. state transition"
  738. " error\n", dev->name);
  739. goto drop;
  740. case E_UNEXP_DATA:
  741. printk(KERN_WARNING "%s: Unexpected data error\n",
  742. dev->name);
  743. goto drop;
  744. case E_LST_LNK_ERR:
  745. printk(KERN_WARNING "%s: Link lost error\n",
  746. dev->name);
  747. goto drop;
  748. case E_FRM_ERR:
  749. printk(KERN_WARNING "%s: Framming Error\n",
  750. dev->name);
  751. goto drop;
  752. case E_FLG_SYN_ERR:
  753. printk(KERN_WARNING "%s: Flag sync. lost during "
  754. "packet\n", dev->name);
  755. goto drop;
  756. case E_RX_INV_BUF:
  757. printk(KERN_ERR "%s: Invalid receive buffer "
  758. "address\n", dev->name);
  759. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  760. &regs->HostCtrl);
  761. wmb();
  762. break;
  763. case E_RX_INV_DSC:
  764. printk(KERN_ERR "%s: Invalid receive descriptor "
  765. "address\n", dev->name);
  766. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  767. &regs->HostCtrl);
  768. wmb();
  769. break;
  770. case E_RNG_BLK:
  771. printk(KERN_ERR "%s: Invalid ring block\n",
  772. dev->name);
  773. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  774. &regs->HostCtrl);
  775. wmb();
  776. break;
  777. drop:
  778. /* Label packet to be dropped.
  779. * Actual dropping occurs in rx
  780. * handling.
  781. *
  782. * The index of packet we get to drop is
  783. * the index of the packet following
  784. * the bad packet. -kbf
  785. */
  786. {
  787. u16 index = rrpriv->evt_ring[eidx].index;
  788. index = (index + (RX_RING_ENTRIES - 1)) %
  789. RX_RING_ENTRIES;
  790. rrpriv->rx_ring[index].mode |=
  791. (PACKET_BAD | PACKET_END);
  792. }
  793. break;
  794. default:
  795. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  796. dev->name, rrpriv->evt_ring[eidx].code);
  797. }
  798. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  799. }
  800. rrpriv->info->evt_ctrl.pi = eidx;
  801. wmb();
  802. return eidx;
  803. }
  804. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  805. {
  806. struct rr_private *rrpriv = netdev_priv(dev);
  807. struct rr_regs __iomem *regs = rrpriv->regs;
  808. do {
  809. struct rx_desc *desc;
  810. u32 pkt_len;
  811. desc = &(rrpriv->rx_ring[index]);
  812. pkt_len = desc->size;
  813. #if (DEBUG > 2)
  814. printk("index %i, rxlimit %i\n", index, rxlimit);
  815. printk("len %x, mode %x\n", pkt_len, desc->mode);
  816. #endif
  817. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  818. dev->stats.rx_dropped++;
  819. goto defer;
  820. }
  821. if (pkt_len > 0){
  822. struct sk_buff *skb, *rx_skb;
  823. rx_skb = rrpriv->rx_skbuff[index];
  824. if (pkt_len < PKT_COPY_THRESHOLD) {
  825. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  826. if (skb == NULL){
  827. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  828. dev->stats.rx_dropped++;
  829. goto defer;
  830. } else {
  831. pci_dma_sync_single_for_cpu(rrpriv->pci_dev,
  832. desc->addr.addrlo,
  833. pkt_len,
  834. PCI_DMA_FROMDEVICE);
  835. memcpy(skb_put(skb, pkt_len),
  836. rx_skb->data, pkt_len);
  837. pci_dma_sync_single_for_device(rrpriv->pci_dev,
  838. desc->addr.addrlo,
  839. pkt_len,
  840. PCI_DMA_FROMDEVICE);
  841. }
  842. }else{
  843. struct sk_buff *newskb;
  844. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  845. GFP_ATOMIC);
  846. if (newskb){
  847. dma_addr_t addr;
  848. pci_unmap_single(rrpriv->pci_dev,
  849. desc->addr.addrlo, dev->mtu +
  850. HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  851. skb = rx_skb;
  852. skb_put(skb, pkt_len);
  853. rrpriv->rx_skbuff[index] = newskb;
  854. addr = pci_map_single(rrpriv->pci_dev,
  855. newskb->data,
  856. dev->mtu + HIPPI_HLEN,
  857. PCI_DMA_FROMDEVICE);
  858. set_rraddr(&desc->addr, addr);
  859. } else {
  860. printk("%s: Out of memory, deferring "
  861. "packet\n", dev->name);
  862. dev->stats.rx_dropped++;
  863. goto defer;
  864. }
  865. }
  866. skb->protocol = hippi_type_trans(skb, dev);
  867. netif_rx(skb); /* send it up */
  868. dev->stats.rx_packets++;
  869. dev->stats.rx_bytes += pkt_len;
  870. }
  871. defer:
  872. desc->mode = 0;
  873. desc->size = dev->mtu + HIPPI_HLEN;
  874. if ((index & 7) == 7)
  875. writel(index, &regs->IpRxPi);
  876. index = (index + 1) % RX_RING_ENTRIES;
  877. } while(index != rxlimit);
  878. rrpriv->cur_rx = index;
  879. wmb();
  880. }
  881. static irqreturn_t rr_interrupt(int irq, void *dev_id)
  882. {
  883. struct rr_private *rrpriv;
  884. struct rr_regs __iomem *regs;
  885. struct net_device *dev = (struct net_device *)dev_id;
  886. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  887. rrpriv = netdev_priv(dev);
  888. regs = rrpriv->regs;
  889. if (!(readl(&regs->HostCtrl) & RR_INT))
  890. return IRQ_NONE;
  891. spin_lock(&rrpriv->lock);
  892. prodidx = readl(&regs->EvtPrd);
  893. txcsmr = (prodidx >> 8) & 0xff;
  894. rxlimit = (prodidx >> 16) & 0xff;
  895. prodidx &= 0xff;
  896. #if (DEBUG > 2)
  897. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  898. prodidx, rrpriv->info->evt_ctrl.pi);
  899. #endif
  900. /*
  901. * Order here is important. We must handle events
  902. * before doing anything else in order to catch
  903. * such things as LLRC errors, etc -kbf
  904. */
  905. eidx = rrpriv->info->evt_ctrl.pi;
  906. if (prodidx != eidx)
  907. eidx = rr_handle_event(dev, prodidx, eidx);
  908. rxindex = rrpriv->cur_rx;
  909. if (rxindex != rxlimit)
  910. rx_int(dev, rxlimit, rxindex);
  911. txcon = rrpriv->dirty_tx;
  912. if (txcsmr != txcon) {
  913. do {
  914. /* Due to occational firmware TX producer/consumer out
  915. * of sync. error need to check entry in ring -kbf
  916. */
  917. if(rrpriv->tx_skbuff[txcon]){
  918. struct tx_desc *desc;
  919. struct sk_buff *skb;
  920. desc = &(rrpriv->tx_ring[txcon]);
  921. skb = rrpriv->tx_skbuff[txcon];
  922. dev->stats.tx_packets++;
  923. dev->stats.tx_bytes += skb->len;
  924. pci_unmap_single(rrpriv->pci_dev,
  925. desc->addr.addrlo, skb->len,
  926. PCI_DMA_TODEVICE);
  927. dev_kfree_skb_irq(skb);
  928. rrpriv->tx_skbuff[txcon] = NULL;
  929. desc->size = 0;
  930. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  931. desc->mode = 0;
  932. }
  933. txcon = (txcon + 1) % TX_RING_ENTRIES;
  934. } while (txcsmr != txcon);
  935. wmb();
  936. rrpriv->dirty_tx = txcon;
  937. if (rrpriv->tx_full && rr_if_busy(dev) &&
  938. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  939. != rrpriv->dirty_tx)){
  940. rrpriv->tx_full = 0;
  941. netif_wake_queue(dev);
  942. }
  943. }
  944. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  945. writel(eidx, &regs->EvtCon);
  946. wmb();
  947. spin_unlock(&rrpriv->lock);
  948. return IRQ_HANDLED;
  949. }
  950. static inline void rr_raz_tx(struct rr_private *rrpriv,
  951. struct net_device *dev)
  952. {
  953. int i;
  954. for (i = 0; i < TX_RING_ENTRIES; i++) {
  955. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  956. if (skb) {
  957. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  958. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  959. skb->len, PCI_DMA_TODEVICE);
  960. desc->size = 0;
  961. set_rraddr(&desc->addr, 0);
  962. dev_kfree_skb(skb);
  963. rrpriv->tx_skbuff[i] = NULL;
  964. }
  965. }
  966. }
  967. static inline void rr_raz_rx(struct rr_private *rrpriv,
  968. struct net_device *dev)
  969. {
  970. int i;
  971. for (i = 0; i < RX_RING_ENTRIES; i++) {
  972. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  973. if (skb) {
  974. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  975. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  976. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  977. desc->size = 0;
  978. set_rraddr(&desc->addr, 0);
  979. dev_kfree_skb(skb);
  980. rrpriv->rx_skbuff[i] = NULL;
  981. }
  982. }
  983. }
  984. static void rr_timer(unsigned long data)
  985. {
  986. struct net_device *dev = (struct net_device *)data;
  987. struct rr_private *rrpriv = netdev_priv(dev);
  988. struct rr_regs __iomem *regs = rrpriv->regs;
  989. unsigned long flags;
  990. if (readl(&regs->HostCtrl) & NIC_HALTED){
  991. printk("%s: Restarting nic\n", dev->name);
  992. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  993. memset(rrpriv->info, 0, sizeof(struct rr_info));
  994. wmb();
  995. rr_raz_tx(rrpriv, dev);
  996. rr_raz_rx(rrpriv, dev);
  997. if (rr_init1(dev)) {
  998. spin_lock_irqsave(&rrpriv->lock, flags);
  999. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  1000. &regs->HostCtrl);
  1001. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1002. }
  1003. }
  1004. rrpriv->timer.expires = RUN_AT(5*HZ);
  1005. add_timer(&rrpriv->timer);
  1006. }
  1007. static int rr_open(struct net_device *dev)
  1008. {
  1009. struct rr_private *rrpriv = netdev_priv(dev);
  1010. struct pci_dev *pdev = rrpriv->pci_dev;
  1011. struct rr_regs __iomem *regs;
  1012. int ecode = 0;
  1013. unsigned long flags;
  1014. dma_addr_t dma_addr;
  1015. regs = rrpriv->regs;
  1016. if (rrpriv->fw_rev < 0x00020000) {
  1017. printk(KERN_WARNING "%s: trying to configure device with "
  1018. "obsolete firmware\n", dev->name);
  1019. ecode = -EBUSY;
  1020. goto error;
  1021. }
  1022. rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
  1023. 256 * sizeof(struct ring_ctrl),
  1024. &dma_addr);
  1025. if (!rrpriv->rx_ctrl) {
  1026. ecode = -ENOMEM;
  1027. goto error;
  1028. }
  1029. rrpriv->rx_ctrl_dma = dma_addr;
  1030. memset(rrpriv->rx_ctrl, 0, 256*sizeof(struct ring_ctrl));
  1031. rrpriv->info = pci_alloc_consistent(pdev, sizeof(struct rr_info),
  1032. &dma_addr);
  1033. if (!rrpriv->info) {
  1034. ecode = -ENOMEM;
  1035. goto error;
  1036. }
  1037. rrpriv->info_dma = dma_addr;
  1038. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1039. wmb();
  1040. spin_lock_irqsave(&rrpriv->lock, flags);
  1041. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1042. readl(&regs->HostCtrl);
  1043. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1044. if (request_irq(pdev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
  1045. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1046. dev->name, pdev->irq);
  1047. ecode = -EAGAIN;
  1048. goto error;
  1049. }
  1050. if ((ecode = rr_init1(dev)))
  1051. goto error;
  1052. /* Set the timer to switch to check for link beat and perhaps switch
  1053. to an alternate media type. */
  1054. init_timer(&rrpriv->timer);
  1055. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1056. rrpriv->timer.data = (unsigned long)dev;
  1057. rrpriv->timer.function = rr_timer; /* timer handler */
  1058. add_timer(&rrpriv->timer);
  1059. netif_start_queue(dev);
  1060. return ecode;
  1061. error:
  1062. spin_lock_irqsave(&rrpriv->lock, flags);
  1063. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1064. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1065. if (rrpriv->info) {
  1066. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1067. rrpriv->info_dma);
  1068. rrpriv->info = NULL;
  1069. }
  1070. if (rrpriv->rx_ctrl) {
  1071. pci_free_consistent(pdev, sizeof(struct ring_ctrl),
  1072. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1073. rrpriv->rx_ctrl = NULL;
  1074. }
  1075. netif_stop_queue(dev);
  1076. return ecode;
  1077. }
  1078. static void rr_dump(struct net_device *dev)
  1079. {
  1080. struct rr_private *rrpriv;
  1081. struct rr_regs __iomem *regs;
  1082. u32 index, cons;
  1083. short i;
  1084. int len;
  1085. rrpriv = netdev_priv(dev);
  1086. regs = rrpriv->regs;
  1087. printk("%s: dumping NIC TX rings\n", dev->name);
  1088. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1089. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1090. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1091. rrpriv->info->tx_ctrl.pi);
  1092. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1093. index = (((readl(&regs->EvtPrd) >> 8) & 0xff) - 1) % TX_RING_ENTRIES;
  1094. cons = rrpriv->dirty_tx;
  1095. printk("TX ring index %i, TX consumer %i\n",
  1096. index, cons);
  1097. if (rrpriv->tx_skbuff[index]){
  1098. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1099. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1100. for (i = 0; i < len; i++){
  1101. if (!(i & 7))
  1102. printk("\n");
  1103. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1104. }
  1105. printk("\n");
  1106. }
  1107. if (rrpriv->tx_skbuff[cons]){
  1108. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1109. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1110. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %08lx, truesize 0x%x\n",
  1111. rrpriv->tx_ring[cons].mode,
  1112. rrpriv->tx_ring[cons].size,
  1113. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1114. (unsigned long)rrpriv->tx_skbuff[cons]->data,
  1115. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1116. for (i = 0; i < len; i++){
  1117. if (!(i & 7))
  1118. printk("\n");
  1119. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1120. }
  1121. printk("\n");
  1122. }
  1123. printk("dumping TX ring info:\n");
  1124. for (i = 0; i < TX_RING_ENTRIES; i++)
  1125. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1126. rrpriv->tx_ring[i].mode,
  1127. rrpriv->tx_ring[i].size,
  1128. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1129. }
  1130. static int rr_close(struct net_device *dev)
  1131. {
  1132. struct rr_private *rrpriv = netdev_priv(dev);
  1133. struct rr_regs __iomem *regs = rrpriv->regs;
  1134. struct pci_dev *pdev = rrpriv->pci_dev;
  1135. unsigned long flags;
  1136. u32 tmp;
  1137. short i;
  1138. netif_stop_queue(dev);
  1139. /*
  1140. * Lock to make sure we are not cleaning up while another CPU
  1141. * is handling interrupts.
  1142. */
  1143. spin_lock_irqsave(&rrpriv->lock, flags);
  1144. tmp = readl(&regs->HostCtrl);
  1145. if (tmp & NIC_HALTED){
  1146. printk("%s: NIC already halted\n", dev->name);
  1147. rr_dump(dev);
  1148. }else{
  1149. tmp |= HALT_NIC | RR_CLEAR_INT;
  1150. writel(tmp, &regs->HostCtrl);
  1151. readl(&regs->HostCtrl);
  1152. }
  1153. rrpriv->fw_running = 0;
  1154. del_timer_sync(&rrpriv->timer);
  1155. writel(0, &regs->TxPi);
  1156. writel(0, &regs->IpRxPi);
  1157. writel(0, &regs->EvtCon);
  1158. writel(0, &regs->EvtPrd);
  1159. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1160. writel(0, &regs->CmdRing[i]);
  1161. rrpriv->info->tx_ctrl.entries = 0;
  1162. rrpriv->info->cmd_ctrl.pi = 0;
  1163. rrpriv->info->evt_ctrl.pi = 0;
  1164. rrpriv->rx_ctrl[4].entries = 0;
  1165. rr_raz_tx(rrpriv, dev);
  1166. rr_raz_rx(rrpriv, dev);
  1167. pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),
  1168. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1169. rrpriv->rx_ctrl = NULL;
  1170. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1171. rrpriv->info_dma);
  1172. rrpriv->info = NULL;
  1173. free_irq(pdev->irq, dev);
  1174. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1175. return 0;
  1176. }
  1177. static netdev_tx_t rr_start_xmit(struct sk_buff *skb,
  1178. struct net_device *dev)
  1179. {
  1180. struct rr_private *rrpriv = netdev_priv(dev);
  1181. struct rr_regs __iomem *regs = rrpriv->regs;
  1182. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1183. struct ring_ctrl *txctrl;
  1184. unsigned long flags;
  1185. u32 index, len = skb->len;
  1186. u32 *ifield;
  1187. struct sk_buff *new_skb;
  1188. if (readl(&regs->Mode) & FATAL_ERR)
  1189. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1190. readl(&regs->Fail1), readl(&regs->Fail2));
  1191. /*
  1192. * We probably need to deal with tbusy here to prevent overruns.
  1193. */
  1194. if (skb_headroom(skb) < 8){
  1195. printk("incoming skb too small - reallocating\n");
  1196. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1197. dev_kfree_skb(skb);
  1198. netif_wake_queue(dev);
  1199. return NETDEV_TX_OK;
  1200. }
  1201. skb_reserve(new_skb, 8);
  1202. skb_put(new_skb, len);
  1203. skb_copy_from_linear_data(skb, new_skb->data, len);
  1204. dev_kfree_skb(skb);
  1205. skb = new_skb;
  1206. }
  1207. ifield = (u32 *)skb_push(skb, 8);
  1208. ifield[0] = 0;
  1209. ifield[1] = hcb->ifield;
  1210. /*
  1211. * We don't need the lock before we are actually going to start
  1212. * fiddling with the control blocks.
  1213. */
  1214. spin_lock_irqsave(&rrpriv->lock, flags);
  1215. txctrl = &rrpriv->info->tx_ctrl;
  1216. index = txctrl->pi;
  1217. rrpriv->tx_skbuff[index] = skb;
  1218. set_rraddr(&rrpriv->tx_ring[index].addr, pci_map_single(
  1219. rrpriv->pci_dev, skb->data, len + 8, PCI_DMA_TODEVICE));
  1220. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1221. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1222. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1223. wmb();
  1224. writel(txctrl->pi, &regs->TxPi);
  1225. if (txctrl->pi == rrpriv->dirty_tx){
  1226. rrpriv->tx_full = 1;
  1227. netif_stop_queue(dev);
  1228. }
  1229. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1230. return NETDEV_TX_OK;
  1231. }
  1232. /*
  1233. * Read the firmware out of the EEPROM and put it into the SRAM
  1234. * (or from user space - later)
  1235. *
  1236. * This operation requires the NIC to be halted and is performed with
  1237. * interrupts disabled and with the spinlock hold.
  1238. */
  1239. static int rr_load_firmware(struct net_device *dev)
  1240. {
  1241. struct rr_private *rrpriv;
  1242. struct rr_regs __iomem *regs;
  1243. size_t eptr, segptr;
  1244. int i, j;
  1245. u32 localctrl, sptr, len, tmp;
  1246. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1247. rrpriv = netdev_priv(dev);
  1248. regs = rrpriv->regs;
  1249. if (dev->flags & IFF_UP)
  1250. return -EBUSY;
  1251. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1252. printk("%s: Trying to load firmware to a running NIC.\n",
  1253. dev->name);
  1254. return -EBUSY;
  1255. }
  1256. localctrl = readl(&regs->LocalCtrl);
  1257. writel(0, &regs->LocalCtrl);
  1258. writel(0, &regs->EvtPrd);
  1259. writel(0, &regs->RxPrd);
  1260. writel(0, &regs->TxPrd);
  1261. /*
  1262. * First wipe the entire SRAM, otherwise we might run into all
  1263. * kinds of trouble ... sigh, this took almost all afternoon
  1264. * to track down ;-(
  1265. */
  1266. io = readl(&regs->ExtIo);
  1267. writel(0, &regs->ExtIo);
  1268. sram_size = rr_read_eeprom_word(rrpriv, 8);
  1269. for (i = 200; i < sram_size / 4; i++){
  1270. writel(i * 4, &regs->WinBase);
  1271. mb();
  1272. writel(0, &regs->WinData);
  1273. mb();
  1274. }
  1275. writel(io, &regs->ExtIo);
  1276. mb();
  1277. eptr = rr_read_eeprom_word(rrpriv,
  1278. offsetof(struct eeprom, rncd_info.AddrRunCodeSegs));
  1279. eptr = ((eptr & 0x1fffff) >> 3);
  1280. p2len = rr_read_eeprom_word(rrpriv, 0x83*4);
  1281. p2len = (p2len << 2);
  1282. p2size = rr_read_eeprom_word(rrpriv, 0x84*4);
  1283. p2size = ((p2size & 0x1fffff) >> 3);
  1284. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1285. printk("%s: eptr is invalid\n", dev->name);
  1286. goto out;
  1287. }
  1288. revision = rr_read_eeprom_word(rrpriv,
  1289. offsetof(struct eeprom, manf.HeaderFmt));
  1290. if (revision != 1){
  1291. printk("%s: invalid firmware format (%i)\n",
  1292. dev->name, revision);
  1293. goto out;
  1294. }
  1295. nr_seg = rr_read_eeprom_word(rrpriv, eptr);
  1296. eptr +=4;
  1297. #if (DEBUG > 1)
  1298. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1299. #endif
  1300. for (i = 0; i < nr_seg; i++){
  1301. sptr = rr_read_eeprom_word(rrpriv, eptr);
  1302. eptr += 4;
  1303. len = rr_read_eeprom_word(rrpriv, eptr);
  1304. eptr += 4;
  1305. segptr = rr_read_eeprom_word(rrpriv, eptr);
  1306. segptr = ((segptr & 0x1fffff) >> 3);
  1307. eptr += 4;
  1308. #if (DEBUG > 1)
  1309. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1310. dev->name, i, sptr, len, segptr);
  1311. #endif
  1312. for (j = 0; j < len; j++){
  1313. tmp = rr_read_eeprom_word(rrpriv, segptr);
  1314. writel(sptr, &regs->WinBase);
  1315. mb();
  1316. writel(tmp, &regs->WinData);
  1317. mb();
  1318. segptr += 4;
  1319. sptr += 4;
  1320. }
  1321. }
  1322. out:
  1323. writel(localctrl, &regs->LocalCtrl);
  1324. mb();
  1325. return 0;
  1326. }
  1327. static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1328. {
  1329. struct rr_private *rrpriv;
  1330. unsigned char *image, *oldimage;
  1331. unsigned long flags;
  1332. unsigned int i;
  1333. int error = -EOPNOTSUPP;
  1334. rrpriv = netdev_priv(dev);
  1335. switch(cmd){
  1336. case SIOCRRGFW:
  1337. if (!capable(CAP_SYS_RAWIO)){
  1338. return -EPERM;
  1339. }
  1340. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1341. if (!image)
  1342. return -ENOMEM;
  1343. if (rrpriv->fw_running){
  1344. printk("%s: Firmware already running\n", dev->name);
  1345. error = -EPERM;
  1346. goto gf_out;
  1347. }
  1348. spin_lock_irqsave(&rrpriv->lock, flags);
  1349. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1350. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1351. if (i != EEPROM_BYTES){
  1352. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1353. dev->name);
  1354. error = -EFAULT;
  1355. goto gf_out;
  1356. }
  1357. error = copy_to_user(rq->ifr_data, image, EEPROM_BYTES);
  1358. if (error)
  1359. error = -EFAULT;
  1360. gf_out:
  1361. kfree(image);
  1362. return error;
  1363. case SIOCRRPFW:
  1364. if (!capable(CAP_SYS_RAWIO)){
  1365. return -EPERM;
  1366. }
  1367. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1368. oldimage = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1369. if (!image || !oldimage) {
  1370. error = -ENOMEM;
  1371. goto wf_out;
  1372. }
  1373. error = copy_from_user(image, rq->ifr_data, EEPROM_BYTES);
  1374. if (error) {
  1375. error = -EFAULT;
  1376. goto wf_out;
  1377. }
  1378. if (rrpriv->fw_running){
  1379. printk("%s: Firmware already running\n", dev->name);
  1380. error = -EPERM;
  1381. goto wf_out;
  1382. }
  1383. printk("%s: Updating EEPROM firmware\n", dev->name);
  1384. spin_lock_irqsave(&rrpriv->lock, flags);
  1385. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1386. if (error)
  1387. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1388. dev->name);
  1389. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1390. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1391. if (i != EEPROM_BYTES)
  1392. printk(KERN_ERR "%s: Error reading back EEPROM "
  1393. "image\n", dev->name);
  1394. error = memcmp(image, oldimage, EEPROM_BYTES);
  1395. if (error){
  1396. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1397. dev->name);
  1398. error = -EFAULT;
  1399. }
  1400. wf_out:
  1401. kfree(oldimage);
  1402. kfree(image);
  1403. return error;
  1404. case SIOCRRID:
  1405. return put_user(0x52523032, (int __user *)rq->ifr_data);
  1406. default:
  1407. return error;
  1408. }
  1409. }
  1410. static DEFINE_PCI_DEVICE_TABLE(rr_pci_tbl) = {
  1411. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1412. PCI_ANY_ID, PCI_ANY_ID, },
  1413. { 0,}
  1414. };
  1415. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1416. static struct pci_driver rr_driver = {
  1417. .name = "rrunner",
  1418. .id_table = rr_pci_tbl,
  1419. .probe = rr_init_one,
  1420. .remove = __devexit_p(rr_remove_one),
  1421. };
  1422. static int __init rr_init_module(void)
  1423. {
  1424. return pci_register_driver(&rr_driver);
  1425. }
  1426. static void __exit rr_cleanup_module(void)
  1427. {
  1428. pci_unregister_driver(&rr_driver);
  1429. }
  1430. module_init(rr_init_module);
  1431. module_exit(rr_cleanup_module);