mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/time.h>
  33. #include <linux/videodev2.h>
  34. #include <media/soc_camera.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-dev.h>
  37. #include <media/videobuf-dma-contig.h>
  38. #include <media/soc_mediabus.h>
  39. #include <asm/dma.h>
  40. #include <asm/fiq.h>
  41. #include <mach/dma-mx1-mx2.h>
  42. #include <mach/hardware.h>
  43. #include <mach/irqs.h>
  44. #include <mach/mx1_camera.h>
  45. /*
  46. * CSI registers
  47. */
  48. #define CSICR1 0x00 /* CSI Control Register 1 */
  49. #define CSISR 0x08 /* CSI Status Register */
  50. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  51. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  52. #define CSICR1_SOF_POL (1 << 17)
  53. #define CSICR1_SOF_INTEN (1 << 16)
  54. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  55. #define CSICR1_MCLKEN (1 << 9)
  56. #define CSICR1_FCC (1 << 8)
  57. #define CSICR1_BIG_ENDIAN (1 << 7)
  58. #define CSICR1_CLR_RXFIFO (1 << 5)
  59. #define CSICR1_GCLK_MODE (1 << 4)
  60. #define CSICR1_DATA_POL (1 << 2)
  61. #define CSICR1_REDGE (1 << 1)
  62. #define CSICR1_EN (1 << 0)
  63. #define CSISR_SFF_OR_INT (1 << 25)
  64. #define CSISR_RFF_OR_INT (1 << 24)
  65. #define CSISR_STATFF_INT (1 << 21)
  66. #define CSISR_RXFF_INT (1 << 18)
  67. #define CSISR_SOF_INT (1 << 16)
  68. #define CSISR_DRDY (1 << 0)
  69. #define DRIVER_VERSION "0.0.2"
  70. #define DRIVER_NAME "mx1-camera"
  71. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  72. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  73. #define CSI_BUS_FLAGS (V4L2_MBUS_MASTER | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  74. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  75. V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  76. V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_LOW)
  77. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  78. /*
  79. * Structures
  80. */
  81. /* buffer for one video frame */
  82. struct mx1_buffer {
  83. /* common v4l buffer stuff -- must be first */
  84. struct videobuf_buffer vb;
  85. enum v4l2_mbus_pixelcode code;
  86. int inwork;
  87. };
  88. /*
  89. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  90. * Interface. If anyone ever builds hardware to enable more than
  91. * one camera, they will have to modify this driver too
  92. */
  93. struct mx1_camera_dev {
  94. struct soc_camera_host soc_host;
  95. struct soc_camera_device *icd;
  96. struct mx1_camera_pdata *pdata;
  97. struct mx1_buffer *active;
  98. struct resource *res;
  99. struct clk *clk;
  100. struct list_head capture;
  101. void __iomem *base;
  102. int dma_chan;
  103. unsigned int irq;
  104. unsigned long mclk;
  105. spinlock_t lock;
  106. };
  107. /*
  108. * Videobuf operations
  109. */
  110. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  111. unsigned int *size)
  112. {
  113. struct soc_camera_device *icd = vq->priv_data;
  114. *size = icd->sizeimage;
  115. if (!*count)
  116. *count = 32;
  117. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  118. *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
  119. dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size);
  120. return 0;
  121. }
  122. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  123. {
  124. struct soc_camera_device *icd = vq->priv_data;
  125. struct videobuf_buffer *vb = &buf->vb;
  126. BUG_ON(in_interrupt());
  127. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  128. vb, vb->baddr, vb->bsize);
  129. /*
  130. * This waits until this buffer is out of danger, i.e., until it is no
  131. * longer in STATE_QUEUED or STATE_ACTIVE
  132. */
  133. videobuf_waiton(vq, vb, 0, 0);
  134. videobuf_dma_contig_free(vq, vb);
  135. vb->state = VIDEOBUF_NEEDS_INIT;
  136. }
  137. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  138. struct videobuf_buffer *vb, enum v4l2_field field)
  139. {
  140. struct soc_camera_device *icd = vq->priv_data;
  141. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  142. int ret;
  143. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  144. vb, vb->baddr, vb->bsize);
  145. /* Added list head initialization on alloc */
  146. WARN_ON(!list_empty(&vb->queue));
  147. BUG_ON(NULL == icd->current_fmt);
  148. /*
  149. * I think, in buf_prepare you only have to protect global data,
  150. * the actual buffer is yours
  151. */
  152. buf->inwork = 1;
  153. if (buf->code != icd->current_fmt->code ||
  154. vb->width != icd->user_width ||
  155. vb->height != icd->user_height ||
  156. vb->field != field) {
  157. buf->code = icd->current_fmt->code;
  158. vb->width = icd->user_width;
  159. vb->height = icd->user_height;
  160. vb->field = field;
  161. vb->state = VIDEOBUF_NEEDS_INIT;
  162. }
  163. vb->size = icd->sizeimage;
  164. if (0 != vb->baddr && vb->bsize < vb->size) {
  165. ret = -EINVAL;
  166. goto out;
  167. }
  168. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  169. ret = videobuf_iolock(vq, vb, NULL);
  170. if (ret)
  171. goto fail;
  172. vb->state = VIDEOBUF_PREPARED;
  173. }
  174. buf->inwork = 0;
  175. return 0;
  176. fail:
  177. free_buffer(vq, buf);
  178. out:
  179. buf->inwork = 0;
  180. return ret;
  181. }
  182. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  183. {
  184. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  185. struct device *dev = pcdev->icd->parent;
  186. int ret;
  187. if (unlikely(!pcdev->active)) {
  188. dev_err(dev, "DMA End IRQ with no active buffer\n");
  189. return -EFAULT;
  190. }
  191. /* setup sg list for future DMA */
  192. ret = imx_dma_setup_single(pcdev->dma_chan,
  193. videobuf_to_dma_contig(vbuf),
  194. vbuf->size, pcdev->res->start +
  195. CSIRXR, DMA_MODE_READ);
  196. if (unlikely(ret))
  197. dev_err(dev, "Failed to setup DMA sg list\n");
  198. return ret;
  199. }
  200. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  201. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  202. struct videobuf_buffer *vb)
  203. {
  204. struct soc_camera_device *icd = vq->priv_data;
  205. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  206. struct mx1_camera_dev *pcdev = ici->priv;
  207. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  208. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  209. vb, vb->baddr, vb->bsize);
  210. list_add_tail(&vb->queue, &pcdev->capture);
  211. vb->state = VIDEOBUF_ACTIVE;
  212. if (!pcdev->active) {
  213. pcdev->active = buf;
  214. /* setup sg list for future DMA */
  215. if (!mx1_camera_setup_dma(pcdev)) {
  216. unsigned int temp;
  217. /* enable SOF irq */
  218. temp = __raw_readl(pcdev->base + CSICR1) |
  219. CSICR1_SOF_INTEN;
  220. __raw_writel(temp, pcdev->base + CSICR1);
  221. }
  222. }
  223. }
  224. static void mx1_videobuf_release(struct videobuf_queue *vq,
  225. struct videobuf_buffer *vb)
  226. {
  227. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  228. #ifdef DEBUG
  229. struct soc_camera_device *icd = vq->priv_data;
  230. struct device *dev = icd->parent;
  231. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  232. vb, vb->baddr, vb->bsize);
  233. switch (vb->state) {
  234. case VIDEOBUF_ACTIVE:
  235. dev_dbg(dev, "%s (active)\n", __func__);
  236. break;
  237. case VIDEOBUF_QUEUED:
  238. dev_dbg(dev, "%s (queued)\n", __func__);
  239. break;
  240. case VIDEOBUF_PREPARED:
  241. dev_dbg(dev, "%s (prepared)\n", __func__);
  242. break;
  243. default:
  244. dev_dbg(dev, "%s (unknown)\n", __func__);
  245. break;
  246. }
  247. #endif
  248. free_buffer(vq, buf);
  249. }
  250. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  251. struct videobuf_buffer *vb,
  252. struct mx1_buffer *buf)
  253. {
  254. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  255. list_del_init(&vb->queue);
  256. vb->state = VIDEOBUF_DONE;
  257. do_gettimeofday(&vb->ts);
  258. vb->field_count++;
  259. wake_up(&vb->done);
  260. if (list_empty(&pcdev->capture)) {
  261. pcdev->active = NULL;
  262. return;
  263. }
  264. pcdev->active = list_entry(pcdev->capture.next,
  265. struct mx1_buffer, vb.queue);
  266. /* setup sg list for future DMA */
  267. if (likely(!mx1_camera_setup_dma(pcdev))) {
  268. unsigned int temp;
  269. /* enable SOF irq */
  270. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  271. __raw_writel(temp, pcdev->base + CSICR1);
  272. }
  273. }
  274. static void mx1_camera_dma_irq(int channel, void *data)
  275. {
  276. struct mx1_camera_dev *pcdev = data;
  277. struct device *dev = pcdev->icd->parent;
  278. struct mx1_buffer *buf;
  279. struct videobuf_buffer *vb;
  280. unsigned long flags;
  281. spin_lock_irqsave(&pcdev->lock, flags);
  282. imx_dma_disable(channel);
  283. if (unlikely(!pcdev->active)) {
  284. dev_err(dev, "DMA End IRQ with no active buffer\n");
  285. goto out;
  286. }
  287. vb = &pcdev->active->vb;
  288. buf = container_of(vb, struct mx1_buffer, vb);
  289. WARN_ON(buf->inwork || list_empty(&vb->queue));
  290. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  291. vb, vb->baddr, vb->bsize);
  292. mx1_camera_wakeup(pcdev, vb, buf);
  293. out:
  294. spin_unlock_irqrestore(&pcdev->lock, flags);
  295. }
  296. static struct videobuf_queue_ops mx1_videobuf_ops = {
  297. .buf_setup = mx1_videobuf_setup,
  298. .buf_prepare = mx1_videobuf_prepare,
  299. .buf_queue = mx1_videobuf_queue,
  300. .buf_release = mx1_videobuf_release,
  301. };
  302. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  303. struct soc_camera_device *icd)
  304. {
  305. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  306. struct mx1_camera_dev *pcdev = ici->priv;
  307. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent,
  308. &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  309. V4L2_FIELD_NONE,
  310. sizeof(struct mx1_buffer), icd, &icd->video_lock);
  311. }
  312. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  313. {
  314. unsigned int mclk = pcdev->mclk;
  315. unsigned long div;
  316. unsigned long lcdclk;
  317. lcdclk = clk_get_rate(pcdev->clk);
  318. /*
  319. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  320. * they get a nice Oops
  321. */
  322. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  323. dev_dbg(pcdev->icd->parent,
  324. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  325. lcdclk / 1000, mclk / 1000, div);
  326. return div;
  327. }
  328. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  329. {
  330. unsigned int csicr1 = CSICR1_EN;
  331. dev_dbg(pcdev->icd->parent, "Activate device\n");
  332. clk_enable(pcdev->clk);
  333. /* enable CSI before doing anything else */
  334. __raw_writel(csicr1, pcdev->base + CSICR1);
  335. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  336. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  337. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  338. __raw_writel(csicr1, pcdev->base + CSICR1);
  339. }
  340. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  341. {
  342. dev_dbg(pcdev->icd->parent, "Deactivate device\n");
  343. /* Disable all CSI interface */
  344. __raw_writel(0x00, pcdev->base + CSICR1);
  345. clk_disable(pcdev->clk);
  346. }
  347. /*
  348. * The following two functions absolutely depend on the fact, that
  349. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  350. */
  351. static int mx1_camera_add_device(struct soc_camera_device *icd)
  352. {
  353. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  354. struct mx1_camera_dev *pcdev = ici->priv;
  355. if (pcdev->icd)
  356. return -EBUSY;
  357. dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
  358. icd->devnum);
  359. mx1_camera_activate(pcdev);
  360. pcdev->icd = icd;
  361. return 0;
  362. }
  363. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  364. {
  365. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  366. struct mx1_camera_dev *pcdev = ici->priv;
  367. unsigned int csicr1;
  368. BUG_ON(icd != pcdev->icd);
  369. /* disable interrupts */
  370. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  371. __raw_writel(csicr1, pcdev->base + CSICR1);
  372. /* Stop DMA engine */
  373. imx_dma_disable(pcdev->dma_chan);
  374. dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n",
  375. icd->devnum);
  376. mx1_camera_deactivate(pcdev);
  377. pcdev->icd = NULL;
  378. }
  379. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  380. struct v4l2_crop *a)
  381. {
  382. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  383. return v4l2_subdev_call(sd, video, s_crop, a);
  384. }
  385. static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
  386. {
  387. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  388. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  389. struct mx1_camera_dev *pcdev = ici->priv;
  390. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  391. unsigned long common_flags;
  392. unsigned int csicr1;
  393. int ret;
  394. /* MX1 supports only 8bit buswidth */
  395. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  396. if (!ret) {
  397. common_flags = soc_mbus_config_compatible(&cfg, CSI_BUS_FLAGS);
  398. if (!common_flags) {
  399. dev_warn(icd->parent,
  400. "Flags incompatible: camera 0x%x, host 0x%x\n",
  401. cfg.flags, CSI_BUS_FLAGS);
  402. return -EINVAL;
  403. }
  404. } else if (ret != -ENOIOCTLCMD) {
  405. return ret;
  406. } else {
  407. common_flags = CSI_BUS_FLAGS;
  408. }
  409. /* Make choises, based on platform choice */
  410. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  411. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  412. if (!pcdev->pdata ||
  413. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  414. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  415. else
  416. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  417. }
  418. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  419. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  420. if (!pcdev->pdata ||
  421. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  422. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  423. else
  424. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  425. }
  426. if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
  427. (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
  428. if (!pcdev->pdata ||
  429. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  430. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
  431. else
  432. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
  433. }
  434. cfg.flags = common_flags;
  435. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  436. if (ret < 0 && ret != -ENOIOCTLCMD) {
  437. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  438. common_flags, ret);
  439. return ret;
  440. }
  441. csicr1 = __raw_readl(pcdev->base + CSICR1);
  442. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
  443. csicr1 |= CSICR1_REDGE;
  444. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
  445. csicr1 |= CSICR1_SOF_POL;
  446. if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
  447. csicr1 |= CSICR1_DATA_POL;
  448. __raw_writel(csicr1, pcdev->base + CSICR1);
  449. return 0;
  450. }
  451. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  452. struct v4l2_format *f)
  453. {
  454. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  455. const struct soc_camera_format_xlate *xlate;
  456. struct v4l2_pix_format *pix = &f->fmt.pix;
  457. struct v4l2_mbus_framefmt mf;
  458. int ret, buswidth;
  459. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  460. if (!xlate) {
  461. dev_warn(icd->parent, "Format %x not found\n",
  462. pix->pixelformat);
  463. return -EINVAL;
  464. }
  465. buswidth = xlate->host_fmt->bits_per_sample;
  466. if (buswidth > 8) {
  467. dev_warn(icd->parent,
  468. "bits-per-sample %d for format %x unsupported\n",
  469. buswidth, pix->pixelformat);
  470. return -EINVAL;
  471. }
  472. mf.width = pix->width;
  473. mf.height = pix->height;
  474. mf.field = pix->field;
  475. mf.colorspace = pix->colorspace;
  476. mf.code = xlate->code;
  477. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  478. if (ret < 0)
  479. return ret;
  480. if (mf.code != xlate->code)
  481. return -EINVAL;
  482. pix->width = mf.width;
  483. pix->height = mf.height;
  484. pix->field = mf.field;
  485. pix->colorspace = mf.colorspace;
  486. icd->current_fmt = xlate;
  487. return ret;
  488. }
  489. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  490. struct v4l2_format *f)
  491. {
  492. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  493. const struct soc_camera_format_xlate *xlate;
  494. struct v4l2_pix_format *pix = &f->fmt.pix;
  495. struct v4l2_mbus_framefmt mf;
  496. int ret;
  497. /* TODO: limit to mx1 hardware capabilities */
  498. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  499. if (!xlate) {
  500. dev_warn(icd->parent, "Format %x not found\n",
  501. pix->pixelformat);
  502. return -EINVAL;
  503. }
  504. mf.width = pix->width;
  505. mf.height = pix->height;
  506. mf.field = pix->field;
  507. mf.colorspace = pix->colorspace;
  508. mf.code = xlate->code;
  509. /* limit to sensor capabilities */
  510. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  511. if (ret < 0)
  512. return ret;
  513. pix->width = mf.width;
  514. pix->height = mf.height;
  515. pix->field = mf.field;
  516. pix->colorspace = mf.colorspace;
  517. return 0;
  518. }
  519. static int mx1_camera_reqbufs(struct soc_camera_device *icd,
  520. struct v4l2_requestbuffers *p)
  521. {
  522. int i;
  523. /*
  524. * This is for locking debugging only. I removed spinlocks and now I
  525. * check whether .prepare is ever called on a linked buffer, or whether
  526. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  527. * it hadn't triggered
  528. */
  529. for (i = 0; i < p->count; i++) {
  530. struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
  531. struct mx1_buffer, vb);
  532. buf->inwork = 0;
  533. INIT_LIST_HEAD(&buf->vb.queue);
  534. }
  535. return 0;
  536. }
  537. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  538. {
  539. struct soc_camera_device *icd = file->private_data;
  540. struct mx1_buffer *buf;
  541. buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
  542. vb.stream);
  543. poll_wait(file, &buf->vb.done, pt);
  544. if (buf->vb.state == VIDEOBUF_DONE ||
  545. buf->vb.state == VIDEOBUF_ERROR)
  546. return POLLIN | POLLRDNORM;
  547. return 0;
  548. }
  549. static int mx1_camera_querycap(struct soc_camera_host *ici,
  550. struct v4l2_capability *cap)
  551. {
  552. /* cap->name is set by the friendly caller:-> */
  553. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  554. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  555. return 0;
  556. }
  557. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  558. .owner = THIS_MODULE,
  559. .add = mx1_camera_add_device,
  560. .remove = mx1_camera_remove_device,
  561. .set_bus_param = mx1_camera_set_bus_param,
  562. .set_crop = mx1_camera_set_crop,
  563. .set_fmt = mx1_camera_set_fmt,
  564. .try_fmt = mx1_camera_try_fmt,
  565. .init_videobuf = mx1_camera_init_videobuf,
  566. .reqbufs = mx1_camera_reqbufs,
  567. .poll = mx1_camera_poll,
  568. .querycap = mx1_camera_querycap,
  569. };
  570. static struct fiq_handler fh = {
  571. .name = "csi_sof"
  572. };
  573. static int __init mx1_camera_probe(struct platform_device *pdev)
  574. {
  575. struct mx1_camera_dev *pcdev;
  576. struct resource *res;
  577. struct pt_regs regs;
  578. struct clk *clk;
  579. void __iomem *base;
  580. unsigned int irq;
  581. int err = 0;
  582. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  583. irq = platform_get_irq(pdev, 0);
  584. if (!res || (int)irq <= 0) {
  585. err = -ENODEV;
  586. goto exit;
  587. }
  588. clk = clk_get(&pdev->dev, "csi_clk");
  589. if (IS_ERR(clk)) {
  590. err = PTR_ERR(clk);
  591. goto exit;
  592. }
  593. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  594. if (!pcdev) {
  595. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  596. err = -ENOMEM;
  597. goto exit_put_clk;
  598. }
  599. pcdev->res = res;
  600. pcdev->clk = clk;
  601. pcdev->pdata = pdev->dev.platform_data;
  602. if (pcdev->pdata)
  603. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  604. if (!pcdev->mclk) {
  605. dev_warn(&pdev->dev,
  606. "mclk_10khz == 0! Please, fix your platform data. "
  607. "Using default 20MHz\n");
  608. pcdev->mclk = 20000000;
  609. }
  610. INIT_LIST_HEAD(&pcdev->capture);
  611. spin_lock_init(&pcdev->lock);
  612. /*
  613. * Request the regions.
  614. */
  615. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  616. err = -EBUSY;
  617. goto exit_kfree;
  618. }
  619. base = ioremap(res->start, resource_size(res));
  620. if (!base) {
  621. err = -ENOMEM;
  622. goto exit_release;
  623. }
  624. pcdev->irq = irq;
  625. pcdev->base = base;
  626. /* request dma */
  627. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  628. if (pcdev->dma_chan < 0) {
  629. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  630. err = -EBUSY;
  631. goto exit_iounmap;
  632. }
  633. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  634. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  635. pcdev);
  636. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  637. IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
  638. /* burst length : 16 words = 64 bytes */
  639. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  640. /* request irq */
  641. err = claim_fiq(&fh);
  642. if (err) {
  643. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  644. goto exit_free_dma;
  645. }
  646. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  647. &mx1_camera_sof_fiq_start);
  648. regs.ARM_r8 = (long)MX1_DMA_DIMR;
  649. regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
  650. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  651. regs.ARM_fp = (long)pcdev->base + CSISR;
  652. regs.ARM_sp = 1 << pcdev->dma_chan;
  653. set_fiq_regs(&regs);
  654. mxc_set_irq_fiq(irq, 1);
  655. enable_fiq(irq);
  656. pcdev->soc_host.drv_name = DRIVER_NAME;
  657. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  658. pcdev->soc_host.priv = pcdev;
  659. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  660. pcdev->soc_host.nr = pdev->id;
  661. err = soc_camera_host_register(&pcdev->soc_host);
  662. if (err)
  663. goto exit_free_irq;
  664. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  665. return 0;
  666. exit_free_irq:
  667. disable_fiq(irq);
  668. mxc_set_irq_fiq(irq, 0);
  669. release_fiq(&fh);
  670. exit_free_dma:
  671. imx_dma_free(pcdev->dma_chan);
  672. exit_iounmap:
  673. iounmap(base);
  674. exit_release:
  675. release_mem_region(res->start, resource_size(res));
  676. exit_kfree:
  677. kfree(pcdev);
  678. exit_put_clk:
  679. clk_put(clk);
  680. exit:
  681. return err;
  682. }
  683. static int __exit mx1_camera_remove(struct platform_device *pdev)
  684. {
  685. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  686. struct mx1_camera_dev *pcdev = container_of(soc_host,
  687. struct mx1_camera_dev, soc_host);
  688. struct resource *res;
  689. imx_dma_free(pcdev->dma_chan);
  690. disable_fiq(pcdev->irq);
  691. mxc_set_irq_fiq(pcdev->irq, 0);
  692. release_fiq(&fh);
  693. clk_put(pcdev->clk);
  694. soc_camera_host_unregister(soc_host);
  695. iounmap(pcdev->base);
  696. res = pcdev->res;
  697. release_mem_region(res->start, resource_size(res));
  698. kfree(pcdev);
  699. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  700. return 0;
  701. }
  702. static struct platform_driver mx1_camera_driver = {
  703. .driver = {
  704. .name = DRIVER_NAME,
  705. },
  706. .remove = __exit_p(mx1_camera_remove),
  707. };
  708. static int __init mx1_camera_init(void)
  709. {
  710. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  711. }
  712. static void __exit mx1_camera_exit(void)
  713. {
  714. return platform_driver_unregister(&mx1_camera_driver);
  715. }
  716. module_init(mx1_camera_init);
  717. module_exit(mx1_camera_exit);
  718. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  719. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  720. MODULE_LICENSE("GPL v2");
  721. MODULE_VERSION(DRIVER_VERSION);
  722. MODULE_ALIAS("platform:" DRIVER_NAME);