device.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948
  1. /*
  2. * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/debugfs.h>
  35. #include <linux/vmalloc.h>
  36. #include <rdma/ib_verbs.h>
  37. #include "iw_cxgb4.h"
  38. #define DRV_VERSION "0.1"
  39. MODULE_AUTHOR("Steve Wise");
  40. MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");
  41. MODULE_LICENSE("Dual BSD/GPL");
  42. MODULE_VERSION(DRV_VERSION);
  43. struct uld_ctx {
  44. struct list_head entry;
  45. struct cxgb4_lld_info lldi;
  46. struct c4iw_dev *dev;
  47. };
  48. static LIST_HEAD(uld_ctx_list);
  49. static DEFINE_MUTEX(dev_mutex);
  50. static struct dentry *c4iw_debugfs_root;
  51. struct c4iw_debugfs_data {
  52. struct c4iw_dev *devp;
  53. char *buf;
  54. int bufsize;
  55. int pos;
  56. };
  57. static int count_idrs(int id, void *p, void *data)
  58. {
  59. int *countp = data;
  60. *countp = *countp + 1;
  61. return 0;
  62. }
  63. static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
  64. loff_t *ppos)
  65. {
  66. struct c4iw_debugfs_data *d = file->private_data;
  67. return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
  68. }
  69. static int dump_qp(int id, void *p, void *data)
  70. {
  71. struct c4iw_qp *qp = p;
  72. struct c4iw_debugfs_data *qpd = data;
  73. int space;
  74. int cc;
  75. if (id != qp->wq.sq.qid)
  76. return 0;
  77. space = qpd->bufsize - qpd->pos - 1;
  78. if (space == 0)
  79. return 1;
  80. if (qp->ep)
  81. cc = snprintf(qpd->buf + qpd->pos, space,
  82. "qp sq id %u rq id %u state %u onchip %u "
  83. "ep tid %u state %u %pI4:%u->%pI4:%u\n",
  84. qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state,
  85. qp->wq.sq.flags & T4_SQ_ONCHIP,
  86. qp->ep->hwtid, (int)qp->ep->com.state,
  87. &qp->ep->com.local_addr.sin_addr.s_addr,
  88. ntohs(qp->ep->com.local_addr.sin_port),
  89. &qp->ep->com.remote_addr.sin_addr.s_addr,
  90. ntohs(qp->ep->com.remote_addr.sin_port));
  91. else
  92. cc = snprintf(qpd->buf + qpd->pos, space,
  93. "qp sq id %u rq id %u state %u onchip %u\n",
  94. qp->wq.sq.qid, qp->wq.rq.qid,
  95. (int)qp->attr.state,
  96. qp->wq.sq.flags & T4_SQ_ONCHIP);
  97. if (cc < space)
  98. qpd->pos += cc;
  99. return 0;
  100. }
  101. static int qp_release(struct inode *inode, struct file *file)
  102. {
  103. struct c4iw_debugfs_data *qpd = file->private_data;
  104. if (!qpd) {
  105. printk(KERN_INFO "%s null qpd?\n", __func__);
  106. return 0;
  107. }
  108. vfree(qpd->buf);
  109. kfree(qpd);
  110. return 0;
  111. }
  112. static int qp_open(struct inode *inode, struct file *file)
  113. {
  114. struct c4iw_debugfs_data *qpd;
  115. int ret = 0;
  116. int count = 1;
  117. qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
  118. if (!qpd) {
  119. ret = -ENOMEM;
  120. goto out;
  121. }
  122. qpd->devp = inode->i_private;
  123. qpd->pos = 0;
  124. spin_lock_irq(&qpd->devp->lock);
  125. idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
  126. spin_unlock_irq(&qpd->devp->lock);
  127. qpd->bufsize = count * 128;
  128. qpd->buf = vmalloc(qpd->bufsize);
  129. if (!qpd->buf) {
  130. ret = -ENOMEM;
  131. goto err1;
  132. }
  133. spin_lock_irq(&qpd->devp->lock);
  134. idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
  135. spin_unlock_irq(&qpd->devp->lock);
  136. qpd->buf[qpd->pos++] = 0;
  137. file->private_data = qpd;
  138. goto out;
  139. err1:
  140. kfree(qpd);
  141. out:
  142. return ret;
  143. }
  144. static const struct file_operations qp_debugfs_fops = {
  145. .owner = THIS_MODULE,
  146. .open = qp_open,
  147. .release = qp_release,
  148. .read = debugfs_read,
  149. .llseek = default_llseek,
  150. };
  151. static int dump_stag(int id, void *p, void *data)
  152. {
  153. struct c4iw_debugfs_data *stagd = data;
  154. int space;
  155. int cc;
  156. space = stagd->bufsize - stagd->pos - 1;
  157. if (space == 0)
  158. return 1;
  159. cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
  160. if (cc < space)
  161. stagd->pos += cc;
  162. return 0;
  163. }
  164. static int stag_release(struct inode *inode, struct file *file)
  165. {
  166. struct c4iw_debugfs_data *stagd = file->private_data;
  167. if (!stagd) {
  168. printk(KERN_INFO "%s null stagd?\n", __func__);
  169. return 0;
  170. }
  171. kfree(stagd->buf);
  172. kfree(stagd);
  173. return 0;
  174. }
  175. static int stag_open(struct inode *inode, struct file *file)
  176. {
  177. struct c4iw_debugfs_data *stagd;
  178. int ret = 0;
  179. int count = 1;
  180. stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
  181. if (!stagd) {
  182. ret = -ENOMEM;
  183. goto out;
  184. }
  185. stagd->devp = inode->i_private;
  186. stagd->pos = 0;
  187. spin_lock_irq(&stagd->devp->lock);
  188. idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
  189. spin_unlock_irq(&stagd->devp->lock);
  190. stagd->bufsize = count * sizeof("0x12345678\n");
  191. stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
  192. if (!stagd->buf) {
  193. ret = -ENOMEM;
  194. goto err1;
  195. }
  196. spin_lock_irq(&stagd->devp->lock);
  197. idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
  198. spin_unlock_irq(&stagd->devp->lock);
  199. stagd->buf[stagd->pos++] = 0;
  200. file->private_data = stagd;
  201. goto out;
  202. err1:
  203. kfree(stagd);
  204. out:
  205. return ret;
  206. }
  207. static const struct file_operations stag_debugfs_fops = {
  208. .owner = THIS_MODULE,
  209. .open = stag_open,
  210. .release = stag_release,
  211. .read = debugfs_read,
  212. .llseek = default_llseek,
  213. };
  214. static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY"};
  215. static int stats_show(struct seq_file *seq, void *v)
  216. {
  217. struct c4iw_dev *dev = seq->private;
  218. seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current",
  219. "Max", "Fail");
  220. seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n",
  221. dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
  222. dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
  223. seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n",
  224. dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
  225. dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
  226. seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n",
  227. dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
  228. dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
  229. seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n",
  230. dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
  231. dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
  232. seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n",
  233. dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
  234. dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
  235. seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n",
  236. dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
  237. dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
  238. seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full);
  239. seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
  240. seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop);
  241. seq_printf(seq, " DB State: %s Transitions %llu\n",
  242. db_state_str[dev->db_state],
  243. dev->rdev.stats.db_state_transitions);
  244. return 0;
  245. }
  246. static int stats_open(struct inode *inode, struct file *file)
  247. {
  248. return single_open(file, stats_show, inode->i_private);
  249. }
  250. static ssize_t stats_clear(struct file *file, const char __user *buf,
  251. size_t count, loff_t *pos)
  252. {
  253. struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
  254. mutex_lock(&dev->rdev.stats.lock);
  255. dev->rdev.stats.pd.max = 0;
  256. dev->rdev.stats.pd.fail = 0;
  257. dev->rdev.stats.qid.max = 0;
  258. dev->rdev.stats.qid.fail = 0;
  259. dev->rdev.stats.stag.max = 0;
  260. dev->rdev.stats.stag.fail = 0;
  261. dev->rdev.stats.pbl.max = 0;
  262. dev->rdev.stats.pbl.fail = 0;
  263. dev->rdev.stats.rqt.max = 0;
  264. dev->rdev.stats.rqt.fail = 0;
  265. dev->rdev.stats.ocqp.max = 0;
  266. dev->rdev.stats.ocqp.fail = 0;
  267. dev->rdev.stats.db_full = 0;
  268. dev->rdev.stats.db_empty = 0;
  269. dev->rdev.stats.db_drop = 0;
  270. dev->rdev.stats.db_state_transitions = 0;
  271. mutex_unlock(&dev->rdev.stats.lock);
  272. return count;
  273. }
  274. static const struct file_operations stats_debugfs_fops = {
  275. .owner = THIS_MODULE,
  276. .open = stats_open,
  277. .release = single_release,
  278. .read = seq_read,
  279. .llseek = seq_lseek,
  280. .write = stats_clear,
  281. };
  282. static int setup_debugfs(struct c4iw_dev *devp)
  283. {
  284. struct dentry *de;
  285. if (!devp->debugfs_root)
  286. return -1;
  287. de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
  288. (void *)devp, &qp_debugfs_fops);
  289. if (de && de->d_inode)
  290. de->d_inode->i_size = 4096;
  291. de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
  292. (void *)devp, &stag_debugfs_fops);
  293. if (de && de->d_inode)
  294. de->d_inode->i_size = 4096;
  295. de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root,
  296. (void *)devp, &stats_debugfs_fops);
  297. if (de && de->d_inode)
  298. de->d_inode->i_size = 4096;
  299. return 0;
  300. }
  301. void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
  302. struct c4iw_dev_ucontext *uctx)
  303. {
  304. struct list_head *pos, *nxt;
  305. struct c4iw_qid_list *entry;
  306. mutex_lock(&uctx->lock);
  307. list_for_each_safe(pos, nxt, &uctx->qpids) {
  308. entry = list_entry(pos, struct c4iw_qid_list, entry);
  309. list_del_init(&entry->entry);
  310. if (!(entry->qid & rdev->qpmask)) {
  311. c4iw_put_resource(&rdev->resource.qid_table,
  312. entry->qid);
  313. mutex_lock(&rdev->stats.lock);
  314. rdev->stats.qid.cur -= rdev->qpmask + 1;
  315. mutex_unlock(&rdev->stats.lock);
  316. }
  317. kfree(entry);
  318. }
  319. list_for_each_safe(pos, nxt, &uctx->qpids) {
  320. entry = list_entry(pos, struct c4iw_qid_list, entry);
  321. list_del_init(&entry->entry);
  322. kfree(entry);
  323. }
  324. mutex_unlock(&uctx->lock);
  325. }
  326. void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
  327. struct c4iw_dev_ucontext *uctx)
  328. {
  329. INIT_LIST_HEAD(&uctx->qpids);
  330. INIT_LIST_HEAD(&uctx->cqids);
  331. mutex_init(&uctx->lock);
  332. }
  333. /* Caller takes care of locking if needed */
  334. static int c4iw_rdev_open(struct c4iw_rdev *rdev)
  335. {
  336. int err;
  337. c4iw_init_dev_ucontext(rdev, &rdev->uctx);
  338. /*
  339. * qpshift is the number of bits to shift the qpid left in order
  340. * to get the correct address of the doorbell for that qp.
  341. */
  342. rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
  343. rdev->qpmask = rdev->lldi.udb_density - 1;
  344. rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
  345. rdev->cqmask = rdev->lldi.ucq_density - 1;
  346. PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
  347. "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
  348. "qp qid start %u size %u cq qid start %u size %u\n",
  349. __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
  350. rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
  351. rdev->lldi.vr->pbl.start,
  352. rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
  353. rdev->lldi.vr->rq.size,
  354. rdev->lldi.vr->qp.start,
  355. rdev->lldi.vr->qp.size,
  356. rdev->lldi.vr->cq.start,
  357. rdev->lldi.vr->cq.size);
  358. PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu "
  359. "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
  360. (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
  361. (void *)pci_resource_start(rdev->lldi.pdev, 2),
  362. rdev->lldi.db_reg,
  363. rdev->lldi.gts_reg,
  364. rdev->qpshift, rdev->qpmask,
  365. rdev->cqshift, rdev->cqmask);
  366. if (c4iw_num_stags(rdev) == 0) {
  367. err = -EINVAL;
  368. goto err1;
  369. }
  370. rdev->stats.pd.total = T4_MAX_NUM_PD;
  371. rdev->stats.stag.total = rdev->lldi.vr->stag.size;
  372. rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
  373. rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
  374. rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
  375. rdev->stats.qid.total = rdev->lldi.vr->qp.size;
  376. err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
  377. if (err) {
  378. printk(KERN_ERR MOD "error %d initializing resources\n", err);
  379. goto err1;
  380. }
  381. err = c4iw_pblpool_create(rdev);
  382. if (err) {
  383. printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
  384. goto err2;
  385. }
  386. err = c4iw_rqtpool_create(rdev);
  387. if (err) {
  388. printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
  389. goto err3;
  390. }
  391. err = c4iw_ocqp_pool_create(rdev);
  392. if (err) {
  393. printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
  394. goto err4;
  395. }
  396. return 0;
  397. err4:
  398. c4iw_rqtpool_destroy(rdev);
  399. err3:
  400. c4iw_pblpool_destroy(rdev);
  401. err2:
  402. c4iw_destroy_resource(&rdev->resource);
  403. err1:
  404. return err;
  405. }
  406. static void c4iw_rdev_close(struct c4iw_rdev *rdev)
  407. {
  408. c4iw_pblpool_destroy(rdev);
  409. c4iw_rqtpool_destroy(rdev);
  410. c4iw_destroy_resource(&rdev->resource);
  411. }
  412. static void c4iw_dealloc(struct uld_ctx *ctx)
  413. {
  414. c4iw_rdev_close(&ctx->dev->rdev);
  415. idr_destroy(&ctx->dev->cqidr);
  416. idr_destroy(&ctx->dev->qpidr);
  417. idr_destroy(&ctx->dev->mmidr);
  418. iounmap(ctx->dev->rdev.oc_mw_kva);
  419. ib_dealloc_device(&ctx->dev->ibdev);
  420. ctx->dev = NULL;
  421. }
  422. static void c4iw_remove(struct uld_ctx *ctx)
  423. {
  424. PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
  425. c4iw_unregister_device(ctx->dev);
  426. c4iw_dealloc(ctx);
  427. }
  428. static int rdma_supported(const struct cxgb4_lld_info *infop)
  429. {
  430. return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
  431. infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
  432. infop->vr->cq.size > 0 && infop->vr->ocq.size > 0;
  433. }
  434. static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
  435. {
  436. struct c4iw_dev *devp;
  437. int ret;
  438. if (!rdma_supported(infop)) {
  439. printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
  440. pci_name(infop->pdev));
  441. return ERR_PTR(-ENOSYS);
  442. }
  443. devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
  444. if (!devp) {
  445. printk(KERN_ERR MOD "Cannot allocate ib device\n");
  446. return ERR_PTR(-ENOMEM);
  447. }
  448. devp->rdev.lldi = *infop;
  449. devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
  450. (pci_resource_len(devp->rdev.lldi.pdev, 2) -
  451. roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
  452. devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
  453. devp->rdev.lldi.vr->ocq.size);
  454. PDBG(KERN_INFO MOD "ocq memory: "
  455. "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
  456. devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
  457. devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
  458. ret = c4iw_rdev_open(&devp->rdev);
  459. if (ret) {
  460. printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
  461. ib_dealloc_device(&devp->ibdev);
  462. return ERR_PTR(ret);
  463. }
  464. idr_init(&devp->cqidr);
  465. idr_init(&devp->qpidr);
  466. idr_init(&devp->mmidr);
  467. spin_lock_init(&devp->lock);
  468. mutex_init(&devp->rdev.stats.lock);
  469. mutex_init(&devp->db_mutex);
  470. if (c4iw_debugfs_root) {
  471. devp->debugfs_root = debugfs_create_dir(
  472. pci_name(devp->rdev.lldi.pdev),
  473. c4iw_debugfs_root);
  474. setup_debugfs(devp);
  475. }
  476. return devp;
  477. }
  478. static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
  479. {
  480. struct uld_ctx *ctx;
  481. static int vers_printed;
  482. int i;
  483. if (!vers_printed++)
  484. printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n",
  485. DRV_VERSION);
  486. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  487. if (!ctx) {
  488. ctx = ERR_PTR(-ENOMEM);
  489. goto out;
  490. }
  491. ctx->lldi = *infop;
  492. PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
  493. __func__, pci_name(ctx->lldi.pdev),
  494. ctx->lldi.nchan, ctx->lldi.nrxq,
  495. ctx->lldi.ntxq, ctx->lldi.nports);
  496. mutex_lock(&dev_mutex);
  497. list_add_tail(&ctx->entry, &uld_ctx_list);
  498. mutex_unlock(&dev_mutex);
  499. for (i = 0; i < ctx->lldi.nrxq; i++)
  500. PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
  501. out:
  502. return ctx;
  503. }
  504. static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
  505. const struct pkt_gl *gl)
  506. {
  507. struct uld_ctx *ctx = handle;
  508. struct c4iw_dev *dev = ctx->dev;
  509. struct sk_buff *skb;
  510. const struct cpl_act_establish *rpl;
  511. unsigned int opcode;
  512. if (gl == NULL) {
  513. /* omit RSS and rsp_ctrl at end of descriptor */
  514. unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
  515. skb = alloc_skb(256, GFP_ATOMIC);
  516. if (!skb)
  517. goto nomem;
  518. __skb_put(skb, len);
  519. skb_copy_to_linear_data(skb, &rsp[1], len);
  520. } else if (gl == CXGB4_MSG_AN) {
  521. const struct rsp_ctrl *rc = (void *)rsp;
  522. u32 qid = be32_to_cpu(rc->pldbuflen_qid);
  523. c4iw_ev_handler(dev, qid);
  524. return 0;
  525. } else {
  526. skb = cxgb4_pktgl_to_skb(gl, 128, 128);
  527. if (unlikely(!skb))
  528. goto nomem;
  529. }
  530. rpl = cplhdr(skb);
  531. opcode = rpl->ot.opcode;
  532. if (c4iw_handlers[opcode])
  533. c4iw_handlers[opcode](dev, skb);
  534. else
  535. printk(KERN_INFO "%s no handler opcode 0x%x...\n", __func__,
  536. opcode);
  537. return 0;
  538. nomem:
  539. return -1;
  540. }
  541. static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
  542. {
  543. struct uld_ctx *ctx = handle;
  544. PDBG("%s new_state %u\n", __func__, new_state);
  545. switch (new_state) {
  546. case CXGB4_STATE_UP:
  547. printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
  548. if (!ctx->dev) {
  549. int ret;
  550. ctx->dev = c4iw_alloc(&ctx->lldi);
  551. if (IS_ERR(ctx->dev)) {
  552. printk(KERN_ERR MOD
  553. "%s: initialization failed: %ld\n",
  554. pci_name(ctx->lldi.pdev),
  555. PTR_ERR(ctx->dev));
  556. ctx->dev = NULL;
  557. break;
  558. }
  559. ret = c4iw_register_device(ctx->dev);
  560. if (ret) {
  561. printk(KERN_ERR MOD
  562. "%s: RDMA registration failed: %d\n",
  563. pci_name(ctx->lldi.pdev), ret);
  564. c4iw_dealloc(ctx);
  565. }
  566. }
  567. break;
  568. case CXGB4_STATE_DOWN:
  569. printk(KERN_INFO MOD "%s: Down\n",
  570. pci_name(ctx->lldi.pdev));
  571. if (ctx->dev)
  572. c4iw_remove(ctx);
  573. break;
  574. case CXGB4_STATE_START_RECOVERY:
  575. printk(KERN_INFO MOD "%s: Fatal Error\n",
  576. pci_name(ctx->lldi.pdev));
  577. if (ctx->dev) {
  578. struct ib_event event;
  579. ctx->dev->rdev.flags |= T4_FATAL_ERROR;
  580. memset(&event, 0, sizeof event);
  581. event.event = IB_EVENT_DEVICE_FATAL;
  582. event.device = &ctx->dev->ibdev;
  583. ib_dispatch_event(&event);
  584. c4iw_remove(ctx);
  585. }
  586. break;
  587. case CXGB4_STATE_DETACH:
  588. printk(KERN_INFO MOD "%s: Detach\n",
  589. pci_name(ctx->lldi.pdev));
  590. if (ctx->dev)
  591. c4iw_remove(ctx);
  592. break;
  593. }
  594. return 0;
  595. }
  596. static int disable_qp_db(int id, void *p, void *data)
  597. {
  598. struct c4iw_qp *qp = p;
  599. t4_disable_wq_db(&qp->wq);
  600. return 0;
  601. }
  602. static void stop_queues(struct uld_ctx *ctx)
  603. {
  604. spin_lock_irq(&ctx->dev->lock);
  605. if (ctx->dev->db_state == NORMAL) {
  606. ctx->dev->rdev.stats.db_state_transitions++;
  607. ctx->dev->db_state = FLOW_CONTROL;
  608. idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
  609. }
  610. spin_unlock_irq(&ctx->dev->lock);
  611. }
  612. static int enable_qp_db(int id, void *p, void *data)
  613. {
  614. struct c4iw_qp *qp = p;
  615. t4_enable_wq_db(&qp->wq);
  616. return 0;
  617. }
  618. static void resume_queues(struct uld_ctx *ctx)
  619. {
  620. spin_lock_irq(&ctx->dev->lock);
  621. if (ctx->dev->qpcnt <= db_fc_threshold &&
  622. ctx->dev->db_state == FLOW_CONTROL) {
  623. ctx->dev->db_state = NORMAL;
  624. ctx->dev->rdev.stats.db_state_transitions++;
  625. idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
  626. }
  627. spin_unlock_irq(&ctx->dev->lock);
  628. }
  629. struct qp_list {
  630. unsigned idx;
  631. struct c4iw_qp **qps;
  632. };
  633. static int add_and_ref_qp(int id, void *p, void *data)
  634. {
  635. struct qp_list *qp_listp = data;
  636. struct c4iw_qp *qp = p;
  637. c4iw_qp_add_ref(&qp->ibqp);
  638. qp_listp->qps[qp_listp->idx++] = qp;
  639. return 0;
  640. }
  641. static int count_qps(int id, void *p, void *data)
  642. {
  643. unsigned *countp = data;
  644. (*countp)++;
  645. return 0;
  646. }
  647. static void deref_qps(struct qp_list qp_list)
  648. {
  649. int idx;
  650. for (idx = 0; idx < qp_list.idx; idx++)
  651. c4iw_qp_rem_ref(&qp_list.qps[idx]->ibqp);
  652. }
  653. static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
  654. {
  655. int idx;
  656. int ret;
  657. for (idx = 0; idx < qp_list->idx; idx++) {
  658. struct c4iw_qp *qp = qp_list->qps[idx];
  659. ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
  660. qp->wq.sq.qid,
  661. t4_sq_host_wq_pidx(&qp->wq),
  662. t4_sq_wq_size(&qp->wq));
  663. if (ret) {
  664. printk(KERN_ERR MOD "%s: Fatal error - "
  665. "DB overflow recovery failed - "
  666. "error syncing SQ qid %u\n",
  667. pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
  668. return;
  669. }
  670. ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
  671. qp->wq.rq.qid,
  672. t4_rq_host_wq_pidx(&qp->wq),
  673. t4_rq_wq_size(&qp->wq));
  674. if (ret) {
  675. printk(KERN_ERR MOD "%s: Fatal error - "
  676. "DB overflow recovery failed - "
  677. "error syncing RQ qid %u\n",
  678. pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
  679. return;
  680. }
  681. /* Wait for the dbfifo to drain */
  682. while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
  683. set_current_state(TASK_UNINTERRUPTIBLE);
  684. schedule_timeout(usecs_to_jiffies(10));
  685. }
  686. }
  687. }
  688. static void recover_queues(struct uld_ctx *ctx)
  689. {
  690. int count = 0;
  691. struct qp_list qp_list;
  692. int ret;
  693. /* lock out kernel db ringers */
  694. mutex_lock(&ctx->dev->db_mutex);
  695. /* put all queues in to recovery mode */
  696. spin_lock_irq(&ctx->dev->lock);
  697. ctx->dev->db_state = RECOVERY;
  698. ctx->dev->rdev.stats.db_state_transitions++;
  699. idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
  700. spin_unlock_irq(&ctx->dev->lock);
  701. /* slow everybody down */
  702. set_current_state(TASK_UNINTERRUPTIBLE);
  703. schedule_timeout(usecs_to_jiffies(1000));
  704. /* Wait for the dbfifo to completely drain. */
  705. while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
  706. set_current_state(TASK_UNINTERRUPTIBLE);
  707. schedule_timeout(usecs_to_jiffies(10));
  708. }
  709. /* flush the SGE contexts */
  710. ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
  711. if (ret) {
  712. printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
  713. pci_name(ctx->lldi.pdev));
  714. goto out;
  715. }
  716. /* Count active queues so we can build a list of queues to recover */
  717. spin_lock_irq(&ctx->dev->lock);
  718. idr_for_each(&ctx->dev->qpidr, count_qps, &count);
  719. qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
  720. if (!qp_list.qps) {
  721. printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
  722. pci_name(ctx->lldi.pdev));
  723. spin_unlock_irq(&ctx->dev->lock);
  724. goto out;
  725. }
  726. qp_list.idx = 0;
  727. /* add and ref each qp so it doesn't get freed */
  728. idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
  729. spin_unlock_irq(&ctx->dev->lock);
  730. /* now traverse the list in a safe context to recover the db state*/
  731. recover_lost_dbs(ctx, &qp_list);
  732. /* we're almost done! deref the qps and clean up */
  733. deref_qps(qp_list);
  734. kfree(qp_list.qps);
  735. /* Wait for the dbfifo to completely drain again */
  736. while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
  737. set_current_state(TASK_UNINTERRUPTIBLE);
  738. schedule_timeout(usecs_to_jiffies(10));
  739. }
  740. /* resume the queues */
  741. spin_lock_irq(&ctx->dev->lock);
  742. if (ctx->dev->qpcnt > db_fc_threshold)
  743. ctx->dev->db_state = FLOW_CONTROL;
  744. else {
  745. ctx->dev->db_state = NORMAL;
  746. idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
  747. }
  748. ctx->dev->rdev.stats.db_state_transitions++;
  749. spin_unlock_irq(&ctx->dev->lock);
  750. out:
  751. /* start up kernel db ringers again */
  752. mutex_unlock(&ctx->dev->db_mutex);
  753. }
  754. static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
  755. {
  756. struct uld_ctx *ctx = handle;
  757. switch (control) {
  758. case CXGB4_CONTROL_DB_FULL:
  759. stop_queues(ctx);
  760. mutex_lock(&ctx->dev->rdev.stats.lock);
  761. ctx->dev->rdev.stats.db_full++;
  762. mutex_unlock(&ctx->dev->rdev.stats.lock);
  763. break;
  764. case CXGB4_CONTROL_DB_EMPTY:
  765. resume_queues(ctx);
  766. mutex_lock(&ctx->dev->rdev.stats.lock);
  767. ctx->dev->rdev.stats.db_empty++;
  768. mutex_unlock(&ctx->dev->rdev.stats.lock);
  769. break;
  770. case CXGB4_CONTROL_DB_DROP:
  771. recover_queues(ctx);
  772. mutex_lock(&ctx->dev->rdev.stats.lock);
  773. ctx->dev->rdev.stats.db_drop++;
  774. mutex_unlock(&ctx->dev->rdev.stats.lock);
  775. break;
  776. default:
  777. printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",
  778. pci_name(ctx->lldi.pdev), control);
  779. break;
  780. }
  781. return 0;
  782. }
  783. static struct cxgb4_uld_info c4iw_uld_info = {
  784. .name = DRV_NAME,
  785. .add = c4iw_uld_add,
  786. .rx_handler = c4iw_uld_rx_handler,
  787. .state_change = c4iw_uld_state_change,
  788. .control = c4iw_uld_control,
  789. };
  790. static int __init c4iw_init_module(void)
  791. {
  792. int err;
  793. err = c4iw_cm_init();
  794. if (err)
  795. return err;
  796. c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
  797. if (!c4iw_debugfs_root)
  798. printk(KERN_WARNING MOD
  799. "could not create debugfs entry, continuing\n");
  800. cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
  801. return 0;
  802. }
  803. static void __exit c4iw_exit_module(void)
  804. {
  805. struct uld_ctx *ctx, *tmp;
  806. mutex_lock(&dev_mutex);
  807. list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
  808. if (ctx->dev)
  809. c4iw_remove(ctx);
  810. kfree(ctx);
  811. }
  812. mutex_unlock(&dev_mutex);
  813. cxgb4_unregister_uld(CXGB4_ULD_RDMA);
  814. c4iw_cm_term();
  815. debugfs_remove_recursive(c4iw_debugfs_root);
  816. }
  817. module_init(c4iw_init_module);
  818. module_exit(c4iw_exit_module);