ad7266.c 13 KB

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  1. /*
  2. * AD7266/65 SPI ADC driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/buffer.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. #include <linux/platform_data/ad7266.h>
  22. struct ad7266_state {
  23. struct spi_device *spi;
  24. struct regulator *reg;
  25. unsigned long vref_uv;
  26. struct spi_transfer single_xfer[3];
  27. struct spi_message single_msg;
  28. enum ad7266_range range;
  29. enum ad7266_mode mode;
  30. bool fixed_addr;
  31. struct gpio gpios[3];
  32. /*
  33. * DMA (thus cache coherency maintenance) requires the
  34. * transfer buffers to live in their own cache lines.
  35. * The buffer needs to be large enough to hold two samples (4 bytes) and
  36. * the naturally aligned timestamp (8 bytes).
  37. */
  38. uint8_t data[ALIGN(4, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
  39. };
  40. static int ad7266_wakeup(struct ad7266_state *st)
  41. {
  42. /* Any read with >= 2 bytes will wake the device */
  43. return spi_read(st->spi, st->data, 2);
  44. }
  45. static int ad7266_powerdown(struct ad7266_state *st)
  46. {
  47. /* Any read with < 2 bytes will powerdown the device */
  48. return spi_read(st->spi, st->data, 1);
  49. }
  50. static int ad7266_preenable(struct iio_dev *indio_dev)
  51. {
  52. struct ad7266_state *st = iio_priv(indio_dev);
  53. int ret;
  54. ret = ad7266_wakeup(st);
  55. if (ret)
  56. return ret;
  57. ret = iio_sw_buffer_preenable(indio_dev);
  58. if (ret)
  59. ad7266_powerdown(st);
  60. return ret;
  61. }
  62. static int ad7266_postdisable(struct iio_dev *indio_dev)
  63. {
  64. struct ad7266_state *st = iio_priv(indio_dev);
  65. return ad7266_powerdown(st);
  66. }
  67. static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
  68. .preenable = &ad7266_preenable,
  69. .postenable = &iio_triggered_buffer_postenable,
  70. .predisable = &iio_triggered_buffer_predisable,
  71. .postdisable = &ad7266_postdisable,
  72. };
  73. static irqreturn_t ad7266_trigger_handler(int irq, void *p)
  74. {
  75. struct iio_poll_func *pf = p;
  76. struct iio_dev *indio_dev = pf->indio_dev;
  77. struct iio_buffer *buffer = indio_dev->buffer;
  78. struct ad7266_state *st = iio_priv(indio_dev);
  79. int ret;
  80. ret = spi_read(st->spi, st->data, 4);
  81. if (ret == 0) {
  82. if (indio_dev->scan_timestamp)
  83. ((s64 *)st->data)[1] = pf->timestamp;
  84. iio_push_to_buffer(buffer, (u8 *)st->data, pf->timestamp);
  85. }
  86. iio_trigger_notify_done(indio_dev->trig);
  87. return IRQ_HANDLED;
  88. }
  89. static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
  90. {
  91. unsigned int i;
  92. if (st->fixed_addr)
  93. return;
  94. switch (st->mode) {
  95. case AD7266_MODE_SINGLE_ENDED:
  96. nr >>= 1;
  97. break;
  98. case AD7266_MODE_PSEUDO_DIFF:
  99. nr |= 1;
  100. break;
  101. case AD7266_MODE_DIFF:
  102. nr &= ~1;
  103. break;
  104. }
  105. for (i = 0; i < 3; ++i)
  106. gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
  107. }
  108. static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
  109. const unsigned long *scan_mask)
  110. {
  111. struct ad7266_state *st = iio_priv(indio_dev);
  112. unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
  113. ad7266_select_input(st, nr);
  114. return 0;
  115. }
  116. static int ad7266_read_single(struct ad7266_state *st, int *val,
  117. unsigned int address)
  118. {
  119. int ret;
  120. ad7266_select_input(st, address);
  121. ret = spi_sync(st->spi, &st->single_msg);
  122. *val = be16_to_cpu(st->data[address % 2]);
  123. return ret;
  124. }
  125. static int ad7266_read_raw(struct iio_dev *indio_dev,
  126. struct iio_chan_spec const *chan, int *val, int *val2, long m)
  127. {
  128. struct ad7266_state *st = iio_priv(indio_dev);
  129. unsigned long scale_uv;
  130. int ret;
  131. switch (m) {
  132. case IIO_CHAN_INFO_RAW:
  133. if (iio_buffer_enabled(indio_dev))
  134. return -EBUSY;
  135. ret = ad7266_read_single(st, val, chan->address);
  136. if (ret)
  137. return ret;
  138. *val = (*val >> 2) & 0xfff;
  139. if (chan->scan_type.sign == 's')
  140. *val = sign_extend32(*val, 11);
  141. return IIO_VAL_INT;
  142. case IIO_CHAN_INFO_SCALE:
  143. scale_uv = (st->vref_uv * 100);
  144. if (st->mode == AD7266_MODE_DIFF)
  145. scale_uv *= 2;
  146. if (st->range == AD7266_RANGE_2VREF)
  147. scale_uv *= 2;
  148. scale_uv >>= chan->scan_type.realbits;
  149. *val = scale_uv / 100000;
  150. *val2 = (scale_uv % 100000) * 10;
  151. return IIO_VAL_INT_PLUS_MICRO;
  152. case IIO_CHAN_INFO_OFFSET:
  153. if (st->range == AD7266_RANGE_2VREF &&
  154. st->mode != AD7266_MODE_DIFF)
  155. *val = 2048;
  156. else
  157. *val = 0;
  158. return IIO_VAL_INT;
  159. }
  160. return -EINVAL;
  161. }
  162. #define AD7266_CHAN(_chan, _sign) { \
  163. .type = IIO_VOLTAGE, \
  164. .indexed = 1, \
  165. .channel = (_chan), \
  166. .address = (_chan), \
  167. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \
  168. | IIO_CHAN_INFO_SCALE_SHARED_BIT \
  169. | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
  170. .scan_index = (_chan), \
  171. .scan_type = { \
  172. .sign = (_sign), \
  173. .realbits = 12, \
  174. .storagebits = 16, \
  175. .shift = 2, \
  176. .endianness = IIO_BE, \
  177. }, \
  178. }
  179. #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
  180. const struct iio_chan_spec ad7266_channels_##_name[] = { \
  181. AD7266_CHAN(0, (_sign)), \
  182. AD7266_CHAN(1, (_sign)), \
  183. AD7266_CHAN(2, (_sign)), \
  184. AD7266_CHAN(3, (_sign)), \
  185. AD7266_CHAN(4, (_sign)), \
  186. AD7266_CHAN(5, (_sign)), \
  187. AD7266_CHAN(6, (_sign)), \
  188. AD7266_CHAN(7, (_sign)), \
  189. AD7266_CHAN(8, (_sign)), \
  190. AD7266_CHAN(9, (_sign)), \
  191. AD7266_CHAN(10, (_sign)), \
  192. AD7266_CHAN(11, (_sign)), \
  193. IIO_CHAN_SOFT_TIMESTAMP(13), \
  194. }
  195. #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
  196. const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
  197. AD7266_CHAN(0, (_sign)), \
  198. AD7266_CHAN(1, (_sign)), \
  199. IIO_CHAN_SOFT_TIMESTAMP(2), \
  200. }
  201. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
  202. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
  203. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
  204. static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
  205. #define AD7266_CHAN_DIFF(_chan, _sign) { \
  206. .type = IIO_VOLTAGE, \
  207. .indexed = 1, \
  208. .channel = (_chan) * 2, \
  209. .channel2 = (_chan) * 2 + 1, \
  210. .address = (_chan), \
  211. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \
  212. | IIO_CHAN_INFO_SCALE_SHARED_BIT \
  213. | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
  214. .scan_index = (_chan), \
  215. .scan_type = { \
  216. .sign = _sign, \
  217. .realbits = 12, \
  218. .storagebits = 16, \
  219. .shift = 2, \
  220. .endianness = IIO_BE, \
  221. }, \
  222. .differential = 1, \
  223. }
  224. #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
  225. const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
  226. AD7266_CHAN_DIFF(0, (_sign)), \
  227. AD7266_CHAN_DIFF(1, (_sign)), \
  228. AD7266_CHAN_DIFF(2, (_sign)), \
  229. AD7266_CHAN_DIFF(3, (_sign)), \
  230. AD7266_CHAN_DIFF(4, (_sign)), \
  231. AD7266_CHAN_DIFF(5, (_sign)), \
  232. IIO_CHAN_SOFT_TIMESTAMP(6), \
  233. }
  234. static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
  235. static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
  236. #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
  237. const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
  238. AD7266_CHAN_DIFF(0, (_sign)), \
  239. AD7266_CHAN_DIFF(1, (_sign)), \
  240. IIO_CHAN_SOFT_TIMESTAMP(2), \
  241. }
  242. static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
  243. static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
  244. static const struct iio_info ad7266_info = {
  245. .read_raw = &ad7266_read_raw,
  246. .update_scan_mode = &ad7266_update_scan_mode,
  247. .driver_module = THIS_MODULE,
  248. };
  249. static unsigned long ad7266_available_scan_masks[] = {
  250. 0x003,
  251. 0x00c,
  252. 0x030,
  253. 0x0c0,
  254. 0x300,
  255. 0xc00,
  256. 0x000,
  257. };
  258. static unsigned long ad7266_available_scan_masks_diff[] = {
  259. 0x003,
  260. 0x00c,
  261. 0x030,
  262. 0x000,
  263. };
  264. static unsigned long ad7266_available_scan_masks_fixed[] = {
  265. 0x003,
  266. 0x000,
  267. };
  268. struct ad7266_chan_info {
  269. const struct iio_chan_spec *channels;
  270. unsigned int num_channels;
  271. unsigned long *scan_masks;
  272. };
  273. #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
  274. (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
  275. static const struct ad7266_chan_info ad7266_chan_infos[] = {
  276. [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
  277. .channels = ad7266_channels_u,
  278. .num_channels = ARRAY_SIZE(ad7266_channels_u),
  279. .scan_masks = ad7266_available_scan_masks,
  280. },
  281. [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
  282. .channels = ad7266_channels_u_fixed,
  283. .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
  284. .scan_masks = ad7266_available_scan_masks_fixed,
  285. },
  286. [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
  287. .channels = ad7266_channels_s,
  288. .num_channels = ARRAY_SIZE(ad7266_channels_s),
  289. .scan_masks = ad7266_available_scan_masks,
  290. },
  291. [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
  292. .channels = ad7266_channels_s_fixed,
  293. .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
  294. .scan_masks = ad7266_available_scan_masks_fixed,
  295. },
  296. [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
  297. .channels = ad7266_channels_diff_u,
  298. .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
  299. .scan_masks = ad7266_available_scan_masks_diff,
  300. },
  301. [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
  302. .channels = ad7266_channels_diff_fixed_u,
  303. .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
  304. .scan_masks = ad7266_available_scan_masks_fixed,
  305. },
  306. [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
  307. .channels = ad7266_channels_diff_s,
  308. .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
  309. .scan_masks = ad7266_available_scan_masks_diff,
  310. },
  311. [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
  312. .channels = ad7266_channels_diff_fixed_s,
  313. .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
  314. .scan_masks = ad7266_available_scan_masks_fixed,
  315. },
  316. };
  317. static void __devinit ad7266_init_channels(struct iio_dev *indio_dev)
  318. {
  319. struct ad7266_state *st = iio_priv(indio_dev);
  320. bool is_differential, is_signed;
  321. const struct ad7266_chan_info *chan_info;
  322. int i;
  323. is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
  324. is_signed = (st->range == AD7266_RANGE_2VREF) |
  325. (st->mode == AD7266_MODE_DIFF);
  326. i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
  327. chan_info = &ad7266_chan_infos[i];
  328. indio_dev->channels = chan_info->channels;
  329. indio_dev->num_channels = chan_info->num_channels;
  330. indio_dev->available_scan_masks = chan_info->scan_masks;
  331. indio_dev->masklength = chan_info->num_channels - 1;
  332. }
  333. static const char * const ad7266_gpio_labels[] = {
  334. "AD0", "AD1", "AD2",
  335. };
  336. static int __devinit ad7266_probe(struct spi_device *spi)
  337. {
  338. struct ad7266_platform_data *pdata = spi->dev.platform_data;
  339. struct iio_dev *indio_dev;
  340. struct ad7266_state *st;
  341. unsigned int i;
  342. int ret;
  343. indio_dev = iio_device_alloc(sizeof(*st));
  344. if (indio_dev == NULL)
  345. return -ENOMEM;
  346. st = iio_priv(indio_dev);
  347. st->reg = regulator_get(&spi->dev, "vref");
  348. if (!IS_ERR_OR_NULL(st->reg)) {
  349. ret = regulator_enable(st->reg);
  350. if (ret)
  351. goto error_put_reg;
  352. st->vref_uv = regulator_get_voltage(st->reg);
  353. } else {
  354. /* Use internal reference */
  355. st->vref_uv = 2500000;
  356. }
  357. if (pdata) {
  358. st->fixed_addr = pdata->fixed_addr;
  359. st->mode = pdata->mode;
  360. st->range = pdata->range;
  361. if (!st->fixed_addr) {
  362. for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
  363. st->gpios[i].gpio = pdata->addr_gpios[i];
  364. st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
  365. st->gpios[i].label = ad7266_gpio_labels[i];
  366. }
  367. ret = gpio_request_array(st->gpios,
  368. ARRAY_SIZE(st->gpios));
  369. if (ret)
  370. goto error_disable_reg;
  371. }
  372. } else {
  373. st->fixed_addr = true;
  374. st->range = AD7266_RANGE_VREF;
  375. st->mode = AD7266_MODE_DIFF;
  376. }
  377. spi_set_drvdata(spi, indio_dev);
  378. st->spi = spi;
  379. indio_dev->dev.parent = &spi->dev;
  380. indio_dev->name = spi_get_device_id(spi)->name;
  381. indio_dev->modes = INDIO_DIRECT_MODE;
  382. indio_dev->info = &ad7266_info;
  383. ad7266_init_channels(indio_dev);
  384. /* wakeup */
  385. st->single_xfer[0].rx_buf = &st->data;
  386. st->single_xfer[0].len = 2;
  387. st->single_xfer[0].cs_change = 1;
  388. /* conversion */
  389. st->single_xfer[1].rx_buf = &st->data;
  390. st->single_xfer[1].len = 4;
  391. st->single_xfer[1].cs_change = 1;
  392. /* powerdown */
  393. st->single_xfer[2].tx_buf = &st->data;
  394. st->single_xfer[2].len = 1;
  395. spi_message_init(&st->single_msg);
  396. spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
  397. spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
  398. spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
  399. ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  400. &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
  401. if (ret)
  402. goto error_free_gpios;
  403. ret = iio_device_register(indio_dev);
  404. if (ret)
  405. goto error_buffer_cleanup;
  406. return 0;
  407. error_buffer_cleanup:
  408. iio_triggered_buffer_cleanup(indio_dev);
  409. error_free_gpios:
  410. if (!st->fixed_addr)
  411. gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
  412. error_disable_reg:
  413. if (!IS_ERR_OR_NULL(st->reg))
  414. regulator_disable(st->reg);
  415. error_put_reg:
  416. if (!IS_ERR_OR_NULL(st->reg))
  417. regulator_put(st->reg);
  418. iio_device_free(indio_dev);
  419. return ret;
  420. }
  421. static int __devexit ad7266_remove(struct spi_device *spi)
  422. {
  423. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  424. struct ad7266_state *st = iio_priv(indio_dev);
  425. iio_device_unregister(indio_dev);
  426. iio_triggered_buffer_cleanup(indio_dev);
  427. if (!st->fixed_addr)
  428. gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
  429. if (!IS_ERR_OR_NULL(st->reg)) {
  430. regulator_disable(st->reg);
  431. regulator_put(st->reg);
  432. }
  433. iio_device_free(indio_dev);
  434. return 0;
  435. }
  436. static const struct spi_device_id ad7266_id[] = {
  437. {"ad7265", 0},
  438. {"ad7266", 0},
  439. { }
  440. };
  441. MODULE_DEVICE_TABLE(spi, ad7266_id);
  442. static struct spi_driver ad7266_driver = {
  443. .driver = {
  444. .name = "ad7266",
  445. .owner = THIS_MODULE,
  446. },
  447. .probe = ad7266_probe,
  448. .remove = __devexit_p(ad7266_remove),
  449. .id_table = ad7266_id,
  450. };
  451. module_spi_driver(ad7266_driver);
  452. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  453. MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
  454. MODULE_LICENSE("GPL v2");