radeon_gem.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533
  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. if (robj->gem_base.import_attach)
  42. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  43. radeon_bo_unref(&robj);
  44. }
  45. }
  46. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  47. int alignment, int initial_domain,
  48. bool discardable, bool kernel,
  49. struct drm_gem_object **obj)
  50. {
  51. struct radeon_bo *robj;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  59. if (r) {
  60. if (r != -ERESTARTSYS)
  61. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  62. size, initial_domain, alignment, r);
  63. return r;
  64. }
  65. *obj = &robj->gem_base;
  66. mutex_lock(&rdev->gem.mutex);
  67. list_add_tail(&robj->list, &rdev->gem.objects);
  68. mutex_unlock(&rdev->gem.mutex);
  69. return 0;
  70. }
  71. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  72. uint32_t rdomain, uint32_t wdomain)
  73. {
  74. struct radeon_bo *robj;
  75. uint32_t domain;
  76. int r;
  77. /* FIXME: reeimplement */
  78. robj = gem_to_radeon_bo(gobj);
  79. /* work out where to validate the buffer to */
  80. domain = wdomain;
  81. if (!domain) {
  82. domain = rdomain;
  83. }
  84. if (!domain) {
  85. /* Do nothings */
  86. printk(KERN_WARNING "Set domain without domain !\n");
  87. return 0;
  88. }
  89. if (domain == RADEON_GEM_DOMAIN_CPU) {
  90. /* Asking for cpu access wait for object idle */
  91. r = radeon_bo_wait(robj, NULL, false);
  92. if (r) {
  93. printk(KERN_ERR "Failed to wait for object !\n");
  94. return r;
  95. }
  96. }
  97. return 0;
  98. }
  99. int radeon_gem_init(struct radeon_device *rdev)
  100. {
  101. INIT_LIST_HEAD(&rdev->gem.objects);
  102. return 0;
  103. }
  104. void radeon_gem_fini(struct radeon_device *rdev)
  105. {
  106. radeon_bo_force_delete(rdev);
  107. }
  108. /*
  109. * Call from drm_gem_handle_create which appear in both new and open ioctl
  110. * case.
  111. */
  112. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  113. {
  114. return 0;
  115. }
  116. void radeon_gem_object_close(struct drm_gem_object *obj,
  117. struct drm_file *file_priv)
  118. {
  119. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  120. struct radeon_device *rdev = rbo->rdev;
  121. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  122. struct radeon_vm *vm = &fpriv->vm;
  123. struct radeon_bo_va *bo_va, *tmp;
  124. if (rdev->family < CHIP_CAYMAN) {
  125. return;
  126. }
  127. if (radeon_bo_reserve(rbo, false)) {
  128. return;
  129. }
  130. list_for_each_entry_safe(bo_va, tmp, &rbo->va, bo_list) {
  131. if (bo_va->vm == vm) {
  132. /* remove from this vm address space */
  133. mutex_lock(&vm->mutex);
  134. list_del(&bo_va->vm_list);
  135. mutex_unlock(&vm->mutex);
  136. list_del(&bo_va->bo_list);
  137. kfree(bo_va);
  138. }
  139. }
  140. radeon_bo_unreserve(rbo);
  141. }
  142. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  143. {
  144. if (r == -EDEADLK) {
  145. r = radeon_gpu_reset(rdev);
  146. if (!r)
  147. r = -EAGAIN;
  148. }
  149. return r;
  150. }
  151. /*
  152. * GEM ioctls.
  153. */
  154. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  155. struct drm_file *filp)
  156. {
  157. struct radeon_device *rdev = dev->dev_private;
  158. struct drm_radeon_gem_info *args = data;
  159. struct ttm_mem_type_manager *man;
  160. unsigned i;
  161. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  162. args->vram_size = rdev->mc.real_vram_size;
  163. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  164. if (rdev->stollen_vga_memory)
  165. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  166. args->vram_visible -= radeon_fbdev_total_size(rdev);
  167. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  168. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  169. args->gart_size -= rdev->ring[i].ring_size;
  170. return 0;
  171. }
  172. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  173. struct drm_file *filp)
  174. {
  175. /* TODO: implement */
  176. DRM_ERROR("unimplemented %s\n", __func__);
  177. return -ENOSYS;
  178. }
  179. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  180. struct drm_file *filp)
  181. {
  182. /* TODO: implement */
  183. DRM_ERROR("unimplemented %s\n", __func__);
  184. return -ENOSYS;
  185. }
  186. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  187. struct drm_file *filp)
  188. {
  189. struct radeon_device *rdev = dev->dev_private;
  190. struct drm_radeon_gem_create *args = data;
  191. struct drm_gem_object *gobj;
  192. uint32_t handle;
  193. int r;
  194. down_read(&rdev->exclusive_lock);
  195. /* create a gem object to contain this object in */
  196. args->size = roundup(args->size, PAGE_SIZE);
  197. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  198. args->initial_domain, false,
  199. false, &gobj);
  200. if (r) {
  201. up_read(&rdev->exclusive_lock);
  202. r = radeon_gem_handle_lockup(rdev, r);
  203. return r;
  204. }
  205. r = drm_gem_handle_create(filp, gobj, &handle);
  206. /* drop reference from allocate - handle holds it now */
  207. drm_gem_object_unreference_unlocked(gobj);
  208. if (r) {
  209. up_read(&rdev->exclusive_lock);
  210. r = radeon_gem_handle_lockup(rdev, r);
  211. return r;
  212. }
  213. args->handle = handle;
  214. up_read(&rdev->exclusive_lock);
  215. return 0;
  216. }
  217. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  218. struct drm_file *filp)
  219. {
  220. /* transition the BO to a domain -
  221. * just validate the BO into a certain domain */
  222. struct radeon_device *rdev = dev->dev_private;
  223. struct drm_radeon_gem_set_domain *args = data;
  224. struct drm_gem_object *gobj;
  225. struct radeon_bo *robj;
  226. int r;
  227. /* for now if someone requests domain CPU -
  228. * just make sure the buffer is finished with */
  229. down_read(&rdev->exclusive_lock);
  230. /* just do a BO wait for now */
  231. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  232. if (gobj == NULL) {
  233. up_read(&rdev->exclusive_lock);
  234. return -ENOENT;
  235. }
  236. robj = gem_to_radeon_bo(gobj);
  237. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  238. drm_gem_object_unreference_unlocked(gobj);
  239. up_read(&rdev->exclusive_lock);
  240. r = radeon_gem_handle_lockup(robj->rdev, r);
  241. return r;
  242. }
  243. int radeon_mode_dumb_mmap(struct drm_file *filp,
  244. struct drm_device *dev,
  245. uint32_t handle, uint64_t *offset_p)
  246. {
  247. struct drm_gem_object *gobj;
  248. struct radeon_bo *robj;
  249. gobj = drm_gem_object_lookup(dev, filp, handle);
  250. if (gobj == NULL) {
  251. return -ENOENT;
  252. }
  253. robj = gem_to_radeon_bo(gobj);
  254. *offset_p = radeon_bo_mmap_offset(robj);
  255. drm_gem_object_unreference_unlocked(gobj);
  256. return 0;
  257. }
  258. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  259. struct drm_file *filp)
  260. {
  261. struct drm_radeon_gem_mmap *args = data;
  262. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  263. }
  264. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  265. struct drm_file *filp)
  266. {
  267. struct radeon_device *rdev = dev->dev_private;
  268. struct drm_radeon_gem_busy *args = data;
  269. struct drm_gem_object *gobj;
  270. struct radeon_bo *robj;
  271. int r;
  272. uint32_t cur_placement = 0;
  273. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  274. if (gobj == NULL) {
  275. return -ENOENT;
  276. }
  277. robj = gem_to_radeon_bo(gobj);
  278. r = radeon_bo_wait(robj, &cur_placement, true);
  279. switch (cur_placement) {
  280. case TTM_PL_VRAM:
  281. args->domain = RADEON_GEM_DOMAIN_VRAM;
  282. break;
  283. case TTM_PL_TT:
  284. args->domain = RADEON_GEM_DOMAIN_GTT;
  285. break;
  286. case TTM_PL_SYSTEM:
  287. args->domain = RADEON_GEM_DOMAIN_CPU;
  288. default:
  289. break;
  290. }
  291. drm_gem_object_unreference_unlocked(gobj);
  292. r = radeon_gem_handle_lockup(rdev, r);
  293. return r;
  294. }
  295. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  296. struct drm_file *filp)
  297. {
  298. struct radeon_device *rdev = dev->dev_private;
  299. struct drm_radeon_gem_wait_idle *args = data;
  300. struct drm_gem_object *gobj;
  301. struct radeon_bo *robj;
  302. int r;
  303. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  304. if (gobj == NULL) {
  305. return -ENOENT;
  306. }
  307. robj = gem_to_radeon_bo(gobj);
  308. r = radeon_bo_wait(robj, NULL, false);
  309. /* callback hw specific functions if any */
  310. if (rdev->asic->ioctl_wait_idle)
  311. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  312. drm_gem_object_unreference_unlocked(gobj);
  313. r = radeon_gem_handle_lockup(rdev, r);
  314. return r;
  315. }
  316. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  317. struct drm_file *filp)
  318. {
  319. struct drm_radeon_gem_set_tiling *args = data;
  320. struct drm_gem_object *gobj;
  321. struct radeon_bo *robj;
  322. int r = 0;
  323. DRM_DEBUG("%d \n", args->handle);
  324. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  325. if (gobj == NULL)
  326. return -ENOENT;
  327. robj = gem_to_radeon_bo(gobj);
  328. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  329. drm_gem_object_unreference_unlocked(gobj);
  330. return r;
  331. }
  332. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  333. struct drm_file *filp)
  334. {
  335. struct drm_radeon_gem_get_tiling *args = data;
  336. struct drm_gem_object *gobj;
  337. struct radeon_bo *rbo;
  338. int r = 0;
  339. DRM_DEBUG("\n");
  340. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  341. if (gobj == NULL)
  342. return -ENOENT;
  343. rbo = gem_to_radeon_bo(gobj);
  344. r = radeon_bo_reserve(rbo, false);
  345. if (unlikely(r != 0))
  346. goto out;
  347. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  348. radeon_bo_unreserve(rbo);
  349. out:
  350. drm_gem_object_unreference_unlocked(gobj);
  351. return r;
  352. }
  353. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  354. struct drm_file *filp)
  355. {
  356. struct drm_radeon_gem_va *args = data;
  357. struct drm_gem_object *gobj;
  358. struct radeon_device *rdev = dev->dev_private;
  359. struct radeon_fpriv *fpriv = filp->driver_priv;
  360. struct radeon_bo *rbo;
  361. struct radeon_bo_va *bo_va;
  362. u32 invalid_flags;
  363. int r = 0;
  364. if (!rdev->vm_manager.enabled) {
  365. args->operation = RADEON_VA_RESULT_ERROR;
  366. return -ENOTTY;
  367. }
  368. /* !! DONT REMOVE !!
  369. * We don't support vm_id yet, to be sure we don't have have broken
  370. * userspace, reject anyone trying to use non 0 value thus moving
  371. * forward we can use those fields without breaking existant userspace
  372. */
  373. if (args->vm_id) {
  374. args->operation = RADEON_VA_RESULT_ERROR;
  375. return -EINVAL;
  376. }
  377. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  378. dev_err(&dev->pdev->dev,
  379. "offset 0x%lX is in reserved area 0x%X\n",
  380. (unsigned long)args->offset,
  381. RADEON_VA_RESERVED_SIZE);
  382. args->operation = RADEON_VA_RESULT_ERROR;
  383. return -EINVAL;
  384. }
  385. /* don't remove, we need to enforce userspace to set the snooped flag
  386. * otherwise we will endup with broken userspace and we won't be able
  387. * to enable this feature without adding new interface
  388. */
  389. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  390. if ((args->flags & invalid_flags)) {
  391. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  392. args->flags, invalid_flags);
  393. args->operation = RADEON_VA_RESULT_ERROR;
  394. return -EINVAL;
  395. }
  396. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  397. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  398. args->operation = RADEON_VA_RESULT_ERROR;
  399. return -EINVAL;
  400. }
  401. switch (args->operation) {
  402. case RADEON_VA_MAP:
  403. case RADEON_VA_UNMAP:
  404. break;
  405. default:
  406. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  407. args->operation);
  408. args->operation = RADEON_VA_RESULT_ERROR;
  409. return -EINVAL;
  410. }
  411. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  412. if (gobj == NULL) {
  413. args->operation = RADEON_VA_RESULT_ERROR;
  414. return -ENOENT;
  415. }
  416. rbo = gem_to_radeon_bo(gobj);
  417. r = radeon_bo_reserve(rbo, false);
  418. if (r) {
  419. args->operation = RADEON_VA_RESULT_ERROR;
  420. drm_gem_object_unreference_unlocked(gobj);
  421. return r;
  422. }
  423. switch (args->operation) {
  424. case RADEON_VA_MAP:
  425. bo_va = radeon_bo_va(rbo, &fpriv->vm);
  426. if (bo_va) {
  427. args->operation = RADEON_VA_RESULT_VA_EXIST;
  428. args->offset = bo_va->soffset;
  429. goto out;
  430. }
  431. r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
  432. args->offset, args->flags);
  433. break;
  434. case RADEON_VA_UNMAP:
  435. r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
  436. break;
  437. default:
  438. break;
  439. }
  440. args->operation = RADEON_VA_RESULT_OK;
  441. if (r) {
  442. args->operation = RADEON_VA_RESULT_ERROR;
  443. }
  444. out:
  445. radeon_bo_unreserve(rbo);
  446. drm_gem_object_unreference_unlocked(gobj);
  447. return r;
  448. }
  449. int radeon_mode_dumb_create(struct drm_file *file_priv,
  450. struct drm_device *dev,
  451. struct drm_mode_create_dumb *args)
  452. {
  453. struct radeon_device *rdev = dev->dev_private;
  454. struct drm_gem_object *gobj;
  455. uint32_t handle;
  456. int r;
  457. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  458. args->size = args->pitch * args->height;
  459. args->size = ALIGN(args->size, PAGE_SIZE);
  460. r = radeon_gem_object_create(rdev, args->size, 0,
  461. RADEON_GEM_DOMAIN_VRAM,
  462. false, ttm_bo_type_device,
  463. &gobj);
  464. if (r)
  465. return -ENOMEM;
  466. r = drm_gem_handle_create(file_priv, gobj, &handle);
  467. /* drop reference from allocate - handle holds it now */
  468. drm_gem_object_unreference_unlocked(gobj);
  469. if (r) {
  470. return r;
  471. }
  472. args->handle = handle;
  473. return 0;
  474. }
  475. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  476. struct drm_device *dev,
  477. uint32_t handle)
  478. {
  479. return drm_gem_handle_delete(file_priv, handle);
  480. }