nouveau_display.c 17 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_fb.h"
  30. #include "nouveau_fbcon.h"
  31. #include "nouveau_hw.h"
  32. #include "nouveau_crtc.h"
  33. #include "nouveau_dma.h"
  34. #include "nouveau_connector.h"
  35. #include "nouveau_software.h"
  36. #include "nouveau_gpio.h"
  37. #include "nouveau_fence.h"
  38. #include "nv50_display.h"
  39. static void
  40. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  41. {
  42. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  43. if (fb->nvbo)
  44. drm_gem_object_unreference_unlocked(fb->nvbo->gem);
  45. drm_framebuffer_cleanup(drm_fb);
  46. kfree(fb);
  47. }
  48. static int
  49. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  50. struct drm_file *file_priv,
  51. unsigned int *handle)
  52. {
  53. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  54. return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
  55. }
  56. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  57. .destroy = nouveau_user_framebuffer_destroy,
  58. .create_handle = nouveau_user_framebuffer_create_handle,
  59. };
  60. int
  61. nouveau_framebuffer_init(struct drm_device *dev,
  62. struct nouveau_framebuffer *nv_fb,
  63. struct drm_mode_fb_cmd2 *mode_cmd,
  64. struct nouveau_bo *nvbo)
  65. {
  66. struct drm_nouveau_private *dev_priv = dev->dev_private;
  67. struct drm_framebuffer *fb = &nv_fb->base;
  68. int ret;
  69. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  70. if (ret) {
  71. return ret;
  72. }
  73. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  74. nv_fb->nvbo = nvbo;
  75. if (dev_priv->card_type >= NV_50) {
  76. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  77. if (tile_flags == 0x7a00 ||
  78. tile_flags == 0xfe00)
  79. nv_fb->r_dma = NvEvoFB32;
  80. else
  81. if (tile_flags == 0x7000)
  82. nv_fb->r_dma = NvEvoFB16;
  83. else
  84. nv_fb->r_dma = NvEvoVRAM_LP;
  85. switch (fb->depth) {
  86. case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
  87. case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
  88. case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
  89. case 24:
  90. case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
  91. case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
  92. default:
  93. NV_ERROR(dev, "unknown depth %d\n", fb->depth);
  94. return -EINVAL;
  95. }
  96. if (dev_priv->chipset == 0x50)
  97. nv_fb->r_format |= (tile_flags << 8);
  98. if (!tile_flags) {
  99. if (dev_priv->card_type < NV_D0)
  100. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  101. else
  102. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  103. } else {
  104. u32 mode = nvbo->tile_mode;
  105. if (dev_priv->card_type >= NV_C0)
  106. mode >>= 4;
  107. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  108. }
  109. }
  110. return 0;
  111. }
  112. static struct drm_framebuffer *
  113. nouveau_user_framebuffer_create(struct drm_device *dev,
  114. struct drm_file *file_priv,
  115. struct drm_mode_fb_cmd2 *mode_cmd)
  116. {
  117. struct nouveau_framebuffer *nouveau_fb;
  118. struct drm_gem_object *gem;
  119. int ret;
  120. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  121. if (!gem)
  122. return ERR_PTR(-ENOENT);
  123. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  124. if (!nouveau_fb)
  125. return ERR_PTR(-ENOMEM);
  126. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  127. if (ret) {
  128. drm_gem_object_unreference(gem);
  129. return ERR_PTR(ret);
  130. }
  131. return &nouveau_fb->base;
  132. }
  133. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  134. .fb_create = nouveau_user_framebuffer_create,
  135. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  136. };
  137. struct nouveau_drm_prop_enum_list {
  138. u8 gen_mask;
  139. int type;
  140. char *name;
  141. };
  142. static struct nouveau_drm_prop_enum_list underscan[] = {
  143. { 6, UNDERSCAN_AUTO, "auto" },
  144. { 6, UNDERSCAN_OFF, "off" },
  145. { 6, UNDERSCAN_ON, "on" },
  146. {}
  147. };
  148. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  149. { 7, DITHERING_MODE_AUTO, "auto" },
  150. { 7, DITHERING_MODE_OFF, "off" },
  151. { 1, DITHERING_MODE_ON, "on" },
  152. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  153. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  154. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  155. {}
  156. };
  157. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  158. { 6, DITHERING_DEPTH_AUTO, "auto" },
  159. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  160. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  161. {}
  162. };
  163. #define PROP_ENUM(p,gen,n,list) do { \
  164. struct nouveau_drm_prop_enum_list *l = (list); \
  165. int c = 0; \
  166. while (l->gen_mask) { \
  167. if (l->gen_mask & (1 << (gen))) \
  168. c++; \
  169. l++; \
  170. } \
  171. if (c) { \
  172. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  173. l = (list); \
  174. c = 0; \
  175. while (p && l->gen_mask) { \
  176. if (l->gen_mask & (1 << (gen))) { \
  177. drm_property_add_enum(p, c, l->type, l->name); \
  178. c++; \
  179. } \
  180. l++; \
  181. } \
  182. } \
  183. } while(0)
  184. int
  185. nouveau_display_init(struct drm_device *dev)
  186. {
  187. struct drm_nouveau_private *dev_priv = dev->dev_private;
  188. struct nouveau_display_engine *disp = &dev_priv->engine.display;
  189. struct drm_connector *connector;
  190. int ret;
  191. ret = disp->init(dev);
  192. if (ret)
  193. return ret;
  194. /* power on internal panel if it's not already. the init tables of
  195. * some vbios default this to off for some reason, causing the
  196. * panel to not work after resume
  197. */
  198. if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) {
  199. nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true);
  200. msleep(300);
  201. }
  202. /* enable polling for external displays */
  203. drm_kms_helper_poll_enable(dev);
  204. /* enable hotplug interrupts */
  205. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  206. struct nouveau_connector *conn = nouveau_connector(connector);
  207. nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, true);
  208. }
  209. return ret;
  210. }
  211. void
  212. nouveau_display_fini(struct drm_device *dev)
  213. {
  214. struct drm_nouveau_private *dev_priv = dev->dev_private;
  215. struct nouveau_display_engine *disp = &dev_priv->engine.display;
  216. struct drm_connector *connector;
  217. /* disable hotplug interrupts */
  218. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  219. struct nouveau_connector *conn = nouveau_connector(connector);
  220. nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, false);
  221. }
  222. drm_kms_helper_poll_disable(dev);
  223. disp->fini(dev);
  224. }
  225. int
  226. nouveau_display_create(struct drm_device *dev)
  227. {
  228. struct drm_nouveau_private *dev_priv = dev->dev_private;
  229. struct nouveau_display_engine *disp = &dev_priv->engine.display;
  230. int ret, gen;
  231. drm_mode_config_init(dev);
  232. drm_mode_create_scaling_mode_property(dev);
  233. drm_mode_create_dvi_i_properties(dev);
  234. if (dev_priv->card_type < NV_50)
  235. gen = 0;
  236. else
  237. if (dev_priv->card_type < NV_D0)
  238. gen = 1;
  239. else
  240. gen = 2;
  241. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  242. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  243. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  244. disp->underscan_hborder_property =
  245. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  246. disp->underscan_vborder_property =
  247. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  248. if (gen == 1) {
  249. disp->vibrant_hue_property =
  250. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  251. "vibrant hue", 2);
  252. disp->vibrant_hue_property->values[0] = 0;
  253. disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */
  254. disp->color_vibrance_property =
  255. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  256. "color vibrance", 2);
  257. disp->color_vibrance_property->values[0] = 0;
  258. disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
  259. }
  260. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  261. dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  262. dev->mode_config.min_width = 0;
  263. dev->mode_config.min_height = 0;
  264. if (dev_priv->card_type < NV_10) {
  265. dev->mode_config.max_width = 2048;
  266. dev->mode_config.max_height = 2048;
  267. } else
  268. if (dev_priv->card_type < NV_50) {
  269. dev->mode_config.max_width = 4096;
  270. dev->mode_config.max_height = 4096;
  271. } else {
  272. dev->mode_config.max_width = 8192;
  273. dev->mode_config.max_height = 8192;
  274. }
  275. dev->mode_config.preferred_depth = 24;
  276. dev->mode_config.prefer_shadow = 1;
  277. drm_kms_helper_poll_init(dev);
  278. drm_kms_helper_poll_disable(dev);
  279. ret = disp->create(dev);
  280. if (ret)
  281. goto disp_create_err;
  282. if (dev->mode_config.num_crtc) {
  283. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  284. if (ret)
  285. goto vblank_err;
  286. }
  287. return 0;
  288. vblank_err:
  289. disp->destroy(dev);
  290. disp_create_err:
  291. drm_kms_helper_poll_fini(dev);
  292. drm_mode_config_cleanup(dev);
  293. return ret;
  294. }
  295. void
  296. nouveau_display_destroy(struct drm_device *dev)
  297. {
  298. struct drm_nouveau_private *dev_priv = dev->dev_private;
  299. struct nouveau_display_engine *disp = &dev_priv->engine.display;
  300. drm_vblank_cleanup(dev);
  301. disp->destroy(dev);
  302. drm_kms_helper_poll_fini(dev);
  303. drm_mode_config_cleanup(dev);
  304. }
  305. int
  306. nouveau_vblank_enable(struct drm_device *dev, int crtc)
  307. {
  308. struct drm_nouveau_private *dev_priv = dev->dev_private;
  309. if (dev_priv->card_type >= NV_50)
  310. nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
  311. NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
  312. else
  313. NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
  314. NV_PCRTC_INTR_0_VBLANK);
  315. return 0;
  316. }
  317. void
  318. nouveau_vblank_disable(struct drm_device *dev, int crtc)
  319. {
  320. struct drm_nouveau_private *dev_priv = dev->dev_private;
  321. if (dev_priv->card_type >= NV_50)
  322. nv_mask(dev, NV50_PDISPLAY_INTR_EN_1,
  323. NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
  324. else
  325. NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
  326. }
  327. static int
  328. nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
  329. struct nouveau_bo *new_bo)
  330. {
  331. int ret;
  332. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  333. if (ret)
  334. return ret;
  335. ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
  336. if (ret)
  337. goto fail;
  338. ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
  339. if (ret)
  340. goto fail_unreserve;
  341. return 0;
  342. fail_unreserve:
  343. ttm_bo_unreserve(&new_bo->bo);
  344. fail:
  345. nouveau_bo_unpin(new_bo);
  346. return ret;
  347. }
  348. static void
  349. nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
  350. struct nouveau_bo *new_bo,
  351. struct nouveau_fence *fence)
  352. {
  353. nouveau_bo_fence(new_bo, fence);
  354. ttm_bo_unreserve(&new_bo->bo);
  355. nouveau_bo_fence(old_bo, fence);
  356. ttm_bo_unreserve(&old_bo->bo);
  357. nouveau_bo_unpin(old_bo);
  358. }
  359. static int
  360. nouveau_page_flip_emit(struct nouveau_channel *chan,
  361. struct nouveau_bo *old_bo,
  362. struct nouveau_bo *new_bo,
  363. struct nouveau_page_flip_state *s,
  364. struct nouveau_fence **pfence)
  365. {
  366. struct nouveau_software_chan *swch = chan->engctx[NVOBJ_ENGINE_SW];
  367. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  368. struct drm_device *dev = chan->dev;
  369. unsigned long flags;
  370. int ret;
  371. /* Queue it to the pending list */
  372. spin_lock_irqsave(&dev->event_lock, flags);
  373. list_add_tail(&s->head, &swch->flip);
  374. spin_unlock_irqrestore(&dev->event_lock, flags);
  375. /* Synchronize with the old framebuffer */
  376. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  377. if (ret)
  378. goto fail;
  379. /* Emit the pageflip */
  380. ret = RING_SPACE(chan, 3);
  381. if (ret)
  382. goto fail;
  383. if (dev_priv->card_type < NV_C0) {
  384. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  385. OUT_RING (chan, 0x00000000);
  386. OUT_RING (chan, 0x00000000);
  387. } else {
  388. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  389. OUT_RING (chan, 0);
  390. BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
  391. }
  392. FIRE_RING (chan);
  393. ret = nouveau_fence_new(chan, pfence);
  394. if (ret)
  395. goto fail;
  396. return 0;
  397. fail:
  398. spin_lock_irqsave(&dev->event_lock, flags);
  399. list_del(&s->head);
  400. spin_unlock_irqrestore(&dev->event_lock, flags);
  401. return ret;
  402. }
  403. int
  404. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  405. struct drm_pending_vblank_event *event)
  406. {
  407. struct drm_device *dev = crtc->dev;
  408. struct drm_nouveau_private *dev_priv = dev->dev_private;
  409. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
  410. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  411. struct nouveau_page_flip_state *s;
  412. struct nouveau_channel *chan = NULL;
  413. struct nouveau_fence *fence;
  414. int ret;
  415. if (!dev_priv->channel)
  416. return -ENODEV;
  417. s = kzalloc(sizeof(*s), GFP_KERNEL);
  418. if (!s)
  419. return -ENOMEM;
  420. /* Don't let the buffers go away while we flip */
  421. ret = nouveau_page_flip_reserve(old_bo, new_bo);
  422. if (ret)
  423. goto fail_free;
  424. /* Initialize a page flip struct */
  425. *s = (struct nouveau_page_flip_state)
  426. { { }, event, nouveau_crtc(crtc)->index,
  427. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  428. new_bo->bo.offset };
  429. /* Choose the channel the flip will be handled in */
  430. fence = new_bo->bo.sync_obj;
  431. if (fence)
  432. chan = nouveau_channel_get_unlocked(fence->channel);
  433. if (!chan)
  434. chan = nouveau_channel_get_unlocked(dev_priv->channel);
  435. mutex_lock(&chan->mutex);
  436. /* Emit a page flip */
  437. if (dev_priv->card_type >= NV_50) {
  438. if (dev_priv->card_type >= NV_D0)
  439. ret = nvd0_display_flip_next(crtc, fb, chan, 0);
  440. else
  441. ret = nv50_display_flip_next(crtc, fb, chan);
  442. if (ret) {
  443. nouveau_channel_put(&chan);
  444. goto fail_unreserve;
  445. }
  446. }
  447. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  448. nouveau_channel_put(&chan);
  449. if (ret)
  450. goto fail_unreserve;
  451. /* Update the crtc struct and cleanup */
  452. crtc->fb = fb;
  453. nouveau_page_flip_unreserve(old_bo, new_bo, fence);
  454. nouveau_fence_unref(&fence);
  455. return 0;
  456. fail_unreserve:
  457. nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
  458. fail_free:
  459. kfree(s);
  460. return ret;
  461. }
  462. int
  463. nouveau_finish_page_flip(struct nouveau_channel *chan,
  464. struct nouveau_page_flip_state *ps)
  465. {
  466. struct nouveau_software_chan *swch = chan->engctx[NVOBJ_ENGINE_SW];
  467. struct drm_device *dev = chan->dev;
  468. struct nouveau_page_flip_state *s;
  469. unsigned long flags;
  470. spin_lock_irqsave(&dev->event_lock, flags);
  471. if (list_empty(&swch->flip)) {
  472. NV_ERROR(dev, "Unexpected pageflip in channel %d.\n", chan->id);
  473. spin_unlock_irqrestore(&dev->event_lock, flags);
  474. return -EINVAL;
  475. }
  476. s = list_first_entry(&swch->flip, struct nouveau_page_flip_state, head);
  477. if (s->event) {
  478. struct drm_pending_vblank_event *e = s->event;
  479. struct timeval now;
  480. do_gettimeofday(&now);
  481. e->event.sequence = 0;
  482. e->event.tv_sec = now.tv_sec;
  483. e->event.tv_usec = now.tv_usec;
  484. list_add_tail(&e->base.link, &e->base.file_priv->event_list);
  485. wake_up_interruptible(&e->base.file_priv->event_wait);
  486. }
  487. list_del(&s->head);
  488. if (ps)
  489. *ps = *s;
  490. kfree(s);
  491. spin_unlock_irqrestore(&dev->event_lock, flags);
  492. return 0;
  493. }
  494. int
  495. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  496. struct drm_mode_create_dumb *args)
  497. {
  498. struct nouveau_bo *bo;
  499. int ret;
  500. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  501. args->size = args->pitch * args->height;
  502. args->size = roundup(args->size, PAGE_SIZE);
  503. ret = nouveau_gem_new(dev, args->size, 0, TTM_PL_FLAG_VRAM, 0, 0, &bo);
  504. if (ret)
  505. return ret;
  506. ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
  507. drm_gem_object_unreference_unlocked(bo->gem);
  508. return ret;
  509. }
  510. int
  511. nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
  512. uint32_t handle)
  513. {
  514. return drm_gem_handle_delete(file_priv, handle);
  515. }
  516. int
  517. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  518. struct drm_device *dev,
  519. uint32_t handle, uint64_t *poffset)
  520. {
  521. struct drm_gem_object *gem;
  522. gem = drm_gem_object_lookup(dev, file_priv, handle);
  523. if (gem) {
  524. struct nouveau_bo *bo = gem->driver_private;
  525. *poffset = bo->bo.addr_space_offset;
  526. drm_gem_object_unreference_unlocked(gem);
  527. return 0;
  528. }
  529. return -ENOENT;
  530. }