nouveau_abi16.c 6.3 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include "drmP.h"
  24. #include "nouveau_drv.h"
  25. #include "nouveau_dma.h"
  26. #include "nouveau_abi16.h"
  27. #include "nouveau_ramht.h"
  28. #include "nouveau_software.h"
  29. int
  30. nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS)
  31. {
  32. struct drm_nouveau_private *dev_priv = dev->dev_private;
  33. struct drm_nouveau_getparam *getparam = data;
  34. switch (getparam->param) {
  35. case NOUVEAU_GETPARAM_CHIPSET_ID:
  36. getparam->value = dev_priv->chipset;
  37. break;
  38. case NOUVEAU_GETPARAM_PCI_VENDOR:
  39. getparam->value = dev->pci_vendor;
  40. break;
  41. case NOUVEAU_GETPARAM_PCI_DEVICE:
  42. getparam->value = dev->pci_device;
  43. break;
  44. case NOUVEAU_GETPARAM_BUS_TYPE:
  45. if (drm_pci_device_is_agp(dev))
  46. getparam->value = 0;
  47. else
  48. if (!pci_is_pcie(dev->pdev))
  49. getparam->value = 1;
  50. else
  51. getparam->value = 2;
  52. break;
  53. case NOUVEAU_GETPARAM_FB_SIZE:
  54. getparam->value = dev_priv->fb_available_size;
  55. break;
  56. case NOUVEAU_GETPARAM_AGP_SIZE:
  57. getparam->value = dev_priv->gart_info.aper_size;
  58. break;
  59. case NOUVEAU_GETPARAM_VM_VRAM_BASE:
  60. getparam->value = 0; /* deprecated */
  61. break;
  62. case NOUVEAU_GETPARAM_PTIMER_TIME:
  63. getparam->value = dev_priv->engine.timer.read(dev);
  64. break;
  65. case NOUVEAU_GETPARAM_HAS_BO_USAGE:
  66. getparam->value = 1;
  67. break;
  68. case NOUVEAU_GETPARAM_HAS_PAGEFLIP:
  69. getparam->value = 1;
  70. break;
  71. case NOUVEAU_GETPARAM_GRAPH_UNITS:
  72. /* NV40 and NV50 versions are quite different, but register
  73. * address is the same. User is supposed to know the card
  74. * family anyway... */
  75. if (dev_priv->chipset >= 0x40) {
  76. getparam->value = nv_rd32(dev, NV40_PMC_GRAPH_UNITS);
  77. break;
  78. }
  79. /* FALLTHRU */
  80. default:
  81. NV_DEBUG(dev, "unknown parameter %lld\n", getparam->param);
  82. return -EINVAL;
  83. }
  84. return 0;
  85. }
  86. int
  87. nouveau_abi16_ioctl_setparam(ABI16_IOCTL_ARGS)
  88. {
  89. return -EINVAL;
  90. }
  91. int
  92. nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
  93. {
  94. struct drm_nouveau_private *dev_priv = dev->dev_private;
  95. struct drm_nouveau_channel_alloc *init = data;
  96. struct nouveau_channel *chan;
  97. int ret;
  98. if (!dev_priv->eng[NVOBJ_ENGINE_GR])
  99. return -ENODEV;
  100. if (init->fb_ctxdma_handle == ~0 || init->tt_ctxdma_handle == ~0)
  101. return -EINVAL;
  102. ret = nouveau_channel_alloc(dev, &chan, file_priv,
  103. init->fb_ctxdma_handle,
  104. init->tt_ctxdma_handle);
  105. if (ret)
  106. return ret;
  107. init->channel = chan->id;
  108. if (nouveau_vram_pushbuf == 0) {
  109. if (chan->dma.ib_max)
  110. init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_VRAM |
  111. NOUVEAU_GEM_DOMAIN_GART;
  112. else if (chan->pushbuf_bo->bo.mem.mem_type == TTM_PL_VRAM)
  113. init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_VRAM;
  114. else
  115. init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_GART;
  116. } else {
  117. init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_VRAM;
  118. }
  119. if (dev_priv->card_type < NV_C0) {
  120. init->subchan[0].handle = 0x00000000;
  121. init->subchan[0].grclass = 0x0000;
  122. init->subchan[1].handle = NvSw;
  123. init->subchan[1].grclass = NV_SW;
  124. init->nr_subchan = 2;
  125. }
  126. /* Named memory object area */
  127. ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,
  128. &init->notifier_handle);
  129. if (ret == 0)
  130. atomic_inc(&chan->users); /* userspace reference */
  131. nouveau_channel_put(&chan);
  132. return ret;
  133. }
  134. int
  135. nouveau_abi16_ioctl_channel_free(ABI16_IOCTL_ARGS)
  136. {
  137. struct drm_nouveau_channel_free *req = data;
  138. struct nouveau_channel *chan;
  139. chan = nouveau_channel_get(file_priv, req->channel);
  140. if (IS_ERR(chan))
  141. return PTR_ERR(chan);
  142. list_del(&chan->list);
  143. atomic_dec(&chan->users);
  144. nouveau_channel_put(&chan);
  145. return 0;
  146. }
  147. int
  148. nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
  149. {
  150. struct drm_nouveau_grobj_alloc *init = data;
  151. struct nouveau_channel *chan;
  152. int ret;
  153. if (init->handle == ~0)
  154. return -EINVAL;
  155. /* compatibility with userspace that assumes 506e for all chipsets */
  156. if (init->class == 0x506e) {
  157. init->class = nouveau_software_class(dev);
  158. if (init->class == 0x906e)
  159. return 0;
  160. } else
  161. if (init->class == 0x906e) {
  162. NV_ERROR(dev, "906e not supported yet\n");
  163. return -EINVAL;
  164. }
  165. chan = nouveau_channel_get(file_priv, init->channel);
  166. if (IS_ERR(chan))
  167. return PTR_ERR(chan);
  168. if (nouveau_ramht_find(chan, init->handle)) {
  169. ret = -EEXIST;
  170. goto out;
  171. }
  172. ret = nouveau_gpuobj_gr_new(chan, init->handle, init->class);
  173. if (ret) {
  174. NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n",
  175. ret, init->channel, init->handle);
  176. }
  177. out:
  178. nouveau_channel_put(&chan);
  179. return ret;
  180. }
  181. int
  182. nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
  183. {
  184. struct drm_nouveau_private *dev_priv = dev->dev_private;
  185. struct drm_nouveau_notifierobj_alloc *na = data;
  186. struct nouveau_channel *chan;
  187. int ret;
  188. /* completely unnecessary for these chipsets... */
  189. if (unlikely(dev_priv->card_type >= NV_C0))
  190. return -EINVAL;
  191. chan = nouveau_channel_get(file_priv, na->channel);
  192. if (IS_ERR(chan))
  193. return PTR_ERR(chan);
  194. ret = nouveau_notifier_alloc(chan, na->handle, na->size, 0, 0x1000,
  195. &na->offset);
  196. nouveau_channel_put(&chan);
  197. return ret;
  198. }
  199. int
  200. nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS)
  201. {
  202. struct drm_nouveau_gpuobj_free *objfree = data;
  203. struct nouveau_channel *chan;
  204. int ret;
  205. chan = nouveau_channel_get(file_priv, objfree->channel);
  206. if (IS_ERR(chan))
  207. return PTR_ERR(chan);
  208. /* Synchronize with the user channel */
  209. nouveau_channel_idle(chan);
  210. ret = nouveau_ramht_remove(chan, objfree->handle);
  211. nouveau_channel_put(&chan);
  212. return ret;
  213. }