mpc8544ds.dtsi 4.4 KB

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  1. /*
  2. * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
  3. *
  4. * Copyright 2011 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. &board_soc {
  35. enet0: ethernet@24000 {
  36. phy-handle = <&phy0>;
  37. tbi-handle = <&tbi0>;
  38. phy-connection-type = "rgmii-id";
  39. };
  40. mdio@24520 {
  41. phy0: ethernet-phy@0 {
  42. interrupts = <10 1 0 0>;
  43. reg = <0x0>;
  44. device_type = "ethernet-phy";
  45. };
  46. phy1: ethernet-phy@1 {
  47. interrupts = <10 1 0 0>;
  48. reg = <0x1>;
  49. device_type = "ethernet-phy";
  50. };
  51. sgmii_phy0: sgmii-phy@0 {
  52. interrupts = <6 1 0 0>;
  53. reg = <0x1c>;
  54. };
  55. sgmii_phy1: sgmii-phy@1 {
  56. interrupts = <6 1 0 0>;
  57. reg = <0x1d>;
  58. };
  59. tbi0: tbi-phy@11 {
  60. reg = <0x11>;
  61. device_type = "tbi-phy";
  62. };
  63. };
  64. enet2: ethernet@26000 {
  65. phy-handle = <&phy1>;
  66. tbi-handle = <&tbi1>;
  67. phy-connection-type = "rgmii-id";
  68. };
  69. mdio@26520 {
  70. tbi1: tbi-phy@11 {
  71. reg = <0x11>;
  72. device_type = "tbi-phy";
  73. };
  74. };
  75. };
  76. &board_pci3 {
  77. pcie@0 {
  78. interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
  79. interrupt-map = <
  80. // IDSEL 0x1c USB
  81. 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
  82. 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
  83. 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
  84. 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
  85. // IDSEL 0x1d Audio
  86. 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
  87. // IDSEL 0x1e Legacy
  88. 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
  89. 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
  90. // IDSEL 0x1f IDE/SATA
  91. 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
  92. 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
  93. >;
  94. uli1575@0 {
  95. reg = <0x0 0x0 0x0 0x0 0x0>;
  96. #size-cells = <2>;
  97. #address-cells = <3>;
  98. ranges = <0x2000000 0x0 0xb0000000
  99. 0x2000000 0x0 0xb0000000
  100. 0x0 0x100000
  101. 0x1000000 0x0 0x0
  102. 0x1000000 0x0 0x0
  103. 0x0 0x100000>;
  104. isa@1e {
  105. device_type = "isa";
  106. #interrupt-cells = <2>;
  107. #size-cells = <1>;
  108. #address-cells = <2>;
  109. reg = <0xf000 0x0 0x0 0x0 0x0>;
  110. ranges = <0x1 0x0 0x1000000 0x0 0x0
  111. 0x1000>;
  112. interrupt-parent = <&i8259>;
  113. i8259: interrupt-controller@20 {
  114. reg = <0x1 0x20 0x2
  115. 0x1 0xa0 0x2
  116. 0x1 0x4d0 0x2>;
  117. interrupt-controller;
  118. device_type = "interrupt-controller";
  119. #address-cells = <0>;
  120. #interrupt-cells = <2>;
  121. compatible = "chrp,iic";
  122. interrupts = <9 2 0 0>;
  123. interrupt-parent = <&mpic>;
  124. };
  125. i8042@60 {
  126. #size-cells = <0>;
  127. #address-cells = <1>;
  128. reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
  129. interrupts = <1 3 12 3>;
  130. interrupt-parent =
  131. <&i8259>;
  132. keyboard@0 {
  133. reg = <0x0>;
  134. compatible = "pnpPNP,303";
  135. };
  136. mouse@1 {
  137. reg = <0x1>;
  138. compatible = "pnpPNP,f03";
  139. };
  140. };
  141. rtc@70 {
  142. compatible = "pnpPNP,b00";
  143. reg = <0x1 0x70 0x2>;
  144. };
  145. gpio@400 {
  146. reg = <0x1 0x400 0x80>;
  147. };
  148. };
  149. };
  150. };
  151. };