board-ap4evb.c 34 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488
  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/regulator/fixed.h>
  38. #include <linux/regulator/machine.h>
  39. #include <linux/smsc911x.h>
  40. #include <linux/sh_intc.h>
  41. #include <linux/sh_clk.h>
  42. #include <linux/gpio.h>
  43. #include <linux/input.h>
  44. #include <linux/leds.h>
  45. #include <linux/input/sh_keysc.h>
  46. #include <linux/usb/r8a66597.h>
  47. #include <linux/pm_clock.h>
  48. #include <linux/dma-mapping.h>
  49. #include <media/sh_mobile_ceu.h>
  50. #include <media/sh_mobile_csi2.h>
  51. #include <media/soc_camera.h>
  52. #include <sound/sh_fsi.h>
  53. #include <sound/simple_card.h>
  54. #include <video/sh_mobile_hdmi.h>
  55. #include <video/sh_mobile_lcdc.h>
  56. #include <video/sh_mipi_dsi.h>
  57. #include <mach/common.h>
  58. #include <mach/irqs.h>
  59. #include <mach/sh7372.h>
  60. #include <asm/mach-types.h>
  61. #include <asm/mach/arch.h>
  62. #include <asm/setup.h>
  63. /*
  64. * Address Interface BusWidth note
  65. * ------------------------------------------------------------------
  66. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  67. * 0x0800_0000 user area -
  68. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  69. * 0x1400_0000 Ether (LAN9220) 16bit
  70. * 0x1600_0000 user area - cannot use with NAND
  71. * 0x1800_0000 user area -
  72. * 0x1A00_0000 -
  73. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  74. */
  75. /*
  76. * NOR Flash ROM
  77. *
  78. * SW1 | SW2 | SW7 | NOR Flash ROM
  79. * bit1 | bit1 bit2 | bit1 | Memory allocation
  80. * ------+------------+------+------------------
  81. * OFF | ON OFF | ON | Area 0
  82. * OFF | ON OFF | OFF | Area 4
  83. */
  84. /*
  85. * NAND Flash ROM
  86. *
  87. * SW1 | SW2 | SW7 | NAND Flash ROM
  88. * bit1 | bit1 bit2 | bit2 | Memory allocation
  89. * ------+------------+------+------------------
  90. * OFF | ON OFF | ON | FCE 0
  91. * OFF | ON OFF | OFF | FCE 1
  92. */
  93. /*
  94. * SMSC 9220
  95. *
  96. * SW1 SMSC 9220
  97. * -----------------------
  98. * ON access disable
  99. * OFF access enable
  100. */
  101. /*
  102. * LCD / IRQ / KEYSC / IrDA
  103. *
  104. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  105. * LCD = 2nd LCDC (WVGA)
  106. *
  107. * | SW43 |
  108. * SW3 | ON | OFF |
  109. * -------------+-----------------------+---------------+
  110. * ON | KEY / IrDA | LCD |
  111. * OFF | KEY / IrDA / IRQ | IRQ |
  112. *
  113. *
  114. * QHD / WVGA display
  115. *
  116. * You can choice display type on menuconfig.
  117. * Then, check above dip-switch.
  118. */
  119. /*
  120. * USB
  121. *
  122. * J7 : 1-2 MAX3355E VBUS
  123. * 2-3 DC 5.0V
  124. *
  125. * S39: bit2: off
  126. */
  127. /*
  128. * FSI/FSMI
  129. *
  130. * SW41 : ON : SH-Mobile AP4 Audio Mode
  131. * : OFF : Bluetooth Audio Mode
  132. */
  133. /*
  134. * MMC0/SDHI1 (CN7)
  135. *
  136. * J22 : select card voltage
  137. * 1-2 pin : 1.8v
  138. * 2-3 pin : 3.3v
  139. *
  140. * SW1 | SW33
  141. * | bit1 | bit2 | bit3 | bit4
  142. * ------------+------+------+------+-------
  143. * MMC0 OFF | OFF | ON | ON | X
  144. * SDHI1 OFF | ON | X | OFF | ON
  145. *
  146. * voltage lebel
  147. * CN7 : 1.8v
  148. * CN12: 3.3v
  149. */
  150. /* Dummy supplies, where voltage doesn't matter */
  151. static struct regulator_consumer_supply fixed1v8_power_consumers[] =
  152. {
  153. /* J22 default position: 1.8V */
  154. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
  155. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
  156. REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
  157. REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
  158. };
  159. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  160. {
  161. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
  162. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
  163. };
  164. static struct regulator_consumer_supply dummy_supplies[] = {
  165. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  166. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  167. };
  168. /* MTD */
  169. static struct mtd_partition nor_flash_partitions[] = {
  170. {
  171. .name = "loader",
  172. .offset = 0x00000000,
  173. .size = 512 * 1024,
  174. .mask_flags = MTD_WRITEABLE,
  175. },
  176. {
  177. .name = "bootenv",
  178. .offset = MTDPART_OFS_APPEND,
  179. .size = 512 * 1024,
  180. .mask_flags = MTD_WRITEABLE,
  181. },
  182. {
  183. .name = "kernel_ro",
  184. .offset = MTDPART_OFS_APPEND,
  185. .size = 8 * 1024 * 1024,
  186. .mask_flags = MTD_WRITEABLE,
  187. },
  188. {
  189. .name = "kernel",
  190. .offset = MTDPART_OFS_APPEND,
  191. .size = 8 * 1024 * 1024,
  192. },
  193. {
  194. .name = "data",
  195. .offset = MTDPART_OFS_APPEND,
  196. .size = MTDPART_SIZ_FULL,
  197. },
  198. };
  199. static struct physmap_flash_data nor_flash_data = {
  200. .width = 2,
  201. .parts = nor_flash_partitions,
  202. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  203. };
  204. static struct resource nor_flash_resources[] = {
  205. [0] = {
  206. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  207. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  208. .flags = IORESOURCE_MEM,
  209. }
  210. };
  211. static struct platform_device nor_flash_device = {
  212. .name = "physmap-flash",
  213. .dev = {
  214. .platform_data = &nor_flash_data,
  215. },
  216. .num_resources = ARRAY_SIZE(nor_flash_resources),
  217. .resource = nor_flash_resources,
  218. };
  219. /* SMSC 9220 */
  220. static struct resource smc911x_resources[] = {
  221. {
  222. .start = 0x14000000,
  223. .end = 0x16000000 - 1,
  224. .flags = IORESOURCE_MEM,
  225. }, {
  226. .start = evt2irq(0x02c0) /* IRQ6A */,
  227. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  228. },
  229. };
  230. static struct smsc911x_platform_config smsc911x_info = {
  231. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  232. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  233. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  234. };
  235. static struct platform_device smc911x_device = {
  236. .name = "smsc911x",
  237. .id = -1,
  238. .num_resources = ARRAY_SIZE(smc911x_resources),
  239. .resource = smc911x_resources,
  240. .dev = {
  241. .platform_data = &smsc911x_info,
  242. },
  243. };
  244. /*
  245. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  246. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  247. */
  248. static int slot_cn7_get_cd(struct platform_device *pdev)
  249. {
  250. return !gpio_get_value(GPIO_PORT41);
  251. }
  252. /* MERAM */
  253. static struct sh_mobile_meram_info meram_info = {
  254. .addr_mode = SH_MOBILE_MERAM_MODE1,
  255. };
  256. static struct resource meram_resources[] = {
  257. [0] = {
  258. .name = "regs",
  259. .start = 0xe8000000,
  260. .end = 0xe807ffff,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. [1] = {
  264. .name = "meram",
  265. .start = 0xe8080000,
  266. .end = 0xe81fffff,
  267. .flags = IORESOURCE_MEM,
  268. },
  269. };
  270. static struct platform_device meram_device = {
  271. .name = "sh_mobile_meram",
  272. .id = 0,
  273. .num_resources = ARRAY_SIZE(meram_resources),
  274. .resource = meram_resources,
  275. .dev = {
  276. .platform_data = &meram_info,
  277. },
  278. };
  279. /* SH_MMCIF */
  280. static struct resource sh_mmcif_resources[] = {
  281. [0] = {
  282. .name = "MMCIF",
  283. .start = 0xE6BD0000,
  284. .end = 0xE6BD00FF,
  285. .flags = IORESOURCE_MEM,
  286. },
  287. [1] = {
  288. /* MMC ERR */
  289. .start = evt2irq(0x1ac0),
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. [2] = {
  293. /* MMC NOR */
  294. .start = evt2irq(0x1ae0),
  295. .flags = IORESOURCE_IRQ,
  296. },
  297. };
  298. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  299. .sup_pclk = 0,
  300. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  301. .caps = MMC_CAP_4_BIT_DATA |
  302. MMC_CAP_8_BIT_DATA |
  303. MMC_CAP_NEEDS_POLL,
  304. .get_cd = slot_cn7_get_cd,
  305. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  306. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  307. };
  308. static struct platform_device sh_mmcif_device = {
  309. .name = "sh_mmcif",
  310. .id = 0,
  311. .dev = {
  312. .dma_mask = NULL,
  313. .coherent_dma_mask = 0xffffffff,
  314. .platform_data = &sh_mmcif_plat,
  315. },
  316. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  317. .resource = sh_mmcif_resources,
  318. };
  319. /* SDHI0 */
  320. static struct sh_mobile_sdhi_info sdhi0_info = {
  321. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  322. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  323. .tmio_caps = MMC_CAP_SDIO_IRQ,
  324. };
  325. static struct resource sdhi0_resources[] = {
  326. [0] = {
  327. .name = "SDHI0",
  328. .start = 0xe6850000,
  329. .end = 0xe68500ff,
  330. .flags = IORESOURCE_MEM,
  331. },
  332. [1] = {
  333. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  334. .flags = IORESOURCE_IRQ,
  335. },
  336. [2] = {
  337. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. [3] = {
  341. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  342. .flags = IORESOURCE_IRQ,
  343. },
  344. };
  345. static struct platform_device sdhi0_device = {
  346. .name = "sh_mobile_sdhi",
  347. .num_resources = ARRAY_SIZE(sdhi0_resources),
  348. .resource = sdhi0_resources,
  349. .id = 0,
  350. .dev = {
  351. .platform_data = &sdhi0_info,
  352. },
  353. };
  354. /* SDHI1 */
  355. static struct sh_mobile_sdhi_info sdhi1_info = {
  356. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  357. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  358. .tmio_ocr_mask = MMC_VDD_165_195,
  359. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  360. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  361. .get_cd = slot_cn7_get_cd,
  362. };
  363. static struct resource sdhi1_resources[] = {
  364. [0] = {
  365. .name = "SDHI1",
  366. .start = 0xe6860000,
  367. .end = 0xe68600ff,
  368. .flags = IORESOURCE_MEM,
  369. },
  370. [1] = {
  371. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  372. .flags = IORESOURCE_IRQ,
  373. },
  374. [2] = {
  375. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  376. .flags = IORESOURCE_IRQ,
  377. },
  378. [3] = {
  379. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. };
  383. static struct platform_device sdhi1_device = {
  384. .name = "sh_mobile_sdhi",
  385. .num_resources = ARRAY_SIZE(sdhi1_resources),
  386. .resource = sdhi1_resources,
  387. .id = 1,
  388. .dev = {
  389. .platform_data = &sdhi1_info,
  390. },
  391. };
  392. /* USB1 */
  393. static void usb1_host_port_power(int port, int power)
  394. {
  395. if (!power) /* only power-on supported for now */
  396. return;
  397. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  398. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  399. }
  400. static struct r8a66597_platdata usb1_host_data = {
  401. .on_chip = 1,
  402. .port_power = usb1_host_port_power,
  403. };
  404. static struct resource usb1_host_resources[] = {
  405. [0] = {
  406. .name = "USBHS",
  407. .start = 0xE68B0000,
  408. .end = 0xE68B00E6 - 1,
  409. .flags = IORESOURCE_MEM,
  410. },
  411. [1] = {
  412. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  413. .flags = IORESOURCE_IRQ,
  414. },
  415. };
  416. static struct platform_device usb1_host_device = {
  417. .name = "r8a66597_hcd",
  418. .id = 1,
  419. .dev = {
  420. .dma_mask = NULL, /* not use dma */
  421. .coherent_dma_mask = 0xffffffff,
  422. .platform_data = &usb1_host_data,
  423. },
  424. .num_resources = ARRAY_SIZE(usb1_host_resources),
  425. .resource = usb1_host_resources,
  426. };
  427. /*
  428. * QHD display
  429. */
  430. #ifdef CONFIG_AP4EVB_QHD
  431. /* KEYSC (Needs SW43 set to ON) */
  432. static struct sh_keysc_info keysc_info = {
  433. .mode = SH_KEYSC_MODE_1,
  434. .scan_timing = 3,
  435. .delay = 2500,
  436. .keycodes = {
  437. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  438. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  439. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  440. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  441. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  442. },
  443. };
  444. static struct resource keysc_resources[] = {
  445. [0] = {
  446. .name = "KEYSC",
  447. .start = 0xe61b0000,
  448. .end = 0xe61b0063,
  449. .flags = IORESOURCE_MEM,
  450. },
  451. [1] = {
  452. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  453. .flags = IORESOURCE_IRQ,
  454. },
  455. };
  456. static struct platform_device keysc_device = {
  457. .name = "sh_keysc",
  458. .id = 0, /* "keysc0" clock */
  459. .num_resources = ARRAY_SIZE(keysc_resources),
  460. .resource = keysc_resources,
  461. .dev = {
  462. .platform_data = &keysc_info,
  463. },
  464. };
  465. /* MIPI-DSI */
  466. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  467. void __iomem *base,
  468. int enable)
  469. {
  470. struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
  471. if (IS_ERR(pck))
  472. return PTR_ERR(pck);
  473. if (enable) {
  474. /*
  475. * DSIPCLK = 24MHz
  476. * D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
  477. * HsByteCLK = D-PHY/8 = 39MHz
  478. *
  479. * X * Y * FPS =
  480. * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
  481. */
  482. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  483. clk_enable(pck);
  484. } else {
  485. clk_disable(pck);
  486. }
  487. clk_put(pck);
  488. return 0;
  489. }
  490. static struct resource mipidsi0_resources[] = {
  491. [0] = {
  492. .start = 0xffc60000,
  493. .end = 0xffc63073,
  494. .flags = IORESOURCE_MEM,
  495. },
  496. [1] = {
  497. .start = 0xffc68000,
  498. .end = 0xffc680ef,
  499. .flags = IORESOURCE_MEM,
  500. },
  501. };
  502. static struct sh_mobile_lcdc_info lcdc_info;
  503. static struct sh_mipi_dsi_info mipidsi0_info = {
  504. .data_format = MIPI_RGB888,
  505. .lcd_chan = &lcdc_info.ch[0],
  506. .lane = 2,
  507. .vsynw_offset = 17,
  508. .phyctrl = 0x6 << 8,
  509. .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
  510. SH_MIPI_DSI_HSbyteCLK,
  511. .set_dot_clock = sh_mipi_set_dot_clock,
  512. };
  513. static struct platform_device mipidsi0_device = {
  514. .name = "sh-mipi-dsi",
  515. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  516. .resource = mipidsi0_resources,
  517. .id = 0,
  518. .dev = {
  519. .platform_data = &mipidsi0_info,
  520. },
  521. };
  522. static struct platform_device *qhd_devices[] __initdata = {
  523. &mipidsi0_device,
  524. &keysc_device,
  525. };
  526. #endif /* CONFIG_AP4EVB_QHD */
  527. /* LCDC0 */
  528. static const struct fb_videomode ap4evb_lcdc_modes[] = {
  529. {
  530. #ifdef CONFIG_AP4EVB_QHD
  531. .name = "R63302(QHD)",
  532. .xres = 544,
  533. .yres = 961,
  534. .left_margin = 72,
  535. .right_margin = 600,
  536. .hsync_len = 16,
  537. .upper_margin = 8,
  538. .lower_margin = 8,
  539. .vsync_len = 2,
  540. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  541. #else
  542. .name = "WVGA Panel",
  543. .xres = 800,
  544. .yres = 480,
  545. .left_margin = 220,
  546. .right_margin = 110,
  547. .hsync_len = 70,
  548. .upper_margin = 20,
  549. .lower_margin = 5,
  550. .vsync_len = 5,
  551. .sync = 0,
  552. #endif
  553. },
  554. };
  555. static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
  556. .icb[0] = {
  557. .meram_size = 0x40,
  558. },
  559. .icb[1] = {
  560. .meram_size = 0x40,
  561. },
  562. };
  563. static struct sh_mobile_lcdc_info lcdc_info = {
  564. .meram_dev = &meram_info,
  565. .ch[0] = {
  566. .chan = LCDC_CHAN_MAINLCD,
  567. .fourcc = V4L2_PIX_FMT_RGB565,
  568. .lcd_modes = ap4evb_lcdc_modes,
  569. .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
  570. .meram_cfg = &lcd_meram_cfg,
  571. #ifdef CONFIG_AP4EVB_QHD
  572. .tx_dev = &mipidsi0_device,
  573. #endif
  574. }
  575. };
  576. static struct resource lcdc_resources[] = {
  577. [0] = {
  578. .name = "LCDC",
  579. .start = 0xfe940000, /* P4-only space */
  580. .end = 0xfe943fff,
  581. .flags = IORESOURCE_MEM,
  582. },
  583. [1] = {
  584. .start = intcs_evt2irq(0x580),
  585. .flags = IORESOURCE_IRQ,
  586. },
  587. };
  588. static struct platform_device lcdc_device = {
  589. .name = "sh_mobile_lcdc_fb",
  590. .num_resources = ARRAY_SIZE(lcdc_resources),
  591. .resource = lcdc_resources,
  592. .dev = {
  593. .platform_data = &lcdc_info,
  594. .coherent_dma_mask = ~0,
  595. },
  596. };
  597. /* FSI */
  598. #define IRQ_FSI evt2irq(0x1840)
  599. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  600. {
  601. int ret = 0;
  602. if (rate <= 0)
  603. return ret;
  604. if (enable) {
  605. ret = clk_set_rate(clk, rate);
  606. if (0 == ret)
  607. ret = clk_enable(clk);
  608. } else {
  609. clk_disable(clk);
  610. }
  611. return ret;
  612. }
  613. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  614. {
  615. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  616. }
  617. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  618. {
  619. struct clk *fsia_ick;
  620. struct clk *fsiack;
  621. int ret = -EIO;
  622. fsia_ick = clk_get(dev, "icka");
  623. if (IS_ERR(fsia_ick))
  624. return PTR_ERR(fsia_ick);
  625. /*
  626. * FSIACK is connected to AK4642,
  627. * and use external clock pin from it.
  628. * it is parent of fsia_ick now.
  629. */
  630. fsiack = clk_get_parent(fsia_ick);
  631. if (!fsiack)
  632. goto fsia_ick_out;
  633. /*
  634. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  635. *
  636. ** FIXME **
  637. * Because the freq_table of external clk (fsiack) are all 0,
  638. * the return value of clk_round_rate became 0.
  639. * So, it use __fsi_set_rate here.
  640. */
  641. ret = __fsi_set_rate(fsiack, rate, enable);
  642. if (ret < 0)
  643. goto fsiack_out;
  644. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  645. if ((ret < 0) && enable)
  646. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  647. fsiack_out:
  648. clk_put(fsiack);
  649. fsia_ick_out:
  650. clk_put(fsia_ick);
  651. return 0;
  652. }
  653. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  654. {
  655. struct clk *fsib_clk;
  656. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  657. long fsib_rate = 0;
  658. long fdiv_rate = 0;
  659. int ackmd_bpfmd;
  660. int ret;
  661. switch (rate) {
  662. case 44100:
  663. fsib_rate = rate * 256;
  664. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  665. break;
  666. case 48000:
  667. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  668. fdiv_rate = rate * 256;
  669. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  670. break;
  671. default:
  672. pr_err("unsupported rate in FSI2 port B\n");
  673. return -EINVAL;
  674. }
  675. /* FSI B setting */
  676. fsib_clk = clk_get(dev, "ickb");
  677. if (IS_ERR(fsib_clk))
  678. return -EIO;
  679. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  680. if (ret < 0)
  681. goto fsi_set_rate_end;
  682. /* FSI DIV setting */
  683. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  684. if (ret < 0) {
  685. /* disable FSI B */
  686. if (enable)
  687. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  688. goto fsi_set_rate_end;
  689. }
  690. ret = ackmd_bpfmd;
  691. fsi_set_rate_end:
  692. clk_put(fsib_clk);
  693. return ret;
  694. }
  695. static struct sh_fsi_platform_info fsi_info = {
  696. .port_a = {
  697. .flags = SH_FSI_BRS_INV,
  698. .set_rate = fsi_ak4642_set_rate,
  699. },
  700. .port_b = {
  701. .flags = SH_FSI_BRS_INV |
  702. SH_FSI_BRM_INV |
  703. SH_FSI_LRS_INV |
  704. SH_FSI_FMT_SPDIF,
  705. .set_rate = fsi_hdmi_set_rate,
  706. },
  707. };
  708. static struct resource fsi_resources[] = {
  709. [0] = {
  710. .name = "FSI",
  711. .start = 0xFE3C0000,
  712. .end = 0xFE3C0400 - 1,
  713. .flags = IORESOURCE_MEM,
  714. },
  715. [1] = {
  716. .start = IRQ_FSI,
  717. .flags = IORESOURCE_IRQ,
  718. },
  719. };
  720. static struct platform_device fsi_device = {
  721. .name = "sh_fsi2",
  722. .id = -1,
  723. .num_resources = ARRAY_SIZE(fsi_resources),
  724. .resource = fsi_resources,
  725. .dev = {
  726. .platform_data = &fsi_info,
  727. },
  728. };
  729. static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
  730. .fmt = SND_SOC_DAIFMT_LEFT_J,
  731. .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  732. .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
  733. .sysclk = 11289600,
  734. };
  735. static struct asoc_simple_card_info fsi2_ak4643_info = {
  736. .name = "AK4643",
  737. .card = "FSI2A-AK4643",
  738. .cpu_dai = "fsia-dai",
  739. .codec = "ak4642-codec.0-0013",
  740. .platform = "sh_fsi2",
  741. .codec_dai = "ak4642-hifi",
  742. .init = &fsi2_ak4643_init_info,
  743. };
  744. static struct platform_device fsi_ak4643_device = {
  745. .name = "asoc-simple-card",
  746. .dev = {
  747. .platform_data = &fsi2_ak4643_info,
  748. },
  749. };
  750. /* LCDC1 */
  751. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  752. unsigned long *parent_freq);
  753. static struct sh_mobile_hdmi_info hdmi_info = {
  754. .flags = HDMI_SND_SRC_SPDIF,
  755. .clk_optimize_parent = ap4evb_clk_optimize,
  756. };
  757. static struct resource hdmi_resources[] = {
  758. [0] = {
  759. .name = "HDMI",
  760. .start = 0xe6be0000,
  761. .end = 0xe6be00ff,
  762. .flags = IORESOURCE_MEM,
  763. },
  764. [1] = {
  765. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  766. .start = evt2irq(0x17e0),
  767. .flags = IORESOURCE_IRQ,
  768. },
  769. };
  770. static struct platform_device hdmi_device = {
  771. .name = "sh-mobile-hdmi",
  772. .num_resources = ARRAY_SIZE(hdmi_resources),
  773. .resource = hdmi_resources,
  774. .id = -1,
  775. .dev = {
  776. .platform_data = &hdmi_info,
  777. },
  778. };
  779. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  780. unsigned long *parent_freq)
  781. {
  782. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  783. long error;
  784. if (IS_ERR(hdmi_ick)) {
  785. int ret = PTR_ERR(hdmi_ick);
  786. pr_err("Cannot get HDMI ICK: %d\n", ret);
  787. return ret;
  788. }
  789. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  790. clk_put(hdmi_ick);
  791. return error;
  792. }
  793. static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  794. .icb[0] = {
  795. .meram_size = 0x100,
  796. },
  797. .icb[1] = {
  798. .meram_size = 0x100,
  799. },
  800. };
  801. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  802. .clock_source = LCDC_CLK_EXTERNAL,
  803. .meram_dev = &meram_info,
  804. .ch[0] = {
  805. .chan = LCDC_CHAN_MAINLCD,
  806. .fourcc = V4L2_PIX_FMT_RGB565,
  807. .interface_type = RGB24,
  808. .clock_divider = 1,
  809. .flags = LCDC_FLAGS_DWPOL,
  810. .meram_cfg = &hdmi_meram_cfg,
  811. .tx_dev = &hdmi_device,
  812. }
  813. };
  814. static struct resource lcdc1_resources[] = {
  815. [0] = {
  816. .name = "LCDC1",
  817. .start = 0xfe944000,
  818. .end = 0xfe947fff,
  819. .flags = IORESOURCE_MEM,
  820. },
  821. [1] = {
  822. .start = intcs_evt2irq(0x1780),
  823. .flags = IORESOURCE_IRQ,
  824. },
  825. };
  826. static struct platform_device lcdc1_device = {
  827. .name = "sh_mobile_lcdc_fb",
  828. .num_resources = ARRAY_SIZE(lcdc1_resources),
  829. .resource = lcdc1_resources,
  830. .id = 1,
  831. .dev = {
  832. .platform_data = &sh_mobile_lcdc1_info,
  833. .coherent_dma_mask = ~0,
  834. },
  835. };
  836. static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
  837. .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  838. };
  839. static struct asoc_simple_card_info fsi2_hdmi_info = {
  840. .name = "HDMI",
  841. .card = "FSI2B-HDMI",
  842. .cpu_dai = "fsib-dai",
  843. .codec = "sh-mobile-hdmi",
  844. .platform = "sh_fsi2",
  845. .codec_dai = "sh_mobile_hdmi-hifi",
  846. .init = &fsi2_hdmi_init_info,
  847. };
  848. static struct platform_device fsi_hdmi_device = {
  849. .name = "asoc-simple-card",
  850. .id = 1,
  851. .dev = {
  852. .platform_data = &fsi2_hdmi_info,
  853. },
  854. };
  855. static struct gpio_led ap4evb_leds[] = {
  856. {
  857. .name = "led4",
  858. .gpio = GPIO_PORT185,
  859. .default_state = LEDS_GPIO_DEFSTATE_ON,
  860. },
  861. {
  862. .name = "led2",
  863. .gpio = GPIO_PORT186,
  864. .default_state = LEDS_GPIO_DEFSTATE_ON,
  865. },
  866. {
  867. .name = "led3",
  868. .gpio = GPIO_PORT187,
  869. .default_state = LEDS_GPIO_DEFSTATE_ON,
  870. },
  871. {
  872. .name = "led1",
  873. .gpio = GPIO_PORT188,
  874. .default_state = LEDS_GPIO_DEFSTATE_ON,
  875. }
  876. };
  877. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  878. .num_leds = ARRAY_SIZE(ap4evb_leds),
  879. .leds = ap4evb_leds,
  880. };
  881. static struct platform_device leds_device = {
  882. .name = "leds-gpio",
  883. .id = 0,
  884. .dev = {
  885. .platform_data = &ap4evb_leds_pdata,
  886. },
  887. };
  888. static struct i2c_board_info imx074_info = {
  889. I2C_BOARD_INFO("imx074", 0x1a),
  890. };
  891. static struct soc_camera_link imx074_link = {
  892. .bus_id = 0,
  893. .board_info = &imx074_info,
  894. .i2c_adapter_id = 0,
  895. .module_name = "imx074",
  896. };
  897. static struct platform_device ap4evb_camera = {
  898. .name = "soc-camera-pdrv",
  899. .id = 0,
  900. .dev = {
  901. .platform_data = &imx074_link,
  902. },
  903. };
  904. static struct sh_csi2_client_config csi2_clients[] = {
  905. {
  906. .phy = SH_CSI2_PHY_MAIN,
  907. .lanes = 0, /* default: 2 lanes */
  908. .channel = 0,
  909. .pdev = &ap4evb_camera,
  910. },
  911. };
  912. static struct sh_csi2_pdata csi2_info = {
  913. .type = SH_CSI2C,
  914. .clients = csi2_clients,
  915. .num_clients = ARRAY_SIZE(csi2_clients),
  916. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  917. };
  918. static struct resource csi2_resources[] = {
  919. [0] = {
  920. .name = "CSI2",
  921. .start = 0xffc90000,
  922. .end = 0xffc90fff,
  923. .flags = IORESOURCE_MEM,
  924. },
  925. [1] = {
  926. .start = intcs_evt2irq(0x17a0),
  927. .flags = IORESOURCE_IRQ,
  928. },
  929. };
  930. static struct sh_mobile_ceu_companion csi2 = {
  931. .id = 0,
  932. .num_resources = ARRAY_SIZE(csi2_resources),
  933. .resource = csi2_resources,
  934. .platform_data = &csi2_info,
  935. };
  936. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  937. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  938. .max_width = 8188,
  939. .max_height = 8188,
  940. .csi2 = &csi2,
  941. };
  942. static struct resource ceu_resources[] = {
  943. [0] = {
  944. .name = "CEU",
  945. .start = 0xfe910000,
  946. .end = 0xfe91009f,
  947. .flags = IORESOURCE_MEM,
  948. },
  949. [1] = {
  950. .start = intcs_evt2irq(0x880),
  951. .flags = IORESOURCE_IRQ,
  952. },
  953. [2] = {
  954. /* place holder for contiguous memory */
  955. },
  956. };
  957. static struct platform_device ceu_device = {
  958. .name = "sh_mobile_ceu",
  959. .id = 0, /* "ceu0" clock */
  960. .num_resources = ARRAY_SIZE(ceu_resources),
  961. .resource = ceu_resources,
  962. .dev = {
  963. .platform_data = &sh_mobile_ceu_info,
  964. .coherent_dma_mask = 0xffffffff,
  965. },
  966. };
  967. static struct platform_device *ap4evb_devices[] __initdata = {
  968. &leds_device,
  969. &nor_flash_device,
  970. &smc911x_device,
  971. &sdhi0_device,
  972. &sdhi1_device,
  973. &usb1_host_device,
  974. &fsi_device,
  975. &fsi_ak4643_device,
  976. &fsi_hdmi_device,
  977. &sh_mmcif_device,
  978. &hdmi_device,
  979. &lcdc_device,
  980. &lcdc1_device,
  981. &ceu_device,
  982. &ap4evb_camera,
  983. &meram_device,
  984. };
  985. static void __init hdmi_init_pm_clock(void)
  986. {
  987. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  988. int ret;
  989. long rate;
  990. if (IS_ERR(hdmi_ick)) {
  991. ret = PTR_ERR(hdmi_ick);
  992. pr_err("Cannot get HDMI ICK: %d\n", ret);
  993. goto out;
  994. }
  995. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  996. if (ret < 0) {
  997. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  998. goto out;
  999. }
  1000. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  1001. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  1002. if (rate < 0) {
  1003. pr_err("Cannot get suitable rate: %ld\n", rate);
  1004. ret = rate;
  1005. goto out;
  1006. }
  1007. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  1008. if (ret < 0) {
  1009. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  1010. goto out;
  1011. }
  1012. pr_debug("PLLC2 set frequency %lu\n", rate);
  1013. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  1014. if (ret < 0)
  1015. pr_err("Cannot set HDMI parent: %d\n", ret);
  1016. out:
  1017. if (!IS_ERR(hdmi_ick))
  1018. clk_put(hdmi_ick);
  1019. }
  1020. static void __init fsi_init_pm_clock(void)
  1021. {
  1022. struct clk *fsia_ick;
  1023. int ret;
  1024. fsia_ick = clk_get(&fsi_device.dev, "icka");
  1025. if (IS_ERR(fsia_ick)) {
  1026. ret = PTR_ERR(fsia_ick);
  1027. pr_err("Cannot get FSI ICK: %d\n", ret);
  1028. return;
  1029. }
  1030. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  1031. if (ret < 0)
  1032. pr_err("Cannot set FSI-A parent: %d\n", ret);
  1033. clk_put(fsia_ick);
  1034. }
  1035. /* TouchScreen */
  1036. #ifdef CONFIG_AP4EVB_QHD
  1037. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  1038. # define GPIO_TSC_PORT GPIO_PORT123
  1039. #else /* WVGA */
  1040. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  1041. # define GPIO_TSC_PORT GPIO_PORT40
  1042. #endif
  1043. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  1044. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  1045. static int ts_get_pendown_state(void)
  1046. {
  1047. int val;
  1048. gpio_free(GPIO_TSC_IRQ);
  1049. gpio_request(GPIO_TSC_PORT, NULL);
  1050. gpio_direction_input(GPIO_TSC_PORT);
  1051. val = gpio_get_value(GPIO_TSC_PORT);
  1052. gpio_request(GPIO_TSC_IRQ, NULL);
  1053. return !val;
  1054. }
  1055. static int ts_init(void)
  1056. {
  1057. gpio_request(GPIO_TSC_IRQ, NULL);
  1058. return 0;
  1059. }
  1060. static struct tsc2007_platform_data tsc2007_info = {
  1061. .model = 2007,
  1062. .x_plate_ohms = 180,
  1063. .get_pendown_state = ts_get_pendown_state,
  1064. .init_platform_hw = ts_init,
  1065. };
  1066. static struct i2c_board_info tsc_device = {
  1067. I2C_BOARD_INFO("tsc2007", 0x48),
  1068. .type = "tsc2007",
  1069. .platform_data = &tsc2007_info,
  1070. /*.irq is selected on ap4evb_init */
  1071. };
  1072. /* I2C */
  1073. static struct i2c_board_info i2c0_devices[] = {
  1074. {
  1075. I2C_BOARD_INFO("ak4643", 0x13),
  1076. },
  1077. };
  1078. static struct i2c_board_info i2c1_devices[] = {
  1079. {
  1080. I2C_BOARD_INFO("r2025sd", 0x32),
  1081. },
  1082. };
  1083. #define GPIO_PORT9CR 0xE6051009
  1084. #define GPIO_PORT10CR 0xE605100A
  1085. #define USCCR1 0xE6058144
  1086. static void __init ap4evb_init(void)
  1087. {
  1088. u32 srcr4;
  1089. struct clk *clk;
  1090. regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
  1091. ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
  1092. regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
  1093. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  1094. regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  1095. /* External clock source */
  1096. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1097. sh7372_pinmux_init();
  1098. /* enable SCIFA0 */
  1099. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1100. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1101. /* enable SMSC911X */
  1102. gpio_request(GPIO_FN_CS5A, NULL);
  1103. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1104. /* enable Debug switch (S6) */
  1105. gpio_request(GPIO_PORT32, NULL);
  1106. gpio_request(GPIO_PORT33, NULL);
  1107. gpio_request(GPIO_PORT34, NULL);
  1108. gpio_request(GPIO_PORT35, NULL);
  1109. gpio_direction_input(GPIO_PORT32);
  1110. gpio_direction_input(GPIO_PORT33);
  1111. gpio_direction_input(GPIO_PORT34);
  1112. gpio_direction_input(GPIO_PORT35);
  1113. gpio_export(GPIO_PORT32, 0);
  1114. gpio_export(GPIO_PORT33, 0);
  1115. gpio_export(GPIO_PORT34, 0);
  1116. gpio_export(GPIO_PORT35, 0);
  1117. /* SDHI0 */
  1118. gpio_request(GPIO_FN_SDHICD0, NULL);
  1119. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1120. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1121. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1122. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1123. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1124. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1125. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1126. /* SDHI1 */
  1127. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1128. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1129. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1130. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1131. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1132. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1133. /* MMCIF */
  1134. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1135. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1136. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1137. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1138. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1139. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1140. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1141. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1142. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1143. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1144. /* USB enable */
  1145. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1146. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1147. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1148. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1149. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1150. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1151. /* setup USB phy */
  1152. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1153. /* enable FSI2 port A (ak4643) */
  1154. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1155. gpio_request(GPIO_FN_FSIAILR, NULL);
  1156. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1157. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1158. gpio_request(GPIO_PORT161, NULL);
  1159. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1160. gpio_request(GPIO_PORT9, NULL);
  1161. gpio_request(GPIO_PORT10, NULL);
  1162. gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1163. gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1164. /* card detect pin for MMC slot (CN7) */
  1165. gpio_request(GPIO_PORT41, NULL);
  1166. gpio_direction_input(GPIO_PORT41);
  1167. /* setup FSI2 port B (HDMI) */
  1168. gpio_request(GPIO_FN_FSIBCK, NULL);
  1169. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1170. /* set SPU2 clock to 119.6 MHz */
  1171. clk = clk_get(NULL, "spu_clk");
  1172. if (!IS_ERR(clk)) {
  1173. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1174. clk_put(clk);
  1175. }
  1176. /*
  1177. * set irq priority, to avoid sound chopping
  1178. * when NFS rootfs is used
  1179. * FSI(3) > SMSC911X(2)
  1180. */
  1181. intc_set_priority(IRQ_FSI, 3);
  1182. i2c_register_board_info(0, i2c0_devices,
  1183. ARRAY_SIZE(i2c0_devices));
  1184. i2c_register_board_info(1, i2c1_devices,
  1185. ARRAY_SIZE(i2c1_devices));
  1186. #ifdef CONFIG_AP4EVB_QHD
  1187. /*
  1188. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1189. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1190. */
  1191. /* enable KEYSC */
  1192. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1193. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1194. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1195. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1196. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1197. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1198. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1199. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1200. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1201. gpio_request(GPIO_FN_KEYIN4, NULL);
  1202. /* enable TouchScreen */
  1203. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1204. tsc_device.irq = IRQ28;
  1205. i2c_register_board_info(1, &tsc_device, 1);
  1206. /* LCDC0 */
  1207. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1208. lcdc_info.ch[0].interface_type = RGB24;
  1209. lcdc_info.ch[0].clock_divider = 1;
  1210. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1211. lcdc_info.ch[0].panel_cfg.width = 44;
  1212. lcdc_info.ch[0].panel_cfg.height = 79;
  1213. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1214. #else
  1215. /*
  1216. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1217. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1218. */
  1219. gpio_request(GPIO_FN_LCDD17, NULL);
  1220. gpio_request(GPIO_FN_LCDD16, NULL);
  1221. gpio_request(GPIO_FN_LCDD15, NULL);
  1222. gpio_request(GPIO_FN_LCDD14, NULL);
  1223. gpio_request(GPIO_FN_LCDD13, NULL);
  1224. gpio_request(GPIO_FN_LCDD12, NULL);
  1225. gpio_request(GPIO_FN_LCDD11, NULL);
  1226. gpio_request(GPIO_FN_LCDD10, NULL);
  1227. gpio_request(GPIO_FN_LCDD9, NULL);
  1228. gpio_request(GPIO_FN_LCDD8, NULL);
  1229. gpio_request(GPIO_FN_LCDD7, NULL);
  1230. gpio_request(GPIO_FN_LCDD6, NULL);
  1231. gpio_request(GPIO_FN_LCDD5, NULL);
  1232. gpio_request(GPIO_FN_LCDD4, NULL);
  1233. gpio_request(GPIO_FN_LCDD3, NULL);
  1234. gpio_request(GPIO_FN_LCDD2, NULL);
  1235. gpio_request(GPIO_FN_LCDD1, NULL);
  1236. gpio_request(GPIO_FN_LCDD0, NULL);
  1237. gpio_request(GPIO_FN_LCDDISP, NULL);
  1238. gpio_request(GPIO_FN_LCDDCK, NULL);
  1239. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1240. gpio_direction_output(GPIO_PORT189, 1);
  1241. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1242. gpio_direction_output(GPIO_PORT151, 1);
  1243. lcdc_info.clock_source = LCDC_CLK_BUS;
  1244. lcdc_info.ch[0].interface_type = RGB18;
  1245. lcdc_info.ch[0].clock_divider = 3;
  1246. lcdc_info.ch[0].flags = 0;
  1247. lcdc_info.ch[0].panel_cfg.width = 152;
  1248. lcdc_info.ch[0].panel_cfg.height = 91;
  1249. /* enable TouchScreen */
  1250. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1251. tsc_device.irq = IRQ7;
  1252. i2c_register_board_info(0, &tsc_device, 1);
  1253. #endif /* CONFIG_AP4EVB_QHD */
  1254. /* CEU */
  1255. /*
  1256. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1257. * becomes available
  1258. */
  1259. /* MIPI-CSI stuff */
  1260. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1261. clk = clk_get(NULL, "vck1_clk");
  1262. if (!IS_ERR(clk)) {
  1263. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1264. clk_enable(clk);
  1265. clk_put(clk);
  1266. }
  1267. sh7372_add_standard_devices();
  1268. /* HDMI */
  1269. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1270. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1271. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1272. #define SRCR4 0xe61580bc
  1273. srcr4 = __raw_readl(SRCR4);
  1274. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1275. udelay(50);
  1276. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1277. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1278. rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc1_device);
  1279. rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device);
  1280. rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
  1281. rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
  1282. rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
  1283. rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
  1284. rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
  1285. hdmi_init_pm_clock();
  1286. fsi_init_pm_clock();
  1287. sh7372_pm_init();
  1288. pm_clk_add(&fsi_device.dev, "spu2");
  1289. pm_clk_add(&lcdc1_device.dev, "hdmi");
  1290. }
  1291. MACHINE_START(AP4EVB, "ap4evb")
  1292. .map_io = sh7372_map_io,
  1293. .init_early = sh7372_add_early_devices,
  1294. .init_irq = sh7372_init_irq,
  1295. .handle_irq = shmobile_handle_irq_intc,
  1296. .init_machine = ap4evb_init,
  1297. .init_late = shmobile_init_late,
  1298. .timer = &shmobile_timer,
  1299. MACHINE_END