rd88f6183ap-ge-setup.c 3.1 KB

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  1. /*
  2. * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
  3. *
  4. * Marvell Orion-1-90 AP GE Reference Design Setup
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pci.h>
  15. #include <linux/irq.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/mv643xx_eth.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/flash.h>
  20. #include <linux/ethtool.h>
  21. #include <net/dsa.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/leds.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/mach/pci.h>
  26. #include <mach/orion5x.h>
  27. #include "common.h"
  28. static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
  29. .phy_addr = -1,
  30. .speed = SPEED_1000,
  31. .duplex = DUPLEX_FULL,
  32. };
  33. static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
  34. .port_names[0] = "lan1",
  35. .port_names[1] = "lan2",
  36. .port_names[2] = "lan3",
  37. .port_names[3] = "lan4",
  38. .port_names[4] = "wan",
  39. .port_names[5] = "cpu",
  40. };
  41. static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = {
  42. .nr_chips = 1,
  43. .chip = &rd88f6183ap_ge_switch_chip_data,
  44. };
  45. static struct mtd_partition rd88f6183ap_ge_partitions[] = {
  46. {
  47. .name = "kernel",
  48. .offset = 0x00000000,
  49. .size = 0x00200000,
  50. }, {
  51. .name = "rootfs",
  52. .offset = 0x00200000,
  53. .size = 0x00500000,
  54. }, {
  55. .name = "nvram",
  56. .offset = 0x00700000,
  57. .size = 0x00080000,
  58. },
  59. };
  60. static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
  61. .type = "m25p64",
  62. .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions),
  63. .parts = rd88f6183ap_ge_partitions,
  64. };
  65. static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
  66. {
  67. .modalias = "m25p80",
  68. .platform_data = &rd88f6183ap_ge_spi_slave_data,
  69. .irq = NO_IRQ,
  70. .max_speed_hz = 20000000,
  71. .bus_num = 0,
  72. .chip_select = 0,
  73. },
  74. };
  75. static void __init rd88f6183ap_ge_init(void)
  76. {
  77. /*
  78. * Setup basic Orion functions. Need to be called early.
  79. */
  80. orion5x_init();
  81. /*
  82. * Configure peripherals.
  83. */
  84. orion5x_ehci0_init();
  85. orion5x_eth_init(&rd88f6183ap_ge_eth_data);
  86. orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data,
  87. gpio_to_irq(3));
  88. spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
  89. ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
  90. orion5x_spi_init();
  91. orion5x_uart0_init();
  92. }
  93. static struct hw_pci rd88f6183ap_ge_pci __initdata = {
  94. .nr_controllers = 2,
  95. .setup = orion5x_pci_sys_setup,
  96. .scan = orion5x_pci_sys_scan_bus,
  97. .map_irq = orion5x_pci_map_irq,
  98. };
  99. static int __init rd88f6183ap_ge_pci_init(void)
  100. {
  101. if (machine_is_rd88f6183ap_ge()) {
  102. orion5x_pci_disable();
  103. pci_common_init(&rd88f6183ap_ge_pci);
  104. }
  105. return 0;
  106. }
  107. subsys_initcall(rd88f6183ap_ge_pci_init);
  108. MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
  109. /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
  110. .atag_offset = 0x100,
  111. .init_machine = rd88f6183ap_ge_init,
  112. .map_io = orion5x_map_io,
  113. .init_early = orion5x_init_early,
  114. .init_irq = orion5x_init_irq,
  115. .timer = &orion5x_timer,
  116. .fixup = tag_fixup_mem32,
  117. .restart = orion5x_restart,
  118. MACHINE_END