iq80321.c 4.4 KB

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  1. /*
  2. * arch/arm/mach-iop32x/iq80321.c
  3. *
  4. * Board support code for the Intel IQ80321 platform.
  5. *
  6. * Author: Rory Bolt <rorybolt@pacbell.net>
  7. * Copyright (C) 2002 Rory Bolt
  8. * Copyright (C) 2004 Intel Corp.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/mm.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/pci.h>
  19. #include <linux/string.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/serial_8250.h>
  22. #include <linux/mtd/physmap.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <mach/hardware.h>
  26. #include <asm/irq.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/pci.h>
  30. #include <asm/mach/time.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/page.h>
  33. #include <asm/pgtable.h>
  34. #include <mach/time.h>
  35. /*
  36. * IQ80321 timer tick configuration.
  37. */
  38. static void __init iq80321_timer_init(void)
  39. {
  40. /* 33.333 MHz crystal. */
  41. iop_init_time(200000000);
  42. }
  43. static struct sys_timer iq80321_timer = {
  44. .init = iq80321_timer_init,
  45. };
  46. /*
  47. * IQ80321 I/O.
  48. */
  49. static struct map_desc iq80321_io_desc[] __initdata = {
  50. { /* on-board devices */
  51. .virtual = IQ80321_UART,
  52. .pfn = __phys_to_pfn(IQ80321_UART),
  53. .length = 0x00100000,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. void __init iq80321_map_io(void)
  58. {
  59. iop3xx_map_io();
  60. iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
  61. }
  62. /*
  63. * IQ80321 PCI.
  64. */
  65. static int __init
  66. iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  67. {
  68. int irq;
  69. if ((slot == 2 || slot == 6) && pin == 1) {
  70. /* PCI-X Slot INTA */
  71. irq = IRQ_IOP32X_XINT2;
  72. } else if ((slot == 2 || slot == 6) && pin == 2) {
  73. /* PCI-X Slot INTA */
  74. irq = IRQ_IOP32X_XINT3;
  75. } else if ((slot == 2 || slot == 6) && pin == 3) {
  76. /* PCI-X Slot INTA */
  77. irq = IRQ_IOP32X_XINT0;
  78. } else if ((slot == 2 || slot == 6) && pin == 4) {
  79. /* PCI-X Slot INTA */
  80. irq = IRQ_IOP32X_XINT1;
  81. } else if (slot == 4 || slot == 8) {
  82. /* Gig-E */
  83. irq = IRQ_IOP32X_XINT0;
  84. } else {
  85. printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
  86. "device PCI:%d:%d:%d\n", dev->bus->number,
  87. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  88. irq = -1;
  89. }
  90. return irq;
  91. }
  92. static struct hw_pci iq80321_pci __initdata = {
  93. .nr_controllers = 1,
  94. .ops = &iop3xx_ops,
  95. .setup = iop3xx_pci_setup,
  96. .preinit = iop3xx_pci_preinit_cond,
  97. .map_irq = iq80321_pci_map_irq,
  98. };
  99. static int __init iq80321_pci_init(void)
  100. {
  101. if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
  102. machine_is_iq80321())
  103. pci_common_init(&iq80321_pci);
  104. return 0;
  105. }
  106. subsys_initcall(iq80321_pci_init);
  107. /*
  108. * IQ80321 machine initialisation.
  109. */
  110. static struct physmap_flash_data iq80321_flash_data = {
  111. .width = 1,
  112. };
  113. static struct resource iq80321_flash_resource = {
  114. .start = 0xf0000000,
  115. .end = 0xf07fffff,
  116. .flags = IORESOURCE_MEM,
  117. };
  118. static struct platform_device iq80321_flash_device = {
  119. .name = "physmap-flash",
  120. .id = 0,
  121. .dev = {
  122. .platform_data = &iq80321_flash_data,
  123. },
  124. .num_resources = 1,
  125. .resource = &iq80321_flash_resource,
  126. };
  127. static struct plat_serial8250_port iq80321_serial_port[] = {
  128. {
  129. .mapbase = IQ80321_UART,
  130. .membase = (char *)IQ80321_UART,
  131. .irq = IRQ_IOP32X_XINT1,
  132. .flags = UPF_SKIP_TEST,
  133. .iotype = UPIO_MEM,
  134. .regshift = 0,
  135. .uartclk = 1843200,
  136. },
  137. { },
  138. };
  139. static struct resource iq80321_uart_resource = {
  140. .start = IQ80321_UART,
  141. .end = IQ80321_UART + 7,
  142. .flags = IORESOURCE_MEM,
  143. };
  144. static struct platform_device iq80321_serial_device = {
  145. .name = "serial8250",
  146. .id = PLAT8250_DEV_PLATFORM,
  147. .dev = {
  148. .platform_data = iq80321_serial_port,
  149. },
  150. .num_resources = 1,
  151. .resource = &iq80321_uart_resource,
  152. };
  153. static void __init iq80321_init_machine(void)
  154. {
  155. platform_device_register(&iop3xx_i2c0_device);
  156. platform_device_register(&iop3xx_i2c1_device);
  157. platform_device_register(&iq80321_flash_device);
  158. platform_device_register(&iq80321_serial_device);
  159. platform_device_register(&iop3xx_dma_0_channel);
  160. platform_device_register(&iop3xx_dma_1_channel);
  161. platform_device_register(&iop3xx_aau_channel);
  162. }
  163. MACHINE_START(IQ80321, "Intel IQ80321")
  164. /* Maintainer: Intel Corp. */
  165. .atag_offset = 0x100,
  166. .map_io = iq80321_map_io,
  167. .init_irq = iop32x_init_irq,
  168. .timer = &iq80321_timer,
  169. .init_machine = iq80321_init_machine,
  170. .restart = iop3xx_restart,
  171. MACHINE_END