mach-smdkv310.c 11 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
  2. *
  3. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio.h>
  13. #include <linux/lcd.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/smsc911x.h>
  17. #include <linux/io.h>
  18. #include <linux/i2c.h>
  19. #include <linux/input.h>
  20. #include <linux/pwm_backlight.h>
  21. #include <linux/platform_data/s3c-hsotg.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/hardware/gic.h>
  24. #include <asm/mach-types.h>
  25. #include <video/platform_lcd.h>
  26. #include <plat/regs-serial.h>
  27. #include <plat/regs-srom.h>
  28. #include <plat/regs-fb-v4.h>
  29. #include <plat/cpu.h>
  30. #include <plat/devs.h>
  31. #include <plat/fb.h>
  32. #include <plat/keypad.h>
  33. #include <plat/sdhci.h>
  34. #include <plat/iic.h>
  35. #include <plat/gpio-cfg.h>
  36. #include <plat/backlight.h>
  37. #include <plat/mfc.h>
  38. #include <plat/ehci.h>
  39. #include <plat/clock.h>
  40. #include <mach/map.h>
  41. #include <mach/ohci.h>
  42. #include <drm/exynos_drm.h>
  43. #include "common.h"
  44. /* Following are default values for UCON, ULCON and UFCON UART registers */
  45. #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  46. S3C2410_UCON_RXILEVEL | \
  47. S3C2410_UCON_TXIRQMODE | \
  48. S3C2410_UCON_RXIRQMODE | \
  49. S3C2410_UCON_RXFIFO_TOI | \
  50. S3C2443_UCON_RXERR_IRQEN)
  51. #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
  52. #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  53. S5PV210_UFCON_TXTRIG4 | \
  54. S5PV210_UFCON_RXTRIG4)
  55. static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  56. [0] = {
  57. .hwport = 0,
  58. .flags = 0,
  59. .ucon = SMDKV310_UCON_DEFAULT,
  60. .ulcon = SMDKV310_ULCON_DEFAULT,
  61. .ufcon = SMDKV310_UFCON_DEFAULT,
  62. },
  63. [1] = {
  64. .hwport = 1,
  65. .flags = 0,
  66. .ucon = SMDKV310_UCON_DEFAULT,
  67. .ulcon = SMDKV310_ULCON_DEFAULT,
  68. .ufcon = SMDKV310_UFCON_DEFAULT,
  69. },
  70. [2] = {
  71. .hwport = 2,
  72. .flags = 0,
  73. .ucon = SMDKV310_UCON_DEFAULT,
  74. .ulcon = SMDKV310_ULCON_DEFAULT,
  75. .ufcon = SMDKV310_UFCON_DEFAULT,
  76. },
  77. [3] = {
  78. .hwport = 3,
  79. .flags = 0,
  80. .ucon = SMDKV310_UCON_DEFAULT,
  81. .ulcon = SMDKV310_ULCON_DEFAULT,
  82. .ufcon = SMDKV310_UFCON_DEFAULT,
  83. },
  84. };
  85. static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  86. .cd_type = S3C_SDHCI_CD_INTERNAL,
  87. #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  88. .max_width = 8,
  89. .host_caps = MMC_CAP_8_BIT_DATA,
  90. #endif
  91. };
  92. static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  93. .cd_type = S3C_SDHCI_CD_GPIO,
  94. .ext_cd_gpio = EXYNOS4_GPK0(2),
  95. .ext_cd_gpio_invert = 1,
  96. };
  97. static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  98. .cd_type = S3C_SDHCI_CD_INTERNAL,
  99. #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
  100. .max_width = 8,
  101. .host_caps = MMC_CAP_8_BIT_DATA,
  102. #endif
  103. };
  104. static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
  105. .cd_type = S3C_SDHCI_CD_GPIO,
  106. .ext_cd_gpio = EXYNOS4_GPK2(2),
  107. .ext_cd_gpio_invert = 1,
  108. };
  109. static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
  110. unsigned int power)
  111. {
  112. if (power) {
  113. #if !defined(CONFIG_BACKLIGHT_PWM)
  114. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
  115. gpio_free(EXYNOS4_GPD0(1));
  116. #endif
  117. /* fire nRESET on power up */
  118. gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
  119. mdelay(100);
  120. gpio_set_value(EXYNOS4_GPX0(6), 0);
  121. mdelay(10);
  122. gpio_set_value(EXYNOS4_GPX0(6), 1);
  123. mdelay(10);
  124. gpio_free(EXYNOS4_GPX0(6));
  125. } else {
  126. #if !defined(CONFIG_BACKLIGHT_PWM)
  127. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
  128. gpio_free(EXYNOS4_GPD0(1));
  129. #endif
  130. }
  131. }
  132. static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
  133. .set_power = lcd_lte480wv_set_power,
  134. };
  135. static struct platform_device smdkv310_lcd_lte480wv = {
  136. .name = "platform-lcd",
  137. .dev.parent = &s5p_device_fimd0.dev,
  138. .dev.platform_data = &smdkv310_lcd_lte480wv_data,
  139. };
  140. #ifdef CONFIG_DRM_EXYNOS
  141. static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
  142. .panel = {
  143. .timing = {
  144. .left_margin = 13,
  145. .right_margin = 8,
  146. .upper_margin = 7,
  147. .lower_margin = 5,
  148. .hsync_len = 3,
  149. .vsync_len = 1,
  150. .xres = 800,
  151. .yres = 480,
  152. },
  153. },
  154. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  155. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  156. .default_win = 0,
  157. .bpp = 32,
  158. };
  159. #else
  160. static struct s3c_fb_pd_win smdkv310_fb_win0 = {
  161. .max_bpp = 32,
  162. .default_bpp = 24,
  163. .xres = 800,
  164. .yres = 480,
  165. };
  166. static struct fb_videomode smdkv310_lcd_timing = {
  167. .left_margin = 13,
  168. .right_margin = 8,
  169. .upper_margin = 7,
  170. .lower_margin = 5,
  171. .hsync_len = 3,
  172. .vsync_len = 1,
  173. .xres = 800,
  174. .yres = 480,
  175. };
  176. static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
  177. .win[0] = &smdkv310_fb_win0,
  178. .vtiming = &smdkv310_lcd_timing,
  179. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  180. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  181. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  182. };
  183. #endif
  184. static struct resource smdkv310_smsc911x_resources[] = {
  185. [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
  186. [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
  187. | IRQF_TRIGGER_LOW),
  188. };
  189. static struct smsc911x_platform_config smsc9215_config = {
  190. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  191. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  192. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  193. .phy_interface = PHY_INTERFACE_MODE_MII,
  194. .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
  195. };
  196. static struct platform_device smdkv310_smsc911x = {
  197. .name = "smsc911x",
  198. .id = -1,
  199. .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
  200. .resource = smdkv310_smsc911x_resources,
  201. .dev = {
  202. .platform_data = &smsc9215_config,
  203. },
  204. };
  205. static uint32_t smdkv310_keymap[] __initdata = {
  206. /* KEY(row, col, keycode) */
  207. KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
  208. KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
  209. KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
  210. KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
  211. };
  212. static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
  213. .keymap = smdkv310_keymap,
  214. .keymap_size = ARRAY_SIZE(smdkv310_keymap),
  215. };
  216. static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
  217. .keymap_data = &smdkv310_keymap_data,
  218. .rows = 2,
  219. .cols = 8,
  220. };
  221. static struct i2c_board_info i2c_devs1[] __initdata = {
  222. {I2C_BOARD_INFO("wm8994", 0x1a),},
  223. };
  224. /* USB EHCI */
  225. static struct s5p_ehci_platdata smdkv310_ehci_pdata;
  226. static void __init smdkv310_ehci_init(void)
  227. {
  228. struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
  229. s5p_ehci_set_platdata(pdata);
  230. }
  231. /* USB OHCI */
  232. static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
  233. static void __init smdkv310_ohci_init(void)
  234. {
  235. struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
  236. exynos4_ohci_set_platdata(pdata);
  237. }
  238. /* USB OTG */
  239. static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
  240. /* Audio device */
  241. static struct platform_device smdkv310_device_audio = {
  242. .name = "smdk-audio",
  243. .id = -1,
  244. };
  245. static struct platform_device *smdkv310_devices[] __initdata = {
  246. &s3c_device_hsmmc0,
  247. &s3c_device_hsmmc1,
  248. &s3c_device_hsmmc2,
  249. &s3c_device_hsmmc3,
  250. &s3c_device_i2c1,
  251. &s5p_device_i2c_hdmiphy,
  252. &s3c_device_rtc,
  253. &s3c_device_usb_hsotg,
  254. &s3c_device_wdt,
  255. &s5p_device_ehci,
  256. &s5p_device_fimc0,
  257. &s5p_device_fimc1,
  258. &s5p_device_fimc2,
  259. &s5p_device_fimc3,
  260. &s5p_device_fimc_md,
  261. &s5p_device_g2d,
  262. &s5p_device_jpeg,
  263. #ifdef CONFIG_DRM_EXYNOS
  264. &exynos_device_drm,
  265. #endif
  266. &exynos4_device_ac97,
  267. &exynos4_device_i2s0,
  268. &exynos4_device_ohci,
  269. &samsung_device_keypad,
  270. &s5p_device_mfc,
  271. &s5p_device_mfc_l,
  272. &s5p_device_mfc_r,
  273. &exynos4_device_spdif,
  274. &samsung_asoc_dma,
  275. &samsung_asoc_idma,
  276. &s5p_device_fimd0,
  277. &smdkv310_device_audio,
  278. &smdkv310_lcd_lte480wv,
  279. &smdkv310_smsc911x,
  280. &exynos4_device_ahci,
  281. &s5p_device_hdmi,
  282. &s5p_device_mixer,
  283. };
  284. static void __init smdkv310_smsc911x_init(void)
  285. {
  286. u32 cs1;
  287. /* configure nCS1 width to 16 bits */
  288. cs1 = __raw_readl(S5P_SROM_BW) &
  289. ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
  290. cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
  291. (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
  292. (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
  293. S5P_SROM_BW__NCS1__SHIFT;
  294. __raw_writel(cs1, S5P_SROM_BW);
  295. /* set timing for nCS1 suitable for ethernet chip */
  296. __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
  297. (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
  298. (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
  299. (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
  300. (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
  301. (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
  302. (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
  303. }
  304. /* LCD Backlight data */
  305. static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
  306. .no = EXYNOS4_GPD0(1),
  307. .func = S3C_GPIO_SFN(2),
  308. };
  309. static struct platform_pwm_backlight_data smdkv310_bl_data = {
  310. .pwm_id = 1,
  311. .pwm_period_ns = 1000,
  312. };
  313. static void s5p_tv_setup(void)
  314. {
  315. /* direct HPD to HDMI chip */
  316. WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
  317. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  318. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  319. }
  320. static void __init smdkv310_map_io(void)
  321. {
  322. exynos_init_io(NULL, 0);
  323. s3c24xx_init_clocks(clk_xusbxti.rate);
  324. s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
  325. }
  326. static void __init smdkv310_reserve(void)
  327. {
  328. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  329. }
  330. static void __init smdkv310_machine_init(void)
  331. {
  332. s3c_i2c1_set_platdata(NULL);
  333. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  334. smdkv310_smsc911x_init();
  335. s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
  336. s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
  337. s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
  338. s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
  339. s5p_tv_setup();
  340. s5p_i2c_hdmiphy_set_platdata(NULL);
  341. samsung_keypad_set_platdata(&smdkv310_keypad_data);
  342. samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
  343. #ifdef CONFIG_DRM_EXYNOS
  344. s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
  345. exynos4_fimd0_gpio_setup_24bpp();
  346. #else
  347. s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
  348. #endif
  349. smdkv310_ehci_init();
  350. smdkv310_ohci_init();
  351. s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata);
  352. platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
  353. }
  354. MACHINE_START(SMDKV310, "SMDKV310")
  355. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  356. /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
  357. .atag_offset = 0x100,
  358. .init_irq = exynos4_init_irq,
  359. .map_io = smdkv310_map_io,
  360. .handle_irq = gic_handle_irq,
  361. .init_machine = smdkv310_machine_init,
  362. .timer = &exynos4_timer,
  363. .reserve = &smdkv310_reserve,
  364. .restart = exynos4_restart,
  365. MACHINE_END
  366. MACHINE_START(SMDKC210, "SMDKC210")
  367. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  368. .atag_offset = 0x100,
  369. .init_irq = exynos4_init_irq,
  370. .map_io = smdkv310_map_io,
  371. .handle_irq = gic_handle_irq,
  372. .init_machine = smdkv310_machine_init,
  373. .init_late = exynos_init_late,
  374. .timer = &exynos4_timer,
  375. .reserve = &smdkv310_reserve,
  376. .restart = exynos4_restart,
  377. MACHINE_END