dev-audio.c 6.2 KB

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  1. /* linux/arch/arm/mach-exynos4/dev-audio.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Copyright (c) 2010 Samsung Electronics Co. Ltd
  7. * Jaswinder Singh <jassi.brar@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/platform_device.h>
  14. #include <linux/dma-mapping.h>
  15. #include <linux/gpio.h>
  16. #include <plat/gpio-cfg.h>
  17. #include <plat/audio.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <mach/irqs.h>
  21. #include <mach/regs-audss.h>
  22. static const char *rclksrc[] = {
  23. [0] = "busclk",
  24. [1] = "i2sclk",
  25. };
  26. static int exynos4_cfg_i2s(struct platform_device *pdev)
  27. {
  28. /* configure GPIO for i2s port */
  29. switch (pdev->id) {
  30. case 0:
  31. s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2));
  32. break;
  33. case 1:
  34. s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2));
  35. break;
  36. case 2:
  37. s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(4));
  38. break;
  39. default:
  40. printk(KERN_ERR "Invalid Device %d\n", pdev->id);
  41. return -EINVAL;
  42. }
  43. return 0;
  44. }
  45. static struct s3c_audio_pdata i2sv5_pdata = {
  46. .cfg_gpio = exynos4_cfg_i2s,
  47. .type = {
  48. .i2s = {
  49. .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
  50. | QUIRK_NEED_RSTCLR,
  51. .src_clk = rclksrc,
  52. .idma_addr = EXYNOS4_AUDSS_INT_MEM,
  53. },
  54. },
  55. };
  56. static struct resource exynos4_i2s0_resource[] = {
  57. [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),
  58. [1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
  59. [2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
  60. [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
  61. };
  62. struct platform_device exynos4_device_i2s0 = {
  63. .name = "samsung-i2s",
  64. .id = 0,
  65. .num_resources = ARRAY_SIZE(exynos4_i2s0_resource),
  66. .resource = exynos4_i2s0_resource,
  67. .dev = {
  68. .platform_data = &i2sv5_pdata,
  69. },
  70. };
  71. static const char *rclksrc_v3[] = {
  72. [0] = "sclk_i2s",
  73. [1] = "no_such_clock",
  74. };
  75. static struct s3c_audio_pdata i2sv3_pdata = {
  76. .cfg_gpio = exynos4_cfg_i2s,
  77. .type = {
  78. .i2s = {
  79. .quirks = QUIRK_NO_MUXPSR,
  80. .src_clk = rclksrc_v3,
  81. },
  82. },
  83. };
  84. static struct resource exynos4_i2s1_resource[] = {
  85. [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256),
  86. [1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
  87. [2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
  88. };
  89. struct platform_device exynos4_device_i2s1 = {
  90. .name = "samsung-i2s",
  91. .id = 1,
  92. .num_resources = ARRAY_SIZE(exynos4_i2s1_resource),
  93. .resource = exynos4_i2s1_resource,
  94. .dev = {
  95. .platform_data = &i2sv3_pdata,
  96. },
  97. };
  98. static struct resource exynos4_i2s2_resource[] = {
  99. [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256),
  100. [1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
  101. [2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
  102. };
  103. struct platform_device exynos4_device_i2s2 = {
  104. .name = "samsung-i2s",
  105. .id = 2,
  106. .num_resources = ARRAY_SIZE(exynos4_i2s2_resource),
  107. .resource = exynos4_i2s2_resource,
  108. .dev = {
  109. .platform_data = &i2sv3_pdata,
  110. },
  111. };
  112. /* PCM Controller platform_devices */
  113. static int exynos4_pcm_cfg_gpio(struct platform_device *pdev)
  114. {
  115. switch (pdev->id) {
  116. case 0:
  117. s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 5, S3C_GPIO_SFN(3));
  118. break;
  119. case 1:
  120. s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(3));
  121. break;
  122. case 2:
  123. s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(3));
  124. break;
  125. default:
  126. printk(KERN_DEBUG "Invalid PCM Controller number!");
  127. return -EINVAL;
  128. }
  129. return 0;
  130. }
  131. static struct s3c_audio_pdata s3c_pcm_pdata = {
  132. .cfg_gpio = exynos4_pcm_cfg_gpio,
  133. };
  134. static struct resource exynos4_pcm0_resource[] = {
  135. [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256),
  136. [1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
  137. [2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
  138. };
  139. struct platform_device exynos4_device_pcm0 = {
  140. .name = "samsung-pcm",
  141. .id = 0,
  142. .num_resources = ARRAY_SIZE(exynos4_pcm0_resource),
  143. .resource = exynos4_pcm0_resource,
  144. .dev = {
  145. .platform_data = &s3c_pcm_pdata,
  146. },
  147. };
  148. static struct resource exynos4_pcm1_resource[] = {
  149. [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256),
  150. [1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
  151. [2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
  152. };
  153. struct platform_device exynos4_device_pcm1 = {
  154. .name = "samsung-pcm",
  155. .id = 1,
  156. .num_resources = ARRAY_SIZE(exynos4_pcm1_resource),
  157. .resource = exynos4_pcm1_resource,
  158. .dev = {
  159. .platform_data = &s3c_pcm_pdata,
  160. },
  161. };
  162. static struct resource exynos4_pcm2_resource[] = {
  163. [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256),
  164. [1] = DEFINE_RES_DMA(DMACH_PCM2_TX),
  165. [2] = DEFINE_RES_DMA(DMACH_PCM2_RX),
  166. };
  167. struct platform_device exynos4_device_pcm2 = {
  168. .name = "samsung-pcm",
  169. .id = 2,
  170. .num_resources = ARRAY_SIZE(exynos4_pcm2_resource),
  171. .resource = exynos4_pcm2_resource,
  172. .dev = {
  173. .platform_data = &s3c_pcm_pdata,
  174. },
  175. };
  176. /* AC97 Controller platform devices */
  177. static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)
  178. {
  179. return s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(4));
  180. }
  181. static struct resource exynos4_ac97_resource[] = {
  182. [0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256),
  183. [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
  184. [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
  185. [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
  186. [4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97),
  187. };
  188. static struct s3c_audio_pdata s3c_ac97_pdata = {
  189. .cfg_gpio = exynos4_ac97_cfg_gpio,
  190. };
  191. static u64 exynos4_ac97_dmamask = DMA_BIT_MASK(32);
  192. struct platform_device exynos4_device_ac97 = {
  193. .name = "samsung-ac97",
  194. .id = -1,
  195. .num_resources = ARRAY_SIZE(exynos4_ac97_resource),
  196. .resource = exynos4_ac97_resource,
  197. .dev = {
  198. .platform_data = &s3c_ac97_pdata,
  199. .dma_mask = &exynos4_ac97_dmamask,
  200. .coherent_dma_mask = DMA_BIT_MASK(32),
  201. },
  202. };
  203. /* S/PDIF Controller platform_device */
  204. static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
  205. {
  206. s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
  207. return 0;
  208. }
  209. static struct resource exynos4_spdif_resource[] = {
  210. [0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256),
  211. [1] = DEFINE_RES_DMA(DMACH_SPDIF),
  212. };
  213. static struct s3c_audio_pdata samsung_spdif_pdata = {
  214. .cfg_gpio = exynos4_spdif_cfg_gpio,
  215. };
  216. static u64 exynos4_spdif_dmamask = DMA_BIT_MASK(32);
  217. struct platform_device exynos4_device_spdif = {
  218. .name = "samsung-spdif",
  219. .id = -1,
  220. .num_resources = ARRAY_SIZE(exynos4_spdif_resource),
  221. .resource = exynos4_spdif_resource,
  222. .dev = {
  223. .platform_data = &samsung_spdif_pdata,
  224. .dma_mask = &exynos4_spdif_dmamask,
  225. .coherent_dma_mask = DMA_BIT_MASK(32),
  226. },
  227. };