spear13xx.dtsi 5.5 KB

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  1. /*
  2. * DTS file for all SPEAr13xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&gic>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu@0 {
  20. compatible = "arm,cortex-a9";
  21. reg = <0>;
  22. next-level-cache = <&L2>;
  23. };
  24. cpu@1 {
  25. compatible = "arm,cortex-a9";
  26. reg = <1>;
  27. next-level-cache = <&L2>;
  28. };
  29. };
  30. gic: interrupt-controller@ec801000 {
  31. compatible = "arm,cortex-a9-gic";
  32. interrupt-controller;
  33. #interrupt-cells = <3>;
  34. reg = < 0xec801000 0x1000 >,
  35. < 0xec800100 0x0100 >;
  36. };
  37. pmu {
  38. compatible = "arm,cortex-a9-pmu";
  39. interrupts = <0 6 0x04
  40. 0 7 0x04>;
  41. };
  42. L2: l2-cache {
  43. compatible = "arm,pl310-cache";
  44. reg = <0xed000000 0x1000>;
  45. cache-unified;
  46. cache-level = <2>;
  47. };
  48. memory {
  49. name = "memory";
  50. device_type = "memory";
  51. reg = <0 0x40000000>;
  52. };
  53. chosen {
  54. bootargs = "console=ttyAMA0,115200";
  55. };
  56. ahb {
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. compatible = "simple-bus";
  60. ranges = <0x50000000 0x50000000 0x10000000
  61. 0xb0000000 0xb0000000 0x10000000
  62. 0xe0000000 0xe0000000 0x10000000>;
  63. sdhci@b3000000 {
  64. compatible = "st,sdhci-spear";
  65. reg = <0xb3000000 0x100>;
  66. interrupts = <0 28 0x4>;
  67. status = "disabled";
  68. };
  69. cf@b2800000 {
  70. compatible = "arasan,cf-spear1340";
  71. reg = <0xb2800000 0x100>;
  72. interrupts = <0 29 0x4>;
  73. status = "disabled";
  74. };
  75. dma@ea800000 {
  76. compatible = "snps,dma-spear1340";
  77. reg = <0xea800000 0x1000>;
  78. interrupts = <0 19 0x4>;
  79. status = "disabled";
  80. };
  81. dma@eb000000 {
  82. compatible = "snps,dma-spear1340";
  83. reg = <0xeb000000 0x1000>;
  84. interrupts = <0 59 0x4>;
  85. status = "disabled";
  86. };
  87. fsmc: flash@b0000000 {
  88. compatible = "st,spear600-fsmc-nand";
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. reg = <0xb0000000 0x1000 /* FSMC Register */
  92. 0xb0800000 0x0010>; /* NAND Base */
  93. reg-names = "fsmc_regs", "nand_data";
  94. interrupts = <0 20 0x4
  95. 0 21 0x4
  96. 0 22 0x4
  97. 0 23 0x4>;
  98. st,ale-off = <0x20000>;
  99. st,cle-off = <0x10000>;
  100. status = "disabled";
  101. };
  102. gmac0: eth@e2000000 {
  103. compatible = "st,spear600-gmac";
  104. reg = <0xe2000000 0x8000>;
  105. interrupts = <0 33 0x4
  106. 0 34 0x4>;
  107. interrupt-names = "macirq", "eth_wake_irq";
  108. status = "disabled";
  109. };
  110. smi: flash@ea000000 {
  111. compatible = "st,spear600-smi";
  112. #address-cells = <1>;
  113. #size-cells = <1>;
  114. reg = <0xea000000 0x1000>;
  115. interrupts = <0 30 0x4>;
  116. status = "disabled";
  117. };
  118. spi0: spi@e0100000 {
  119. compatible = "arm,pl022", "arm,primecell";
  120. reg = <0xe0100000 0x1000>;
  121. interrupts = <0 31 0x4>;
  122. status = "disabled";
  123. };
  124. ehci@e4800000 {
  125. compatible = "st,spear600-ehci", "usb-ehci";
  126. reg = <0xe4800000 0x1000>;
  127. interrupts = <0 64 0x4>;
  128. status = "disabled";
  129. };
  130. ehci@e5800000 {
  131. compatible = "st,spear600-ehci", "usb-ehci";
  132. reg = <0xe5800000 0x1000>;
  133. interrupts = <0 66 0x4>;
  134. status = "disabled";
  135. };
  136. ohci@e4000000 {
  137. compatible = "st,spear600-ohci", "usb-ohci";
  138. reg = <0xe4000000 0x1000>;
  139. interrupts = <0 65 0x4>;
  140. status = "disabled";
  141. };
  142. ohci@e5000000 {
  143. compatible = "st,spear600-ohci", "usb-ohci";
  144. reg = <0xe5000000 0x1000>;
  145. interrupts = <0 67 0x4>;
  146. status = "disabled";
  147. };
  148. apb {
  149. #address-cells = <1>;
  150. #size-cells = <1>;
  151. compatible = "simple-bus";
  152. ranges = <0x50000000 0x50000000 0x10000000
  153. 0xb0000000 0xb0000000 0x10000000
  154. 0xe0000000 0xe0000000 0x10000000>;
  155. gpio0: gpio@e0600000 {
  156. compatible = "arm,pl061", "arm,primecell";
  157. reg = <0xe0600000 0x1000>;
  158. interrupts = <0 24 0x4>;
  159. gpio-controller;
  160. #gpio-cells = <2>;
  161. interrupt-controller;
  162. #interrupt-cells = <2>;
  163. status = "disabled";
  164. };
  165. gpio1: gpio@e0680000 {
  166. compatible = "arm,pl061", "arm,primecell";
  167. reg = <0xe0680000 0x1000>;
  168. interrupts = <0 25 0x4>;
  169. gpio-controller;
  170. #gpio-cells = <2>;
  171. interrupt-controller;
  172. #interrupt-cells = <2>;
  173. status = "disabled";
  174. };
  175. kbd@e0300000 {
  176. compatible = "st,spear300-kbd";
  177. reg = <0xe0300000 0x1000>;
  178. interrupts = <0 52 0x4>;
  179. status = "disabled";
  180. };
  181. i2c0: i2c@e0280000 {
  182. #address-cells = <1>;
  183. #size-cells = <0>;
  184. compatible = "snps,designware-i2c";
  185. reg = <0xe0280000 0x1000>;
  186. interrupts = <0 41 0x4>;
  187. status = "disabled";
  188. };
  189. rtc@e0580000 {
  190. compatible = "st,spear-rtc";
  191. reg = <0xe0580000 0x1000>;
  192. interrupts = <0 36 0x4>;
  193. status = "disabled";
  194. };
  195. serial@e0000000 {
  196. compatible = "arm,pl011", "arm,primecell";
  197. reg = <0xe0000000 0x1000>;
  198. interrupts = <0 35 0x4>;
  199. status = "disabled";
  200. };
  201. adc@e0080000 {
  202. compatible = "st,spear600-adc";
  203. reg = <0xe0080000 0x1000>;
  204. interrupts = <0 44 0x4>;
  205. status = "disabled";
  206. };
  207. timer@e0380000 {
  208. compatible = "st,spear-timer";
  209. reg = <0xe0380000 0x400>;
  210. interrupts = <0 37 0x4>;
  211. };
  212. timer@ec800600 {
  213. compatible = "arm,cortex-a9-twd-timer";
  214. reg = <0xec800600 0x20>;
  215. interrupts = <1 13 0x301>;
  216. };
  217. wdt@ec800620 {
  218. compatible = "arm,cortex-a9-twd-wdt";
  219. reg = <0xec800620 0x20>;
  220. status = "disabled";
  221. };
  222. thermal@e07008c4 {
  223. compatible = "st,thermal-spear1340";
  224. reg = <0xe07008c4 0x4>;
  225. };
  226. };
  227. };
  228. };