processor_idle.c 30 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/pm_qos_params.h>
  41. #include <linux/clockchips.h>
  42. #include <linux/cpuidle.h>
  43. #include <linux/irqflags.h>
  44. /*
  45. * Include the apic definitions for x86 to have the APIC timer related defines
  46. * available also for UP (on SMP it gets magically included via linux/smp.h).
  47. * asm/acpi.h is not an option, as it would require more include magic. Also
  48. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  49. */
  50. #ifdef CONFIG_X86
  51. #include <asm/apic.h>
  52. #endif
  53. #include <asm/io.h>
  54. #include <asm/uaccess.h>
  55. #include <acpi/acpi_bus.h>
  56. #include <acpi/processor.h>
  57. #include <asm/processor.h>
  58. #define ACPI_PROCESSOR_CLASS "processor"
  59. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  60. ACPI_MODULE_NAME("processor_idle");
  61. #define ACPI_PROCESSOR_FILE_POWER "power"
  62. #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
  63. #define C2_OVERHEAD 1 /* 1us */
  64. #define C3_OVERHEAD 1 /* 1us */
  65. #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
  66. static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  67. module_param(max_cstate, uint, 0000);
  68. static unsigned int nocst __read_mostly;
  69. module_param(nocst, uint, 0000);
  70. static unsigned int latency_factor __read_mostly = 2;
  71. module_param(latency_factor, uint, 0644);
  72. static s64 us_to_pm_timer_ticks(s64 t)
  73. {
  74. return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
  75. }
  76. /*
  77. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  78. * For now disable this. Probably a bug somewhere else.
  79. *
  80. * To skip this limit, boot/load with a large max_cstate limit.
  81. */
  82. static int set_max_cstate(const struct dmi_system_id *id)
  83. {
  84. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  85. return 0;
  86. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  87. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  88. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  89. max_cstate = (long)id->driver_data;
  90. return 0;
  91. }
  92. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  93. callers to only run once -AK */
  94. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  95. { set_max_cstate, "Clevo 5600D", {
  96. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  97. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  98. (void *)2},
  99. {},
  100. };
  101. /*
  102. * Callers should disable interrupts before the call and enable
  103. * interrupts after return.
  104. */
  105. static void acpi_safe_halt(void)
  106. {
  107. current_thread_info()->status &= ~TS_POLLING;
  108. /*
  109. * TS_POLLING-cleared state must be visible before we
  110. * test NEED_RESCHED:
  111. */
  112. smp_mb();
  113. if (!need_resched()) {
  114. safe_halt();
  115. local_irq_disable();
  116. }
  117. current_thread_info()->status |= TS_POLLING;
  118. }
  119. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  120. /*
  121. * Some BIOS implementations switch to C3 in the published C2 state.
  122. * This seems to be a common problem on AMD boxen, but other vendors
  123. * are affected too. We pick the most conservative approach: we assume
  124. * that the local APIC stops in both C2 and C3.
  125. */
  126. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  127. struct acpi_processor_cx *cx)
  128. {
  129. struct acpi_processor_power *pwr = &pr->power;
  130. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  131. if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
  132. return;
  133. /*
  134. * Check, if one of the previous states already marked the lapic
  135. * unstable
  136. */
  137. if (pwr->timer_broadcast_on_state < state)
  138. return;
  139. if (cx->type >= type)
  140. pr->power.timer_broadcast_on_state = state;
  141. }
  142. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  143. {
  144. unsigned long reason;
  145. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  146. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  147. clockevents_notify(reason, &pr->id);
  148. }
  149. /* Power(C) State timer broadcast control */
  150. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  151. struct acpi_processor_cx *cx,
  152. int broadcast)
  153. {
  154. int state = cx - pr->power.states;
  155. if (state >= pr->power.timer_broadcast_on_state) {
  156. unsigned long reason;
  157. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  158. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  159. clockevents_notify(reason, &pr->id);
  160. }
  161. }
  162. #else
  163. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  164. struct acpi_processor_cx *cstate) { }
  165. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  166. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  167. struct acpi_processor_cx *cx,
  168. int broadcast)
  169. {
  170. }
  171. #endif
  172. /*
  173. * Suspend / resume control
  174. */
  175. static int acpi_idle_suspend;
  176. int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
  177. {
  178. acpi_idle_suspend = 1;
  179. return 0;
  180. }
  181. int acpi_processor_resume(struct acpi_device * device)
  182. {
  183. acpi_idle_suspend = 0;
  184. return 0;
  185. }
  186. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
  187. static int tsc_halts_in_c(int state)
  188. {
  189. switch (boot_cpu_data.x86_vendor) {
  190. case X86_VENDOR_AMD:
  191. case X86_VENDOR_INTEL:
  192. /*
  193. * AMD Fam10h TSC will tick in all
  194. * C/P/S0/S1 states when this bit is set.
  195. */
  196. if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
  197. return 0;
  198. /*FALL THROUGH*/
  199. default:
  200. return state > ACPI_STATE_C1;
  201. }
  202. }
  203. #endif
  204. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  205. {
  206. if (!pr)
  207. return -EINVAL;
  208. if (!pr->pblk)
  209. return -ENODEV;
  210. /* if info is obtained from pblk/fadt, type equals state */
  211. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  212. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  213. #ifndef CONFIG_HOTPLUG_CPU
  214. /*
  215. * Check for P_LVL2_UP flag before entering C2 and above on
  216. * an SMP system.
  217. */
  218. if ((num_online_cpus() > 1) &&
  219. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  220. return -ENODEV;
  221. #endif
  222. /* determine C2 and C3 address from pblk */
  223. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  224. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  225. /* determine latencies from FADT */
  226. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  227. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  228. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  229. "lvl2[0x%08x] lvl3[0x%08x]\n",
  230. pr->power.states[ACPI_STATE_C2].address,
  231. pr->power.states[ACPI_STATE_C3].address));
  232. return 0;
  233. }
  234. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  235. {
  236. if (!pr->power.states[ACPI_STATE_C1].valid) {
  237. /* set the first C-State to C1 */
  238. /* all processors need to support C1 */
  239. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  240. pr->power.states[ACPI_STATE_C1].valid = 1;
  241. pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
  242. }
  243. /* the C0 state only exists as a filler in our array */
  244. pr->power.states[ACPI_STATE_C0].valid = 1;
  245. return 0;
  246. }
  247. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  248. {
  249. acpi_status status = 0;
  250. acpi_integer count;
  251. int current_count;
  252. int i;
  253. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  254. union acpi_object *cst;
  255. if (nocst)
  256. return -ENODEV;
  257. current_count = 0;
  258. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  259. if (ACPI_FAILURE(status)) {
  260. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  261. return -ENODEV;
  262. }
  263. cst = buffer.pointer;
  264. /* There must be at least 2 elements */
  265. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  266. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  267. status = -EFAULT;
  268. goto end;
  269. }
  270. count = cst->package.elements[0].integer.value;
  271. /* Validate number of power states. */
  272. if (count < 1 || count != cst->package.count - 1) {
  273. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  274. status = -EFAULT;
  275. goto end;
  276. }
  277. /* Tell driver that at least _CST is supported. */
  278. pr->flags.has_cst = 1;
  279. for (i = 1; i <= count; i++) {
  280. union acpi_object *element;
  281. union acpi_object *obj;
  282. struct acpi_power_register *reg;
  283. struct acpi_processor_cx cx;
  284. memset(&cx, 0, sizeof(cx));
  285. element = &(cst->package.elements[i]);
  286. if (element->type != ACPI_TYPE_PACKAGE)
  287. continue;
  288. if (element->package.count != 4)
  289. continue;
  290. obj = &(element->package.elements[0]);
  291. if (obj->type != ACPI_TYPE_BUFFER)
  292. continue;
  293. reg = (struct acpi_power_register *)obj->buffer.pointer;
  294. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  295. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  296. continue;
  297. /* There should be an easy way to extract an integer... */
  298. obj = &(element->package.elements[1]);
  299. if (obj->type != ACPI_TYPE_INTEGER)
  300. continue;
  301. cx.type = obj->integer.value;
  302. /*
  303. * Some buggy BIOSes won't list C1 in _CST -
  304. * Let acpi_processor_get_power_info_default() handle them later
  305. */
  306. if (i == 1 && cx.type != ACPI_STATE_C1)
  307. current_count++;
  308. cx.address = reg->address;
  309. cx.index = current_count + 1;
  310. cx.entry_method = ACPI_CSTATE_SYSTEMIO;
  311. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  312. if (acpi_processor_ffh_cstate_probe
  313. (pr->id, &cx, reg) == 0) {
  314. cx.entry_method = ACPI_CSTATE_FFH;
  315. } else if (cx.type == ACPI_STATE_C1) {
  316. /*
  317. * C1 is a special case where FIXED_HARDWARE
  318. * can be handled in non-MWAIT way as well.
  319. * In that case, save this _CST entry info.
  320. * Otherwise, ignore this info and continue.
  321. */
  322. cx.entry_method = ACPI_CSTATE_HALT;
  323. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  324. } else {
  325. continue;
  326. }
  327. if (cx.type == ACPI_STATE_C1 &&
  328. (idle_halt || idle_nomwait)) {
  329. /*
  330. * In most cases the C1 space_id obtained from
  331. * _CST object is FIXED_HARDWARE access mode.
  332. * But when the option of idle=halt is added,
  333. * the entry_method type should be changed from
  334. * CSTATE_FFH to CSTATE_HALT.
  335. * When the option of idle=nomwait is added,
  336. * the C1 entry_method type should be
  337. * CSTATE_HALT.
  338. */
  339. cx.entry_method = ACPI_CSTATE_HALT;
  340. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  341. }
  342. } else {
  343. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
  344. cx.address);
  345. }
  346. if (cx.type == ACPI_STATE_C1) {
  347. cx.valid = 1;
  348. }
  349. obj = &(element->package.elements[2]);
  350. if (obj->type != ACPI_TYPE_INTEGER)
  351. continue;
  352. cx.latency = obj->integer.value;
  353. obj = &(element->package.elements[3]);
  354. if (obj->type != ACPI_TYPE_INTEGER)
  355. continue;
  356. cx.power = obj->integer.value;
  357. current_count++;
  358. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  359. /*
  360. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  361. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  362. */
  363. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  364. printk(KERN_WARNING
  365. "Limiting number of power states to max (%d)\n",
  366. ACPI_PROCESSOR_MAX_POWER);
  367. printk(KERN_WARNING
  368. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  369. break;
  370. }
  371. }
  372. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  373. current_count));
  374. /* Validate number of power states discovered */
  375. if (current_count < 2)
  376. status = -EFAULT;
  377. end:
  378. kfree(buffer.pointer);
  379. return status;
  380. }
  381. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  382. {
  383. if (!cx->address)
  384. return;
  385. /*
  386. * C2 latency must be less than or equal to 100
  387. * microseconds.
  388. */
  389. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  390. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  391. "latency too large [%d]\n", cx->latency));
  392. return;
  393. }
  394. /*
  395. * Otherwise we've met all of our C2 requirements.
  396. * Normalize the C2 latency to expidite policy
  397. */
  398. cx->valid = 1;
  399. cx->latency_ticks = cx->latency;
  400. return;
  401. }
  402. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  403. struct acpi_processor_cx *cx)
  404. {
  405. static int bm_check_flag;
  406. if (!cx->address)
  407. return;
  408. /*
  409. * C3 latency must be less than or equal to 1000
  410. * microseconds.
  411. */
  412. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  413. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  414. "latency too large [%d]\n", cx->latency));
  415. return;
  416. }
  417. /*
  418. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  419. * DMA transfers are used by any ISA device to avoid livelock.
  420. * Note that we could disable Type-F DMA (as recommended by
  421. * the erratum), but this is known to disrupt certain ISA
  422. * devices thus we take the conservative approach.
  423. */
  424. else if (errata.piix4.fdma) {
  425. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  426. "C3 not supported on PIIX4 with Type-F DMA\n"));
  427. return;
  428. }
  429. /* All the logic here assumes flags.bm_check is same across all CPUs */
  430. if (!bm_check_flag) {
  431. /* Determine whether bm_check is needed based on CPU */
  432. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  433. bm_check_flag = pr->flags.bm_check;
  434. } else {
  435. pr->flags.bm_check = bm_check_flag;
  436. }
  437. if (pr->flags.bm_check) {
  438. if (!pr->flags.bm_control) {
  439. if (pr->flags.has_cst != 1) {
  440. /* bus mastering control is necessary */
  441. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  442. "C3 support requires BM control\n"));
  443. return;
  444. } else {
  445. /* Here we enter C3 without bus mastering */
  446. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  447. "C3 support without BM control\n"));
  448. }
  449. }
  450. } else {
  451. /*
  452. * WBINVD should be set in fadt, for C3 state to be
  453. * supported on when bm_check is not required.
  454. */
  455. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  456. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  457. "Cache invalidation should work properly"
  458. " for C3 to be enabled on SMP systems\n"));
  459. return;
  460. }
  461. }
  462. /*
  463. * Otherwise we've met all of our C3 requirements.
  464. * Normalize the C3 latency to expidite policy. Enable
  465. * checking of bus mastering status (bm_check) so we can
  466. * use this in our C3 policy
  467. */
  468. cx->valid = 1;
  469. cx->latency_ticks = cx->latency;
  470. /*
  471. * On older chipsets, BM_RLD needs to be set
  472. * in order for Bus Master activity to wake the
  473. * system from C3. Newer chipsets handle DMA
  474. * during C3 automatically and BM_RLD is a NOP.
  475. * In either case, the proper way to
  476. * handle BM_RLD is to set it and leave it set.
  477. */
  478. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  479. return;
  480. }
  481. static int acpi_processor_power_verify(struct acpi_processor *pr)
  482. {
  483. unsigned int i;
  484. unsigned int working = 0;
  485. pr->power.timer_broadcast_on_state = INT_MAX;
  486. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  487. struct acpi_processor_cx *cx = &pr->power.states[i];
  488. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
  489. /* TSC could halt in idle, so notify users */
  490. if (tsc_halts_in_c(cx->type))
  491. mark_tsc_unstable("TSC halts in idle");;
  492. #endif
  493. switch (cx->type) {
  494. case ACPI_STATE_C1:
  495. cx->valid = 1;
  496. break;
  497. case ACPI_STATE_C2:
  498. acpi_processor_power_verify_c2(cx);
  499. if (cx->valid)
  500. acpi_timer_check_state(i, pr, cx);
  501. break;
  502. case ACPI_STATE_C3:
  503. acpi_processor_power_verify_c3(pr, cx);
  504. if (cx->valid)
  505. acpi_timer_check_state(i, pr, cx);
  506. break;
  507. }
  508. if (cx->valid)
  509. working++;
  510. }
  511. acpi_propagate_timer_broadcast(pr);
  512. return (working);
  513. }
  514. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  515. {
  516. unsigned int i;
  517. int result;
  518. /* NOTE: the idle thread may not be running while calling
  519. * this function */
  520. /* Zero initialize all the C-states info. */
  521. memset(pr->power.states, 0, sizeof(pr->power.states));
  522. result = acpi_processor_get_power_info_cst(pr);
  523. if (result == -ENODEV)
  524. result = acpi_processor_get_power_info_fadt(pr);
  525. if (result)
  526. return result;
  527. acpi_processor_get_power_info_default(pr);
  528. pr->power.count = acpi_processor_power_verify(pr);
  529. /*
  530. * if one state of type C2 or C3 is available, mark this
  531. * CPU as being "idle manageable"
  532. */
  533. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  534. if (pr->power.states[i].valid) {
  535. pr->power.count = i;
  536. if (pr->power.states[i].type >= ACPI_STATE_C2)
  537. pr->flags.power = 1;
  538. }
  539. }
  540. return 0;
  541. }
  542. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  543. {
  544. struct acpi_processor *pr = seq->private;
  545. unsigned int i;
  546. if (!pr)
  547. goto end;
  548. seq_printf(seq, "active state: C%zd\n"
  549. "max_cstate: C%d\n"
  550. "bus master activity: %08x\n"
  551. "maximum allowed latency: %d usec\n",
  552. pr->power.state ? pr->power.state - pr->power.states : 0,
  553. max_cstate, (unsigned)pr->power.bm_activity,
  554. pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
  555. seq_puts(seq, "states:\n");
  556. for (i = 1; i <= pr->power.count; i++) {
  557. seq_printf(seq, " %cC%d: ",
  558. (&pr->power.states[i] ==
  559. pr->power.state ? '*' : ' '), i);
  560. if (!pr->power.states[i].valid) {
  561. seq_puts(seq, "<not supported>\n");
  562. continue;
  563. }
  564. switch (pr->power.states[i].type) {
  565. case ACPI_STATE_C1:
  566. seq_printf(seq, "type[C1] ");
  567. break;
  568. case ACPI_STATE_C2:
  569. seq_printf(seq, "type[C2] ");
  570. break;
  571. case ACPI_STATE_C3:
  572. seq_printf(seq, "type[C3] ");
  573. break;
  574. default:
  575. seq_printf(seq, "type[--] ");
  576. break;
  577. }
  578. if (pr->power.states[i].promotion.state)
  579. seq_printf(seq, "promotion[C%zd] ",
  580. (pr->power.states[i].promotion.state -
  581. pr->power.states));
  582. else
  583. seq_puts(seq, "promotion[--] ");
  584. if (pr->power.states[i].demotion.state)
  585. seq_printf(seq, "demotion[C%zd] ",
  586. (pr->power.states[i].demotion.state -
  587. pr->power.states));
  588. else
  589. seq_puts(seq, "demotion[--] ");
  590. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  591. pr->power.states[i].latency,
  592. pr->power.states[i].usage,
  593. (unsigned long long)pr->power.states[i].time);
  594. }
  595. end:
  596. return 0;
  597. }
  598. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  599. {
  600. return single_open(file, acpi_processor_power_seq_show,
  601. PDE(inode)->data);
  602. }
  603. static const struct file_operations acpi_processor_power_fops = {
  604. .owner = THIS_MODULE,
  605. .open = acpi_processor_power_open_fs,
  606. .read = seq_read,
  607. .llseek = seq_lseek,
  608. .release = single_release,
  609. };
  610. /**
  611. * acpi_idle_bm_check - checks if bus master activity was detected
  612. */
  613. static int acpi_idle_bm_check(void)
  614. {
  615. u32 bm_status = 0;
  616. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  617. if (bm_status)
  618. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  619. /*
  620. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  621. * the true state of bus mastering activity; forcing us to
  622. * manually check the BMIDEA bit of each IDE channel.
  623. */
  624. else if (errata.piix4.bmisx) {
  625. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  626. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  627. bm_status = 1;
  628. }
  629. return bm_status;
  630. }
  631. /**
  632. * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
  633. * @cx: cstate data
  634. *
  635. * Caller disables interrupt before call and enables interrupt after return.
  636. */
  637. static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
  638. {
  639. /* Don't trace irqs off for idle */
  640. stop_critical_timings();
  641. if (cx->entry_method == ACPI_CSTATE_FFH) {
  642. /* Call into architectural FFH based C-state */
  643. acpi_processor_ffh_cstate_enter(cx);
  644. } else if (cx->entry_method == ACPI_CSTATE_HALT) {
  645. acpi_safe_halt();
  646. } else {
  647. int unused;
  648. /* IO port based C-state */
  649. inb(cx->address);
  650. /* Dummy wait op - must do something useless after P_LVL2 read
  651. because chipsets cannot guarantee that STPCLK# signal
  652. gets asserted in time to freeze execution properly. */
  653. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  654. }
  655. start_critical_timings();
  656. }
  657. /**
  658. * acpi_idle_enter_c1 - enters an ACPI C1 state-type
  659. * @dev: the target CPU
  660. * @state: the state data
  661. *
  662. * This is equivalent to the HALT instruction.
  663. */
  664. static int acpi_idle_enter_c1(struct cpuidle_device *dev,
  665. struct cpuidle_state *state)
  666. {
  667. ktime_t kt1, kt2;
  668. s64 idle_time;
  669. struct acpi_processor *pr;
  670. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  671. pr = __get_cpu_var(processors);
  672. if (unlikely(!pr))
  673. return 0;
  674. local_irq_disable();
  675. /* Do not access any ACPI IO ports in suspend path */
  676. if (acpi_idle_suspend) {
  677. acpi_safe_halt();
  678. local_irq_enable();
  679. return 0;
  680. }
  681. kt1 = ktime_get_real();
  682. acpi_idle_do_entry(cx);
  683. kt2 = ktime_get_real();
  684. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  685. local_irq_enable();
  686. cx->usage++;
  687. return idle_time;
  688. }
  689. /**
  690. * acpi_idle_enter_simple - enters an ACPI state without BM handling
  691. * @dev: the target CPU
  692. * @state: the state data
  693. */
  694. static int acpi_idle_enter_simple(struct cpuidle_device *dev,
  695. struct cpuidle_state *state)
  696. {
  697. struct acpi_processor *pr;
  698. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  699. ktime_t kt1, kt2;
  700. s64 idle_time;
  701. s64 sleep_ticks = 0;
  702. pr = __get_cpu_var(processors);
  703. if (unlikely(!pr))
  704. return 0;
  705. if (acpi_idle_suspend)
  706. return(acpi_idle_enter_c1(dev, state));
  707. local_irq_disable();
  708. current_thread_info()->status &= ~TS_POLLING;
  709. /*
  710. * TS_POLLING-cleared state must be visible before we test
  711. * NEED_RESCHED:
  712. */
  713. smp_mb();
  714. if (unlikely(need_resched())) {
  715. current_thread_info()->status |= TS_POLLING;
  716. local_irq_enable();
  717. return 0;
  718. }
  719. /*
  720. * Must be done before busmaster disable as we might need to
  721. * access HPET !
  722. */
  723. acpi_state_timer_broadcast(pr, cx, 1);
  724. if (cx->type == ACPI_STATE_C3)
  725. ACPI_FLUSH_CPU_CACHE();
  726. kt1 = ktime_get_real();
  727. /* Tell the scheduler that we are going deep-idle: */
  728. sched_clock_idle_sleep_event();
  729. acpi_idle_do_entry(cx);
  730. kt2 = ktime_get_real();
  731. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  732. sleep_ticks = us_to_pm_timer_ticks(idle_time);
  733. /* Tell the scheduler how much we idled: */
  734. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  735. local_irq_enable();
  736. current_thread_info()->status |= TS_POLLING;
  737. cx->usage++;
  738. acpi_state_timer_broadcast(pr, cx, 0);
  739. cx->time += sleep_ticks;
  740. return idle_time;
  741. }
  742. static int c3_cpu_count;
  743. static DEFINE_SPINLOCK(c3_lock);
  744. /**
  745. * acpi_idle_enter_bm - enters C3 with proper BM handling
  746. * @dev: the target CPU
  747. * @state: the state data
  748. *
  749. * If BM is detected, the deepest non-C3 idle state is entered instead.
  750. */
  751. static int acpi_idle_enter_bm(struct cpuidle_device *dev,
  752. struct cpuidle_state *state)
  753. {
  754. struct acpi_processor *pr;
  755. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  756. ktime_t kt1, kt2;
  757. s64 idle_time;
  758. s64 sleep_ticks = 0;
  759. pr = __get_cpu_var(processors);
  760. if (unlikely(!pr))
  761. return 0;
  762. if (acpi_idle_suspend)
  763. return(acpi_idle_enter_c1(dev, state));
  764. if (acpi_idle_bm_check()) {
  765. if (dev->safe_state) {
  766. dev->last_state = dev->safe_state;
  767. return dev->safe_state->enter(dev, dev->safe_state);
  768. } else {
  769. local_irq_disable();
  770. acpi_safe_halt();
  771. local_irq_enable();
  772. return 0;
  773. }
  774. }
  775. local_irq_disable();
  776. current_thread_info()->status &= ~TS_POLLING;
  777. /*
  778. * TS_POLLING-cleared state must be visible before we test
  779. * NEED_RESCHED:
  780. */
  781. smp_mb();
  782. if (unlikely(need_resched())) {
  783. current_thread_info()->status |= TS_POLLING;
  784. local_irq_enable();
  785. return 0;
  786. }
  787. acpi_unlazy_tlb(smp_processor_id());
  788. /* Tell the scheduler that we are going deep-idle: */
  789. sched_clock_idle_sleep_event();
  790. /*
  791. * Must be done before busmaster disable as we might need to
  792. * access HPET !
  793. */
  794. acpi_state_timer_broadcast(pr, cx, 1);
  795. /*
  796. * disable bus master
  797. * bm_check implies we need ARB_DIS
  798. * !bm_check implies we need cache flush
  799. * bm_control implies whether we can do ARB_DIS
  800. *
  801. * That leaves a case where bm_check is set and bm_control is
  802. * not set. In that case we cannot do much, we enter C3
  803. * without doing anything.
  804. */
  805. if (pr->flags.bm_check && pr->flags.bm_control) {
  806. spin_lock(&c3_lock);
  807. c3_cpu_count++;
  808. /* Disable bus master arbitration when all CPUs are in C3 */
  809. if (c3_cpu_count == num_online_cpus())
  810. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
  811. spin_unlock(&c3_lock);
  812. } else if (!pr->flags.bm_check) {
  813. ACPI_FLUSH_CPU_CACHE();
  814. }
  815. kt1 = ktime_get_real();
  816. acpi_idle_do_entry(cx);
  817. kt2 = ktime_get_real();
  818. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  819. /* Re-enable bus master arbitration */
  820. if (pr->flags.bm_check && pr->flags.bm_control) {
  821. spin_lock(&c3_lock);
  822. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
  823. c3_cpu_count--;
  824. spin_unlock(&c3_lock);
  825. }
  826. sleep_ticks = us_to_pm_timer_ticks(idle_time);
  827. /* Tell the scheduler how much we idled: */
  828. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  829. local_irq_enable();
  830. current_thread_info()->status |= TS_POLLING;
  831. cx->usage++;
  832. acpi_state_timer_broadcast(pr, cx, 0);
  833. cx->time += sleep_ticks;
  834. return idle_time;
  835. }
  836. struct cpuidle_driver acpi_idle_driver = {
  837. .name = "acpi_idle",
  838. .owner = THIS_MODULE,
  839. };
  840. /**
  841. * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
  842. * @pr: the ACPI processor
  843. */
  844. static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
  845. {
  846. int i, count = CPUIDLE_DRIVER_STATE_START;
  847. struct acpi_processor_cx *cx;
  848. struct cpuidle_state *state;
  849. struct cpuidle_device *dev = &pr->power.dev;
  850. if (!pr->flags.power_setup_done)
  851. return -EINVAL;
  852. if (pr->flags.power == 0) {
  853. return -EINVAL;
  854. }
  855. dev->cpu = pr->id;
  856. for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
  857. dev->states[i].name[0] = '\0';
  858. dev->states[i].desc[0] = '\0';
  859. }
  860. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  861. cx = &pr->power.states[i];
  862. state = &dev->states[count];
  863. if (!cx->valid)
  864. continue;
  865. #ifdef CONFIG_HOTPLUG_CPU
  866. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  867. !pr->flags.has_cst &&
  868. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  869. continue;
  870. #endif
  871. cpuidle_set_statedata(state, cx);
  872. snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
  873. strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
  874. state->exit_latency = cx->latency;
  875. state->target_residency = cx->latency * latency_factor;
  876. state->power_usage = cx->power;
  877. state->flags = 0;
  878. switch (cx->type) {
  879. case ACPI_STATE_C1:
  880. state->flags |= CPUIDLE_FLAG_SHALLOW;
  881. if (cx->entry_method == ACPI_CSTATE_FFH)
  882. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  883. state->enter = acpi_idle_enter_c1;
  884. dev->safe_state = state;
  885. break;
  886. case ACPI_STATE_C2:
  887. state->flags |= CPUIDLE_FLAG_BALANCED;
  888. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  889. state->enter = acpi_idle_enter_simple;
  890. dev->safe_state = state;
  891. break;
  892. case ACPI_STATE_C3:
  893. state->flags |= CPUIDLE_FLAG_DEEP;
  894. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  895. state->flags |= CPUIDLE_FLAG_CHECK_BM;
  896. state->enter = pr->flags.bm_check ?
  897. acpi_idle_enter_bm :
  898. acpi_idle_enter_simple;
  899. break;
  900. }
  901. count++;
  902. if (count == CPUIDLE_STATE_MAX)
  903. break;
  904. }
  905. dev->state_count = count;
  906. if (!count)
  907. return -EINVAL;
  908. return 0;
  909. }
  910. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  911. {
  912. int ret = 0;
  913. if (boot_option_idle_override)
  914. return 0;
  915. if (!pr)
  916. return -EINVAL;
  917. if (nocst) {
  918. return -ENODEV;
  919. }
  920. if (!pr->flags.power_setup_done)
  921. return -ENODEV;
  922. cpuidle_pause_and_lock();
  923. cpuidle_disable_device(&pr->power.dev);
  924. acpi_processor_get_power_info(pr);
  925. if (pr->flags.power) {
  926. acpi_processor_setup_cpuidle(pr);
  927. ret = cpuidle_enable_device(&pr->power.dev);
  928. }
  929. cpuidle_resume_and_unlock();
  930. return ret;
  931. }
  932. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  933. struct acpi_device *device)
  934. {
  935. acpi_status status = 0;
  936. static int first_run;
  937. struct proc_dir_entry *entry = NULL;
  938. unsigned int i;
  939. if (boot_option_idle_override)
  940. return 0;
  941. if (!first_run) {
  942. if (idle_halt) {
  943. /*
  944. * When the boot option of "idle=halt" is added, halt
  945. * is used for CPU IDLE.
  946. * In such case C2/C3 is meaningless. So the max_cstate
  947. * is set to one.
  948. */
  949. max_cstate = 1;
  950. }
  951. dmi_check_system(processor_power_dmi_table);
  952. max_cstate = acpi_processor_cstate_check(max_cstate);
  953. if (max_cstate < ACPI_C_STATES_MAX)
  954. printk(KERN_NOTICE
  955. "ACPI: processor limited to max C-state %d\n",
  956. max_cstate);
  957. first_run++;
  958. }
  959. if (!pr)
  960. return -EINVAL;
  961. if (acpi_gbl_FADT.cst_control && !nocst) {
  962. status =
  963. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  964. if (ACPI_FAILURE(status)) {
  965. ACPI_EXCEPTION((AE_INFO, status,
  966. "Notifying BIOS of _CST ability failed"));
  967. }
  968. }
  969. acpi_processor_get_power_info(pr);
  970. pr->flags.power_setup_done = 1;
  971. /*
  972. * Install the idle handler if processor power management is supported.
  973. * Note that we use previously set idle handler will be used on
  974. * platforms that only support C1.
  975. */
  976. if (pr->flags.power) {
  977. acpi_processor_setup_cpuidle(pr);
  978. if (cpuidle_register_device(&pr->power.dev))
  979. return -EIO;
  980. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  981. for (i = 1; i <= pr->power.count; i++)
  982. if (pr->power.states[i].valid)
  983. printk(" C%d[C%d]", i,
  984. pr->power.states[i].type);
  985. printk(")\n");
  986. }
  987. /* 'power' [R] */
  988. entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
  989. S_IRUGO, acpi_device_dir(device),
  990. &acpi_processor_power_fops,
  991. acpi_driver_data(device));
  992. if (!entry)
  993. return -EIO;
  994. return 0;
  995. }
  996. int acpi_processor_power_exit(struct acpi_processor *pr,
  997. struct acpi_device *device)
  998. {
  999. if (boot_option_idle_override)
  1000. return 0;
  1001. cpuidle_unregister_device(&pr->power.dev);
  1002. pr->flags.power_setup_done = 0;
  1003. if (acpi_device_dir(device))
  1004. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1005. acpi_device_dir(device));
  1006. return 0;
  1007. }