en_netdev.c 56 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <linux/mlx4/driver.h>
  41. #include <linux/mlx4/device.h>
  42. #include <linux/mlx4/cmd.h>
  43. #include <linux/mlx4/cq.h>
  44. #include "mlx4_en.h"
  45. #include "en_port.h"
  46. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  47. {
  48. struct mlx4_en_priv *priv = netdev_priv(dev);
  49. int i;
  50. unsigned int offset = 0;
  51. if (up && up != MLX4_EN_NUM_UP)
  52. return -EINVAL;
  53. netdev_set_num_tc(dev, up);
  54. /* Partition Tx queues evenly amongst UP's */
  55. for (i = 0; i < up; i++) {
  56. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  57. offset += priv->num_tx_rings_p_up;
  58. }
  59. return 0;
  60. }
  61. #ifdef CONFIG_RFS_ACCEL
  62. struct mlx4_en_filter {
  63. struct list_head next;
  64. struct work_struct work;
  65. __be32 src_ip;
  66. __be32 dst_ip;
  67. __be16 src_port;
  68. __be16 dst_port;
  69. int rxq_index;
  70. struct mlx4_en_priv *priv;
  71. u32 flow_id; /* RFS infrastructure id */
  72. int id; /* mlx4_en driver id */
  73. u64 reg_id; /* Flow steering API id */
  74. u8 activated; /* Used to prevent expiry before filter
  75. * is attached
  76. */
  77. struct hlist_node filter_chain;
  78. };
  79. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  80. static void mlx4_en_filter_work(struct work_struct *work)
  81. {
  82. struct mlx4_en_filter *filter = container_of(work,
  83. struct mlx4_en_filter,
  84. work);
  85. struct mlx4_en_priv *priv = filter->priv;
  86. struct mlx4_spec_list spec_tcp = {
  87. .id = MLX4_NET_TRANS_RULE_ID_TCP,
  88. {
  89. .tcp_udp = {
  90. .dst_port = filter->dst_port,
  91. .dst_port_msk = (__force __be16)-1,
  92. .src_port = filter->src_port,
  93. .src_port_msk = (__force __be16)-1,
  94. },
  95. },
  96. };
  97. struct mlx4_spec_list spec_ip = {
  98. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  99. {
  100. .ipv4 = {
  101. .dst_ip = filter->dst_ip,
  102. .dst_ip_msk = (__force __be32)-1,
  103. .src_ip = filter->src_ip,
  104. .src_ip_msk = (__force __be32)-1,
  105. },
  106. },
  107. };
  108. struct mlx4_spec_list spec_eth = {
  109. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  110. };
  111. struct mlx4_net_trans_rule rule = {
  112. .list = LIST_HEAD_INIT(rule.list),
  113. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  114. .exclusive = 1,
  115. .allow_loopback = 1,
  116. .promisc_mode = MLX4_FS_PROMISC_NONE,
  117. .port = priv->port,
  118. .priority = MLX4_DOMAIN_RFS,
  119. };
  120. int rc;
  121. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  122. list_add_tail(&spec_eth.list, &rule.list);
  123. list_add_tail(&spec_ip.list, &rule.list);
  124. list_add_tail(&spec_tcp.list, &rule.list);
  125. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  126. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  127. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  128. filter->activated = 0;
  129. if (filter->reg_id) {
  130. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  131. if (rc && rc != -ENOENT)
  132. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  133. }
  134. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  135. if (rc)
  136. en_err(priv, "Error attaching flow. err = %d\n", rc);
  137. mlx4_en_filter_rfs_expire(priv);
  138. filter->activated = 1;
  139. }
  140. static inline struct hlist_head *
  141. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  142. __be16 src_port, __be16 dst_port)
  143. {
  144. unsigned long l;
  145. int bucket_idx;
  146. l = (__force unsigned long)src_port |
  147. ((__force unsigned long)dst_port << 2);
  148. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  149. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  150. return &priv->filter_hash[bucket_idx];
  151. }
  152. static struct mlx4_en_filter *
  153. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  154. __be32 dst_ip, __be16 src_port, __be16 dst_port,
  155. u32 flow_id)
  156. {
  157. struct mlx4_en_filter *filter = NULL;
  158. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  159. if (!filter)
  160. return NULL;
  161. filter->priv = priv;
  162. filter->rxq_index = rxq_index;
  163. INIT_WORK(&filter->work, mlx4_en_filter_work);
  164. filter->src_ip = src_ip;
  165. filter->dst_ip = dst_ip;
  166. filter->src_port = src_port;
  167. filter->dst_port = dst_port;
  168. filter->flow_id = flow_id;
  169. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  170. list_add_tail(&filter->next, &priv->filters);
  171. hlist_add_head(&filter->filter_chain,
  172. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  173. dst_port));
  174. return filter;
  175. }
  176. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  177. {
  178. struct mlx4_en_priv *priv = filter->priv;
  179. int rc;
  180. list_del(&filter->next);
  181. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  182. if (rc && rc != -ENOENT)
  183. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  184. kfree(filter);
  185. }
  186. static inline struct mlx4_en_filter *
  187. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  188. __be16 src_port, __be16 dst_port)
  189. {
  190. struct mlx4_en_filter *filter;
  191. struct mlx4_en_filter *ret = NULL;
  192. hlist_for_each_entry(filter,
  193. filter_hash_bucket(priv, src_ip, dst_ip,
  194. src_port, dst_port),
  195. filter_chain) {
  196. if (filter->src_ip == src_ip &&
  197. filter->dst_ip == dst_ip &&
  198. filter->src_port == src_port &&
  199. filter->dst_port == dst_port) {
  200. ret = filter;
  201. break;
  202. }
  203. }
  204. return ret;
  205. }
  206. static int
  207. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  208. u16 rxq_index, u32 flow_id)
  209. {
  210. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  211. struct mlx4_en_filter *filter;
  212. const struct iphdr *ip;
  213. const __be16 *ports;
  214. __be32 src_ip;
  215. __be32 dst_ip;
  216. __be16 src_port;
  217. __be16 dst_port;
  218. int nhoff = skb_network_offset(skb);
  219. int ret = 0;
  220. if (skb->protocol != htons(ETH_P_IP))
  221. return -EPROTONOSUPPORT;
  222. ip = (const struct iphdr *)(skb->data + nhoff);
  223. if (ip_is_fragment(ip))
  224. return -EPROTONOSUPPORT;
  225. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  226. src_ip = ip->saddr;
  227. dst_ip = ip->daddr;
  228. src_port = ports[0];
  229. dst_port = ports[1];
  230. if (ip->protocol != IPPROTO_TCP)
  231. return -EPROTONOSUPPORT;
  232. spin_lock_bh(&priv->filters_lock);
  233. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
  234. if (filter) {
  235. if (filter->rxq_index == rxq_index)
  236. goto out;
  237. filter->rxq_index = rxq_index;
  238. } else {
  239. filter = mlx4_en_filter_alloc(priv, rxq_index,
  240. src_ip, dst_ip,
  241. src_port, dst_port, flow_id);
  242. if (!filter) {
  243. ret = -ENOMEM;
  244. goto err;
  245. }
  246. }
  247. queue_work(priv->mdev->workqueue, &filter->work);
  248. out:
  249. ret = filter->id;
  250. err:
  251. spin_unlock_bh(&priv->filters_lock);
  252. return ret;
  253. }
  254. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
  255. struct mlx4_en_rx_ring *rx_ring)
  256. {
  257. struct mlx4_en_filter *filter, *tmp;
  258. LIST_HEAD(del_list);
  259. spin_lock_bh(&priv->filters_lock);
  260. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  261. list_move(&filter->next, &del_list);
  262. hlist_del(&filter->filter_chain);
  263. }
  264. spin_unlock_bh(&priv->filters_lock);
  265. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  266. cancel_work_sync(&filter->work);
  267. mlx4_en_filter_free(filter);
  268. }
  269. }
  270. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  271. {
  272. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  273. LIST_HEAD(del_list);
  274. int i = 0;
  275. spin_lock_bh(&priv->filters_lock);
  276. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  277. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  278. break;
  279. if (filter->activated &&
  280. !work_pending(&filter->work) &&
  281. rps_may_expire_flow(priv->dev,
  282. filter->rxq_index, filter->flow_id,
  283. filter->id)) {
  284. list_move(&filter->next, &del_list);
  285. hlist_del(&filter->filter_chain);
  286. } else
  287. last_filter = filter;
  288. i++;
  289. }
  290. if (last_filter && (&last_filter->next != priv->filters.next))
  291. list_move(&priv->filters, &last_filter->next);
  292. spin_unlock_bh(&priv->filters_lock);
  293. list_for_each_entry_safe(filter, tmp, &del_list, next)
  294. mlx4_en_filter_free(filter);
  295. }
  296. #endif
  297. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  298. {
  299. struct mlx4_en_priv *priv = netdev_priv(dev);
  300. struct mlx4_en_dev *mdev = priv->mdev;
  301. int err;
  302. int idx;
  303. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  304. set_bit(vid, priv->active_vlans);
  305. /* Add VID to port VLAN filter */
  306. mutex_lock(&mdev->state_lock);
  307. if (mdev->device_up && priv->port_up) {
  308. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  309. if (err)
  310. en_err(priv, "Failed configuring VLAN filter\n");
  311. }
  312. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  313. en_err(priv, "failed adding vlan %d\n", vid);
  314. mutex_unlock(&mdev->state_lock);
  315. return 0;
  316. }
  317. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  318. {
  319. struct mlx4_en_priv *priv = netdev_priv(dev);
  320. struct mlx4_en_dev *mdev = priv->mdev;
  321. int err;
  322. int idx;
  323. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  324. clear_bit(vid, priv->active_vlans);
  325. /* Remove VID from port VLAN filter */
  326. mutex_lock(&mdev->state_lock);
  327. if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
  328. mlx4_unregister_vlan(mdev->dev, priv->port, idx);
  329. else
  330. en_err(priv, "could not find vid %d in cache\n", vid);
  331. if (mdev->device_up && priv->port_up) {
  332. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  333. if (err)
  334. en_err(priv, "Failed configuring VLAN filter\n");
  335. }
  336. mutex_unlock(&mdev->state_lock);
  337. return 0;
  338. }
  339. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  340. {
  341. unsigned int i;
  342. for (i = ETH_ALEN - 1; i; --i) {
  343. dst_mac[i] = src_mac & 0xff;
  344. src_mac >>= 8;
  345. }
  346. memset(&dst_mac[ETH_ALEN], 0, 2);
  347. }
  348. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  349. unsigned char *mac, int *qpn, u64 *reg_id)
  350. {
  351. struct mlx4_en_dev *mdev = priv->mdev;
  352. struct mlx4_dev *dev = mdev->dev;
  353. int err;
  354. switch (dev->caps.steering_mode) {
  355. case MLX4_STEERING_MODE_B0: {
  356. struct mlx4_qp qp;
  357. u8 gid[16] = {0};
  358. qp.qpn = *qpn;
  359. memcpy(&gid[10], mac, ETH_ALEN);
  360. gid[5] = priv->port;
  361. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  362. break;
  363. }
  364. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  365. struct mlx4_spec_list spec_eth = { {NULL} };
  366. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  367. struct mlx4_net_trans_rule rule = {
  368. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  369. .exclusive = 0,
  370. .allow_loopback = 1,
  371. .promisc_mode = MLX4_FS_PROMISC_NONE,
  372. .priority = MLX4_DOMAIN_NIC,
  373. };
  374. rule.port = priv->port;
  375. rule.qpn = *qpn;
  376. INIT_LIST_HEAD(&rule.list);
  377. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  378. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  379. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  380. list_add_tail(&spec_eth.list, &rule.list);
  381. err = mlx4_flow_attach(dev, &rule, reg_id);
  382. break;
  383. }
  384. default:
  385. return -EINVAL;
  386. }
  387. if (err)
  388. en_warn(priv, "Failed Attaching Unicast\n");
  389. return err;
  390. }
  391. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  392. unsigned char *mac, int qpn, u64 reg_id)
  393. {
  394. struct mlx4_en_dev *mdev = priv->mdev;
  395. struct mlx4_dev *dev = mdev->dev;
  396. switch (dev->caps.steering_mode) {
  397. case MLX4_STEERING_MODE_B0: {
  398. struct mlx4_qp qp;
  399. u8 gid[16] = {0};
  400. qp.qpn = qpn;
  401. memcpy(&gid[10], mac, ETH_ALEN);
  402. gid[5] = priv->port;
  403. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  404. break;
  405. }
  406. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  407. mlx4_flow_detach(dev, reg_id);
  408. break;
  409. }
  410. default:
  411. en_err(priv, "Invalid steering mode.\n");
  412. }
  413. }
  414. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  415. {
  416. struct mlx4_en_dev *mdev = priv->mdev;
  417. struct mlx4_dev *dev = mdev->dev;
  418. struct mlx4_mac_entry *entry;
  419. int index = 0;
  420. int err = 0;
  421. u64 reg_id;
  422. int *qpn = &priv->base_qpn;
  423. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  424. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  425. priv->dev->dev_addr);
  426. index = mlx4_register_mac(dev, priv->port, mac);
  427. if (index < 0) {
  428. err = index;
  429. en_err(priv, "Failed adding MAC: %pM\n",
  430. priv->dev->dev_addr);
  431. return err;
  432. }
  433. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  434. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  435. *qpn = base_qpn + index;
  436. return 0;
  437. }
  438. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  439. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  440. if (err) {
  441. en_err(priv, "Failed to reserve qp for mac registration\n");
  442. goto qp_err;
  443. }
  444. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  445. if (err)
  446. goto steer_err;
  447. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  448. if (!entry) {
  449. err = -ENOMEM;
  450. goto alloc_err;
  451. }
  452. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  453. entry->reg_id = reg_id;
  454. hlist_add_head_rcu(&entry->hlist,
  455. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  456. return 0;
  457. alloc_err:
  458. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  459. steer_err:
  460. mlx4_qp_release_range(dev, *qpn, 1);
  461. qp_err:
  462. mlx4_unregister_mac(dev, priv->port, mac);
  463. return err;
  464. }
  465. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  466. {
  467. struct mlx4_en_dev *mdev = priv->mdev;
  468. struct mlx4_dev *dev = mdev->dev;
  469. int qpn = priv->base_qpn;
  470. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  471. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  472. priv->dev->dev_addr);
  473. mlx4_unregister_mac(dev, priv->port, mac);
  474. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  475. struct mlx4_mac_entry *entry;
  476. struct hlist_node *tmp;
  477. struct hlist_head *bucket;
  478. unsigned int mac_hash;
  479. mac_hash = priv->dev->dev_addr[MLX4_EN_MAC_HASH_IDX];
  480. bucket = &priv->mac_hash[mac_hash];
  481. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  482. if (ether_addr_equal_64bits(entry->mac,
  483. priv->dev->dev_addr)) {
  484. en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n",
  485. priv->port, priv->dev->dev_addr, qpn);
  486. mlx4_en_uc_steer_release(priv, entry->mac,
  487. qpn, entry->reg_id);
  488. mlx4_qp_release_range(dev, qpn, 1);
  489. hlist_del_rcu(&entry->hlist);
  490. kfree_rcu(entry, rcu);
  491. break;
  492. }
  493. }
  494. }
  495. }
  496. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  497. unsigned char *new_mac, unsigned char *prev_mac)
  498. {
  499. struct mlx4_en_dev *mdev = priv->mdev;
  500. struct mlx4_dev *dev = mdev->dev;
  501. int err = 0;
  502. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  503. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  504. struct hlist_head *bucket;
  505. unsigned int mac_hash;
  506. struct mlx4_mac_entry *entry;
  507. struct hlist_node *tmp;
  508. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  509. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  510. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  511. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  512. mlx4_en_uc_steer_release(priv, entry->mac,
  513. qpn, entry->reg_id);
  514. mlx4_unregister_mac(dev, priv->port,
  515. prev_mac_u64);
  516. hlist_del_rcu(&entry->hlist);
  517. synchronize_rcu();
  518. memcpy(entry->mac, new_mac, ETH_ALEN);
  519. entry->reg_id = 0;
  520. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  521. hlist_add_head_rcu(&entry->hlist,
  522. &priv->mac_hash[mac_hash]);
  523. mlx4_register_mac(dev, priv->port, new_mac_u64);
  524. err = mlx4_en_uc_steer_add(priv, new_mac,
  525. &qpn,
  526. &entry->reg_id);
  527. return err;
  528. }
  529. }
  530. return -EINVAL;
  531. }
  532. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  533. }
  534. u64 mlx4_en_mac_to_u64(u8 *addr)
  535. {
  536. u64 mac = 0;
  537. int i;
  538. for (i = 0; i < ETH_ALEN; i++) {
  539. mac <<= 8;
  540. mac |= addr[i];
  541. }
  542. return mac;
  543. }
  544. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  545. {
  546. struct mlx4_en_priv *priv = netdev_priv(dev);
  547. struct mlx4_en_dev *mdev = priv->mdev;
  548. struct sockaddr *saddr = addr;
  549. if (!is_valid_ether_addr(saddr->sa_data))
  550. return -EADDRNOTAVAIL;
  551. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  552. queue_work(mdev->workqueue, &priv->mac_task);
  553. return 0;
  554. }
  555. static void mlx4_en_do_set_mac(struct work_struct *work)
  556. {
  557. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  558. mac_task);
  559. struct mlx4_en_dev *mdev = priv->mdev;
  560. int err = 0;
  561. mutex_lock(&mdev->state_lock);
  562. if (priv->port_up) {
  563. /* Remove old MAC and insert the new one */
  564. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  565. priv->dev->dev_addr, priv->prev_mac);
  566. if (err)
  567. en_err(priv, "Failed changing HW MAC address\n");
  568. memcpy(priv->prev_mac, priv->dev->dev_addr,
  569. sizeof(priv->prev_mac));
  570. } else
  571. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  572. mutex_unlock(&mdev->state_lock);
  573. }
  574. static void mlx4_en_clear_list(struct net_device *dev)
  575. {
  576. struct mlx4_en_priv *priv = netdev_priv(dev);
  577. struct mlx4_en_mc_list *tmp, *mc_to_del;
  578. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  579. list_del(&mc_to_del->list);
  580. kfree(mc_to_del);
  581. }
  582. }
  583. static void mlx4_en_cache_mclist(struct net_device *dev)
  584. {
  585. struct mlx4_en_priv *priv = netdev_priv(dev);
  586. struct netdev_hw_addr *ha;
  587. struct mlx4_en_mc_list *tmp;
  588. mlx4_en_clear_list(dev);
  589. netdev_for_each_mc_addr(ha, dev) {
  590. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  591. if (!tmp) {
  592. mlx4_en_clear_list(dev);
  593. return;
  594. }
  595. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  596. list_add_tail(&tmp->list, &priv->mc_list);
  597. }
  598. }
  599. static void update_mclist_flags(struct mlx4_en_priv *priv,
  600. struct list_head *dst,
  601. struct list_head *src)
  602. {
  603. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  604. bool found;
  605. /* Find all the entries that should be removed from dst,
  606. * These are the entries that are not found in src
  607. */
  608. list_for_each_entry(dst_tmp, dst, list) {
  609. found = false;
  610. list_for_each_entry(src_tmp, src, list) {
  611. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  612. found = true;
  613. break;
  614. }
  615. }
  616. if (!found)
  617. dst_tmp->action = MCLIST_REM;
  618. }
  619. /* Add entries that exist in src but not in dst
  620. * mark them as need to add
  621. */
  622. list_for_each_entry(src_tmp, src, list) {
  623. found = false;
  624. list_for_each_entry(dst_tmp, dst, list) {
  625. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  626. dst_tmp->action = MCLIST_NONE;
  627. found = true;
  628. break;
  629. }
  630. }
  631. if (!found) {
  632. new_mc = kmemdup(src_tmp,
  633. sizeof(struct mlx4_en_mc_list),
  634. GFP_KERNEL);
  635. if (!new_mc)
  636. return;
  637. new_mc->action = MCLIST_ADD;
  638. list_add_tail(&new_mc->list, dst);
  639. }
  640. }
  641. }
  642. static void mlx4_en_set_rx_mode(struct net_device *dev)
  643. {
  644. struct mlx4_en_priv *priv = netdev_priv(dev);
  645. if (!priv->port_up)
  646. return;
  647. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  648. }
  649. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  650. struct mlx4_en_dev *mdev)
  651. {
  652. int err = 0;
  653. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  654. if (netif_msg_rx_status(priv))
  655. en_warn(priv, "Entering promiscuous mode\n");
  656. priv->flags |= MLX4_EN_FLAG_PROMISC;
  657. /* Enable promiscouos mode */
  658. switch (mdev->dev->caps.steering_mode) {
  659. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  660. err = mlx4_flow_steer_promisc_add(mdev->dev,
  661. priv->port,
  662. priv->base_qpn,
  663. MLX4_FS_PROMISC_UPLINK);
  664. if (err)
  665. en_err(priv, "Failed enabling promiscuous mode\n");
  666. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  667. break;
  668. case MLX4_STEERING_MODE_B0:
  669. err = mlx4_unicast_promisc_add(mdev->dev,
  670. priv->base_qpn,
  671. priv->port);
  672. if (err)
  673. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  674. /* Add the default qp number as multicast
  675. * promisc
  676. */
  677. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  678. err = mlx4_multicast_promisc_add(mdev->dev,
  679. priv->base_qpn,
  680. priv->port);
  681. if (err)
  682. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  683. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  684. }
  685. break;
  686. case MLX4_STEERING_MODE_A0:
  687. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  688. priv->port,
  689. priv->base_qpn,
  690. 1);
  691. if (err)
  692. en_err(priv, "Failed enabling promiscuous mode\n");
  693. break;
  694. }
  695. /* Disable port multicast filter (unconditionally) */
  696. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  697. 0, MLX4_MCAST_DISABLE);
  698. if (err)
  699. en_err(priv, "Failed disabling multicast filter\n");
  700. /* Disable port VLAN filter */
  701. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  702. if (err)
  703. en_err(priv, "Failed disabling VLAN filter\n");
  704. }
  705. }
  706. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  707. struct mlx4_en_dev *mdev)
  708. {
  709. int err = 0;
  710. if (netif_msg_rx_status(priv))
  711. en_warn(priv, "Leaving promiscuous mode\n");
  712. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  713. /* Disable promiscouos mode */
  714. switch (mdev->dev->caps.steering_mode) {
  715. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  716. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  717. priv->port,
  718. MLX4_FS_PROMISC_UPLINK);
  719. if (err)
  720. en_err(priv, "Failed disabling promiscuous mode\n");
  721. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  722. break;
  723. case MLX4_STEERING_MODE_B0:
  724. err = mlx4_unicast_promisc_remove(mdev->dev,
  725. priv->base_qpn,
  726. priv->port);
  727. if (err)
  728. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  729. /* Disable Multicast promisc */
  730. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  731. err = mlx4_multicast_promisc_remove(mdev->dev,
  732. priv->base_qpn,
  733. priv->port);
  734. if (err)
  735. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  736. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  737. }
  738. break;
  739. case MLX4_STEERING_MODE_A0:
  740. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  741. priv->port,
  742. priv->base_qpn, 0);
  743. if (err)
  744. en_err(priv, "Failed disabling promiscuous mode\n");
  745. break;
  746. }
  747. /* Enable port VLAN filter */
  748. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  749. if (err)
  750. en_err(priv, "Failed enabling VLAN filter\n");
  751. }
  752. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  753. struct net_device *dev,
  754. struct mlx4_en_dev *mdev)
  755. {
  756. struct mlx4_en_mc_list *mclist, *tmp;
  757. u64 mcast_addr = 0;
  758. u8 mc_list[16] = {0};
  759. int err = 0;
  760. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  761. if (dev->flags & IFF_ALLMULTI) {
  762. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  763. 0, MLX4_MCAST_DISABLE);
  764. if (err)
  765. en_err(priv, "Failed disabling multicast filter\n");
  766. /* Add the default qp number as multicast promisc */
  767. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  768. switch (mdev->dev->caps.steering_mode) {
  769. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  770. err = mlx4_flow_steer_promisc_add(mdev->dev,
  771. priv->port,
  772. priv->base_qpn,
  773. MLX4_FS_PROMISC_ALL_MULTI);
  774. break;
  775. case MLX4_STEERING_MODE_B0:
  776. err = mlx4_multicast_promisc_add(mdev->dev,
  777. priv->base_qpn,
  778. priv->port);
  779. break;
  780. case MLX4_STEERING_MODE_A0:
  781. break;
  782. }
  783. if (err)
  784. en_err(priv, "Failed entering multicast promisc mode\n");
  785. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  786. }
  787. } else {
  788. /* Disable Multicast promisc */
  789. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  790. switch (mdev->dev->caps.steering_mode) {
  791. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  792. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  793. priv->port,
  794. MLX4_FS_PROMISC_ALL_MULTI);
  795. break;
  796. case MLX4_STEERING_MODE_B0:
  797. err = mlx4_multicast_promisc_remove(mdev->dev,
  798. priv->base_qpn,
  799. priv->port);
  800. break;
  801. case MLX4_STEERING_MODE_A0:
  802. break;
  803. }
  804. if (err)
  805. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  806. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  807. }
  808. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  809. 0, MLX4_MCAST_DISABLE);
  810. if (err)
  811. en_err(priv, "Failed disabling multicast filter\n");
  812. /* Flush mcast filter and init it with broadcast address */
  813. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  814. 1, MLX4_MCAST_CONFIG);
  815. /* Update multicast list - we cache all addresses so they won't
  816. * change while HW is updated holding the command semaphor */
  817. netif_addr_lock_bh(dev);
  818. mlx4_en_cache_mclist(dev);
  819. netif_addr_unlock_bh(dev);
  820. list_for_each_entry(mclist, &priv->mc_list, list) {
  821. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  822. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  823. mcast_addr, 0, MLX4_MCAST_CONFIG);
  824. }
  825. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  826. 0, MLX4_MCAST_ENABLE);
  827. if (err)
  828. en_err(priv, "Failed enabling multicast filter\n");
  829. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  830. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  831. if (mclist->action == MCLIST_REM) {
  832. /* detach this address and delete from list */
  833. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  834. mc_list[5] = priv->port;
  835. err = mlx4_multicast_detach(mdev->dev,
  836. &priv->rss_map.indir_qp,
  837. mc_list,
  838. MLX4_PROT_ETH,
  839. mclist->reg_id);
  840. if (err)
  841. en_err(priv, "Fail to detach multicast address\n");
  842. /* remove from list */
  843. list_del(&mclist->list);
  844. kfree(mclist);
  845. } else if (mclist->action == MCLIST_ADD) {
  846. /* attach the address */
  847. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  848. /* needed for B0 steering support */
  849. mc_list[5] = priv->port;
  850. err = mlx4_multicast_attach(mdev->dev,
  851. &priv->rss_map.indir_qp,
  852. mc_list,
  853. priv->port, 0,
  854. MLX4_PROT_ETH,
  855. &mclist->reg_id);
  856. if (err)
  857. en_err(priv, "Fail to attach multicast address\n");
  858. }
  859. }
  860. }
  861. }
  862. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  863. struct net_device *dev,
  864. struct mlx4_en_dev *mdev)
  865. {
  866. struct netdev_hw_addr *ha;
  867. struct mlx4_mac_entry *entry;
  868. struct hlist_node *tmp;
  869. bool found;
  870. u64 mac;
  871. int err = 0;
  872. struct hlist_head *bucket;
  873. unsigned int i;
  874. int removed = 0;
  875. u32 prev_flags;
  876. /* Note that we do not need to protect our mac_hash traversal with rcu,
  877. * since all modification code is protected by mdev->state_lock
  878. */
  879. /* find what to remove */
  880. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  881. bucket = &priv->mac_hash[i];
  882. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  883. found = false;
  884. netdev_for_each_uc_addr(ha, dev) {
  885. if (ether_addr_equal_64bits(entry->mac,
  886. ha->addr)) {
  887. found = true;
  888. break;
  889. }
  890. }
  891. /* MAC address of the port is not in uc list */
  892. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  893. found = true;
  894. if (!found) {
  895. mac = mlx4_en_mac_to_u64(entry->mac);
  896. mlx4_en_uc_steer_release(priv, entry->mac,
  897. priv->base_qpn,
  898. entry->reg_id);
  899. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  900. hlist_del_rcu(&entry->hlist);
  901. kfree_rcu(entry, rcu);
  902. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  903. entry->mac, priv->port);
  904. ++removed;
  905. }
  906. }
  907. }
  908. /* if we didn't remove anything, there is no use in trying to add
  909. * again once we are in a forced promisc mode state
  910. */
  911. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  912. return;
  913. prev_flags = priv->flags;
  914. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  915. /* find what to add */
  916. netdev_for_each_uc_addr(ha, dev) {
  917. found = false;
  918. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  919. hlist_for_each_entry(entry, bucket, hlist) {
  920. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  921. found = true;
  922. break;
  923. }
  924. }
  925. if (!found) {
  926. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  927. if (!entry) {
  928. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  929. ha->addr, priv->port);
  930. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  931. break;
  932. }
  933. mac = mlx4_en_mac_to_u64(ha->addr);
  934. memcpy(entry->mac, ha->addr, ETH_ALEN);
  935. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  936. if (err < 0) {
  937. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  938. ha->addr, priv->port, err);
  939. kfree(entry);
  940. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  941. break;
  942. }
  943. err = mlx4_en_uc_steer_add(priv, ha->addr,
  944. &priv->base_qpn,
  945. &entry->reg_id);
  946. if (err) {
  947. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  948. ha->addr, priv->port, err);
  949. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  950. kfree(entry);
  951. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  952. break;
  953. } else {
  954. unsigned int mac_hash;
  955. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  956. ha->addr, priv->port);
  957. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  958. bucket = &priv->mac_hash[mac_hash];
  959. hlist_add_head_rcu(&entry->hlist, bucket);
  960. }
  961. }
  962. }
  963. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  964. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  965. priv->port);
  966. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  967. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  968. priv->port);
  969. }
  970. }
  971. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  972. {
  973. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  974. rx_mode_task);
  975. struct mlx4_en_dev *mdev = priv->mdev;
  976. struct net_device *dev = priv->dev;
  977. mutex_lock(&mdev->state_lock);
  978. if (!mdev->device_up) {
  979. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  980. goto out;
  981. }
  982. if (!priv->port_up) {
  983. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  984. goto out;
  985. }
  986. if (!netif_carrier_ok(dev)) {
  987. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  988. if (priv->port_state.link_state) {
  989. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  990. netif_carrier_on(dev);
  991. en_dbg(LINK, priv, "Link Up\n");
  992. }
  993. }
  994. }
  995. if (dev->priv_flags & IFF_UNICAST_FLT)
  996. mlx4_en_do_uc_filter(priv, dev, mdev);
  997. /* Promsicuous mode: disable all filters */
  998. if ((dev->flags & IFF_PROMISC) ||
  999. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1000. mlx4_en_set_promisc_mode(priv, mdev);
  1001. goto out;
  1002. }
  1003. /* Not in promiscuous mode */
  1004. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1005. mlx4_en_clear_promisc_mode(priv, mdev);
  1006. mlx4_en_do_multicast(priv, dev, mdev);
  1007. out:
  1008. mutex_unlock(&mdev->state_lock);
  1009. }
  1010. #ifdef CONFIG_NET_POLL_CONTROLLER
  1011. static void mlx4_en_netpoll(struct net_device *dev)
  1012. {
  1013. struct mlx4_en_priv *priv = netdev_priv(dev);
  1014. struct mlx4_en_cq *cq;
  1015. unsigned long flags;
  1016. int i;
  1017. for (i = 0; i < priv->rx_ring_num; i++) {
  1018. cq = &priv->rx_cq[i];
  1019. spin_lock_irqsave(&cq->lock, flags);
  1020. napi_synchronize(&cq->napi);
  1021. mlx4_en_process_rx_cq(dev, cq, 0);
  1022. spin_unlock_irqrestore(&cq->lock, flags);
  1023. }
  1024. }
  1025. #endif
  1026. static void mlx4_en_tx_timeout(struct net_device *dev)
  1027. {
  1028. struct mlx4_en_priv *priv = netdev_priv(dev);
  1029. struct mlx4_en_dev *mdev = priv->mdev;
  1030. if (netif_msg_timer(priv))
  1031. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1032. priv->port_stats.tx_timeout++;
  1033. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1034. queue_work(mdev->workqueue, &priv->watchdog_task);
  1035. }
  1036. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1037. {
  1038. struct mlx4_en_priv *priv = netdev_priv(dev);
  1039. spin_lock_bh(&priv->stats_lock);
  1040. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1041. spin_unlock_bh(&priv->stats_lock);
  1042. return &priv->ret_stats;
  1043. }
  1044. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1045. {
  1046. struct mlx4_en_cq *cq;
  1047. int i;
  1048. /* If we haven't received a specific coalescing setting
  1049. * (module param), we set the moderation parameters as follows:
  1050. * - moder_cnt is set to the number of mtu sized packets to
  1051. * satisfy our coalescing target.
  1052. * - moder_time is set to a fixed value.
  1053. */
  1054. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1055. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1056. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1057. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1058. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1059. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1060. /* Setup cq moderation params */
  1061. for (i = 0; i < priv->rx_ring_num; i++) {
  1062. cq = &priv->rx_cq[i];
  1063. cq->moder_cnt = priv->rx_frames;
  1064. cq->moder_time = priv->rx_usecs;
  1065. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1066. priv->last_moder_packets[i] = 0;
  1067. priv->last_moder_bytes[i] = 0;
  1068. }
  1069. for (i = 0; i < priv->tx_ring_num; i++) {
  1070. cq = &priv->tx_cq[i];
  1071. cq->moder_cnt = priv->tx_frames;
  1072. cq->moder_time = priv->tx_usecs;
  1073. }
  1074. /* Reset auto-moderation params */
  1075. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1076. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1077. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1078. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1079. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1080. priv->adaptive_rx_coal = 1;
  1081. priv->last_moder_jiffies = 0;
  1082. priv->last_moder_tx_packets = 0;
  1083. }
  1084. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1085. {
  1086. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1087. struct mlx4_en_cq *cq;
  1088. unsigned long packets;
  1089. unsigned long rate;
  1090. unsigned long avg_pkt_size;
  1091. unsigned long rx_packets;
  1092. unsigned long rx_bytes;
  1093. unsigned long rx_pkt_diff;
  1094. int moder_time;
  1095. int ring, err;
  1096. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1097. return;
  1098. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1099. spin_lock_bh(&priv->stats_lock);
  1100. rx_packets = priv->rx_ring[ring].packets;
  1101. rx_bytes = priv->rx_ring[ring].bytes;
  1102. spin_unlock_bh(&priv->stats_lock);
  1103. rx_pkt_diff = ((unsigned long) (rx_packets -
  1104. priv->last_moder_packets[ring]));
  1105. packets = rx_pkt_diff;
  1106. rate = packets * HZ / period;
  1107. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1108. priv->last_moder_bytes[ring])) / packets : 0;
  1109. /* Apply auto-moderation only when packet rate
  1110. * exceeds a rate that it matters */
  1111. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1112. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1113. if (rate < priv->pkt_rate_low)
  1114. moder_time = priv->rx_usecs_low;
  1115. else if (rate > priv->pkt_rate_high)
  1116. moder_time = priv->rx_usecs_high;
  1117. else
  1118. moder_time = (rate - priv->pkt_rate_low) *
  1119. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1120. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1121. priv->rx_usecs_low;
  1122. } else {
  1123. moder_time = priv->rx_usecs_low;
  1124. }
  1125. if (moder_time != priv->last_moder_time[ring]) {
  1126. priv->last_moder_time[ring] = moder_time;
  1127. cq = &priv->rx_cq[ring];
  1128. cq->moder_time = moder_time;
  1129. err = mlx4_en_set_cq_moder(priv, cq);
  1130. if (err)
  1131. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1132. ring);
  1133. }
  1134. priv->last_moder_packets[ring] = rx_packets;
  1135. priv->last_moder_bytes[ring] = rx_bytes;
  1136. }
  1137. priv->last_moder_jiffies = jiffies;
  1138. }
  1139. static void mlx4_en_do_get_stats(struct work_struct *work)
  1140. {
  1141. struct delayed_work *delay = to_delayed_work(work);
  1142. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1143. stats_task);
  1144. struct mlx4_en_dev *mdev = priv->mdev;
  1145. int err;
  1146. mutex_lock(&mdev->state_lock);
  1147. if (mdev->device_up) {
  1148. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1149. if (err)
  1150. en_dbg(HW, priv, "Could not update stats\n");
  1151. if (priv->port_up)
  1152. mlx4_en_auto_moderation(priv);
  1153. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1154. }
  1155. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1156. queue_work(mdev->workqueue, &priv->mac_task);
  1157. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1158. }
  1159. mutex_unlock(&mdev->state_lock);
  1160. }
  1161. static void mlx4_en_linkstate(struct work_struct *work)
  1162. {
  1163. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1164. linkstate_task);
  1165. struct mlx4_en_dev *mdev = priv->mdev;
  1166. int linkstate = priv->link_state;
  1167. mutex_lock(&mdev->state_lock);
  1168. /* If observable port state changed set carrier state and
  1169. * report to system log */
  1170. if (priv->last_link_state != linkstate) {
  1171. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1172. en_info(priv, "Link Down\n");
  1173. netif_carrier_off(priv->dev);
  1174. } else {
  1175. en_info(priv, "Link Up\n");
  1176. netif_carrier_on(priv->dev);
  1177. }
  1178. }
  1179. priv->last_link_state = linkstate;
  1180. mutex_unlock(&mdev->state_lock);
  1181. }
  1182. int mlx4_en_start_port(struct net_device *dev)
  1183. {
  1184. struct mlx4_en_priv *priv = netdev_priv(dev);
  1185. struct mlx4_en_dev *mdev = priv->mdev;
  1186. struct mlx4_en_cq *cq;
  1187. struct mlx4_en_tx_ring *tx_ring;
  1188. int rx_index = 0;
  1189. int tx_index = 0;
  1190. int err = 0;
  1191. int i;
  1192. int j;
  1193. u8 mc_list[16] = {0};
  1194. if (priv->port_up) {
  1195. en_dbg(DRV, priv, "start port called while port already up\n");
  1196. return 0;
  1197. }
  1198. INIT_LIST_HEAD(&priv->mc_list);
  1199. INIT_LIST_HEAD(&priv->curr_list);
  1200. INIT_LIST_HEAD(&priv->ethtool_list);
  1201. memset(&priv->ethtool_rules[0], 0,
  1202. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1203. /* Calculate Rx buf size */
  1204. dev->mtu = min(dev->mtu, priv->max_mtu);
  1205. mlx4_en_calc_rx_buf(dev);
  1206. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1207. /* Configure rx cq's and rings */
  1208. err = mlx4_en_activate_rx_rings(priv);
  1209. if (err) {
  1210. en_err(priv, "Failed to activate RX rings\n");
  1211. return err;
  1212. }
  1213. for (i = 0; i < priv->rx_ring_num; i++) {
  1214. cq = &priv->rx_cq[i];
  1215. err = mlx4_en_activate_cq(priv, cq, i);
  1216. if (err) {
  1217. en_err(priv, "Failed activating Rx CQ\n");
  1218. goto cq_err;
  1219. }
  1220. for (j = 0; j < cq->size; j++)
  1221. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1222. err = mlx4_en_set_cq_moder(priv, cq);
  1223. if (err) {
  1224. en_err(priv, "Failed setting cq moderation parameters");
  1225. mlx4_en_deactivate_cq(priv, cq);
  1226. goto cq_err;
  1227. }
  1228. mlx4_en_arm_cq(priv, cq);
  1229. priv->rx_ring[i].cqn = cq->mcq.cqn;
  1230. ++rx_index;
  1231. }
  1232. /* Set qp number */
  1233. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1234. err = mlx4_en_get_qp(priv);
  1235. if (err) {
  1236. en_err(priv, "Failed getting eth qp\n");
  1237. goto cq_err;
  1238. }
  1239. mdev->mac_removed[priv->port] = 0;
  1240. err = mlx4_en_config_rss_steer(priv);
  1241. if (err) {
  1242. en_err(priv, "Failed configuring rss steering\n");
  1243. goto mac_err;
  1244. }
  1245. err = mlx4_en_create_drop_qp(priv);
  1246. if (err)
  1247. goto rss_err;
  1248. /* Configure tx cq's and rings */
  1249. for (i = 0; i < priv->tx_ring_num; i++) {
  1250. /* Configure cq */
  1251. cq = &priv->tx_cq[i];
  1252. err = mlx4_en_activate_cq(priv, cq, i);
  1253. if (err) {
  1254. en_err(priv, "Failed allocating Tx CQ\n");
  1255. goto tx_err;
  1256. }
  1257. err = mlx4_en_set_cq_moder(priv, cq);
  1258. if (err) {
  1259. en_err(priv, "Failed setting cq moderation parameters");
  1260. mlx4_en_deactivate_cq(priv, cq);
  1261. goto tx_err;
  1262. }
  1263. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1264. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1265. /* Configure ring */
  1266. tx_ring = &priv->tx_ring[i];
  1267. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1268. i / priv->num_tx_rings_p_up);
  1269. if (err) {
  1270. en_err(priv, "Failed allocating Tx ring\n");
  1271. mlx4_en_deactivate_cq(priv, cq);
  1272. goto tx_err;
  1273. }
  1274. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1275. /* Arm CQ for TX completions */
  1276. mlx4_en_arm_cq(priv, cq);
  1277. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1278. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1279. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1280. ++tx_index;
  1281. }
  1282. /* Configure port */
  1283. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1284. priv->rx_skb_size + ETH_FCS_LEN,
  1285. priv->prof->tx_pause,
  1286. priv->prof->tx_ppp,
  1287. priv->prof->rx_pause,
  1288. priv->prof->rx_ppp);
  1289. if (err) {
  1290. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1291. priv->port, err);
  1292. goto tx_err;
  1293. }
  1294. /* Set default qp number */
  1295. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1296. if (err) {
  1297. en_err(priv, "Failed setting default qp numbers\n");
  1298. goto tx_err;
  1299. }
  1300. /* Init port */
  1301. en_dbg(HW, priv, "Initializing port\n");
  1302. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1303. if (err) {
  1304. en_err(priv, "Failed Initializing port\n");
  1305. goto tx_err;
  1306. }
  1307. /* Attach rx QP to bradcast address */
  1308. memset(&mc_list[10], 0xff, ETH_ALEN);
  1309. mc_list[5] = priv->port; /* needed for B0 steering support */
  1310. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1311. priv->port, 0, MLX4_PROT_ETH,
  1312. &priv->broadcast_id))
  1313. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1314. /* Must redo promiscuous mode setup. */
  1315. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1316. /* Schedule multicast task to populate multicast list */
  1317. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1318. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1319. priv->port_up = true;
  1320. netif_tx_start_all_queues(dev);
  1321. netif_device_attach(dev);
  1322. return 0;
  1323. tx_err:
  1324. while (tx_index--) {
  1325. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
  1326. mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
  1327. }
  1328. mlx4_en_destroy_drop_qp(priv);
  1329. rss_err:
  1330. mlx4_en_release_rss_steer(priv);
  1331. mac_err:
  1332. mlx4_en_put_qp(priv);
  1333. cq_err:
  1334. while (rx_index--)
  1335. mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
  1336. for (i = 0; i < priv->rx_ring_num; i++)
  1337. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1338. return err; /* need to close devices */
  1339. }
  1340. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1341. {
  1342. struct mlx4_en_priv *priv = netdev_priv(dev);
  1343. struct mlx4_en_dev *mdev = priv->mdev;
  1344. struct mlx4_en_mc_list *mclist, *tmp;
  1345. struct ethtool_flow_id *flow, *tmp_flow;
  1346. int i;
  1347. u8 mc_list[16] = {0};
  1348. if (!priv->port_up) {
  1349. en_dbg(DRV, priv, "stop port called while port already down\n");
  1350. return;
  1351. }
  1352. /* Synchronize with tx routine */
  1353. netif_tx_lock_bh(dev);
  1354. if (detach)
  1355. netif_device_detach(dev);
  1356. netif_tx_stop_all_queues(dev);
  1357. netif_tx_unlock_bh(dev);
  1358. netif_tx_disable(dev);
  1359. /* Set port as not active */
  1360. priv->port_up = false;
  1361. /* Promsicuous mode */
  1362. if (mdev->dev->caps.steering_mode ==
  1363. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1364. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1365. MLX4_EN_FLAG_MC_PROMISC);
  1366. mlx4_flow_steer_promisc_remove(mdev->dev,
  1367. priv->port,
  1368. MLX4_FS_PROMISC_UPLINK);
  1369. mlx4_flow_steer_promisc_remove(mdev->dev,
  1370. priv->port,
  1371. MLX4_FS_PROMISC_ALL_MULTI);
  1372. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1373. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1374. /* Disable promiscouos mode */
  1375. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1376. priv->port);
  1377. /* Disable Multicast promisc */
  1378. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1379. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1380. priv->port);
  1381. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1382. }
  1383. }
  1384. /* Detach All multicasts */
  1385. memset(&mc_list[10], 0xff, ETH_ALEN);
  1386. mc_list[5] = priv->port; /* needed for B0 steering support */
  1387. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1388. MLX4_PROT_ETH, priv->broadcast_id);
  1389. list_for_each_entry(mclist, &priv->curr_list, list) {
  1390. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1391. mc_list[5] = priv->port;
  1392. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1393. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1394. }
  1395. mlx4_en_clear_list(dev);
  1396. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1397. list_del(&mclist->list);
  1398. kfree(mclist);
  1399. }
  1400. /* Flush multicast filter */
  1401. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1402. mlx4_en_destroy_drop_qp(priv);
  1403. /* Free TX Rings */
  1404. for (i = 0; i < priv->tx_ring_num; i++) {
  1405. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
  1406. mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
  1407. }
  1408. msleep(10);
  1409. for (i = 0; i < priv->tx_ring_num; i++)
  1410. mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
  1411. /* Free RSS qps */
  1412. mlx4_en_release_rss_steer(priv);
  1413. /* Unregister Mac address for the port */
  1414. mlx4_en_put_qp(priv);
  1415. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
  1416. mdev->mac_removed[priv->port] = 1;
  1417. /* Remove flow steering rules for the port*/
  1418. if (mdev->dev->caps.steering_mode ==
  1419. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1420. ASSERT_RTNL();
  1421. list_for_each_entry_safe(flow, tmp_flow,
  1422. &priv->ethtool_list, list) {
  1423. mlx4_flow_detach(mdev->dev, flow->id);
  1424. list_del(&flow->list);
  1425. }
  1426. }
  1427. /* Free RX Rings */
  1428. for (i = 0; i < priv->rx_ring_num; i++) {
  1429. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1430. while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
  1431. msleep(1);
  1432. mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
  1433. }
  1434. /* close port*/
  1435. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1436. }
  1437. static void mlx4_en_restart(struct work_struct *work)
  1438. {
  1439. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1440. watchdog_task);
  1441. struct mlx4_en_dev *mdev = priv->mdev;
  1442. struct net_device *dev = priv->dev;
  1443. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1444. mutex_lock(&mdev->state_lock);
  1445. if (priv->port_up) {
  1446. mlx4_en_stop_port(dev, 1);
  1447. if (mlx4_en_start_port(dev))
  1448. en_err(priv, "Failed restarting port %d\n", priv->port);
  1449. }
  1450. mutex_unlock(&mdev->state_lock);
  1451. }
  1452. static void mlx4_en_clear_stats(struct net_device *dev)
  1453. {
  1454. struct mlx4_en_priv *priv = netdev_priv(dev);
  1455. struct mlx4_en_dev *mdev = priv->mdev;
  1456. int i;
  1457. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1458. en_dbg(HW, priv, "Failed dumping statistics\n");
  1459. memset(&priv->stats, 0, sizeof(priv->stats));
  1460. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1461. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1462. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1463. for (i = 0; i < priv->tx_ring_num; i++) {
  1464. priv->tx_ring[i].bytes = 0;
  1465. priv->tx_ring[i].packets = 0;
  1466. priv->tx_ring[i].tx_csum = 0;
  1467. }
  1468. for (i = 0; i < priv->rx_ring_num; i++) {
  1469. priv->rx_ring[i].bytes = 0;
  1470. priv->rx_ring[i].packets = 0;
  1471. priv->rx_ring[i].csum_ok = 0;
  1472. priv->rx_ring[i].csum_none = 0;
  1473. }
  1474. }
  1475. static int mlx4_en_open(struct net_device *dev)
  1476. {
  1477. struct mlx4_en_priv *priv = netdev_priv(dev);
  1478. struct mlx4_en_dev *mdev = priv->mdev;
  1479. int err = 0;
  1480. mutex_lock(&mdev->state_lock);
  1481. if (!mdev->device_up) {
  1482. en_err(priv, "Cannot open - device down/disabled\n");
  1483. err = -EBUSY;
  1484. goto out;
  1485. }
  1486. /* Reset HW statistics and SW counters */
  1487. mlx4_en_clear_stats(dev);
  1488. err = mlx4_en_start_port(dev);
  1489. if (err)
  1490. en_err(priv, "Failed starting port:%d\n", priv->port);
  1491. out:
  1492. mutex_unlock(&mdev->state_lock);
  1493. return err;
  1494. }
  1495. static int mlx4_en_close(struct net_device *dev)
  1496. {
  1497. struct mlx4_en_priv *priv = netdev_priv(dev);
  1498. struct mlx4_en_dev *mdev = priv->mdev;
  1499. en_dbg(IFDOWN, priv, "Close port called\n");
  1500. mutex_lock(&mdev->state_lock);
  1501. mlx4_en_stop_port(dev, 0);
  1502. netif_carrier_off(dev);
  1503. mutex_unlock(&mdev->state_lock);
  1504. return 0;
  1505. }
  1506. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1507. {
  1508. int i;
  1509. #ifdef CONFIG_RFS_ACCEL
  1510. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1511. priv->dev->rx_cpu_rmap = NULL;
  1512. #endif
  1513. for (i = 0; i < priv->tx_ring_num; i++) {
  1514. if (priv->tx_ring[i].tx_info)
  1515. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1516. if (priv->tx_cq[i].buf)
  1517. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1518. }
  1519. for (i = 0; i < priv->rx_ring_num; i++) {
  1520. if (priv->rx_ring[i].rx_info)
  1521. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1522. priv->prof->rx_ring_size, priv->stride);
  1523. if (priv->rx_cq[i].buf)
  1524. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1525. }
  1526. if (priv->base_tx_qpn) {
  1527. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1528. priv->base_tx_qpn = 0;
  1529. }
  1530. }
  1531. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1532. {
  1533. struct mlx4_en_port_profile *prof = priv->prof;
  1534. int i;
  1535. int err;
  1536. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1537. if (err) {
  1538. en_err(priv, "failed reserving range for TX rings\n");
  1539. return err;
  1540. }
  1541. /* Create tx Rings */
  1542. for (i = 0; i < priv->tx_ring_num; i++) {
  1543. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1544. prof->tx_ring_size, i, TX))
  1545. goto err;
  1546. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1547. prof->tx_ring_size, TXBB_SIZE))
  1548. goto err;
  1549. }
  1550. /* Create rx Rings */
  1551. for (i = 0; i < priv->rx_ring_num; i++) {
  1552. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1553. prof->rx_ring_size, i, RX))
  1554. goto err;
  1555. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1556. prof->rx_ring_size, priv->stride))
  1557. goto err;
  1558. }
  1559. #ifdef CONFIG_RFS_ACCEL
  1560. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1561. if (!priv->dev->rx_cpu_rmap)
  1562. goto err;
  1563. #endif
  1564. return 0;
  1565. err:
  1566. en_err(priv, "Failed to allocate NIC resources\n");
  1567. return -ENOMEM;
  1568. }
  1569. void mlx4_en_destroy_netdev(struct net_device *dev)
  1570. {
  1571. struct mlx4_en_priv *priv = netdev_priv(dev);
  1572. struct mlx4_en_dev *mdev = priv->mdev;
  1573. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1574. /* Unregister device - this will close the port if it was up */
  1575. if (priv->registered)
  1576. unregister_netdev(dev);
  1577. if (priv->allocated)
  1578. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1579. cancel_delayed_work(&priv->stats_task);
  1580. /* flush any pending task for this netdev */
  1581. flush_workqueue(mdev->workqueue);
  1582. /* Detach the netdev so tasks would not attempt to access it */
  1583. mutex_lock(&mdev->state_lock);
  1584. mdev->pndev[priv->port] = NULL;
  1585. mutex_unlock(&mdev->state_lock);
  1586. mlx4_en_free_resources(priv);
  1587. kfree(priv->tx_ring);
  1588. kfree(priv->tx_cq);
  1589. free_netdev(dev);
  1590. }
  1591. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1592. {
  1593. struct mlx4_en_priv *priv = netdev_priv(dev);
  1594. struct mlx4_en_dev *mdev = priv->mdev;
  1595. int err = 0;
  1596. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1597. dev->mtu, new_mtu);
  1598. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1599. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1600. return -EPERM;
  1601. }
  1602. dev->mtu = new_mtu;
  1603. if (netif_running(dev)) {
  1604. mutex_lock(&mdev->state_lock);
  1605. if (!mdev->device_up) {
  1606. /* NIC is probably restarting - let watchdog task reset
  1607. * the port */
  1608. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1609. } else {
  1610. mlx4_en_stop_port(dev, 1);
  1611. err = mlx4_en_start_port(dev);
  1612. if (err) {
  1613. en_err(priv, "Failed restarting port:%d\n",
  1614. priv->port);
  1615. queue_work(mdev->workqueue, &priv->watchdog_task);
  1616. }
  1617. }
  1618. mutex_unlock(&mdev->state_lock);
  1619. }
  1620. return 0;
  1621. }
  1622. static int mlx4_en_set_features(struct net_device *netdev,
  1623. netdev_features_t features)
  1624. {
  1625. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1626. if (features & NETIF_F_LOOPBACK)
  1627. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1628. else
  1629. priv->ctrl_flags &=
  1630. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1631. mlx4_en_update_loopback_state(netdev, features);
  1632. return 0;
  1633. }
  1634. static const struct net_device_ops mlx4_netdev_ops = {
  1635. .ndo_open = mlx4_en_open,
  1636. .ndo_stop = mlx4_en_close,
  1637. .ndo_start_xmit = mlx4_en_xmit,
  1638. .ndo_select_queue = mlx4_en_select_queue,
  1639. .ndo_get_stats = mlx4_en_get_stats,
  1640. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1641. .ndo_set_mac_address = mlx4_en_set_mac,
  1642. .ndo_validate_addr = eth_validate_addr,
  1643. .ndo_change_mtu = mlx4_en_change_mtu,
  1644. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1645. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1646. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1647. #ifdef CONFIG_NET_POLL_CONTROLLER
  1648. .ndo_poll_controller = mlx4_en_netpoll,
  1649. #endif
  1650. .ndo_set_features = mlx4_en_set_features,
  1651. .ndo_setup_tc = mlx4_en_setup_tc,
  1652. #ifdef CONFIG_RFS_ACCEL
  1653. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1654. #endif
  1655. };
  1656. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1657. struct mlx4_en_port_profile *prof)
  1658. {
  1659. struct net_device *dev;
  1660. struct mlx4_en_priv *priv;
  1661. int i;
  1662. int err;
  1663. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1664. MAX_TX_RINGS, MAX_RX_RINGS);
  1665. if (dev == NULL)
  1666. return -ENOMEM;
  1667. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1668. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1669. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1670. dev->dev_id = port - 1;
  1671. /*
  1672. * Initialize driver private data
  1673. */
  1674. priv = netdev_priv(dev);
  1675. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1676. priv->dev = dev;
  1677. priv->mdev = mdev;
  1678. priv->ddev = &mdev->pdev->dev;
  1679. priv->prof = prof;
  1680. priv->port = port;
  1681. priv->port_up = false;
  1682. priv->flags = prof->flags;
  1683. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1684. MLX4_WQE_CTRL_SOLICITED);
  1685. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1686. priv->tx_ring_num = prof->tx_ring_num;
  1687. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
  1688. GFP_KERNEL);
  1689. if (!priv->tx_ring) {
  1690. err = -ENOMEM;
  1691. goto out;
  1692. }
  1693. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
  1694. GFP_KERNEL);
  1695. if (!priv->tx_cq) {
  1696. err = -ENOMEM;
  1697. goto out;
  1698. }
  1699. priv->rx_ring_num = prof->rx_ring_num;
  1700. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1701. priv->mac_index = -1;
  1702. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1703. spin_lock_init(&priv->stats_lock);
  1704. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1705. INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
  1706. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1707. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1708. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1709. #ifdef CONFIG_MLX4_EN_DCB
  1710. if (!mlx4_is_slave(priv->mdev->dev))
  1711. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1712. #endif
  1713. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  1714. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  1715. /* Query for default mac and max mtu */
  1716. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1717. /* Set default MAC */
  1718. dev->addr_len = ETH_ALEN;
  1719. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1720. if (!is_valid_ether_addr(dev->dev_addr)) {
  1721. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1722. priv->port, dev->dev_addr);
  1723. err = -EINVAL;
  1724. goto out;
  1725. }
  1726. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1727. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1728. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1729. err = mlx4_en_alloc_resources(priv);
  1730. if (err)
  1731. goto out;
  1732. #ifdef CONFIG_RFS_ACCEL
  1733. INIT_LIST_HEAD(&priv->filters);
  1734. spin_lock_init(&priv->filters_lock);
  1735. #endif
  1736. /* Allocate page for receive rings */
  1737. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1738. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1739. if (err) {
  1740. en_err(priv, "Failed to allocate page for rx qps\n");
  1741. goto out;
  1742. }
  1743. priv->allocated = 1;
  1744. /*
  1745. * Initialize netdev entry points
  1746. */
  1747. dev->netdev_ops = &mlx4_netdev_ops;
  1748. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1749. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1750. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1751. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1752. /*
  1753. * Set driver features
  1754. */
  1755. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  1756. if (mdev->LSO_support)
  1757. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  1758. dev->vlan_features = dev->hw_features;
  1759. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  1760. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  1761. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  1762. NETIF_F_HW_VLAN_FILTER;
  1763. dev->hw_features |= NETIF_F_LOOPBACK;
  1764. if (mdev->dev->caps.steering_mode ==
  1765. MLX4_STEERING_MODE_DEVICE_MANAGED)
  1766. dev->hw_features |= NETIF_F_NTUPLE;
  1767. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1768. dev->priv_flags |= IFF_UNICAST_FLT;
  1769. mdev->pndev[port] = dev;
  1770. netif_carrier_off(dev);
  1771. err = register_netdev(dev);
  1772. if (err) {
  1773. en_err(priv, "Netdev registration failed for port %d\n", port);
  1774. goto out;
  1775. }
  1776. priv->registered = 1;
  1777. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1778. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1779. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  1780. /* Configure port */
  1781. mlx4_en_calc_rx_buf(dev);
  1782. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1783. priv->rx_skb_size + ETH_FCS_LEN,
  1784. prof->tx_pause, prof->tx_ppp,
  1785. prof->rx_pause, prof->rx_ppp);
  1786. if (err) {
  1787. en_err(priv, "Failed setting port general configurations "
  1788. "for port %d, with error %d\n", priv->port, err);
  1789. goto out;
  1790. }
  1791. /* Init port */
  1792. en_warn(priv, "Initializing port\n");
  1793. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1794. if (err) {
  1795. en_err(priv, "Failed Initializing port\n");
  1796. goto out;
  1797. }
  1798. mlx4_en_set_default_moderation(priv);
  1799. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1800. return 0;
  1801. out:
  1802. mlx4_en_destroy_netdev(dev);
  1803. return err;
  1804. }