ssi.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719
  1. /*
  2. * Renesas R-Car SSIU/SSI support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * Based on fsi.c
  8. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include "rsnd.h"
  16. #define RSND_SSI_NAME_SIZE 16
  17. /*
  18. * SSICR
  19. */
  20. #define FORCE (1 << 31) /* Fixed */
  21. #define DMEN (1 << 28) /* DMA Enable */
  22. #define UIEN (1 << 27) /* Underflow Interrupt Enable */
  23. #define OIEN (1 << 26) /* Overflow Interrupt Enable */
  24. #define IIEN (1 << 25) /* Idle Mode Interrupt Enable */
  25. #define DIEN (1 << 24) /* Data Interrupt Enable */
  26. #define DWL_8 (0 << 19) /* Data Word Length */
  27. #define DWL_16 (1 << 19) /* Data Word Length */
  28. #define DWL_18 (2 << 19) /* Data Word Length */
  29. #define DWL_20 (3 << 19) /* Data Word Length */
  30. #define DWL_22 (4 << 19) /* Data Word Length */
  31. #define DWL_24 (5 << 19) /* Data Word Length */
  32. #define DWL_32 (6 << 19) /* Data Word Length */
  33. #define SWL_32 (3 << 16) /* R/W System Word Length */
  34. #define SCKD (1 << 15) /* Serial Bit Clock Direction */
  35. #define SWSD (1 << 14) /* Serial WS Direction */
  36. #define SCKP (1 << 13) /* Serial Bit Clock Polarity */
  37. #define SWSP (1 << 12) /* Serial WS Polarity */
  38. #define SDTA (1 << 10) /* Serial Data Alignment */
  39. #define DEL (1 << 8) /* Serial Data Delay */
  40. #define CKDV(v) (v << 4) /* Serial Clock Division Ratio */
  41. #define TRMD (1 << 1) /* Transmit/Receive Mode Select */
  42. #define EN (1 << 0) /* SSI Module Enable */
  43. /*
  44. * SSISR
  45. */
  46. #define UIRQ (1 << 27) /* Underflow Error Interrupt Status */
  47. #define OIRQ (1 << 26) /* Overflow Error Interrupt Status */
  48. #define IIRQ (1 << 25) /* Idle Mode Interrupt Status */
  49. #define DIRQ (1 << 24) /* Data Interrupt Status Flag */
  50. /*
  51. * SSIWSR
  52. */
  53. #define CONT (1 << 8) /* WS Continue Function */
  54. struct rsnd_ssi {
  55. struct clk *clk;
  56. struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
  57. struct rsnd_ssi *parent;
  58. struct rsnd_mod mod;
  59. struct rsnd_dai *rdai;
  60. struct rsnd_dai_stream *io;
  61. u32 cr_own;
  62. u32 cr_clk;
  63. u32 cr_etc;
  64. int err;
  65. int dma_offset;
  66. unsigned int usrcnt;
  67. unsigned int rate;
  68. };
  69. struct rsnd_ssiu {
  70. u32 ssi_mode0;
  71. u32 ssi_mode1;
  72. int ssi_nr;
  73. struct rsnd_ssi *ssi;
  74. };
  75. #define for_each_rsnd_ssi(pos, priv, i) \
  76. for (i = 0; \
  77. (i < rsnd_ssi_nr(priv)) && \
  78. ((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \
  79. i++)
  80. #define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
  81. #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
  82. #define rsnd_dma_to_ssi(dma) rsnd_mod_to_ssi(rsnd_dma_to_mod(dma))
  83. #define rsnd_ssi_pio_available(ssi) ((ssi)->info->pio_irq > 0)
  84. #define rsnd_ssi_dma_available(ssi) \
  85. rsnd_dma_available(rsnd_mod_to_dma(&(ssi)->mod))
  86. #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
  87. #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
  88. #define rsnd_ssi_mode_flags(p) ((p)->info->flags)
  89. #define rsnd_ssi_dai_id(ssi) ((ssi)->info->dai_id)
  90. #define rsnd_ssi_to_ssiu(ssi)\
  91. (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
  92. static void rsnd_ssi_mode_set(struct rsnd_priv *priv,
  93. struct rsnd_dai *rdai,
  94. struct rsnd_ssi *ssi)
  95. {
  96. struct device *dev = rsnd_priv_to_dev(priv);
  97. struct rsnd_mod *scu;
  98. struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
  99. int id = rsnd_mod_id(&ssi->mod);
  100. u32 flags;
  101. u32 val;
  102. scu = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod));
  103. /*
  104. * SSI_MODE0
  105. */
  106. /* see also BUSIF_MODE */
  107. if (rsnd_scu_hpbif_is_enable(scu)) {
  108. ssiu->ssi_mode0 &= ~(1 << id);
  109. dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", id);
  110. } else {
  111. ssiu->ssi_mode0 |= (1 << id);
  112. dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", id);
  113. }
  114. /*
  115. * SSI_MODE1
  116. */
  117. #define ssi_parent_set(p, sync, adg, ext) \
  118. do { \
  119. ssi->parent = ssiu->ssi + p; \
  120. if (rsnd_rdai_is_clk_master(rdai)) \
  121. val = adg; \
  122. else \
  123. val = ext; \
  124. if (flags & RSND_SSI_SYNC) \
  125. val |= sync; \
  126. } while (0)
  127. flags = rsnd_ssi_mode_flags(ssi);
  128. if (flags & RSND_SSI_CLK_PIN_SHARE) {
  129. val = 0;
  130. switch (id) {
  131. case 1:
  132. ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
  133. break;
  134. case 2:
  135. ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2));
  136. break;
  137. case 4:
  138. ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16));
  139. break;
  140. case 8:
  141. ssi_parent_set(7, 0, 0, 0);
  142. break;
  143. }
  144. ssiu->ssi_mode1 |= val;
  145. }
  146. rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
  147. rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
  148. }
  149. static void rsnd_ssi_status_check(struct rsnd_mod *mod,
  150. u32 bit)
  151. {
  152. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  153. struct device *dev = rsnd_priv_to_dev(priv);
  154. u32 status;
  155. int i;
  156. for (i = 0; i < 1024; i++) {
  157. status = rsnd_mod_read(mod, SSISR);
  158. if (status & bit)
  159. return;
  160. udelay(50);
  161. }
  162. dev_warn(dev, "status check failed\n");
  163. }
  164. static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi,
  165. unsigned int rate)
  166. {
  167. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  168. struct device *dev = rsnd_priv_to_dev(priv);
  169. int i, j, ret;
  170. int adg_clk_div_table[] = {
  171. 1, 6, /* see adg.c */
  172. };
  173. int ssi_clk_mul_table[] = {
  174. 1, 2, 4, 8, 16, 6, 12,
  175. };
  176. unsigned int main_rate;
  177. /*
  178. * Find best clock, and try to start ADG
  179. */
  180. for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) {
  181. for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) {
  182. /*
  183. * this driver is assuming that
  184. * system word is 64fs (= 2 x 32bit)
  185. * see rsnd_ssi_start()
  186. */
  187. main_rate = rate / adg_clk_div_table[i]
  188. * 32 * 2 * ssi_clk_mul_table[j];
  189. ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate);
  190. if (0 == ret) {
  191. ssi->rate = rate;
  192. ssi->cr_clk = FORCE | SWL_32 |
  193. SCKD | SWSD | CKDV(j);
  194. dev_dbg(dev, "ssi%d outputs %u Hz\n",
  195. rsnd_mod_id(&ssi->mod), rate);
  196. return 0;
  197. }
  198. }
  199. }
  200. dev_err(dev, "unsupported clock rate\n");
  201. return -EIO;
  202. }
  203. static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi)
  204. {
  205. ssi->rate = 0;
  206. ssi->cr_clk = 0;
  207. rsnd_adg_ssi_clk_stop(&ssi->mod);
  208. }
  209. static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
  210. struct rsnd_dai *rdai,
  211. struct rsnd_dai_stream *io)
  212. {
  213. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  214. struct device *dev = rsnd_priv_to_dev(priv);
  215. u32 cr;
  216. if (0 == ssi->usrcnt) {
  217. clk_enable(ssi->clk);
  218. if (rsnd_rdai_is_clk_master(rdai)) {
  219. struct snd_pcm_runtime *runtime;
  220. runtime = rsnd_io_to_runtime(io);
  221. if (rsnd_ssi_clk_from_parent(ssi))
  222. rsnd_ssi_hw_start(ssi->parent, rdai, io);
  223. else
  224. rsnd_ssi_master_clk_start(ssi, runtime->rate);
  225. }
  226. }
  227. cr = ssi->cr_own |
  228. ssi->cr_clk |
  229. ssi->cr_etc |
  230. EN;
  231. rsnd_mod_write(&ssi->mod, SSICR, cr);
  232. ssi->usrcnt++;
  233. dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod));
  234. }
  235. static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
  236. struct rsnd_dai *rdai)
  237. {
  238. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  239. struct device *dev = rsnd_priv_to_dev(priv);
  240. u32 cr;
  241. if (0 == ssi->usrcnt) /* stop might be called without start */
  242. return;
  243. ssi->usrcnt--;
  244. if (0 == ssi->usrcnt) {
  245. /*
  246. * disable all IRQ,
  247. * and, wait all data was sent
  248. */
  249. cr = ssi->cr_own |
  250. ssi->cr_clk;
  251. rsnd_mod_write(&ssi->mod, SSICR, cr | EN);
  252. rsnd_ssi_status_check(&ssi->mod, DIRQ);
  253. /*
  254. * disable SSI,
  255. * and, wait idle state
  256. */
  257. rsnd_mod_write(&ssi->mod, SSICR, cr); /* disabled all */
  258. rsnd_ssi_status_check(&ssi->mod, IIRQ);
  259. if (rsnd_rdai_is_clk_master(rdai)) {
  260. if (rsnd_ssi_clk_from_parent(ssi))
  261. rsnd_ssi_hw_stop(ssi->parent, rdai);
  262. else
  263. rsnd_ssi_master_clk_stop(ssi);
  264. }
  265. clk_disable(ssi->clk);
  266. }
  267. dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
  268. }
  269. /*
  270. * SSI mod common functions
  271. */
  272. static int rsnd_ssi_init(struct rsnd_mod *mod,
  273. struct rsnd_dai *rdai,
  274. struct rsnd_dai_stream *io)
  275. {
  276. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  277. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  278. struct device *dev = rsnd_priv_to_dev(priv);
  279. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  280. u32 cr;
  281. cr = FORCE;
  282. /*
  283. * always use 32bit system word for easy clock calculation.
  284. * see also rsnd_ssi_master_clk_enable()
  285. */
  286. cr |= SWL_32;
  287. /*
  288. * init clock settings for SSICR
  289. */
  290. switch (runtime->sample_bits) {
  291. case 16:
  292. cr |= DWL_16;
  293. break;
  294. case 32:
  295. cr |= DWL_24;
  296. break;
  297. default:
  298. return -EIO;
  299. }
  300. if (rdai->bit_clk_inv)
  301. cr |= SCKP;
  302. if (rdai->frm_clk_inv)
  303. cr |= SWSP;
  304. if (rdai->data_alignment)
  305. cr |= SDTA;
  306. if (rdai->sys_delay)
  307. cr |= DEL;
  308. if (rsnd_dai_is_play(rdai, io))
  309. cr |= TRMD;
  310. /*
  311. * set ssi parameter
  312. */
  313. ssi->rdai = rdai;
  314. ssi->io = io;
  315. ssi->cr_own = cr;
  316. ssi->err = -1; /* ignore 1st error */
  317. rsnd_ssi_mode_set(priv, rdai, ssi);
  318. dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  319. return 0;
  320. }
  321. static int rsnd_ssi_quit(struct rsnd_mod *mod,
  322. struct rsnd_dai *rdai,
  323. struct rsnd_dai_stream *io)
  324. {
  325. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  326. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  327. struct device *dev = rsnd_priv_to_dev(priv);
  328. dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  329. if (ssi->err > 0)
  330. dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err);
  331. ssi->rdai = NULL;
  332. ssi->io = NULL;
  333. ssi->cr_own = 0;
  334. ssi->err = 0;
  335. return 0;
  336. }
  337. static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status)
  338. {
  339. /* under/over flow error */
  340. if (status & (UIRQ | OIRQ)) {
  341. ssi->err++;
  342. /* clear error status */
  343. rsnd_mod_write(&ssi->mod, SSISR, 0);
  344. }
  345. }
  346. /*
  347. * SSI PIO
  348. */
  349. static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
  350. {
  351. struct rsnd_ssi *ssi = data;
  352. struct rsnd_dai_stream *io = ssi->io;
  353. u32 status = rsnd_mod_read(&ssi->mod, SSISR);
  354. irqreturn_t ret = IRQ_NONE;
  355. if (io && (status & DIRQ)) {
  356. struct rsnd_dai *rdai = ssi->rdai;
  357. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  358. u32 *buf = (u32 *)(runtime->dma_area +
  359. rsnd_dai_pointer_offset(io, 0));
  360. rsnd_ssi_record_error(ssi, status);
  361. /*
  362. * 8/16/32 data can be assesse to TDR/RDR register
  363. * directly as 32bit data
  364. * see rsnd_ssi_init()
  365. */
  366. if (rsnd_dai_is_play(rdai, io))
  367. rsnd_mod_write(&ssi->mod, SSITDR, *buf);
  368. else
  369. *buf = rsnd_mod_read(&ssi->mod, SSIRDR);
  370. rsnd_dai_pointer_update(io, sizeof(*buf));
  371. ret = IRQ_HANDLED;
  372. }
  373. return ret;
  374. }
  375. static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
  376. struct rsnd_dai *rdai,
  377. struct rsnd_dai_stream *io)
  378. {
  379. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  380. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  381. struct device *dev = rsnd_priv_to_dev(priv);
  382. /* enable PIO IRQ */
  383. ssi->cr_etc = UIEN | OIEN | DIEN;
  384. rsnd_ssi_hw_start(ssi, rdai, io);
  385. dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  386. return 0;
  387. }
  388. static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
  389. struct rsnd_dai *rdai,
  390. struct rsnd_dai_stream *io)
  391. {
  392. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  393. struct device *dev = rsnd_priv_to_dev(priv);
  394. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  395. dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  396. ssi->cr_etc = 0;
  397. rsnd_ssi_hw_stop(ssi, rdai);
  398. return 0;
  399. }
  400. static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
  401. .name = "ssi (pio)",
  402. .init = rsnd_ssi_init,
  403. .quit = rsnd_ssi_quit,
  404. .start = rsnd_ssi_pio_start,
  405. .stop = rsnd_ssi_pio_stop,
  406. };
  407. static int rsnd_ssi_dma_inquiry(struct rsnd_dma *dma, dma_addr_t *buf, int *len)
  408. {
  409. struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
  410. struct rsnd_dai_stream *io = ssi->io;
  411. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  412. *len = io->byte_per_period;
  413. *buf = runtime->dma_addr +
  414. rsnd_dai_pointer_offset(io, ssi->dma_offset + *len);
  415. ssi->dma_offset = *len; /* it cares A/B plane */
  416. return 0;
  417. }
  418. static int rsnd_ssi_dma_complete(struct rsnd_dma *dma)
  419. {
  420. struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
  421. struct rsnd_dai_stream *io = ssi->io;
  422. u32 status = rsnd_mod_read(&ssi->mod, SSISR);
  423. rsnd_ssi_record_error(ssi, status);
  424. rsnd_dai_pointer_update(ssi->io, io->byte_per_period);
  425. return 0;
  426. }
  427. static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
  428. struct rsnd_dai *rdai,
  429. struct rsnd_dai_stream *io)
  430. {
  431. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  432. struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
  433. /* enable DMA transfer */
  434. ssi->cr_etc = DMEN;
  435. ssi->dma_offset = 0;
  436. rsnd_dma_start(dma);
  437. rsnd_ssi_hw_start(ssi, ssi->rdai, io);
  438. /* enable WS continue */
  439. if (rsnd_rdai_is_clk_master(rdai))
  440. rsnd_mod_write(&ssi->mod, SSIWSR, CONT);
  441. return 0;
  442. }
  443. static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
  444. struct rsnd_dai *rdai,
  445. struct rsnd_dai_stream *io)
  446. {
  447. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  448. struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
  449. ssi->cr_etc = 0;
  450. rsnd_ssi_hw_stop(ssi, rdai);
  451. rsnd_dma_stop(dma);
  452. return 0;
  453. }
  454. static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
  455. .name = "ssi (dma)",
  456. .init = rsnd_ssi_init,
  457. .quit = rsnd_ssi_quit,
  458. .start = rsnd_ssi_dma_start,
  459. .stop = rsnd_ssi_dma_stop,
  460. };
  461. /*
  462. * Non SSI
  463. */
  464. static int rsnd_ssi_non(struct rsnd_mod *mod,
  465. struct rsnd_dai *rdai,
  466. struct rsnd_dai_stream *io)
  467. {
  468. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  469. struct device *dev = rsnd_priv_to_dev(priv);
  470. dev_dbg(dev, "%s\n", __func__);
  471. return 0;
  472. }
  473. static struct rsnd_mod_ops rsnd_ssi_non_ops = {
  474. .name = "ssi (non)",
  475. .init = rsnd_ssi_non,
  476. .quit = rsnd_ssi_non,
  477. .start = rsnd_ssi_non,
  478. .stop = rsnd_ssi_non,
  479. };
  480. /*
  481. * ssi mod function
  482. */
  483. struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
  484. int dai_id, int is_play)
  485. {
  486. struct rsnd_ssi *ssi;
  487. int i, has_play;
  488. is_play = !!is_play;
  489. for_each_rsnd_ssi(ssi, priv, i) {
  490. if (rsnd_ssi_dai_id(ssi) != dai_id)
  491. continue;
  492. has_play = !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
  493. if (is_play == has_play)
  494. return &ssi->mod;
  495. }
  496. return NULL;
  497. }
  498. struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
  499. {
  500. if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv)))
  501. id = 0;
  502. return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
  503. }
  504. int rsnd_ssi_probe(struct platform_device *pdev,
  505. struct rcar_snd_info *info,
  506. struct rsnd_priv *priv)
  507. {
  508. struct rsnd_ssi_platform_info *pinfo;
  509. struct device *dev = rsnd_priv_to_dev(priv);
  510. struct rsnd_mod_ops *ops;
  511. struct clk *clk;
  512. struct rsnd_ssiu *ssiu;
  513. struct rsnd_ssi *ssi;
  514. char name[RSND_SSI_NAME_SIZE];
  515. int i, nr, ret;
  516. /*
  517. * init SSI
  518. */
  519. nr = info->ssi_info_nr;
  520. ssiu = devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr),
  521. GFP_KERNEL);
  522. if (!ssiu) {
  523. dev_err(dev, "SSI allocate failed\n");
  524. return -ENOMEM;
  525. }
  526. priv->ssiu = ssiu;
  527. ssiu->ssi = (struct rsnd_ssi *)(ssiu + 1);
  528. ssiu->ssi_nr = nr;
  529. for_each_rsnd_ssi(ssi, priv, i) {
  530. pinfo = &info->ssi_info[i];
  531. snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
  532. clk = clk_get(dev, name);
  533. if (IS_ERR(clk))
  534. return PTR_ERR(clk);
  535. ssi->info = pinfo;
  536. ssi->clk = clk;
  537. ops = &rsnd_ssi_non_ops;
  538. /*
  539. * SSI DMA case
  540. */
  541. if (pinfo->dma_id > 0) {
  542. ret = rsnd_dma_init(
  543. priv, rsnd_mod_to_dma(&ssi->mod),
  544. (rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY),
  545. pinfo->dma_id,
  546. rsnd_ssi_dma_inquiry,
  547. rsnd_ssi_dma_complete);
  548. if (ret < 0)
  549. dev_info(dev, "SSI DMA failed. try PIO transter\n");
  550. else
  551. ops = &rsnd_ssi_dma_ops;
  552. dev_dbg(dev, "SSI%d use DMA transfer\n", i);
  553. }
  554. /*
  555. * SSI PIO case
  556. */
  557. if (!rsnd_ssi_dma_available(ssi) &&
  558. rsnd_ssi_pio_available(ssi)) {
  559. ret = devm_request_irq(dev, pinfo->pio_irq,
  560. &rsnd_ssi_pio_interrupt,
  561. IRQF_SHARED,
  562. dev_name(dev), ssi);
  563. if (ret) {
  564. dev_err(dev, "SSI request interrupt failed\n");
  565. return ret;
  566. }
  567. ops = &rsnd_ssi_pio_ops;
  568. dev_dbg(dev, "SSI%d use PIO transfer\n", i);
  569. }
  570. rsnd_mod_init(priv, &ssi->mod, ops, i);
  571. }
  572. dev_dbg(dev, "ssi probed\n");
  573. return 0;
  574. }
  575. void rsnd_ssi_remove(struct platform_device *pdev,
  576. struct rsnd_priv *priv)
  577. {
  578. struct rsnd_ssi *ssi;
  579. int i;
  580. for_each_rsnd_ssi(ssi, priv, i) {
  581. clk_put(ssi->clk);
  582. if (rsnd_ssi_dma_available(ssi))
  583. rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod));
  584. }
  585. }