pci-sysfs.c 27 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. const struct cpumask *mask;
  64. int len;
  65. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  67. buf[len++] = '\n';
  68. buf[len] = '\0';
  69. return len;
  70. }
  71. static ssize_t local_cpulist_show(struct device *dev,
  72. struct device_attribute *attr, char *buf)
  73. {
  74. const struct cpumask *mask;
  75. int len;
  76. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  77. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. /* show resources */
  83. static ssize_t
  84. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  85. {
  86. struct pci_dev * pci_dev = to_pci_dev(dev);
  87. char * str = buf;
  88. int i;
  89. int max;
  90. resource_size_t start, end;
  91. if (pci_dev->subordinate)
  92. max = DEVICE_COUNT_RESOURCE;
  93. else
  94. max = PCI_BRIDGE_RESOURCES;
  95. for (i = 0; i < max; i++) {
  96. struct resource *res = &pci_dev->resource[i];
  97. pci_resource_to_user(pci_dev, i, res, &start, &end);
  98. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  99. (unsigned long long)start,
  100. (unsigned long long)end,
  101. (unsigned long long)res->flags);
  102. }
  103. return (str - buf);
  104. }
  105. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  106. {
  107. struct pci_dev *pci_dev = to_pci_dev(dev);
  108. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  109. pci_dev->vendor, pci_dev->device,
  110. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  111. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  112. (u8)(pci_dev->class));
  113. }
  114. static ssize_t is_enabled_store(struct device *dev,
  115. struct device_attribute *attr, const char *buf,
  116. size_t count)
  117. {
  118. struct pci_dev *pdev = to_pci_dev(dev);
  119. unsigned long val;
  120. ssize_t result = strict_strtoul(buf, 0, &val);
  121. if (result < 0)
  122. return result;
  123. /* this can crash the machine when done on the "wrong" device */
  124. if (!capable(CAP_SYS_ADMIN))
  125. return -EPERM;
  126. if (!val) {
  127. if (pci_is_enabled(pdev))
  128. pci_disable_device(pdev);
  129. else
  130. result = -EIO;
  131. } else
  132. result = pci_enable_device(pdev);
  133. return result < 0 ? result : count;
  134. }
  135. static ssize_t is_enabled_show(struct device *dev,
  136. struct device_attribute *attr, char *buf)
  137. {
  138. struct pci_dev *pdev;
  139. pdev = to_pci_dev (dev);
  140. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  141. }
  142. #ifdef CONFIG_NUMA
  143. static ssize_t
  144. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  145. {
  146. return sprintf (buf, "%d\n", dev->numa_node);
  147. }
  148. #endif
  149. static ssize_t
  150. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  151. {
  152. struct pci_dev *pdev = to_pci_dev(dev);
  153. if (!pdev->subordinate)
  154. return 0;
  155. return sprintf (buf, "%u\n",
  156. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  157. }
  158. static ssize_t
  159. msi_bus_store(struct device *dev, struct device_attribute *attr,
  160. const char *buf, size_t count)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(dev);
  163. unsigned long val;
  164. if (strict_strtoul(buf, 0, &val) < 0)
  165. return -EINVAL;
  166. /* bad things may happen if the no_msi flag is changed
  167. * while some drivers are loaded */
  168. if (!capable(CAP_SYS_ADMIN))
  169. return -EPERM;
  170. /* Maybe pci devices without subordinate busses shouldn't even have this
  171. * attribute in the first place? */
  172. if (!pdev->subordinate)
  173. return count;
  174. /* Is the flag going to change, or keep the value it already had? */
  175. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  176. !!val) {
  177. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  178. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  179. " bad things could happen\n", val ? "" : " not");
  180. }
  181. return count;
  182. }
  183. #ifdef CONFIG_HOTPLUG
  184. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  185. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  186. size_t count)
  187. {
  188. unsigned long val;
  189. struct pci_bus *b = NULL;
  190. if (strict_strtoul(buf, 0, &val) < 0)
  191. return -EINVAL;
  192. if (val) {
  193. mutex_lock(&pci_remove_rescan_mutex);
  194. while ((b = pci_find_next_bus(b)) != NULL)
  195. pci_rescan_bus(b);
  196. mutex_unlock(&pci_remove_rescan_mutex);
  197. }
  198. return count;
  199. }
  200. struct bus_attribute pci_bus_attrs[] = {
  201. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  202. __ATTR_NULL
  203. };
  204. static ssize_t
  205. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  206. const char *buf, size_t count)
  207. {
  208. unsigned long val;
  209. struct pci_dev *pdev = to_pci_dev(dev);
  210. if (strict_strtoul(buf, 0, &val) < 0)
  211. return -EINVAL;
  212. if (val) {
  213. mutex_lock(&pci_remove_rescan_mutex);
  214. pci_rescan_bus(pdev->bus);
  215. mutex_unlock(&pci_remove_rescan_mutex);
  216. }
  217. return count;
  218. }
  219. static void remove_callback(struct device *dev)
  220. {
  221. struct pci_dev *pdev = to_pci_dev(dev);
  222. mutex_lock(&pci_remove_rescan_mutex);
  223. pci_remove_bus_device(pdev);
  224. mutex_unlock(&pci_remove_rescan_mutex);
  225. }
  226. static ssize_t
  227. remove_store(struct device *dev, struct device_attribute *dummy,
  228. const char *buf, size_t count)
  229. {
  230. int ret = 0;
  231. unsigned long val;
  232. if (strict_strtoul(buf, 0, &val) < 0)
  233. return -EINVAL;
  234. /* An attribute cannot be unregistered by one of its own methods,
  235. * so we have to use this roundabout approach.
  236. */
  237. if (val)
  238. ret = device_schedule_callback(dev, remove_callback);
  239. if (ret)
  240. count = ret;
  241. return count;
  242. }
  243. #endif
  244. struct device_attribute pci_dev_attrs[] = {
  245. __ATTR_RO(resource),
  246. __ATTR_RO(vendor),
  247. __ATTR_RO(device),
  248. __ATTR_RO(subsystem_vendor),
  249. __ATTR_RO(subsystem_device),
  250. __ATTR_RO(class),
  251. __ATTR_RO(irq),
  252. __ATTR_RO(local_cpus),
  253. __ATTR_RO(local_cpulist),
  254. __ATTR_RO(modalias),
  255. #ifdef CONFIG_NUMA
  256. __ATTR_RO(numa_node),
  257. #endif
  258. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  259. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  260. broken_parity_status_show,broken_parity_status_store),
  261. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  262. #ifdef CONFIG_HOTPLUG
  263. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  264. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  265. #endif
  266. __ATTR_NULL,
  267. };
  268. static ssize_t
  269. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  270. {
  271. struct pci_dev *pdev = to_pci_dev(dev);
  272. return sprintf(buf, "%u\n",
  273. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  274. IORESOURCE_ROM_SHADOW));
  275. }
  276. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  277. static ssize_t
  278. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  279. char *buf, loff_t off, size_t count)
  280. {
  281. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  282. unsigned int size = 64;
  283. loff_t init_off = off;
  284. u8 *data = (u8*) buf;
  285. /* Several chips lock up trying to read undefined config space */
  286. if (capable(CAP_SYS_ADMIN)) {
  287. size = dev->cfg_size;
  288. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  289. size = 128;
  290. }
  291. if (off > size)
  292. return 0;
  293. if (off + count > size) {
  294. size -= off;
  295. count = size;
  296. } else {
  297. size = count;
  298. }
  299. if ((off & 1) && size) {
  300. u8 val;
  301. pci_user_read_config_byte(dev, off, &val);
  302. data[off - init_off] = val;
  303. off++;
  304. size--;
  305. }
  306. if ((off & 3) && size > 2) {
  307. u16 val;
  308. pci_user_read_config_word(dev, off, &val);
  309. data[off - init_off] = val & 0xff;
  310. data[off - init_off + 1] = (val >> 8) & 0xff;
  311. off += 2;
  312. size -= 2;
  313. }
  314. while (size > 3) {
  315. u32 val;
  316. pci_user_read_config_dword(dev, off, &val);
  317. data[off - init_off] = val & 0xff;
  318. data[off - init_off + 1] = (val >> 8) & 0xff;
  319. data[off - init_off + 2] = (val >> 16) & 0xff;
  320. data[off - init_off + 3] = (val >> 24) & 0xff;
  321. off += 4;
  322. size -= 4;
  323. }
  324. if (size >= 2) {
  325. u16 val;
  326. pci_user_read_config_word(dev, off, &val);
  327. data[off - init_off] = val & 0xff;
  328. data[off - init_off + 1] = (val >> 8) & 0xff;
  329. off += 2;
  330. size -= 2;
  331. }
  332. if (size > 0) {
  333. u8 val;
  334. pci_user_read_config_byte(dev, off, &val);
  335. data[off - init_off] = val;
  336. off++;
  337. --size;
  338. }
  339. return count;
  340. }
  341. static ssize_t
  342. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  343. char *buf, loff_t off, size_t count)
  344. {
  345. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  346. unsigned int size = count;
  347. loff_t init_off = off;
  348. u8 *data = (u8*) buf;
  349. if (off > dev->cfg_size)
  350. return 0;
  351. if (off + count > dev->cfg_size) {
  352. size = dev->cfg_size - off;
  353. count = size;
  354. }
  355. if ((off & 1) && size) {
  356. pci_user_write_config_byte(dev, off, data[off - init_off]);
  357. off++;
  358. size--;
  359. }
  360. if ((off & 3) && size > 2) {
  361. u16 val = data[off - init_off];
  362. val |= (u16) data[off - init_off + 1] << 8;
  363. pci_user_write_config_word(dev, off, val);
  364. off += 2;
  365. size -= 2;
  366. }
  367. while (size > 3) {
  368. u32 val = data[off - init_off];
  369. val |= (u32) data[off - init_off + 1] << 8;
  370. val |= (u32) data[off - init_off + 2] << 16;
  371. val |= (u32) data[off - init_off + 3] << 24;
  372. pci_user_write_config_dword(dev, off, val);
  373. off += 4;
  374. size -= 4;
  375. }
  376. if (size >= 2) {
  377. u16 val = data[off - init_off];
  378. val |= (u16) data[off - init_off + 1] << 8;
  379. pci_user_write_config_word(dev, off, val);
  380. off += 2;
  381. size -= 2;
  382. }
  383. if (size) {
  384. pci_user_write_config_byte(dev, off, data[off - init_off]);
  385. off++;
  386. --size;
  387. }
  388. return count;
  389. }
  390. static ssize_t
  391. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  392. char *buf, loff_t off, size_t count)
  393. {
  394. struct pci_dev *dev =
  395. to_pci_dev(container_of(kobj, struct device, kobj));
  396. if (off > bin_attr->size)
  397. count = 0;
  398. else if (count > bin_attr->size - off)
  399. count = bin_attr->size - off;
  400. return pci_read_vpd(dev, off, count, buf);
  401. }
  402. static ssize_t
  403. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  404. char *buf, loff_t off, size_t count)
  405. {
  406. struct pci_dev *dev =
  407. to_pci_dev(container_of(kobj, struct device, kobj));
  408. if (off > bin_attr->size)
  409. count = 0;
  410. else if (count > bin_attr->size - off)
  411. count = bin_attr->size - off;
  412. return pci_write_vpd(dev, off, count, buf);
  413. }
  414. #ifdef HAVE_PCI_LEGACY
  415. /**
  416. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  417. * @kobj: kobject corresponding to file to read from
  418. * @bin_attr: struct bin_attribute for this file
  419. * @buf: buffer to store results
  420. * @off: offset into legacy I/O port space
  421. * @count: number of bytes to read
  422. *
  423. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  424. * callback routine (pci_legacy_read).
  425. */
  426. static ssize_t
  427. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  428. char *buf, loff_t off, size_t count)
  429. {
  430. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  431. struct device,
  432. kobj));
  433. /* Only support 1, 2 or 4 byte accesses */
  434. if (count != 1 && count != 2 && count != 4)
  435. return -EINVAL;
  436. return pci_legacy_read(bus, off, (u32 *)buf, count);
  437. }
  438. /**
  439. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  440. * @kobj: kobject corresponding to file to read from
  441. * @bin_attr: struct bin_attribute for this file
  442. * @buf: buffer containing value to be written
  443. * @off: offset into legacy I/O port space
  444. * @count: number of bytes to write
  445. *
  446. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  447. * callback routine (pci_legacy_write).
  448. */
  449. static ssize_t
  450. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  451. char *buf, loff_t off, size_t count)
  452. {
  453. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  454. struct device,
  455. kobj));
  456. /* Only support 1, 2 or 4 byte accesses */
  457. if (count != 1 && count != 2 && count != 4)
  458. return -EINVAL;
  459. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  460. }
  461. /**
  462. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  463. * @kobj: kobject corresponding to device to be mapped
  464. * @attr: struct bin_attribute for this file
  465. * @vma: struct vm_area_struct passed to mmap
  466. *
  467. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  468. * legacy memory space (first meg of bus space) into application virtual
  469. * memory space.
  470. */
  471. static int
  472. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  473. struct vm_area_struct *vma)
  474. {
  475. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  476. struct device,
  477. kobj));
  478. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  479. }
  480. /**
  481. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  482. * @kobj: kobject corresponding to device to be mapped
  483. * @attr: struct bin_attribute for this file
  484. * @vma: struct vm_area_struct passed to mmap
  485. *
  486. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  487. * legacy IO space (first meg of bus space) into application virtual
  488. * memory space. Returns -ENOSYS if the operation isn't supported
  489. */
  490. static int
  491. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  492. struct vm_area_struct *vma)
  493. {
  494. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  495. struct device,
  496. kobj));
  497. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  498. }
  499. /**
  500. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  501. * @b: bus to create files under
  502. * @mmap_type: I/O port or memory
  503. *
  504. * Stub implementation. Can be overridden by arch if necessary.
  505. */
  506. void __weak
  507. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  508. {
  509. return;
  510. }
  511. /**
  512. * pci_create_legacy_files - create legacy I/O port and memory files
  513. * @b: bus to create files under
  514. *
  515. * Some platforms allow access to legacy I/O port and ISA memory space on
  516. * a per-bus basis. This routine creates the files and ties them into
  517. * their associated read, write and mmap files from pci-sysfs.c
  518. *
  519. * On error unwind, but don't propogate the error to the caller
  520. * as it is ok to set up the PCI bus without these files.
  521. */
  522. void pci_create_legacy_files(struct pci_bus *b)
  523. {
  524. int error;
  525. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  526. GFP_ATOMIC);
  527. if (!b->legacy_io)
  528. goto kzalloc_err;
  529. b->legacy_io->attr.name = "legacy_io";
  530. b->legacy_io->size = 0xffff;
  531. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  532. b->legacy_io->read = pci_read_legacy_io;
  533. b->legacy_io->write = pci_write_legacy_io;
  534. b->legacy_io->mmap = pci_mmap_legacy_io;
  535. pci_adjust_legacy_attr(b, pci_mmap_io);
  536. error = device_create_bin_file(&b->dev, b->legacy_io);
  537. if (error)
  538. goto legacy_io_err;
  539. /* Allocated above after the legacy_io struct */
  540. b->legacy_mem = b->legacy_io + 1;
  541. b->legacy_mem->attr.name = "legacy_mem";
  542. b->legacy_mem->size = 1024*1024;
  543. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  544. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  545. pci_adjust_legacy_attr(b, pci_mmap_mem);
  546. error = device_create_bin_file(&b->dev, b->legacy_mem);
  547. if (error)
  548. goto legacy_mem_err;
  549. return;
  550. legacy_mem_err:
  551. device_remove_bin_file(&b->dev, b->legacy_io);
  552. legacy_io_err:
  553. kfree(b->legacy_io);
  554. b->legacy_io = NULL;
  555. kzalloc_err:
  556. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  557. "and ISA memory resources to sysfs\n");
  558. return;
  559. }
  560. void pci_remove_legacy_files(struct pci_bus *b)
  561. {
  562. if (b->legacy_io) {
  563. device_remove_bin_file(&b->dev, b->legacy_io);
  564. device_remove_bin_file(&b->dev, b->legacy_mem);
  565. kfree(b->legacy_io); /* both are allocated here */
  566. }
  567. }
  568. #endif /* HAVE_PCI_LEGACY */
  569. #ifdef HAVE_PCI_MMAP
  570. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  571. {
  572. unsigned long nr, start, size;
  573. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  574. start = vma->vm_pgoff;
  575. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  576. if (start < size && size - start >= nr)
  577. return 1;
  578. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  579. current->comm, start, start+nr, pci_name(pdev), resno, size);
  580. return 0;
  581. }
  582. /**
  583. * pci_mmap_resource - map a PCI resource into user memory space
  584. * @kobj: kobject for mapping
  585. * @attr: struct bin_attribute for the file being mapped
  586. * @vma: struct vm_area_struct passed into the mmap
  587. * @write_combine: 1 for write_combine mapping
  588. *
  589. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  590. */
  591. static int
  592. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  593. struct vm_area_struct *vma, int write_combine)
  594. {
  595. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  596. struct device, kobj));
  597. struct resource *res = (struct resource *)attr->private;
  598. enum pci_mmap_state mmap_type;
  599. resource_size_t start, end;
  600. int i;
  601. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  602. if (res == &pdev->resource[i])
  603. break;
  604. if (i >= PCI_ROM_RESOURCE)
  605. return -ENODEV;
  606. if (!pci_mmap_fits(pdev, i, vma))
  607. return -EINVAL;
  608. /* pci_mmap_page_range() expects the same kind of entry as coming
  609. * from /proc/bus/pci/ which is a "user visible" value. If this is
  610. * different from the resource itself, arch will do necessary fixup.
  611. */
  612. pci_resource_to_user(pdev, i, res, &start, &end);
  613. vma->vm_pgoff += start >> PAGE_SHIFT;
  614. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  615. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  616. return -EINVAL;
  617. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  618. }
  619. static int
  620. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  621. struct vm_area_struct *vma)
  622. {
  623. return pci_mmap_resource(kobj, attr, vma, 0);
  624. }
  625. static int
  626. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  627. struct vm_area_struct *vma)
  628. {
  629. return pci_mmap_resource(kobj, attr, vma, 1);
  630. }
  631. /**
  632. * pci_remove_resource_files - cleanup resource files
  633. * @pdev: dev to cleanup
  634. *
  635. * If we created resource files for @pdev, remove them from sysfs and
  636. * free their resources.
  637. */
  638. static void
  639. pci_remove_resource_files(struct pci_dev *pdev)
  640. {
  641. int i;
  642. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  643. struct bin_attribute *res_attr;
  644. res_attr = pdev->res_attr[i];
  645. if (res_attr) {
  646. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  647. kfree(res_attr);
  648. }
  649. res_attr = pdev->res_attr_wc[i];
  650. if (res_attr) {
  651. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  652. kfree(res_attr);
  653. }
  654. }
  655. }
  656. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  657. {
  658. /* allocate attribute structure, piggyback attribute name */
  659. int name_len = write_combine ? 13 : 10;
  660. struct bin_attribute *res_attr;
  661. int retval;
  662. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  663. if (res_attr) {
  664. char *res_attr_name = (char *)(res_attr + 1);
  665. if (write_combine) {
  666. pdev->res_attr_wc[num] = res_attr;
  667. sprintf(res_attr_name, "resource%d_wc", num);
  668. res_attr->mmap = pci_mmap_resource_wc;
  669. } else {
  670. pdev->res_attr[num] = res_attr;
  671. sprintf(res_attr_name, "resource%d", num);
  672. res_attr->mmap = pci_mmap_resource_uc;
  673. }
  674. res_attr->attr.name = res_attr_name;
  675. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  676. res_attr->size = pci_resource_len(pdev, num);
  677. res_attr->private = &pdev->resource[num];
  678. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  679. } else
  680. retval = -ENOMEM;
  681. return retval;
  682. }
  683. /**
  684. * pci_create_resource_files - create resource files in sysfs for @dev
  685. * @pdev: dev in question
  686. *
  687. * Walk the resources in @pdev creating files for each resource available.
  688. */
  689. static int pci_create_resource_files(struct pci_dev *pdev)
  690. {
  691. int i;
  692. int retval;
  693. /* Expose the PCI resources from this device as files */
  694. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  695. /* skip empty resources */
  696. if (!pci_resource_len(pdev, i))
  697. continue;
  698. retval = pci_create_attr(pdev, i, 0);
  699. /* for prefetchable resources, create a WC mappable file */
  700. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  701. retval = pci_create_attr(pdev, i, 1);
  702. if (retval) {
  703. pci_remove_resource_files(pdev);
  704. return retval;
  705. }
  706. }
  707. return 0;
  708. }
  709. #else /* !HAVE_PCI_MMAP */
  710. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  711. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  712. #endif /* HAVE_PCI_MMAP */
  713. /**
  714. * pci_write_rom - used to enable access to the PCI ROM display
  715. * @kobj: kernel object handle
  716. * @bin_attr: struct bin_attribute for this file
  717. * @buf: user input
  718. * @off: file offset
  719. * @count: number of byte in input
  720. *
  721. * writing anything except 0 enables it
  722. */
  723. static ssize_t
  724. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  725. char *buf, loff_t off, size_t count)
  726. {
  727. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  728. if ((off == 0) && (*buf == '0') && (count == 2))
  729. pdev->rom_attr_enabled = 0;
  730. else
  731. pdev->rom_attr_enabled = 1;
  732. return count;
  733. }
  734. /**
  735. * pci_read_rom - read a PCI ROM
  736. * @kobj: kernel object handle
  737. * @bin_attr: struct bin_attribute for this file
  738. * @buf: where to put the data we read from the ROM
  739. * @off: file offset
  740. * @count: number of bytes to read
  741. *
  742. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  743. * device corresponding to @kobj.
  744. */
  745. static ssize_t
  746. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  747. char *buf, loff_t off, size_t count)
  748. {
  749. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  750. void __iomem *rom;
  751. size_t size;
  752. if (!pdev->rom_attr_enabled)
  753. return -EINVAL;
  754. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  755. if (!rom || !size)
  756. return -EIO;
  757. if (off >= size)
  758. count = 0;
  759. else {
  760. if (off + count > size)
  761. count = size - off;
  762. memcpy_fromio(buf, rom + off, count);
  763. }
  764. pci_unmap_rom(pdev, rom);
  765. return count;
  766. }
  767. static struct bin_attribute pci_config_attr = {
  768. .attr = {
  769. .name = "config",
  770. .mode = S_IRUGO | S_IWUSR,
  771. },
  772. .size = PCI_CFG_SPACE_SIZE,
  773. .read = pci_read_config,
  774. .write = pci_write_config,
  775. };
  776. static struct bin_attribute pcie_config_attr = {
  777. .attr = {
  778. .name = "config",
  779. .mode = S_IRUGO | S_IWUSR,
  780. },
  781. .size = PCI_CFG_SPACE_EXP_SIZE,
  782. .read = pci_read_config,
  783. .write = pci_write_config,
  784. };
  785. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  786. {
  787. return 0;
  788. }
  789. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  790. {
  791. int retval;
  792. struct bin_attribute *attr;
  793. /* If the device has VPD, try to expose it in sysfs. */
  794. if (dev->vpd) {
  795. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  796. if (!attr)
  797. return -ENOMEM;
  798. attr->size = dev->vpd->len;
  799. attr->attr.name = "vpd";
  800. attr->attr.mode = S_IRUSR | S_IWUSR;
  801. attr->read = read_vpd_attr;
  802. attr->write = write_vpd_attr;
  803. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  804. if (retval) {
  805. kfree(dev->vpd->attr);
  806. return retval;
  807. }
  808. dev->vpd->attr = attr;
  809. }
  810. /* Active State Power Management */
  811. pcie_aspm_create_sysfs_dev_files(dev);
  812. return 0;
  813. }
  814. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  815. {
  816. int retval;
  817. int rom_size = 0;
  818. struct bin_attribute *attr;
  819. if (!sysfs_initialized)
  820. return -EACCES;
  821. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  822. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  823. else
  824. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  825. if (retval)
  826. goto err;
  827. retval = pci_create_resource_files(pdev);
  828. if (retval)
  829. goto err_config_file;
  830. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  831. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  832. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  833. rom_size = 0x20000;
  834. /* If the device has a ROM, try to expose it in sysfs. */
  835. if (rom_size) {
  836. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  837. if (!attr) {
  838. retval = -ENOMEM;
  839. goto err_resource_files;
  840. }
  841. attr->size = rom_size;
  842. attr->attr.name = "rom";
  843. attr->attr.mode = S_IRUSR;
  844. attr->read = pci_read_rom;
  845. attr->write = pci_write_rom;
  846. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  847. if (retval) {
  848. kfree(attr);
  849. goto err_resource_files;
  850. }
  851. pdev->rom_attr = attr;
  852. }
  853. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  854. retval = device_create_file(&pdev->dev, &vga_attr);
  855. if (retval)
  856. goto err_rom_file;
  857. }
  858. /* add platform-specific attributes */
  859. retval = pcibios_add_platform_entries(pdev);
  860. if (retval)
  861. goto err_vga_file;
  862. /* add sysfs entries for various capabilities */
  863. retval = pci_create_capabilities_sysfs(pdev);
  864. if (retval)
  865. goto err_vga_file;
  866. return 0;
  867. err_vga_file:
  868. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  869. device_remove_file(&pdev->dev, &vga_attr);
  870. err_rom_file:
  871. if (rom_size) {
  872. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  873. kfree(pdev->rom_attr);
  874. pdev->rom_attr = NULL;
  875. }
  876. err_resource_files:
  877. pci_remove_resource_files(pdev);
  878. err_config_file:
  879. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  880. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  881. else
  882. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  883. err:
  884. return retval;
  885. }
  886. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  887. {
  888. if (dev->vpd && dev->vpd->attr) {
  889. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  890. kfree(dev->vpd->attr);
  891. }
  892. pcie_aspm_remove_sysfs_dev_files(dev);
  893. }
  894. /**
  895. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  896. * @pdev: device whose entries we should free
  897. *
  898. * Cleanup when @pdev is removed from sysfs.
  899. */
  900. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  901. {
  902. int rom_size = 0;
  903. if (!sysfs_initialized)
  904. return;
  905. pci_remove_capabilities_sysfs(pdev);
  906. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  907. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  908. else
  909. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  910. pci_remove_resource_files(pdev);
  911. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  912. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  913. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  914. rom_size = 0x20000;
  915. if (rom_size && pdev->rom_attr) {
  916. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  917. kfree(pdev->rom_attr);
  918. }
  919. }
  920. static int __init pci_sysfs_init(void)
  921. {
  922. struct pci_dev *pdev = NULL;
  923. int retval;
  924. sysfs_initialized = 1;
  925. for_each_pci_dev(pdev) {
  926. retval = pci_create_sysfs_dev_files(pdev);
  927. if (retval) {
  928. pci_dev_put(pdev);
  929. return retval;
  930. }
  931. }
  932. return 0;
  933. }
  934. late_initcall(pci_sysfs_init);