ezkit.c 15 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf538/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #include <linux/irq.h>
  37. #include <linux/interrupt.h>
  38. #include <asm/bfin5xx_spi.h>
  39. #include <asm/dma.h>
  40. #include <asm/gpio.h>
  41. #include <asm/nand.h>
  42. #include <asm/portmux.h>
  43. #include <asm/dpmc.h>
  44. #include <linux/input.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "ADI BF538-EZKIT";
  49. /*
  50. * Driver needs to know address, irq and flag pin.
  51. */
  52. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  53. static struct platform_device rtc_device = {
  54. .name = "rtc-bfin",
  55. .id = -1,
  56. };
  57. #endif
  58. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  59. static struct resource bfin_uart_resources[] = {
  60. #ifdef CONFIG_SERIAL_BFIN_UART0
  61. {
  62. .start = 0xFFC00400,
  63. .end = 0xFFC004FF,
  64. .flags = IORESOURCE_MEM,
  65. },
  66. #endif
  67. #ifdef CONFIG_SERIAL_BFIN_UART1
  68. {
  69. .start = 0xFFC02000,
  70. .end = 0xFFC020FF,
  71. .flags = IORESOURCE_MEM,
  72. },
  73. #endif
  74. #ifdef CONFIG_SERIAL_BFIN_UART2
  75. {
  76. .start = 0xFFC02100,
  77. .end = 0xFFC021FF,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. #endif
  81. };
  82. static struct platform_device bfin_uart_device = {
  83. .name = "bfin-uart",
  84. .id = 1,
  85. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  86. .resource = bfin_uart_resources,
  87. };
  88. #endif
  89. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  90. #ifdef CONFIG_BFIN_SIR0
  91. static struct resource bfin_sir0_resources[] = {
  92. {
  93. .start = 0xFFC00400,
  94. .end = 0xFFC004FF,
  95. .flags = IORESOURCE_MEM,
  96. },
  97. {
  98. .start = IRQ_UART0_RX,
  99. .end = IRQ_UART0_RX+1,
  100. .flags = IORESOURCE_IRQ,
  101. },
  102. {
  103. .start = CH_UART0_RX,
  104. .end = CH_UART0_RX+1,
  105. .flags = IORESOURCE_DMA,
  106. },
  107. };
  108. static struct platform_device bfin_sir0_device = {
  109. .name = "bfin_sir",
  110. .id = 0,
  111. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  112. .resource = bfin_sir0_resources,
  113. };
  114. #endif
  115. #ifdef CONFIG_BFIN_SIR1
  116. static struct resource bfin_sir1_resources[] = {
  117. {
  118. .start = 0xFFC02000,
  119. .end = 0xFFC020FF,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. {
  123. .start = IRQ_UART1_RX,
  124. .end = IRQ_UART1_RX+1,
  125. .flags = IORESOURCE_IRQ,
  126. },
  127. {
  128. .start = CH_UART1_RX,
  129. .end = CH_UART1_RX+1,
  130. .flags = IORESOURCE_DMA,
  131. },
  132. };
  133. static struct platform_device bfin_sir1_device = {
  134. .name = "bfin_sir",
  135. .id = 1,
  136. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  137. .resource = bfin_sir1_resources,
  138. };
  139. #endif
  140. #ifdef CONFIG_BFIN_SIR2
  141. static struct resource bfin_sir2_resources[] = {
  142. {
  143. .start = 0xFFC02100,
  144. .end = 0xFFC021FF,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. {
  148. .start = IRQ_UART2_RX,
  149. .end = IRQ_UART2_RX+1,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. {
  153. .start = CH_UART2_RX,
  154. .end = CH_UART2_RX+1,
  155. .flags = IORESOURCE_DMA,
  156. },
  157. };
  158. static struct platform_device bfin_sir2_device = {
  159. .name = "bfin_sir",
  160. .id = 2,
  161. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  162. .resource = bfin_sir2_resources,
  163. };
  164. #endif
  165. #endif
  166. /*
  167. * USB-LAN EzExtender board
  168. * Driver needs to know address, irq and flag pin.
  169. */
  170. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  171. static struct resource smc91x_resources[] = {
  172. {
  173. .name = "smc91x-regs",
  174. .start = 0x20310300,
  175. .end = 0x20310300 + 16,
  176. .flags = IORESOURCE_MEM,
  177. }, {
  178. .start = IRQ_PF0,
  179. .end = IRQ_PF0,
  180. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  181. },
  182. };
  183. static struct platform_device smc91x_device = {
  184. .name = "smc91x",
  185. .id = 0,
  186. .num_resources = ARRAY_SIZE(smc91x_resources),
  187. .resource = smc91x_resources,
  188. };
  189. #endif
  190. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  191. /* all SPI peripherals info goes here */
  192. #if defined(CONFIG_MTD_M25P80) \
  193. || defined(CONFIG_MTD_M25P80_MODULE)
  194. /* SPI flash chip (m25p16) */
  195. static struct mtd_partition bfin_spi_flash_partitions[] = {
  196. {
  197. .name = "bootloader(spi)",
  198. .size = 0x00040000,
  199. .offset = 0,
  200. .mask_flags = MTD_CAP_ROM
  201. }, {
  202. .name = "linux kernel(spi)",
  203. .size = 0x1c0000,
  204. .offset = 0x40000
  205. }
  206. };
  207. static struct flash_platform_data bfin_spi_flash_data = {
  208. .name = "m25p80",
  209. .parts = bfin_spi_flash_partitions,
  210. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  211. .type = "m25p16",
  212. };
  213. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  214. .enable_dma = 0, /* use dma transfer with this chip*/
  215. .bits_per_word = 8,
  216. .cs_change_per_word = 0,
  217. };
  218. #endif
  219. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  220. #include <linux/spi/ad7879.h>
  221. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  222. .model = 7879, /* Model = AD7879 */
  223. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  224. .pressure_max = 10000,
  225. .pressure_min = 0,
  226. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  227. .acquisition_time = 1, /* 4us acquisition time per sample */
  228. .median = 2, /* do 8 measurements */
  229. .averaging = 1, /* take the average of 4 middle samples */
  230. .pen_down_acc_interval = 255, /* 9.4 ms */
  231. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  232. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  233. };
  234. #endif
  235. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  236. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  237. .enable_dma = 0,
  238. .bits_per_word = 16,
  239. };
  240. #endif
  241. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  242. #include <asm/bfin-lq035q1.h>
  243. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  244. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  245. .use_bl = 0, /* let something else control the LCD Blacklight */
  246. .gpio_bl = GPIO_PF7,
  247. };
  248. static struct resource bfin_lq035q1_resources[] = {
  249. {
  250. .start = IRQ_PPI_ERROR,
  251. .end = IRQ_PPI_ERROR,
  252. .flags = IORESOURCE_IRQ,
  253. },
  254. };
  255. static struct platform_device bfin_lq035q1_device = {
  256. .name = "bfin-lq035q1",
  257. .id = -1,
  258. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  259. .resource = bfin_lq035q1_resources,
  260. .dev = {
  261. .platform_data = &bfin_lq035q1_data,
  262. },
  263. };
  264. #endif
  265. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  266. static struct bfin5xx_spi_chip spidev_chip_info = {
  267. .enable_dma = 0,
  268. .bits_per_word = 8,
  269. };
  270. #endif
  271. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  272. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  273. .enable_dma = 0,
  274. .bits_per_word = 8,
  275. };
  276. #endif
  277. static struct spi_board_info bf538_spi_board_info[] __initdata = {
  278. #if defined(CONFIG_MTD_M25P80) \
  279. || defined(CONFIG_MTD_M25P80_MODULE)
  280. {
  281. /* the modalias must be the same as spi device driver name */
  282. .modalias = "m25p80", /* Name of spi_driver for this device */
  283. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  284. .bus_num = 0, /* Framework bus number */
  285. .chip_select = 1, /* SPI_SSEL1*/
  286. .platform_data = &bfin_spi_flash_data,
  287. .controller_data = &spi_flash_chip_info,
  288. .mode = SPI_MODE_3,
  289. },
  290. #endif
  291. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  292. {
  293. .modalias = "ad7879",
  294. .platform_data = &bfin_ad7879_ts_info,
  295. .irq = IRQ_PF3,
  296. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  297. .bus_num = 0,
  298. .chip_select = 1,
  299. .controller_data = &spi_ad7879_chip_info,
  300. .mode = SPI_CPHA | SPI_CPOL,
  301. },
  302. #endif
  303. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  304. {
  305. .modalias = "bfin-lq035q1-spi",
  306. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  307. .bus_num = 0,
  308. .chip_select = 2,
  309. .controller_data = &lq035q1_spi_chip_info,
  310. .mode = SPI_CPHA | SPI_CPOL,
  311. },
  312. #endif
  313. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  314. {
  315. .modalias = "spidev",
  316. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  317. .bus_num = 0,
  318. .chip_select = 1,
  319. .controller_data = &spidev_chip_info,
  320. },
  321. #endif
  322. };
  323. /* SPI (0) */
  324. static struct resource bfin_spi0_resource[] = {
  325. [0] = {
  326. .start = SPI0_REGBASE,
  327. .end = SPI0_REGBASE + 0xFF,
  328. .flags = IORESOURCE_MEM,
  329. },
  330. [1] = {
  331. .start = CH_SPI0,
  332. .end = CH_SPI0,
  333. .flags = IORESOURCE_DMA,
  334. },
  335. [2] = {
  336. .start = IRQ_SPI0,
  337. .end = IRQ_SPI0,
  338. .flags = IORESOURCE_IRQ,
  339. }
  340. };
  341. /* SPI (1) */
  342. static struct resource bfin_spi1_resource[] = {
  343. [0] = {
  344. .start = SPI1_REGBASE,
  345. .end = SPI1_REGBASE + 0xFF,
  346. .flags = IORESOURCE_MEM,
  347. },
  348. [1] = {
  349. .start = CH_SPI1,
  350. .end = CH_SPI1,
  351. .flags = IORESOURCE_DMA,
  352. },
  353. [2] = {
  354. .start = IRQ_SPI1,
  355. .end = IRQ_SPI1,
  356. .flags = IORESOURCE_IRQ,
  357. }
  358. };
  359. /* SPI (2) */
  360. static struct resource bfin_spi2_resource[] = {
  361. [0] = {
  362. .start = SPI2_REGBASE,
  363. .end = SPI2_REGBASE + 0xFF,
  364. .flags = IORESOURCE_MEM,
  365. },
  366. [1] = {
  367. .start = CH_SPI2,
  368. .end = CH_SPI2,
  369. .flags = IORESOURCE_IRQ,
  370. }
  371. };
  372. /* SPI controller data */
  373. static struct bfin5xx_spi_master bf538_spi_master_info0 = {
  374. .num_chipselect = 8,
  375. .enable_dma = 1, /* master has the ability to do dma transfer */
  376. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  377. };
  378. static struct platform_device bf538_spi_master0 = {
  379. .name = "bfin-spi",
  380. .id = 0, /* Bus number */
  381. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  382. .resource = bfin_spi0_resource,
  383. .dev = {
  384. .platform_data = &bf538_spi_master_info0, /* Passed to driver */
  385. },
  386. };
  387. static struct bfin5xx_spi_master bf538_spi_master_info1 = {
  388. .num_chipselect = 8,
  389. .enable_dma = 1, /* master has the ability to do dma transfer */
  390. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  391. };
  392. static struct platform_device bf538_spi_master1 = {
  393. .name = "bfin-spi",
  394. .id = 1, /* Bus number */
  395. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  396. .resource = bfin_spi1_resource,
  397. .dev = {
  398. .platform_data = &bf538_spi_master_info1, /* Passed to driver */
  399. },
  400. };
  401. static struct bfin5xx_spi_master bf538_spi_master_info2 = {
  402. .num_chipselect = 8,
  403. .enable_dma = 1, /* master has the ability to do dma transfer */
  404. .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
  405. };
  406. static struct platform_device bf538_spi_master2 = {
  407. .name = "bfin-spi",
  408. .id = 2, /* Bus number */
  409. .num_resources = ARRAY_SIZE(bfin_spi2_resource),
  410. .resource = bfin_spi2_resource,
  411. .dev = {
  412. .platform_data = &bf538_spi_master_info2, /* Passed to driver */
  413. },
  414. };
  415. #endif /* spi master and devices */
  416. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  417. static struct resource bfin_twi0_resource[] = {
  418. [0] = {
  419. .start = TWI0_REGBASE,
  420. .end = TWI0_REGBASE + 0xFF,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. [1] = {
  424. .start = IRQ_TWI0,
  425. .end = IRQ_TWI0,
  426. .flags = IORESOURCE_IRQ,
  427. },
  428. };
  429. static struct platform_device i2c_bfin_twi0_device = {
  430. .name = "i2c-bfin-twi",
  431. .id = 0,
  432. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  433. .resource = bfin_twi0_resource,
  434. };
  435. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  436. static struct resource bfin_twi1_resource[] = {
  437. [0] = {
  438. .start = TWI1_REGBASE,
  439. .end = TWI1_REGBASE + 0xFF,
  440. .flags = IORESOURCE_MEM,
  441. },
  442. [1] = {
  443. .start = IRQ_TWI1,
  444. .end = IRQ_TWI1,
  445. .flags = IORESOURCE_IRQ,
  446. },
  447. };
  448. static struct platform_device i2c_bfin_twi1_device = {
  449. .name = "i2c-bfin-twi",
  450. .id = 1,
  451. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  452. .resource = bfin_twi1_resource,
  453. };
  454. #endif
  455. #endif
  456. static struct resource bfin_gpios_resources = {
  457. .start = 0,
  458. .end = MAX_BLACKFIN_GPIOS - 1,
  459. .flags = IORESOURCE_IRQ,
  460. };
  461. static struct platform_device bfin_gpios_device = {
  462. .name = "simple-gpio",
  463. .id = -1,
  464. .num_resources = 1,
  465. .resource = &bfin_gpios_resources,
  466. };
  467. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  468. #include <linux/gpio_keys.h>
  469. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  470. {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
  471. };
  472. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  473. .buttons = bfin_gpio_keys_table,
  474. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  475. };
  476. static struct platform_device bfin_device_gpiokeys = {
  477. .name = "gpio-keys",
  478. .dev = {
  479. .platform_data = &bfin_gpio_keys_data,
  480. },
  481. };
  482. #endif
  483. static const unsigned int cclk_vlev_datasheet[] =
  484. {
  485. /*
  486. * Internal VLEV BF538SBBC1533
  487. ****temporarily using these values until data sheet is updated
  488. */
  489. VRPAIR(VLEV_100, 150000000),
  490. VRPAIR(VLEV_100, 250000000),
  491. VRPAIR(VLEV_110, 276000000),
  492. VRPAIR(VLEV_115, 301000000),
  493. VRPAIR(VLEV_120, 525000000),
  494. VRPAIR(VLEV_125, 550000000),
  495. VRPAIR(VLEV_130, 600000000),
  496. };
  497. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  498. .tuple_tab = cclk_vlev_datasheet,
  499. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  500. .vr_settling_time = 25 /* us */,
  501. };
  502. static struct platform_device bfin_dpmc = {
  503. .name = "bfin dpmc",
  504. .dev = {
  505. .platform_data = &bfin_dmpc_vreg_data,
  506. },
  507. };
  508. static struct platform_device *cm_bf538_devices[] __initdata = {
  509. &bfin_dpmc,
  510. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  511. &rtc_device,
  512. #endif
  513. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  514. &bfin_uart_device,
  515. #endif
  516. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  517. &bf538_spi_master0,
  518. &bf538_spi_master1,
  519. &bf538_spi_master2,
  520. #endif
  521. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  522. &i2c_bfin_twi0_device,
  523. &i2c_bfin_twi1_device,
  524. #endif
  525. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  526. #ifdef CONFIG_BFIN_SIR0
  527. &bfin_sir0_device,
  528. #endif
  529. #ifdef CONFIG_BFIN_SIR1
  530. &bfin_sir1_device,
  531. #endif
  532. #ifdef CONFIG_BFIN_SIR2
  533. &bfin_sir2_device,
  534. #endif
  535. #endif
  536. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  537. &smc91x_device,
  538. #endif
  539. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  540. &bfin_lq035q1_device,
  541. #endif
  542. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  543. &bfin_device_gpiokeys,
  544. #endif
  545. &bfin_gpios_device,
  546. };
  547. static int __init ezkit_init(void)
  548. {
  549. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  550. platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
  551. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  552. spi_register_board_info(bf538_spi_board_info,
  553. ARRAY_SIZE(bf538_spi_board_info));
  554. #endif
  555. return 0;
  556. }
  557. arch_initcall(ezkit_init);