ov7670.c 32 KB

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  1. /*
  2. * A V4L2 driver for OmniVision OV7670 cameras.
  3. *
  4. * Copyright 2006 One Laptop Per Child Association, Inc. Written
  5. * by Jonathan Corbet with substantial inspiration from Mark
  6. * McClelland's ovcamchip code.
  7. *
  8. * This file may be distributed under the terms of the GNU General
  9. * Public License, version 2.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/videodev.h>
  17. #include <media/v4l2-common.h>
  18. #include <linux/i2c.h>
  19. MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net.");
  20. MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");
  21. MODULE_LICENSE("GPL");
  22. /*
  23. * Basic window sizes. These probably belong somewhere more globally
  24. * useful.
  25. */
  26. #define VGA_WIDTH 640
  27. #define VGA_HEIGHT 480
  28. #define QVGA_WIDTH 320
  29. #define QVGA_HEIGHT 240
  30. #define CIF_WIDTH 352
  31. #define CIF_HEIGHT 288
  32. #define QCIF_WIDTH 176
  33. #define QCIF_HEIGHT 144
  34. /*
  35. * The 7670 sits on i2c with ID 0x42
  36. */
  37. #define OV7670_I2C_ADDR 0x42
  38. /* Registers */
  39. #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  40. #define REG_BLUE 0x01 /* blue gain */
  41. #define REG_RED 0x02 /* red gain */
  42. #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  43. #define REG_COM1 0x04 /* Control 1 */
  44. #define COM1_CCIR656 0x40 /* CCIR656 enable */
  45. #define REG_BAVE 0x05 /* U/B Average level */
  46. #define REG_GbAVE 0x06 /* Y/Gb Average level */
  47. #define REG_AECHH 0x07 /* AEC MS 5 bits */
  48. #define REG_RAVE 0x08 /* V/R Average level */
  49. #define REG_COM2 0x09 /* Control 2 */
  50. #define COM2_SSLEEP 0x10 /* Soft sleep mode */
  51. #define REG_PID 0x0a /* Product ID MSB */
  52. #define REG_VER 0x0b /* Product ID LSB */
  53. #define REG_COM3 0x0c /* Control 3 */
  54. #define COM3_SWAP 0x40 /* Byte swap */
  55. #define COM3_SCALEEN 0x08 /* Enable scaling */
  56. #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
  57. #define REG_COM4 0x0d /* Control 4 */
  58. #define REG_COM5 0x0e /* All "reserved" */
  59. #define REG_COM6 0x0f /* Control 6 */
  60. #define REG_AECH 0x10 /* More bits of AEC value */
  61. #define REG_CLKRC 0x11 /* Clocl control */
  62. #define CLK_EXT 0x40 /* Use external clock directly */
  63. #define CLK_SCALE 0x3f /* Mask for internal clock scale */
  64. #define REG_COM7 0x12 /* Control 7 */
  65. #define COM7_RESET 0x80 /* Register reset */
  66. #define COM7_FMT_MASK 0x38
  67. #define COM7_FMT_VGA 0x00
  68. #define COM7_FMT_CIF 0x20 /* CIF format */
  69. #define COM7_FMT_QVGA 0x10 /* QVGA format */
  70. #define COM7_FMT_QCIF 0x08 /* QCIF format */
  71. #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
  72. #define COM7_YUV 0x00 /* YUV */
  73. #define COM7_BAYER 0x01 /* Bayer format */
  74. #define COM7_PBAYER 0x05 /* "Processed bayer" */
  75. #define REG_COM8 0x13 /* Control 8 */
  76. #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  77. #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  78. #define COM8_BFILT 0x20 /* Band filter enable */
  79. #define COM8_AGC 0x04 /* Auto gain enable */
  80. #define COM8_AWB 0x02 /* White balance enable */
  81. #define COM8_AEC 0x01 /* Auto exposure enable */
  82. #define REG_COM9 0x14 /* Control 9 - gain ceiling */
  83. #define REG_COM10 0x15 /* Control 10 */
  84. #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
  85. #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
  86. #define COM10_HREF_REV 0x08 /* Reverse HREF */
  87. #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
  88. #define COM10_VS_NEG 0x02 /* VSYNC negative */
  89. #define COM10_HS_NEG 0x01 /* HSYNC negative */
  90. #define REG_HSTART 0x17 /* Horiz start high bits */
  91. #define REG_HSTOP 0x18 /* Horiz stop high bits */
  92. #define REG_VSTART 0x19 /* Vert start high bits */
  93. #define REG_VSTOP 0x1a /* Vert stop high bits */
  94. #define REG_PSHFT 0x1b /* Pixel delay after HREF */
  95. #define REG_MIDH 0x1c /* Manuf. ID high */
  96. #define REG_MIDL 0x1d /* Manuf. ID low */
  97. #define REG_MVFP 0x1e /* Mirror / vflip */
  98. #define MVFP_MIRROR 0x20 /* Mirror image */
  99. #define MVFP_FLIP 0x10 /* Vertical flip */
  100. #define REG_AEW 0x24 /* AGC upper limit */
  101. #define REG_AEB 0x25 /* AGC lower limit */
  102. #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
  103. #define REG_HSYST 0x30 /* HSYNC rising edge delay */
  104. #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
  105. #define REG_HREF 0x32 /* HREF pieces */
  106. #define REG_TSLB 0x3a /* lots of stuff */
  107. #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
  108. #define REG_COM11 0x3b /* Control 11 */
  109. #define COM11_NIGHT 0x80 /* NIght mode enable */
  110. #define COM11_NMFR 0x60 /* Two bit NM frame rate */
  111. #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  112. #define COM11_50HZ 0x08 /* Manual 50Hz select */
  113. #define COM11_EXP 0x02
  114. #define REG_COM12 0x3c /* Control 12 */
  115. #define COM12_HREF 0x80 /* HREF always */
  116. #define REG_COM13 0x3d /* Control 13 */
  117. #define COM13_GAMMA 0x80 /* Gamma enable */
  118. #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  119. #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
  120. #define REG_COM14 0x3e /* Control 14 */
  121. #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
  122. #define REG_EDGE 0x3f /* Edge enhancement factor */
  123. #define REG_COM15 0x40 /* Control 15 */
  124. #define COM15_R10F0 0x00 /* Data range 10 to F0 */
  125. #define COM15_R01FE 0x80 /* 01 to FE */
  126. #define COM15_R00FF 0xc0 /* 00 to FF */
  127. #define COM15_RGB565 0x10 /* RGB565 output */
  128. #define COM15_RGB555 0x30 /* RGB555 output */
  129. #define REG_COM16 0x41 /* Control 16 */
  130. #define COM16_AWBGAIN 0x08 /* AWB gain enable */
  131. #define REG_COM17 0x42 /* Control 17 */
  132. #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
  133. #define COM17_CBAR 0x08 /* DSP Color bar */
  134. /*
  135. * This matrix defines how the colors are generated, must be
  136. * tweaked to adjust hue and saturation.
  137. *
  138. * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
  139. *
  140. * They are nine-bit signed quantities, with the sign bit
  141. * stored in 0x58. Sign for v-red is bit 0, and up from there.
  142. */
  143. #define REG_CMATRIX_BASE 0x4f
  144. #define CMATRIX_LEN 6
  145. #define REG_CMATRIX_SIGN 0x58
  146. #define REG_BRIGHT 0x55 /* Brightness */
  147. #define REG_CONTRAS 0x56 /* Contrast control */
  148. #define REG_GFIX 0x69 /* Fix gain control */
  149. #define REG_RGB444 0x8c /* RGB 444 control */
  150. #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
  151. #define R444_RGBX 0x01 /* Empty nibble at end */
  152. #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  153. #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  154. #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
  155. #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  156. #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  157. #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  158. #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  159. #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  160. #define REG_BD60MAX 0xab /* 60hz banding step limit */
  161. /*
  162. * Information we maintain about a known sensor.
  163. */
  164. struct ov7670_format_struct; /* coming later */
  165. struct ov7670_info {
  166. struct ov7670_format_struct *fmt; /* Current format */
  167. unsigned char sat; /* Saturation value */
  168. int hue; /* Hue value */
  169. };
  170. /*
  171. * The default register settings, as obtained from OmniVision. There
  172. * is really no making sense of most of these - lots of "reserved" values
  173. * and such.
  174. *
  175. * These settings give VGA YUYV.
  176. */
  177. struct regval_list {
  178. unsigned char reg_num;
  179. unsigned char value;
  180. };
  181. static struct regval_list ov7670_default_regs[] = {
  182. { REG_COM7, COM7_RESET },
  183. /*
  184. * Clock scale: 3 = 15fps
  185. * 2 = 20fps
  186. * 1 = 30fps
  187. */
  188. { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */
  189. { REG_TSLB, 0x04 }, /* OV */
  190. { REG_COM7, 0 }, /* VGA */
  191. /*
  192. * Set the hardware window. These values from OV don't entirely
  193. * make sense - hstop is less than hstart. But they work...
  194. */
  195. { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 },
  196. { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 },
  197. { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a },
  198. { REG_COM3, 0 }, { REG_COM14, 0 },
  199. /* Mystery scaling numbers */
  200. { 0x70, 0x3a }, { 0x71, 0x35 },
  201. { 0x72, 0x11 }, { 0x73, 0xf0 },
  202. { 0xa2, 0x02 }, { REG_COM10, 0x0 },
  203. /* Gamma curve values */
  204. { 0x7a, 0x20 }, { 0x7b, 0x10 },
  205. { 0x7c, 0x1e }, { 0x7d, 0x35 },
  206. { 0x7e, 0x5a }, { 0x7f, 0x69 },
  207. { 0x80, 0x76 }, { 0x81, 0x80 },
  208. { 0x82, 0x88 }, { 0x83, 0x8f },
  209. { 0x84, 0x96 }, { 0x85, 0xa3 },
  210. { 0x86, 0xaf }, { 0x87, 0xc4 },
  211. { 0x88, 0xd7 }, { 0x89, 0xe8 },
  212. /* AGC and AEC parameters. Note we start by disabling those features,
  213. then turn them only after tweaking the values. */
  214. { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
  215. { REG_GAIN, 0 }, { REG_AECH, 0 },
  216. { REG_COM4, 0x40 }, /* magic reserved bit */
  217. { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  218. { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
  219. { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
  220. { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
  221. { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
  222. { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
  223. { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
  224. { REG_HAECC7, 0x94 },
  225. { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
  226. /* Almost all of these are magic "reserved" values. */
  227. { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
  228. { 0x16, 0x02 }, { REG_MVFP, 0x07|MVFP_MIRROR },
  229. { 0x21, 0x02 }, { 0x22, 0x91 },
  230. { 0x29, 0x07 }, { 0x33, 0x0b },
  231. { 0x35, 0x0b }, { 0x37, 0x1d },
  232. { 0x38, 0x71 }, { 0x39, 0x2a },
  233. { REG_COM12, 0x78 }, { 0x4d, 0x40 },
  234. { 0x4e, 0x20 }, { REG_GFIX, 0 },
  235. { 0x6b, 0x4a }, { 0x74, 0x10 },
  236. { 0x8d, 0x4f }, { 0x8e, 0 },
  237. { 0x8f, 0 }, { 0x90, 0 },
  238. { 0x91, 0 }, { 0x96, 0 },
  239. { 0x9a, 0 }, { 0xb0, 0x84 },
  240. { 0xb1, 0x0c }, { 0xb2, 0x0e },
  241. { 0xb3, 0x82 }, { 0xb8, 0x0a },
  242. /* More reserved magic, some of which tweaks white balance */
  243. { 0x43, 0x0a }, { 0x44, 0xf0 },
  244. { 0x45, 0x34 }, { 0x46, 0x58 },
  245. { 0x47, 0x28 }, { 0x48, 0x3a },
  246. { 0x59, 0x88 }, { 0x5a, 0x88 },
  247. { 0x5b, 0x44 }, { 0x5c, 0x67 },
  248. { 0x5d, 0x49 }, { 0x5e, 0x0e },
  249. { 0x6c, 0x0a }, { 0x6d, 0x55 },
  250. { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
  251. { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
  252. { REG_RED, 0x60 },
  253. { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
  254. /* Matrix coefficients */
  255. { 0x4f, 0x80 }, { 0x50, 0x80 },
  256. { 0x51, 0 }, { 0x52, 0x22 },
  257. { 0x53, 0x5e }, { 0x54, 0x80 },
  258. { 0x58, 0x9e },
  259. { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
  260. { 0x75, 0x05 }, { 0x76, 0xe1 },
  261. { 0x4c, 0 }, { 0x77, 0x01 },
  262. { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
  263. { 0xc9, 0x60 }, { REG_COM16, 0x38 },
  264. { 0x56, 0x40 },
  265. { 0x34, 0x11 }, { REG_COM11, COM11_EXP },
  266. { 0xa4, 0x88 }, { 0x96, 0 },
  267. { 0x97, 0x30 }, { 0x98, 0x20 },
  268. { 0x99, 0x30 }, { 0x9a, 0x84 },
  269. { 0x9b, 0x29 }, { 0x9c, 0x03 },
  270. { 0x9d, 0x4c }, { 0x9e, 0x3f },
  271. { 0x78, 0x04 },
  272. /* Extra-weird stuff. Some sort of multiplexor register */
  273. { 0x79, 0x01 }, { 0xc8, 0xf0 },
  274. { 0x79, 0x0f }, { 0xc8, 0x00 },
  275. { 0x79, 0x10 }, { 0xc8, 0x7e },
  276. { 0x79, 0x0a }, { 0xc8, 0x80 },
  277. { 0x79, 0x0b }, { 0xc8, 0x01 },
  278. { 0x79, 0x0c }, { 0xc8, 0x0f },
  279. { 0x79, 0x0d }, { 0xc8, 0x20 },
  280. { 0x79, 0x09 }, { 0xc8, 0x80 },
  281. { 0x79, 0x02 }, { 0xc8, 0xc0 },
  282. { 0x79, 0x03 }, { 0xc8, 0x40 },
  283. { 0x79, 0x05 }, { 0xc8, 0x30 },
  284. { 0x79, 0x26 },
  285. { 0xff, 0xff }, /* END MARKER */
  286. };
  287. /*
  288. * Here we'll try to encapsulate the changes for just the output
  289. * video format.
  290. *
  291. * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
  292. *
  293. * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why.
  294. */
  295. static struct regval_list ov7670_fmt_yuv422[] = {
  296. { REG_COM7, 0x0 }, /* Selects YUV mode */
  297. { REG_RGB444, 0 }, /* No RGB444 please */
  298. { REG_COM1, 0 },
  299. { REG_COM15, COM15_R00FF },
  300. { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
  301. { 0x4f, 0x80 }, /* "matrix coefficient 1" */
  302. { 0x50, 0x80 }, /* "matrix coefficient 2" */
  303. { 0x51, 0 }, /* vb */
  304. { 0x52, 0x22 }, /* "matrix coefficient 4" */
  305. { 0x53, 0x5e }, /* "matrix coefficient 5" */
  306. { 0x54, 0x80 }, /* "matrix coefficient 6" */
  307. { REG_COM13, COM13_GAMMA|COM13_UVSAT },
  308. { 0xff, 0xff },
  309. };
  310. static struct regval_list ov7670_fmt_rgb565[] = {
  311. { REG_COM7, COM7_RGB }, /* Selects RGB mode */
  312. { REG_RGB444, 0 }, /* No RGB444 please */
  313. { REG_COM1, 0x0 },
  314. { REG_COM15, COM15_RGB565 },
  315. { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
  316. { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
  317. { 0x50, 0xb3 }, /* "matrix coefficient 2" */
  318. { 0x51, 0 }, /* vb */
  319. { 0x52, 0x3d }, /* "matrix coefficient 4" */
  320. { 0x53, 0xa7 }, /* "matrix coefficient 5" */
  321. { 0x54, 0xe4 }, /* "matrix coefficient 6" */
  322. { REG_COM13, COM13_GAMMA|COM13_UVSAT },
  323. { 0xff, 0xff },
  324. };
  325. static struct regval_list ov7670_fmt_rgb444[] = {
  326. { REG_COM7, COM7_RGB }, /* Selects RGB mode */
  327. { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
  328. { REG_COM1, 0x40 }, /* Magic reserved bit */
  329. { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
  330. { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
  331. { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
  332. { 0x50, 0xb3 }, /* "matrix coefficient 2" */
  333. { 0x51, 0 }, /* vb */
  334. { 0x52, 0x3d }, /* "matrix coefficient 4" */
  335. { 0x53, 0xa7 }, /* "matrix coefficient 5" */
  336. { 0x54, 0xe4 }, /* "matrix coefficient 6" */
  337. { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
  338. { 0xff, 0xff },
  339. };
  340. /*
  341. * Low-level register I/O.
  342. */
  343. static int ov7670_read(struct i2c_client *c, unsigned char reg,
  344. unsigned char *value)
  345. {
  346. int ret;
  347. ret = i2c_smbus_read_byte_data(c, reg);
  348. if (ret >= 0)
  349. *value = (unsigned char) ret;
  350. return ret;
  351. }
  352. static int ov7670_write(struct i2c_client *c, unsigned char reg,
  353. unsigned char value)
  354. {
  355. return i2c_smbus_write_byte_data(c, reg, value);
  356. }
  357. /*
  358. * Write a list of register settings; ff/ff stops the process.
  359. */
  360. static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals)
  361. {
  362. while (vals->reg_num != 0xff || vals->value != 0xff) {
  363. int ret = ov7670_write(c, vals->reg_num, vals->value);
  364. if (ret < 0)
  365. return ret;
  366. vals++;
  367. }
  368. return 0;
  369. }
  370. /*
  371. * Stuff that knows about the sensor.
  372. */
  373. static void ov7670_reset(struct i2c_client *client)
  374. {
  375. ov7670_write(client, REG_COM7, COM7_RESET);
  376. msleep(1);
  377. }
  378. static int ov7670_init(struct i2c_client *client)
  379. {
  380. return ov7670_write_array(client, ov7670_default_regs);
  381. }
  382. static int ov7670_detect(struct i2c_client *client)
  383. {
  384. unsigned char v;
  385. int ret;
  386. ret = ov7670_init(client);
  387. if (ret < 0)
  388. return ret;
  389. ret = ov7670_read(client, REG_MIDH, &v);
  390. if (ret < 0)
  391. return ret;
  392. if (v != 0x7f) /* OV manuf. id. */
  393. return -ENODEV;
  394. ret = ov7670_read(client, REG_MIDL, &v);
  395. if (ret < 0)
  396. return ret;
  397. if (v != 0xa2)
  398. return -ENODEV;
  399. /*
  400. * OK, we know we have an OmniVision chip...but which one?
  401. */
  402. ret = ov7670_read(client, REG_PID, &v);
  403. if (ret < 0)
  404. return ret;
  405. if (v != 0x76) /* PID + VER = 0x76 / 0x73 */
  406. return -ENODEV;
  407. ret = ov7670_read(client, REG_VER, &v);
  408. if (ret < 0)
  409. return ret;
  410. if (v != 0x73) /* PID + VER = 0x76 / 0x73 */
  411. return -ENODEV;
  412. return 0;
  413. }
  414. /*
  415. * Store information about the video data format. The color matrix
  416. * is deeply tied into the format, so keep the relevant values here.
  417. * The magic matrix nubmers come from OmniVision.
  418. */
  419. static struct ov7670_format_struct {
  420. __u8 *desc;
  421. __u32 pixelformat;
  422. struct regval_list *regs;
  423. int cmatrix[CMATRIX_LEN];
  424. } ov7670_formats[] = {
  425. {
  426. .desc = "YUYV 4:2:2",
  427. .pixelformat = V4L2_PIX_FMT_YUYV,
  428. .regs = ov7670_fmt_yuv422,
  429. .cmatrix = { 128, -128, 0, -34, -94, 128 },
  430. },
  431. {
  432. .desc = "RGB 444",
  433. .pixelformat = V4L2_PIX_FMT_RGB444,
  434. .regs = ov7670_fmt_rgb444,
  435. .cmatrix = { 179, -179, 0, -61, -176, 228 },
  436. },
  437. {
  438. .desc = "RGB 565",
  439. .pixelformat = V4L2_PIX_FMT_RGB565,
  440. .regs = ov7670_fmt_rgb565,
  441. .cmatrix = { 179, -179, 0, -61, -176, 228 },
  442. },
  443. };
  444. #define N_OV7670_FMTS (sizeof(ov7670_formats)/sizeof(ov7670_formats[0]))
  445. /*
  446. * All formats we support are 2 bytes/pixel.
  447. */
  448. #define BYTES_PER_PIXEL 2
  449. /*
  450. * Then there is the issue of window sizes. Try to capture the info here.
  451. */
  452. /*
  453. * QCIF mode is done (by OV) in a very strange way - it actually looks like
  454. * VGA with weird scaling options - they do *not* use the canned QCIF mode
  455. * which is allegedly provided by the sensor. So here's the weird register
  456. * settings.
  457. */
  458. static struct regval_list ov7670_qcif_regs[] = {
  459. { REG_COM3, COM3_SCALEEN|COM3_DCWEN },
  460. { REG_COM3, COM3_DCWEN },
  461. { REG_COM14, COM14_DCWEN | 0x01},
  462. { 0x73, 0xf1 },
  463. { 0xa2, 0x52 },
  464. { 0x7b, 0x1c },
  465. { 0x7c, 0x28 },
  466. { 0x7d, 0x3c },
  467. { 0x7f, 0x69 },
  468. { REG_COM9, 0x38 },
  469. { 0xa1, 0x0b },
  470. { 0x74, 0x19 },
  471. { 0x9a, 0x80 },
  472. { 0x43, 0x14 },
  473. { REG_COM13, 0xc0 },
  474. { 0xff, 0xff },
  475. };
  476. static struct ov7670_win_size {
  477. int width;
  478. int height;
  479. unsigned char com7_bit;
  480. int hstart; /* Start/stop values for the camera. Note */
  481. int hstop; /* that they do not always make complete */
  482. int vstart; /* sense to humans, but evidently the sensor */
  483. int vstop; /* will do the right thing... */
  484. struct regval_list *regs; /* Regs to tweak */
  485. /* h/vref stuff */
  486. } ov7670_win_sizes[] = {
  487. /* VGA */
  488. {
  489. .width = VGA_WIDTH,
  490. .height = VGA_HEIGHT,
  491. .com7_bit = COM7_FMT_VGA,
  492. .hstart = 158, /* These values from */
  493. .hstop = 14, /* Omnivision */
  494. .vstart = 10,
  495. .vstop = 490,
  496. .regs = NULL,
  497. },
  498. /* CIF */
  499. {
  500. .width = CIF_WIDTH,
  501. .height = CIF_HEIGHT,
  502. .com7_bit = COM7_FMT_CIF,
  503. .hstart = 170, /* Empirically determined */
  504. .hstop = 90,
  505. .vstart = 14,
  506. .vstop = 494,
  507. .regs = NULL,
  508. },
  509. /* QVGA */
  510. {
  511. .width = QVGA_WIDTH,
  512. .height = QVGA_HEIGHT,
  513. .com7_bit = COM7_FMT_QVGA,
  514. .hstart = 164, /* Empirically determined */
  515. .hstop = 20,
  516. .vstart = 14,
  517. .vstop = 494,
  518. .regs = NULL,
  519. },
  520. /* QCIF */
  521. {
  522. .width = QCIF_WIDTH,
  523. .height = QCIF_HEIGHT,
  524. .com7_bit = COM7_FMT_VGA, /* see comment above */
  525. .hstart = 456, /* Empirically determined */
  526. .hstop = 24,
  527. .vstart = 14,
  528. .vstop = 494,
  529. .regs = ov7670_qcif_regs,
  530. },
  531. };
  532. #define N_WIN_SIZES (sizeof(ov7670_win_sizes)/sizeof(ov7670_win_sizes[0]))
  533. /*
  534. * Store a set of start/stop values into the camera.
  535. */
  536. static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop,
  537. int vstart, int vstop)
  538. {
  539. int ret;
  540. unsigned char v;
  541. /*
  542. * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
  543. * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
  544. * a mystery "edge offset" value in the top two bits of href.
  545. */
  546. ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff);
  547. ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff);
  548. ret += ov7670_read(client, REG_HREF, &v);
  549. v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
  550. msleep(10);
  551. ret += ov7670_write(client, REG_HREF, v);
  552. /*
  553. * Vertical: similar arrangement, but only 10 bits.
  554. */
  555. ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff);
  556. ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff);
  557. ret += ov7670_read(client, REG_VREF, &v);
  558. v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3);
  559. msleep(10);
  560. ret += ov7670_write(client, REG_VREF, v);
  561. return ret;
  562. }
  563. static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt)
  564. {
  565. struct ov7670_format_struct *ofmt;
  566. if (fmt->index >= N_OV7670_FMTS)
  567. return -EINVAL;
  568. ofmt = ov7670_formats + fmt->index;
  569. fmt->flags = 0;
  570. strcpy(fmt->description, ofmt->desc);
  571. fmt->pixelformat = ofmt->pixelformat;
  572. return 0;
  573. }
  574. static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt,
  575. struct ov7670_format_struct **ret_fmt,
  576. struct ov7670_win_size **ret_wsize)
  577. {
  578. int index;
  579. struct ov7670_win_size *wsize;
  580. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  581. for (index = 0; index < N_OV7670_FMTS; index++)
  582. if (ov7670_formats[index].pixelformat == pix->pixelformat)
  583. break;
  584. if (index >= N_OV7670_FMTS)
  585. return -EINVAL;
  586. if (ret_fmt != NULL)
  587. *ret_fmt = ov7670_formats + index;
  588. /*
  589. * Fields: the OV devices claim to be progressive.
  590. */
  591. if (pix->field == V4L2_FIELD_ANY)
  592. pix->field = V4L2_FIELD_NONE;
  593. else if (pix->field != V4L2_FIELD_NONE)
  594. return -EINVAL;
  595. /*
  596. * Round requested image size down to the nearest
  597. * we support, but not below the smallest.
  598. */
  599. for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES;
  600. wsize++)
  601. if (pix->width >= wsize->width && pix->height >= wsize->height)
  602. break;
  603. if (wsize >= ov7670_win_sizes + N_WIN_SIZES)
  604. wsize--; /* Take the smallest one */
  605. if (ret_wsize != NULL)
  606. *ret_wsize = wsize;
  607. /*
  608. * Note the size we'll actually handle.
  609. */
  610. pix->width = wsize->width;
  611. pix->height = wsize->height;
  612. pix->bytesperline = pix->width*BYTES_PER_PIXEL;
  613. pix->sizeimage = pix->height*pix->bytesperline;
  614. return 0;
  615. }
  616. /*
  617. * Set a format.
  618. */
  619. static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt)
  620. {
  621. int ret;
  622. struct ov7670_format_struct *ovfmt;
  623. struct ov7670_win_size *wsize;
  624. struct ov7670_info *info = i2c_get_clientdata(c);
  625. unsigned char com7;
  626. ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize);
  627. if (ret)
  628. return ret;
  629. /*
  630. * COM7 is a pain in the ass, it doesn't like to be read then
  631. * quickly written afterward. But we have everything we need
  632. * to set it absolutely here, as long as the format-specific
  633. * register sets list it first.
  634. */
  635. com7 = ovfmt->regs[0].value;
  636. com7 |= wsize->com7_bit;
  637. ov7670_write(c, REG_COM7, com7);
  638. /*
  639. * Now write the rest of the array. Also store start/stops
  640. */
  641. ov7670_write_array(c, ovfmt->regs + 1);
  642. ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart,
  643. wsize->vstop);
  644. ret = 0;
  645. if (wsize->regs)
  646. ret = ov7670_write_array(c, wsize->regs);
  647. info->fmt = ovfmt;
  648. return 0;
  649. }
  650. /*
  651. * Code for dealing with controls.
  652. */
  653. static int ov7670_store_cmatrix(struct i2c_client *client,
  654. int matrix[CMATRIX_LEN])
  655. {
  656. int i, ret;
  657. unsigned char signbits;
  658. /*
  659. * Weird crap seems to exist in the upper part of
  660. * the sign bits register, so let's preserve it.
  661. */
  662. ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits);
  663. signbits &= 0xc0;
  664. for (i = 0; i < CMATRIX_LEN; i++) {
  665. unsigned char raw;
  666. if (matrix[i] < 0) {
  667. signbits |= (1 << i);
  668. if (matrix[i] < -255)
  669. raw = 0xff;
  670. else
  671. raw = (-1 * matrix[i]) & 0xff;
  672. }
  673. else {
  674. if (matrix[i] > 255)
  675. raw = 0xff;
  676. else
  677. raw = matrix[i] & 0xff;
  678. }
  679. ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw);
  680. }
  681. ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits);
  682. return ret;
  683. }
  684. /*
  685. * Hue also requires messing with the color matrix. It also requires
  686. * trig functions, which tend not to be well supported in the kernel.
  687. * So here is a simple table of sine values, 0-90 degrees, in steps
  688. * of five degrees. Values are multiplied by 1000.
  689. *
  690. * The following naive approximate trig functions require an argument
  691. * carefully limited to -180 <= theta <= 180.
  692. */
  693. #define SIN_STEP 5
  694. static const int ov7670_sin_table[] = {
  695. 0, 87, 173, 258, 342, 422,
  696. 499, 573, 642, 707, 766, 819,
  697. 866, 906, 939, 965, 984, 996,
  698. 1000
  699. };
  700. static int ov7670_sine(int theta)
  701. {
  702. int chs = 1;
  703. int sine;
  704. if (theta < 0) {
  705. theta = -theta;
  706. chs = -1;
  707. }
  708. if (theta <= 90)
  709. sine = ov7670_sin_table[theta/SIN_STEP];
  710. else {
  711. theta -= 90;
  712. sine = 1000 - ov7670_sin_table[theta/SIN_STEP];
  713. }
  714. return sine*chs;
  715. }
  716. static int ov7670_cosine(int theta)
  717. {
  718. theta = 90 - theta;
  719. if (theta > 180)
  720. theta -= 360;
  721. else if (theta < -180)
  722. theta += 360;
  723. return ov7670_sine(theta);
  724. }
  725. static void ov7670_calc_cmatrix(struct ov7670_info *info,
  726. int matrix[CMATRIX_LEN])
  727. {
  728. int i;
  729. /*
  730. * Apply the current saturation setting first.
  731. */
  732. for (i = 0; i < CMATRIX_LEN; i++)
  733. matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7;
  734. /*
  735. * Then, if need be, rotate the hue value.
  736. */
  737. if (info->hue != 0) {
  738. int sinth, costh, tmpmatrix[CMATRIX_LEN];
  739. memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int));
  740. sinth = ov7670_sine(info->hue);
  741. costh = ov7670_cosine(info->hue);
  742. matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000;
  743. matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000;
  744. matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000;
  745. matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000;
  746. matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000;
  747. matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000;
  748. }
  749. }
  750. static int ov7670_t_sat(struct i2c_client *client, int value)
  751. {
  752. struct ov7670_info *info = i2c_get_clientdata(client);
  753. int matrix[CMATRIX_LEN];
  754. int ret;
  755. info->sat = value;
  756. ov7670_calc_cmatrix(info, matrix);
  757. ret = ov7670_store_cmatrix(client, matrix);
  758. return ret;
  759. }
  760. static int ov7670_q_sat(struct i2c_client *client, __s32 *value)
  761. {
  762. struct ov7670_info *info = i2c_get_clientdata(client);
  763. *value = info->sat;
  764. return 0;
  765. }
  766. static int ov7670_t_hue(struct i2c_client *client, int value)
  767. {
  768. struct ov7670_info *info = i2c_get_clientdata(client);
  769. int matrix[CMATRIX_LEN];
  770. int ret;
  771. if (value < -180 || value > 180)
  772. return -EINVAL;
  773. info->hue = value;
  774. ov7670_calc_cmatrix(info, matrix);
  775. ret = ov7670_store_cmatrix(client, matrix);
  776. return ret;
  777. }
  778. static int ov7670_q_hue(struct i2c_client *client, __s32 *value)
  779. {
  780. struct ov7670_info *info = i2c_get_clientdata(client);
  781. *value = info->hue;
  782. return 0;
  783. }
  784. /*
  785. * Some weird registers seem to store values in a sign/magnitude format!
  786. */
  787. static unsigned char ov7670_sm_to_abs(unsigned char v)
  788. {
  789. if ((v & 0x80) == 0)
  790. return v + 128;
  791. else
  792. return 128 - (v & 0x7f);
  793. }
  794. static unsigned char ov7670_abs_to_sm(unsigned char v)
  795. {
  796. if (v > 127)
  797. return v & 0x7f;
  798. else
  799. return (128 - v) | 0x80;
  800. }
  801. static int ov7670_t_brightness(struct i2c_client *client, int value)
  802. {
  803. unsigned char com8, v;
  804. int ret;
  805. ov7670_read(client, REG_COM8, &com8);
  806. com8 &= ~COM8_AEC;
  807. ov7670_write(client, REG_COM8, com8);
  808. v = ov7670_abs_to_sm(value);
  809. ret = ov7670_write(client, REG_BRIGHT, v);
  810. return ret;
  811. }
  812. static int ov7670_q_brightness(struct i2c_client *client, __s32 *value)
  813. {
  814. unsigned char v;
  815. int ret = ov7670_read(client, REG_BRIGHT, &v);
  816. *value = ov7670_sm_to_abs(v);
  817. return ret;
  818. }
  819. static int ov7670_t_contrast(struct i2c_client *client, int value)
  820. {
  821. return ov7670_write(client, REG_CONTRAS, (unsigned char) value);
  822. }
  823. static int ov7670_q_contrast(struct i2c_client *client, __s32 *value)
  824. {
  825. unsigned char v;
  826. int ret = ov7670_read(client, REG_CONTRAS, &v);
  827. *value = v;
  828. return ret;
  829. }
  830. static int ov7670_q_hflip(struct i2c_client *client, __s32 *value)
  831. {
  832. int ret;
  833. unsigned char v;
  834. ret = ov7670_read(client, REG_MVFP, &v);
  835. *value = (v & MVFP_MIRROR) == MVFP_MIRROR;
  836. return ret;
  837. }
  838. static int ov7670_t_hflip(struct i2c_client *client, int value)
  839. {
  840. unsigned char v;
  841. int ret;
  842. ret = ov7670_read(client, REG_MVFP, &v);
  843. if (value)
  844. v |= MVFP_MIRROR;
  845. else
  846. v &= ~MVFP_MIRROR;
  847. msleep(10); /* FIXME */
  848. ret += ov7670_write(client, REG_MVFP, v);
  849. return ret;
  850. }
  851. static int ov7670_q_vflip(struct i2c_client *client, __s32 *value)
  852. {
  853. int ret;
  854. unsigned char v;
  855. ret = ov7670_read(client, REG_MVFP, &v);
  856. *value = (v & MVFP_FLIP) == MVFP_FLIP;
  857. return ret;
  858. }
  859. static int ov7670_t_vflip(struct i2c_client *client, int value)
  860. {
  861. unsigned char v;
  862. int ret;
  863. ret = ov7670_read(client, REG_MVFP, &v);
  864. if (value)
  865. v |= MVFP_FLIP;
  866. else
  867. v &= ~MVFP_FLIP;
  868. msleep(10); /* FIXME */
  869. ret += ov7670_write(client, REG_MVFP, v);
  870. return ret;
  871. }
  872. static struct ov7670_control {
  873. struct v4l2_queryctrl qc;
  874. int (*query)(struct i2c_client *c, __s32 *value);
  875. int (*tweak)(struct i2c_client *c, int value);
  876. } ov7670_controls[] =
  877. {
  878. {
  879. .qc = {
  880. .id = V4L2_CID_BRIGHTNESS,
  881. .type = V4L2_CTRL_TYPE_INTEGER,
  882. .name = "Brightness",
  883. .minimum = 0,
  884. .maximum = 255,
  885. .step = 1,
  886. .default_value = 0x80,
  887. .flags = V4L2_CTRL_FLAG_SLIDER
  888. },
  889. .tweak = ov7670_t_brightness,
  890. .query = ov7670_q_brightness,
  891. },
  892. {
  893. .qc = {
  894. .id = V4L2_CID_CONTRAST,
  895. .type = V4L2_CTRL_TYPE_INTEGER,
  896. .name = "Contrast",
  897. .minimum = 0,
  898. .maximum = 127,
  899. .step = 1,
  900. .default_value = 0x40, /* XXX ov7670 spec */
  901. .flags = V4L2_CTRL_FLAG_SLIDER
  902. },
  903. .tweak = ov7670_t_contrast,
  904. .query = ov7670_q_contrast,
  905. },
  906. {
  907. .qc = {
  908. .id = V4L2_CID_SATURATION,
  909. .type = V4L2_CTRL_TYPE_INTEGER,
  910. .name = "Saturation",
  911. .minimum = 0,
  912. .maximum = 256,
  913. .step = 1,
  914. .default_value = 0x80,
  915. .flags = V4L2_CTRL_FLAG_SLIDER
  916. },
  917. .tweak = ov7670_t_sat,
  918. .query = ov7670_q_sat,
  919. },
  920. {
  921. .qc = {
  922. .id = V4L2_CID_HUE,
  923. .type = V4L2_CTRL_TYPE_INTEGER,
  924. .name = "HUE",
  925. .minimum = -180,
  926. .maximum = 180,
  927. .step = 5,
  928. .default_value = 0,
  929. .flags = V4L2_CTRL_FLAG_SLIDER
  930. },
  931. .tweak = ov7670_t_hue,
  932. .query = ov7670_q_hue,
  933. },
  934. {
  935. .qc = {
  936. .id = V4L2_CID_VFLIP,
  937. .type = V4L2_CTRL_TYPE_BOOLEAN,
  938. .name = "Vertical flip",
  939. .minimum = 0,
  940. .maximum = 1,
  941. .step = 1,
  942. .default_value = 0,
  943. },
  944. .tweak = ov7670_t_vflip,
  945. .query = ov7670_q_vflip,
  946. },
  947. {
  948. .qc = {
  949. .id = V4L2_CID_HFLIP,
  950. .type = V4L2_CTRL_TYPE_BOOLEAN,
  951. .name = "Horizontal mirror",
  952. .minimum = 0,
  953. .maximum = 1,
  954. .step = 1,
  955. .default_value = 0,
  956. },
  957. .tweak = ov7670_t_hflip,
  958. .query = ov7670_q_hflip,
  959. },
  960. };
  961. #define N_CONTROLS (sizeof(ov7670_controls)/sizeof(ov7670_controls[0]))
  962. static struct ov7670_control *ov7670_find_control(__u32 id)
  963. {
  964. int i;
  965. for (i = 0; i < N_CONTROLS; i++)
  966. if (ov7670_controls[i].qc.id == id)
  967. return ov7670_controls + i;
  968. return NULL;
  969. }
  970. static int ov7670_queryctrl(struct i2c_client *client,
  971. struct v4l2_queryctrl *qc)
  972. {
  973. struct ov7670_control *ctrl = ov7670_find_control(qc->id);
  974. if (ctrl == NULL)
  975. return -EINVAL;
  976. *qc = ctrl->qc;
  977. return 0;
  978. }
  979. static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
  980. {
  981. struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
  982. int ret;
  983. if (octrl == NULL)
  984. return -EINVAL;
  985. ret = octrl->query(client, &ctrl->value);
  986. if (ret >= 0)
  987. return 0;
  988. return ret;
  989. }
  990. static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
  991. {
  992. struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
  993. int ret;
  994. if (octrl == NULL)
  995. return -EINVAL;
  996. ret = octrl->tweak(client, ctrl->value);
  997. if (ret >= 0)
  998. return 0;
  999. return ret;
  1000. }
  1001. /*
  1002. * Basic i2c stuff.
  1003. */
  1004. static struct i2c_driver ov7670_driver;
  1005. static int ov7670_attach(struct i2c_adapter *adapter)
  1006. {
  1007. int ret;
  1008. struct i2c_client *client;
  1009. struct ov7670_info *info;
  1010. /*
  1011. * For now: only deal with adapters we recognize.
  1012. */
  1013. if (adapter->id != I2C_HW_SMBUS_CAFE)
  1014. return -ENODEV;
  1015. client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL);
  1016. if (! client)
  1017. return -ENOMEM;
  1018. client->adapter = adapter;
  1019. client->addr = OV7670_I2C_ADDR;
  1020. client->driver = &ov7670_driver,
  1021. strcpy(client->name, "OV7670");
  1022. /*
  1023. * Set up our info structure.
  1024. */
  1025. info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL);
  1026. if (! info) {
  1027. ret = -ENOMEM;
  1028. goto out_free;
  1029. }
  1030. info->fmt = &ov7670_formats[0];
  1031. info->sat = 128; /* Review this */
  1032. i2c_set_clientdata(client, info);
  1033. /*
  1034. * Make sure it's an ov7670
  1035. */
  1036. ret = ov7670_detect(client);
  1037. if (ret)
  1038. goto out_free_info;
  1039. i2c_attach_client(client);
  1040. return 0;
  1041. out_free_info:
  1042. kfree(info);
  1043. out_free:
  1044. kfree(client);
  1045. return ret;
  1046. }
  1047. static int ov7670_detach(struct i2c_client *client)
  1048. {
  1049. i2c_detach_client(client);
  1050. kfree(i2c_get_clientdata(client));
  1051. kfree(client);
  1052. return 0;
  1053. }
  1054. static int ov7670_command(struct i2c_client *client, unsigned int cmd,
  1055. void *arg)
  1056. {
  1057. switch (cmd) {
  1058. case VIDIOC_INT_G_CHIP_IDENT:
  1059. * (enum v4l2_chip_ident *) arg = V4L2_IDENT_OV7670;
  1060. return 0;
  1061. case VIDIOC_INT_RESET:
  1062. ov7670_reset(client);
  1063. return 0;
  1064. case VIDIOC_INT_INIT:
  1065. return ov7670_init(client);
  1066. case VIDIOC_ENUM_FMT:
  1067. return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg);
  1068. case VIDIOC_TRY_FMT:
  1069. return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL);
  1070. case VIDIOC_S_FMT:
  1071. return ov7670_s_fmt(client, (struct v4l2_format *) arg);
  1072. case VIDIOC_QUERYCTRL:
  1073. return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg);
  1074. case VIDIOC_S_CTRL:
  1075. return ov7670_s_ctrl(client, (struct v4l2_control *) arg);
  1076. case VIDIOC_G_CTRL:
  1077. return ov7670_g_ctrl(client, (struct v4l2_control *) arg);
  1078. /* Todo:
  1079. g/s_parm
  1080. initialization
  1081. */
  1082. }
  1083. return -EINVAL;
  1084. }
  1085. static struct i2c_driver ov7670_driver = {
  1086. .driver = {
  1087. .name = "ov7670",
  1088. },
  1089. .id = I2C_DRIVERID_OV7670,
  1090. .class = I2C_CLASS_CAM_DIGITAL,
  1091. .attach_adapter = ov7670_attach,
  1092. .detach_client = ov7670_detach,
  1093. .command = ov7670_command,
  1094. };
  1095. /*
  1096. * Module initialization
  1097. */
  1098. static int __init ov7670_mod_init(void)
  1099. {
  1100. printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n");
  1101. return i2c_add_driver(&ov7670_driver);
  1102. }
  1103. static void __exit ov7670_mod_exit(void)
  1104. {
  1105. i2c_del_driver(&ov7670_driver);
  1106. }
  1107. module_init(ov7670_mod_init);
  1108. module_exit(ov7670_mod_exit);