mt9m111.c 28 KB

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  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <linux/v4l2-mediabus.h>
  17. #include <linux/module.h>
  18. #include <media/soc_camera.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-ctrls.h>
  21. #include <media/v4l2-chip-ident.h>
  22. /*
  23. * MT9M111, MT9M112 and MT9M131:
  24. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  25. * The platform has to define i2c_board_info and call i2c_register_board_info()
  26. */
  27. /*
  28. * Sensor core register addresses (0x000..0x0ff)
  29. */
  30. #define MT9M111_CHIP_VERSION 0x000
  31. #define MT9M111_ROW_START 0x001
  32. #define MT9M111_COLUMN_START 0x002
  33. #define MT9M111_WINDOW_HEIGHT 0x003
  34. #define MT9M111_WINDOW_WIDTH 0x004
  35. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  36. #define MT9M111_VERTICAL_BLANKING_B 0x006
  37. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  38. #define MT9M111_VERTICAL_BLANKING_A 0x008
  39. #define MT9M111_SHUTTER_WIDTH 0x009
  40. #define MT9M111_ROW_SPEED 0x00a
  41. #define MT9M111_EXTRA_DELAY 0x00b
  42. #define MT9M111_SHUTTER_DELAY 0x00c
  43. #define MT9M111_RESET 0x00d
  44. #define MT9M111_READ_MODE_B 0x020
  45. #define MT9M111_READ_MODE_A 0x021
  46. #define MT9M111_FLASH_CONTROL 0x023
  47. #define MT9M111_GREEN1_GAIN 0x02b
  48. #define MT9M111_BLUE_GAIN 0x02c
  49. #define MT9M111_RED_GAIN 0x02d
  50. #define MT9M111_GREEN2_GAIN 0x02e
  51. #define MT9M111_GLOBAL_GAIN 0x02f
  52. #define MT9M111_CONTEXT_CONTROL 0x0c8
  53. #define MT9M111_PAGE_MAP 0x0f0
  54. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  55. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  56. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  57. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  58. #define MT9M111_RESET_RESET_SOC (1 << 5)
  59. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  60. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  61. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  62. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  63. #define MT9M111_RESET_RESET_MODE (1 << 0)
  64. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  65. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  66. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  67. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  68. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  69. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  70. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  71. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  72. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  73. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  74. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  75. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  76. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  77. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  78. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  79. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  80. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  81. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  82. /*
  83. * Colorpipe register addresses (0x100..0x1ff)
  84. */
  85. #define MT9M111_OPER_MODE_CTRL 0x106
  86. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  87. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  88. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  89. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  90. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  91. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  92. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  93. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  94. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  95. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  96. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  97. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  98. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  99. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  100. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  101. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  102. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  103. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  104. #define MT9M111_OUTFMT_RGB (1 << 8)
  105. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  106. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  107. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  108. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  109. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  110. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  111. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  112. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  113. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  114. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  115. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  116. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  117. /*
  118. * Camera control register addresses (0x200..0x2ff not implemented)
  119. */
  120. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  121. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  122. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  123. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  124. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  125. (val), (mask))
  126. #define MT9M111_MIN_DARK_ROWS 8
  127. #define MT9M111_MIN_DARK_COLS 26
  128. #define MT9M111_MAX_HEIGHT 1024
  129. #define MT9M111_MAX_WIDTH 1280
  130. struct mt9m111_context {
  131. u16 read_mode;
  132. u16 blanking_h;
  133. u16 blanking_v;
  134. u16 reducer_xzoom;
  135. u16 reducer_yzoom;
  136. u16 reducer_xsize;
  137. u16 reducer_ysize;
  138. u16 output_fmt_ctrl2;
  139. u16 control;
  140. };
  141. static struct mt9m111_context context_a = {
  142. .read_mode = MT9M111_READ_MODE_A,
  143. .blanking_h = MT9M111_HORIZONTAL_BLANKING_A,
  144. .blanking_v = MT9M111_VERTICAL_BLANKING_A,
  145. .reducer_xzoom = MT9M111_REDUCER_XZOOM_A,
  146. .reducer_yzoom = MT9M111_REDUCER_YZOOM_A,
  147. .reducer_xsize = MT9M111_REDUCER_XSIZE_A,
  148. .reducer_ysize = MT9M111_REDUCER_YSIZE_A,
  149. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A,
  150. .control = MT9M111_CTXT_CTRL_RESTART,
  151. };
  152. static struct mt9m111_context context_b = {
  153. .read_mode = MT9M111_READ_MODE_B,
  154. .blanking_h = MT9M111_HORIZONTAL_BLANKING_B,
  155. .blanking_v = MT9M111_VERTICAL_BLANKING_B,
  156. .reducer_xzoom = MT9M111_REDUCER_XZOOM_B,
  157. .reducer_yzoom = MT9M111_REDUCER_YZOOM_B,
  158. .reducer_xsize = MT9M111_REDUCER_XSIZE_B,
  159. .reducer_ysize = MT9M111_REDUCER_YSIZE_B,
  160. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B,
  161. .control = MT9M111_CTXT_CTRL_RESTART |
  162. MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
  163. MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
  164. MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
  165. MT9M111_CTXT_CTRL_HBLANK_SEL_B,
  166. };
  167. /* MT9M111 has only one fixed colorspace per pixelcode */
  168. struct mt9m111_datafmt {
  169. enum v4l2_mbus_pixelcode code;
  170. enum v4l2_colorspace colorspace;
  171. };
  172. /* Find a data format by a pixel code in an array */
  173. static const struct mt9m111_datafmt *mt9m111_find_datafmt(
  174. enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
  175. int n)
  176. {
  177. int i;
  178. for (i = 0; i < n; i++)
  179. if (fmt[i].code == code)
  180. return fmt + i;
  181. return NULL;
  182. }
  183. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  184. {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  185. {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  186. {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  187. {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  188. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  189. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  190. {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  191. {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  192. {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  193. {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  194. {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  195. {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  196. };
  197. struct mt9m111 {
  198. struct v4l2_subdev subdev;
  199. struct v4l2_ctrl_handler hdl;
  200. struct v4l2_ctrl *gain;
  201. int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
  202. * from v4l2-chip-ident.h */
  203. struct mt9m111_context *ctx;
  204. struct v4l2_rect rect;
  205. struct mutex power_lock; /* lock to protect power_count */
  206. int power_count;
  207. const struct mt9m111_datafmt *fmt;
  208. int lastpage; /* PageMap cache value */
  209. unsigned char datawidth;
  210. };
  211. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  212. {
  213. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  214. }
  215. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  216. {
  217. int ret;
  218. u16 page;
  219. struct mt9m111 *mt9m111 = to_mt9m111(client);
  220. page = (reg >> 8);
  221. if (page == mt9m111->lastpage)
  222. return 0;
  223. if (page > 2)
  224. return -EINVAL;
  225. ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
  226. if (!ret)
  227. mt9m111->lastpage = page;
  228. return ret;
  229. }
  230. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  231. {
  232. int ret;
  233. ret = reg_page_map_set(client, reg);
  234. if (!ret)
  235. ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
  236. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  237. return ret;
  238. }
  239. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  240. const u16 data)
  241. {
  242. int ret;
  243. ret = reg_page_map_set(client, reg);
  244. if (!ret)
  245. ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
  246. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  247. return ret;
  248. }
  249. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  250. const u16 data)
  251. {
  252. int ret;
  253. ret = mt9m111_reg_read(client, reg);
  254. if (ret >= 0)
  255. ret = mt9m111_reg_write(client, reg, ret | data);
  256. return ret;
  257. }
  258. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  259. const u16 data)
  260. {
  261. int ret;
  262. ret = mt9m111_reg_read(client, reg);
  263. if (ret >= 0)
  264. ret = mt9m111_reg_write(client, reg, ret & ~data);
  265. return ret;
  266. }
  267. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  268. const u16 data, const u16 mask)
  269. {
  270. int ret;
  271. ret = mt9m111_reg_read(client, reg);
  272. if (ret >= 0)
  273. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  274. return ret;
  275. }
  276. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  277. struct mt9m111_context *ctx)
  278. {
  279. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  280. return reg_write(CONTEXT_CONTROL, ctx->control);
  281. }
  282. static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
  283. struct v4l2_rect *rect, struct mt9m111_context *ctx)
  284. {
  285. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  286. int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, MT9M111_MAX_WIDTH);
  287. if (!ret)
  288. ret = mt9m111_reg_write(client, ctx->reducer_yzoom, MT9M111_MAX_HEIGHT);
  289. if (!ret)
  290. ret = mt9m111_reg_write(client, ctx->reducer_xsize, rect->width);
  291. if (!ret)
  292. ret = mt9m111_reg_write(client, ctx->reducer_ysize, rect->height);
  293. return ret;
  294. }
  295. static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
  296. struct v4l2_rect *rect)
  297. {
  298. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  299. int ret;
  300. bool is_raw_format = mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  301. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  302. ret = reg_write(COLUMN_START, rect->left);
  303. if (!ret)
  304. ret = reg_write(ROW_START, rect->top);
  305. if (is_raw_format) {
  306. if (!ret)
  307. ret = reg_write(WINDOW_WIDTH, rect->width);
  308. if (!ret)
  309. ret = reg_write(WINDOW_HEIGHT, rect->height);
  310. } else {
  311. if (!ret)
  312. ret = mt9m111_setup_rect_ctx(mt9m111, rect, &context_b);
  313. if (!ret)
  314. ret = mt9m111_setup_rect_ctx(mt9m111, rect, &context_a);
  315. }
  316. return ret;
  317. }
  318. static int mt9m111_enable(struct mt9m111 *mt9m111)
  319. {
  320. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  321. return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
  322. }
  323. static int mt9m111_reset(struct mt9m111 *mt9m111)
  324. {
  325. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  326. int ret;
  327. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  328. if (!ret)
  329. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  330. if (!ret)
  331. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  332. | MT9M111_RESET_RESET_SOC);
  333. return ret;
  334. }
  335. static int mt9m111_make_rect(struct mt9m111 *mt9m111,
  336. struct v4l2_rect *rect)
  337. {
  338. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  339. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  340. /* Bayer format - even size lengths */
  341. rect->width = ALIGN(rect->width, 2);
  342. rect->height = ALIGN(rect->height, 2);
  343. /* Let the user play with the starting pixel */
  344. }
  345. /* FIXME: the datasheet doesn't specify minimum sizes */
  346. soc_camera_limit_side(&rect->left, &rect->width,
  347. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  348. soc_camera_limit_side(&rect->top, &rect->height,
  349. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  350. return mt9m111_setup_rect(mt9m111, rect);
  351. }
  352. static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  353. {
  354. struct v4l2_rect rect = a->c;
  355. struct i2c_client *client = v4l2_get_subdevdata(sd);
  356. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  357. int ret;
  358. dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
  359. __func__, rect.left, rect.top, rect.width, rect.height);
  360. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  361. return -EINVAL;
  362. ret = mt9m111_make_rect(mt9m111, &rect);
  363. if (!ret)
  364. mt9m111->rect = rect;
  365. return ret;
  366. }
  367. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  368. {
  369. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  370. a->c = mt9m111->rect;
  371. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  372. return 0;
  373. }
  374. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  375. {
  376. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  377. return -EINVAL;
  378. a->bounds.left = MT9M111_MIN_DARK_COLS;
  379. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  380. a->bounds.width = MT9M111_MAX_WIDTH;
  381. a->bounds.height = MT9M111_MAX_HEIGHT;
  382. a->defrect = a->bounds;
  383. a->pixelaspect.numerator = 1;
  384. a->pixelaspect.denominator = 1;
  385. return 0;
  386. }
  387. static int mt9m111_g_fmt(struct v4l2_subdev *sd,
  388. struct v4l2_mbus_framefmt *mf)
  389. {
  390. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  391. mf->width = mt9m111->rect.width;
  392. mf->height = mt9m111->rect.height;
  393. mf->code = mt9m111->fmt->code;
  394. mf->colorspace = mt9m111->fmt->colorspace;
  395. mf->field = V4L2_FIELD_NONE;
  396. return 0;
  397. }
  398. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  399. enum v4l2_mbus_pixelcode code)
  400. {
  401. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  402. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  403. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  404. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  405. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  406. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  407. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  408. int ret;
  409. switch (code) {
  410. case V4L2_MBUS_FMT_SBGGR8_1X8:
  411. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  412. MT9M111_OUTFMT_RGB;
  413. break;
  414. case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
  415. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  416. break;
  417. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
  418. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  419. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  420. break;
  421. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
  422. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  423. break;
  424. case V4L2_MBUS_FMT_RGB565_2X8_LE:
  425. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  426. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  427. break;
  428. case V4L2_MBUS_FMT_RGB565_2X8_BE:
  429. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  430. break;
  431. case V4L2_MBUS_FMT_BGR565_2X8_BE:
  432. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  433. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  434. break;
  435. case V4L2_MBUS_FMT_BGR565_2X8_LE:
  436. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  437. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  438. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  439. break;
  440. case V4L2_MBUS_FMT_UYVY8_2X8:
  441. data_outfmt2 = 0;
  442. break;
  443. case V4L2_MBUS_FMT_VYUY8_2X8:
  444. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  445. break;
  446. case V4L2_MBUS_FMT_YUYV8_2X8:
  447. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  448. break;
  449. case V4L2_MBUS_FMT_YVYU8_2X8:
  450. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  451. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  452. break;
  453. default:
  454. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  455. return -EINVAL;
  456. }
  457. ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
  458. data_outfmt2, mask_outfmt2);
  459. if (!ret)
  460. ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
  461. data_outfmt2, mask_outfmt2);
  462. return ret;
  463. }
  464. static int mt9m111_s_fmt(struct v4l2_subdev *sd,
  465. struct v4l2_mbus_framefmt *mf)
  466. {
  467. struct i2c_client *client = v4l2_get_subdevdata(sd);
  468. const struct mt9m111_datafmt *fmt;
  469. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  470. struct v4l2_rect rect = {
  471. .left = mt9m111->rect.left,
  472. .top = mt9m111->rect.top,
  473. .width = mf->width,
  474. .height = mf->height,
  475. };
  476. int ret;
  477. fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
  478. ARRAY_SIZE(mt9m111_colour_fmts));
  479. if (!fmt)
  480. return -EINVAL;
  481. dev_dbg(&client->dev,
  482. "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
  483. mf->code, rect.left, rect.top, rect.width, rect.height);
  484. ret = mt9m111_make_rect(mt9m111, &rect);
  485. if (!ret)
  486. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  487. if (!ret) {
  488. mt9m111->rect = rect;
  489. mt9m111->fmt = fmt;
  490. mf->colorspace = fmt->colorspace;
  491. }
  492. return ret;
  493. }
  494. static int mt9m111_try_fmt(struct v4l2_subdev *sd,
  495. struct v4l2_mbus_framefmt *mf)
  496. {
  497. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  498. const struct mt9m111_datafmt *fmt;
  499. bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  500. mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  501. fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
  502. ARRAY_SIZE(mt9m111_colour_fmts));
  503. if (!fmt) {
  504. fmt = mt9m111->fmt;
  505. mf->code = fmt->code;
  506. }
  507. /*
  508. * With Bayer format enforce even side lengths, but let the user play
  509. * with the starting pixel
  510. */
  511. if (mf->height > MT9M111_MAX_HEIGHT)
  512. mf->height = MT9M111_MAX_HEIGHT;
  513. else if (mf->height < 2)
  514. mf->height = 2;
  515. else if (bayer)
  516. mf->height = ALIGN(mf->height, 2);
  517. if (mf->width > MT9M111_MAX_WIDTH)
  518. mf->width = MT9M111_MAX_WIDTH;
  519. else if (mf->width < 2)
  520. mf->width = 2;
  521. else if (bayer)
  522. mf->width = ALIGN(mf->width, 2);
  523. mf->colorspace = fmt->colorspace;
  524. return 0;
  525. }
  526. static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
  527. struct v4l2_dbg_chip_ident *id)
  528. {
  529. struct i2c_client *client = v4l2_get_subdevdata(sd);
  530. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  531. if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
  532. return -EINVAL;
  533. if (id->match.addr != client->addr)
  534. return -ENODEV;
  535. id->ident = mt9m111->model;
  536. id->revision = 0;
  537. return 0;
  538. }
  539. #ifdef CONFIG_VIDEO_ADV_DEBUG
  540. static int mt9m111_g_register(struct v4l2_subdev *sd,
  541. struct v4l2_dbg_register *reg)
  542. {
  543. struct i2c_client *client = v4l2_get_subdevdata(sd);
  544. int val;
  545. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  546. return -EINVAL;
  547. if (reg->match.addr != client->addr)
  548. return -ENODEV;
  549. val = mt9m111_reg_read(client, reg->reg);
  550. reg->size = 2;
  551. reg->val = (u64)val;
  552. if (reg->val > 0xffff)
  553. return -EIO;
  554. return 0;
  555. }
  556. static int mt9m111_s_register(struct v4l2_subdev *sd,
  557. struct v4l2_dbg_register *reg)
  558. {
  559. struct i2c_client *client = v4l2_get_subdevdata(sd);
  560. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  561. return -EINVAL;
  562. if (reg->match.addr != client->addr)
  563. return -ENODEV;
  564. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  565. return -EIO;
  566. return 0;
  567. }
  568. #endif
  569. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  570. {
  571. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  572. int ret;
  573. if (flip)
  574. ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
  575. else
  576. ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
  577. return ret;
  578. }
  579. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  580. {
  581. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  582. int data;
  583. data = reg_read(GLOBAL_GAIN);
  584. if (data >= 0)
  585. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  586. (1 << ((data >> 9) & 1));
  587. return data;
  588. }
  589. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  590. {
  591. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  592. u16 val;
  593. if (gain > 63 * 2 * 2)
  594. return -EINVAL;
  595. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  596. val = (1 << 10) | (1 << 9) | (gain / 4);
  597. else if ((gain >= 64) && (gain < 64 * 2))
  598. val = (1 << 9) | (gain / 2);
  599. else
  600. val = gain;
  601. return reg_write(GLOBAL_GAIN, val);
  602. }
  603. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
  604. {
  605. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  606. if (on)
  607. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  608. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  609. }
  610. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  611. {
  612. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  613. if (on)
  614. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  615. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  616. }
  617. static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
  618. {
  619. struct mt9m111 *mt9m111 = container_of(ctrl->handler,
  620. struct mt9m111, hdl);
  621. switch (ctrl->id) {
  622. case V4L2_CID_VFLIP:
  623. return mt9m111_set_flip(mt9m111, ctrl->val,
  624. MT9M111_RMB_MIRROR_ROWS);
  625. case V4L2_CID_HFLIP:
  626. return mt9m111_set_flip(mt9m111, ctrl->val,
  627. MT9M111_RMB_MIRROR_COLS);
  628. case V4L2_CID_GAIN:
  629. return mt9m111_set_global_gain(mt9m111, ctrl->val);
  630. case V4L2_CID_EXPOSURE_AUTO:
  631. return mt9m111_set_autoexposure(mt9m111, ctrl->val);
  632. case V4L2_CID_AUTO_WHITE_BALANCE:
  633. return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
  634. }
  635. return -EINVAL;
  636. }
  637. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  638. {
  639. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  640. int ret;
  641. v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
  642. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  643. if (!ret)
  644. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
  645. MT9M111_RESET_OUTPUT_DISABLE |
  646. MT9M111_RESET_ANALOG_STANDBY);
  647. if (!ret)
  648. ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
  649. return ret;
  650. }
  651. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  652. {
  653. mt9m111_set_context(mt9m111, mt9m111->ctx);
  654. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  655. mt9m111_setup_rect(mt9m111, &mt9m111->rect);
  656. v4l2_ctrl_handler_setup(&mt9m111->hdl);
  657. }
  658. static int mt9m111_resume(struct mt9m111 *mt9m111)
  659. {
  660. int ret = mt9m111_enable(mt9m111);
  661. if (!ret)
  662. ret = mt9m111_reset(mt9m111);
  663. if (!ret)
  664. mt9m111_restore_state(mt9m111);
  665. return ret;
  666. }
  667. static int mt9m111_init(struct mt9m111 *mt9m111)
  668. {
  669. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  670. int ret;
  671. /* Default HIGHPOWER context */
  672. mt9m111->ctx = &context_b;
  673. ret = mt9m111_enable(mt9m111);
  674. if (!ret)
  675. ret = mt9m111_reset(mt9m111);
  676. if (!ret)
  677. ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
  678. if (ret)
  679. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  680. return ret;
  681. }
  682. /*
  683. * Interface active, can use i2c. If it fails, it can indeed mean, that
  684. * this wasn't our capture interface, so, we wait for the right one
  685. */
  686. static int mt9m111_video_probe(struct i2c_client *client)
  687. {
  688. struct mt9m111 *mt9m111 = to_mt9m111(client);
  689. s32 data;
  690. int ret;
  691. data = reg_read(CHIP_VERSION);
  692. switch (data) {
  693. case 0x143a: /* MT9M111 or MT9M131 */
  694. mt9m111->model = V4L2_IDENT_MT9M111;
  695. dev_info(&client->dev,
  696. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  697. break;
  698. case 0x148c: /* MT9M112 */
  699. mt9m111->model = V4L2_IDENT_MT9M112;
  700. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  701. break;
  702. default:
  703. dev_err(&client->dev,
  704. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  705. data);
  706. return -ENODEV;
  707. }
  708. ret = mt9m111_init(mt9m111);
  709. if (ret)
  710. return ret;
  711. return v4l2_ctrl_handler_setup(&mt9m111->hdl);
  712. }
  713. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  714. {
  715. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  716. struct i2c_client *client = v4l2_get_subdevdata(sd);
  717. int ret = 0;
  718. mutex_lock(&mt9m111->power_lock);
  719. /*
  720. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  721. * update the power state.
  722. */
  723. if (mt9m111->power_count == !on) {
  724. if (on) {
  725. ret = mt9m111_resume(mt9m111);
  726. if (ret) {
  727. dev_err(&client->dev,
  728. "Failed to resume the sensor: %d\n", ret);
  729. goto out;
  730. }
  731. } else {
  732. mt9m111_suspend(mt9m111);
  733. }
  734. }
  735. /* Update the power count. */
  736. mt9m111->power_count += on ? 1 : -1;
  737. WARN_ON(mt9m111->power_count < 0);
  738. out:
  739. mutex_unlock(&mt9m111->power_lock);
  740. return ret;
  741. }
  742. static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
  743. .s_ctrl = mt9m111_s_ctrl,
  744. };
  745. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  746. .g_chip_ident = mt9m111_g_chip_ident,
  747. .s_power = mt9m111_s_power,
  748. #ifdef CONFIG_VIDEO_ADV_DEBUG
  749. .g_register = mt9m111_g_register,
  750. .s_register = mt9m111_s_register,
  751. #endif
  752. };
  753. static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  754. enum v4l2_mbus_pixelcode *code)
  755. {
  756. if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
  757. return -EINVAL;
  758. *code = mt9m111_colour_fmts[index].code;
  759. return 0;
  760. }
  761. static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
  762. struct v4l2_mbus_config *cfg)
  763. {
  764. struct i2c_client *client = v4l2_get_subdevdata(sd);
  765. struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
  766. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  767. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
  768. V4L2_MBUS_DATA_ACTIVE_HIGH;
  769. cfg->type = V4L2_MBUS_PARALLEL;
  770. cfg->flags = soc_camera_apply_board_flags(icl, cfg);
  771. return 0;
  772. }
  773. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  774. .s_mbus_fmt = mt9m111_s_fmt,
  775. .g_mbus_fmt = mt9m111_g_fmt,
  776. .try_mbus_fmt = mt9m111_try_fmt,
  777. .s_crop = mt9m111_s_crop,
  778. .g_crop = mt9m111_g_crop,
  779. .cropcap = mt9m111_cropcap,
  780. .enum_mbus_fmt = mt9m111_enum_fmt,
  781. .g_mbus_config = mt9m111_g_mbus_config,
  782. };
  783. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  784. .core = &mt9m111_subdev_core_ops,
  785. .video = &mt9m111_subdev_video_ops,
  786. };
  787. static int mt9m111_probe(struct i2c_client *client,
  788. const struct i2c_device_id *did)
  789. {
  790. struct mt9m111 *mt9m111;
  791. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  792. struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
  793. int ret;
  794. if (!icl) {
  795. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  796. return -EINVAL;
  797. }
  798. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  799. dev_warn(&adapter->dev,
  800. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  801. return -EIO;
  802. }
  803. mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
  804. if (!mt9m111)
  805. return -ENOMEM;
  806. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  807. v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
  808. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  809. V4L2_CID_VFLIP, 0, 1, 1, 0);
  810. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  811. V4L2_CID_HFLIP, 0, 1, 1, 0);
  812. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  813. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  814. mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  815. V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
  816. v4l2_ctrl_new_std_menu(&mt9m111->hdl,
  817. &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
  818. V4L2_EXPOSURE_AUTO);
  819. mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
  820. if (mt9m111->hdl.error) {
  821. int err = mt9m111->hdl.error;
  822. kfree(mt9m111);
  823. return err;
  824. }
  825. /* Second stage probe - when a capture adapter is there */
  826. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  827. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  828. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  829. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  830. mt9m111->fmt = &mt9m111_colour_fmts[0];
  831. mt9m111->lastpage = -1;
  832. mutex_init(&mt9m111->power_lock);
  833. ret = mt9m111_video_probe(client);
  834. if (ret) {
  835. v4l2_ctrl_handler_free(&mt9m111->hdl);
  836. kfree(mt9m111);
  837. }
  838. return ret;
  839. }
  840. static int mt9m111_remove(struct i2c_client *client)
  841. {
  842. struct mt9m111 *mt9m111 = to_mt9m111(client);
  843. v4l2_device_unregister_subdev(&mt9m111->subdev);
  844. v4l2_ctrl_handler_free(&mt9m111->hdl);
  845. kfree(mt9m111);
  846. return 0;
  847. }
  848. static const struct i2c_device_id mt9m111_id[] = {
  849. { "mt9m111", 0 },
  850. { }
  851. };
  852. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  853. static struct i2c_driver mt9m111_i2c_driver = {
  854. .driver = {
  855. .name = "mt9m111",
  856. },
  857. .probe = mt9m111_probe,
  858. .remove = mt9m111_remove,
  859. .id_table = mt9m111_id,
  860. };
  861. static int __init mt9m111_mod_init(void)
  862. {
  863. return i2c_add_driver(&mt9m111_i2c_driver);
  864. }
  865. static void __exit mt9m111_mod_exit(void)
  866. {
  867. i2c_del_driver(&mt9m111_i2c_driver);
  868. }
  869. module_init(mt9m111_mod_init);
  870. module_exit(mt9m111_mod_exit);
  871. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  872. MODULE_AUTHOR("Robert Jarzmik");
  873. MODULE_LICENSE("GPL");