ath9k.h 26 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef ATH9K_H
  17. #define ATH9K_H
  18. #include <linux/etherdevice.h>
  19. #include <linux/device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/leds.h>
  22. #include <linux/completion.h>
  23. #include "debug.h"
  24. #include "common.h"
  25. #include "mci.h"
  26. #include "dfs.h"
  27. /*
  28. * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
  29. * should rely on this file or its contents.
  30. */
  31. struct ath_node;
  32. /* Macro to expand scalars to 64-bit objects */
  33. #define ito64(x) (sizeof(x) == 1) ? \
  34. (((unsigned long long int)(x)) & (0xff)) : \
  35. (sizeof(x) == 2) ? \
  36. (((unsigned long long int)(x)) & 0xffff) : \
  37. ((sizeof(x) == 4) ? \
  38. (((unsigned long long int)(x)) & 0xffffffff) : \
  39. (unsigned long long int)(x))
  40. /* increment with wrap-around */
  41. #define INCR(_l, _sz) do { \
  42. (_l)++; \
  43. (_l) &= ((_sz) - 1); \
  44. } while (0)
  45. /* decrement with wrap-around */
  46. #define DECR(_l, _sz) do { \
  47. (_l)--; \
  48. (_l) &= ((_sz) - 1); \
  49. } while (0)
  50. #define TSF_TO_TU(_h,_l) \
  51. ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
  52. #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
  53. struct ath_config {
  54. u16 txpowlimit;
  55. u8 cabqReadytime;
  56. };
  57. /*************************/
  58. /* Descriptor Management */
  59. /*************************/
  60. #define ATH_TXBUF_RESET(_bf) do { \
  61. (_bf)->bf_stale = false; \
  62. (_bf)->bf_lastbf = NULL; \
  63. (_bf)->bf_next = NULL; \
  64. memset(&((_bf)->bf_state), 0, \
  65. sizeof(struct ath_buf_state)); \
  66. } while (0)
  67. #define ATH_RXBUF_RESET(_bf) do { \
  68. (_bf)->bf_stale = false; \
  69. } while (0)
  70. /**
  71. * enum buffer_type - Buffer type flags
  72. *
  73. * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
  74. * @BUF_AGGR: Indicates whether the buffer can be aggregated
  75. * (used in aggregation scheduling)
  76. */
  77. enum buffer_type {
  78. BUF_AMPDU = BIT(0),
  79. BUF_AGGR = BIT(1),
  80. };
  81. #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
  82. #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
  83. #define ATH_TXSTATUS_RING_SIZE 512
  84. #define DS2PHYS(_dd, _ds) \
  85. ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
  86. #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
  87. #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
  88. struct ath_descdma {
  89. void *dd_desc;
  90. dma_addr_t dd_desc_paddr;
  91. u32 dd_desc_len;
  92. };
  93. int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
  94. struct list_head *head, const char *name,
  95. int nbuf, int ndesc, bool is_tx);
  96. /***********/
  97. /* RX / TX */
  98. /***********/
  99. #define ATH_RXBUF 512
  100. #define ATH_TXBUF 512
  101. #define ATH_TXBUF_RESERVE 5
  102. #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
  103. #define ATH_TXMAXTRY 13
  104. #define TID_TO_WME_AC(_tid) \
  105. ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
  106. (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
  107. (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
  108. IEEE80211_AC_VO)
  109. #define ATH_AGGR_DELIM_SZ 4
  110. #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
  111. /* number of delimiters for encryption padding */
  112. #define ATH_AGGR_ENCRYPTDELIM 10
  113. /* minimum h/w qdepth to be sustained to maximize aggregation */
  114. #define ATH_AGGR_MIN_QDEPTH 2
  115. /* minimum h/w qdepth for non-aggregated traffic */
  116. #define ATH_NON_AGGR_MIN_QDEPTH 8
  117. #define IEEE80211_SEQ_SEQ_SHIFT 4
  118. #define IEEE80211_SEQ_MAX 4096
  119. #define IEEE80211_WEP_IVLEN 3
  120. #define IEEE80211_WEP_KIDLEN 1
  121. #define IEEE80211_WEP_CRCLEN 4
  122. #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
  123. (IEEE80211_WEP_IVLEN + \
  124. IEEE80211_WEP_KIDLEN + \
  125. IEEE80211_WEP_CRCLEN))
  126. /* return whether a bit at index _n in bitmap _bm is set
  127. * _sz is the size of the bitmap */
  128. #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
  129. ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
  130. /* return block-ack bitmap index given sequence and starting sequence */
  131. #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
  132. /* return the seqno for _start + _offset */
  133. #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
  134. /* returns delimiter padding required given the packet length */
  135. #define ATH_AGGR_GET_NDELIM(_len) \
  136. (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
  137. DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
  138. #define BAW_WITHIN(_start, _bawsz, _seqno) \
  139. ((((_seqno) - (_start)) & 4095) < (_bawsz))
  140. #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
  141. #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
  142. #define ATH_TX_COMPLETE_POLL_INT 1000
  143. #define ATH_TXFIFO_DEPTH 8
  144. struct ath_txq {
  145. int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
  146. u32 axq_qnum; /* ath9k hardware queue number */
  147. void *axq_link;
  148. struct list_head axq_q;
  149. spinlock_t axq_lock;
  150. u32 axq_depth;
  151. u32 axq_ampdu_depth;
  152. bool stopped;
  153. bool axq_tx_inprogress;
  154. struct list_head axq_acq;
  155. struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
  156. u8 txq_headidx;
  157. u8 txq_tailidx;
  158. int pending_frames;
  159. struct sk_buff_head complete_q;
  160. };
  161. struct ath_atx_ac {
  162. struct ath_txq *txq;
  163. int sched;
  164. struct list_head list;
  165. struct list_head tid_q;
  166. bool clear_ps_filter;
  167. };
  168. struct ath_frame_info {
  169. struct ath_buf *bf;
  170. int framelen;
  171. enum ath9k_key_type keytype;
  172. u8 keyix;
  173. u8 rtscts_rate;
  174. u8 retries : 7;
  175. u8 baw_tracked : 1;
  176. };
  177. struct ath_buf_state {
  178. u8 bf_type;
  179. u8 bfs_paprd;
  180. u8 ndelim;
  181. u16 seqno;
  182. unsigned long bfs_paprd_timestamp;
  183. };
  184. struct ath_buf {
  185. struct list_head list;
  186. struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
  187. an aggregate) */
  188. struct ath_buf *bf_next; /* next subframe in the aggregate */
  189. struct sk_buff *bf_mpdu; /* enclosing frame structure */
  190. void *bf_desc; /* virtual addr of desc */
  191. dma_addr_t bf_daddr; /* physical addr of desc */
  192. dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
  193. bool bf_stale;
  194. struct ieee80211_tx_rate rates[4];
  195. struct ath_buf_state bf_state;
  196. };
  197. struct ath_atx_tid {
  198. struct list_head list;
  199. struct sk_buff_head buf_q;
  200. struct sk_buff_head retry_q;
  201. struct ath_node *an;
  202. struct ath_atx_ac *ac;
  203. unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
  204. int bar_index;
  205. u16 seq_start;
  206. u16 seq_next;
  207. u16 baw_size;
  208. int tidno;
  209. int baw_head; /* first un-acked tx buffer */
  210. int baw_tail; /* next unused tx buffer slot */
  211. bool sched;
  212. bool paused;
  213. bool active;
  214. };
  215. struct ath_node {
  216. struct ath_softc *sc;
  217. struct ieee80211_sta *sta; /* station struct we're part of */
  218. struct ieee80211_vif *vif; /* interface with which we're associated */
  219. struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
  220. struct ath_atx_ac ac[IEEE80211_NUM_ACS];
  221. int ps_key;
  222. u16 maxampdu;
  223. u8 mpdudensity;
  224. bool sleeping;
  225. bool no_ps_filter;
  226. #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
  227. struct dentry *node_stat;
  228. #endif
  229. };
  230. struct ath_tx_control {
  231. struct ath_txq *txq;
  232. struct ath_node *an;
  233. u8 paprd;
  234. struct ieee80211_sta *sta;
  235. };
  236. #define ATH_TX_ERROR 0x01
  237. /**
  238. * @txq_map: Index is mac80211 queue number. This is
  239. * not necessarily the same as the hardware queue number
  240. * (axq_qnum).
  241. */
  242. struct ath_tx {
  243. u16 seq_no;
  244. u32 txqsetup;
  245. spinlock_t txbuflock;
  246. struct list_head txbuf;
  247. struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
  248. struct ath_descdma txdma;
  249. struct ath_txq *txq_map[IEEE80211_NUM_ACS];
  250. struct ath_txq *uapsdq;
  251. u32 txq_max_pending[IEEE80211_NUM_ACS];
  252. u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
  253. };
  254. struct ath_rx_edma {
  255. struct sk_buff_head rx_fifo;
  256. u32 rx_fifo_hwsize;
  257. };
  258. struct ath_rx {
  259. u8 defant;
  260. u8 rxotherant;
  261. bool discard_next;
  262. u32 *rxlink;
  263. u32 num_pkts;
  264. unsigned int rxfilter;
  265. struct list_head rxbuf;
  266. struct ath_descdma rxdma;
  267. struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
  268. struct sk_buff *frag;
  269. u32 ampdu_ref;
  270. };
  271. int ath_startrecv(struct ath_softc *sc);
  272. bool ath_stoprecv(struct ath_softc *sc);
  273. u32 ath_calcrxfilter(struct ath_softc *sc);
  274. int ath_rx_init(struct ath_softc *sc, int nbufs);
  275. void ath_rx_cleanup(struct ath_softc *sc);
  276. int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
  277. struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
  278. void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
  279. void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
  280. void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
  281. void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
  282. bool ath_drain_all_txq(struct ath_softc *sc);
  283. void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
  284. void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
  285. void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
  286. void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
  287. int ath_tx_init(struct ath_softc *sc, int nbufs);
  288. int ath_txq_update(struct ath_softc *sc, int qnum,
  289. struct ath9k_tx_queue_info *q);
  290. void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
  291. int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
  292. struct ath_tx_control *txctl);
  293. void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  294. struct sk_buff *skb);
  295. void ath_tx_tasklet(struct ath_softc *sc);
  296. void ath_tx_edma_tasklet(struct ath_softc *sc);
  297. int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
  298. u16 tid, u16 *ssn);
  299. void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
  300. void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
  301. void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
  302. void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
  303. struct ath_node *an);
  304. void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
  305. struct ieee80211_sta *sta,
  306. u16 tids, int nframes,
  307. enum ieee80211_frame_release_type reason,
  308. bool more_data);
  309. /********/
  310. /* VIFs */
  311. /********/
  312. struct ath_vif {
  313. struct ath_node mcast_node;
  314. int av_bslot;
  315. bool primary_sta_vif;
  316. __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
  317. struct ath_buf *av_bcbuf;
  318. };
  319. /*******************/
  320. /* Beacon Handling */
  321. /*******************/
  322. /*
  323. * Regardless of the number of beacons we stagger, (i.e. regardless of the
  324. * number of BSSIDs) if a given beacon does not go out even after waiting this
  325. * number of beacon intervals, the game's up.
  326. */
  327. #define BSTUCK_THRESH 9
  328. #define ATH_BCBUF 8
  329. #define ATH_DEFAULT_BINTVAL 100 /* TU */
  330. #define ATH_DEFAULT_BMISS_LIMIT 10
  331. #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
  332. struct ath_beacon_config {
  333. int beacon_interval;
  334. u16 listen_interval;
  335. u16 dtim_period;
  336. u16 bmiss_timeout;
  337. u8 dtim_count;
  338. bool enable_beacon;
  339. bool ibss_creator;
  340. };
  341. struct ath_beacon {
  342. enum {
  343. OK, /* no change needed */
  344. UPDATE, /* update pending */
  345. COMMIT /* beacon sent, commit change */
  346. } updateslot; /* slot time update fsm */
  347. u32 beaconq;
  348. u32 bmisscnt;
  349. u32 bc_tstamp;
  350. struct ieee80211_vif *bslot[ATH_BCBUF];
  351. int slottime;
  352. int slotupdate;
  353. struct ath9k_tx_queue_info beacon_qi;
  354. struct ath_descdma bdma;
  355. struct ath_txq *cabq;
  356. struct list_head bbuf;
  357. bool tx_processed;
  358. bool tx_last;
  359. };
  360. void ath9k_beacon_tasklet(unsigned long data);
  361. bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
  362. void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
  363. u32 changed);
  364. void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
  365. void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
  366. void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif);
  367. void ath9k_set_beacon(struct ath_softc *sc);
  368. /*******************/
  369. /* Link Monitoring */
  370. /*******************/
  371. #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
  372. #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
  373. #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
  374. #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
  375. #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
  376. #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
  377. #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
  378. #define ATH_ANI_MAX_SKIP_COUNT 10
  379. #define ATH_PAPRD_TIMEOUT 100 /* msecs */
  380. #define ATH_PLL_WORK_INTERVAL 100
  381. void ath_tx_complete_poll_work(struct work_struct *work);
  382. void ath_reset_work(struct work_struct *work);
  383. void ath_hw_check(struct work_struct *work);
  384. void ath_hw_pll_work(struct work_struct *work);
  385. void ath_rx_poll(unsigned long data);
  386. void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);
  387. void ath_paprd_calibrate(struct work_struct *work);
  388. void ath_ani_calibrate(unsigned long data);
  389. void ath_start_ani(struct ath_softc *sc);
  390. void ath_stop_ani(struct ath_softc *sc);
  391. void ath_check_ani(struct ath_softc *sc);
  392. int ath_update_survey_stats(struct ath_softc *sc);
  393. void ath_update_survey_nf(struct ath_softc *sc, int channel);
  394. void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
  395. /**********/
  396. /* BTCOEX */
  397. /**********/
  398. #define ATH_DUMP_BTCOEX(_s, _val) \
  399. do { \
  400. len += snprintf(buf + len, size - len, \
  401. "%20s : %10d\n", _s, (_val)); \
  402. } while (0)
  403. enum bt_op_flags {
  404. BT_OP_PRIORITY_DETECTED,
  405. BT_OP_SCAN,
  406. };
  407. struct ath_btcoex {
  408. bool hw_timer_enabled;
  409. spinlock_t btcoex_lock;
  410. struct timer_list period_timer; /* Timer for BT period */
  411. u32 bt_priority_cnt;
  412. unsigned long bt_priority_time;
  413. unsigned long op_flags;
  414. int bt_stomp_type; /* Types of BT stomping */
  415. u32 btcoex_no_stomp; /* in usec */
  416. u32 btcoex_period; /* in msec */
  417. u32 btscan_no_stomp; /* in usec */
  418. u32 duty_cycle;
  419. u32 bt_wait_time;
  420. int rssi_count;
  421. struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
  422. struct ath_mci_profile mci;
  423. u8 stomp_audio;
  424. };
  425. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  426. int ath9k_init_btcoex(struct ath_softc *sc);
  427. void ath9k_deinit_btcoex(struct ath_softc *sc);
  428. void ath9k_start_btcoex(struct ath_softc *sc);
  429. void ath9k_stop_btcoex(struct ath_softc *sc);
  430. void ath9k_btcoex_timer_resume(struct ath_softc *sc);
  431. void ath9k_btcoex_timer_pause(struct ath_softc *sc);
  432. void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
  433. u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
  434. void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
  435. int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
  436. #else
  437. static inline int ath9k_init_btcoex(struct ath_softc *sc)
  438. {
  439. return 0;
  440. }
  441. static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
  442. {
  443. }
  444. static inline void ath9k_start_btcoex(struct ath_softc *sc)
  445. {
  446. }
  447. static inline void ath9k_stop_btcoex(struct ath_softc *sc)
  448. {
  449. }
  450. static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
  451. u32 status)
  452. {
  453. }
  454. static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
  455. u32 max_4ms_framelen)
  456. {
  457. return 0;
  458. }
  459. static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
  460. {
  461. }
  462. static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
  463. {
  464. return 0;
  465. }
  466. #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
  467. struct ath9k_wow_pattern {
  468. u8 pattern_bytes[MAX_PATTERN_SIZE];
  469. u8 mask_bytes[MAX_PATTERN_SIZE];
  470. u32 pattern_len;
  471. };
  472. /********************/
  473. /* LED Control */
  474. /********************/
  475. #define ATH_LED_PIN_DEF 1
  476. #define ATH_LED_PIN_9287 8
  477. #define ATH_LED_PIN_9300 10
  478. #define ATH_LED_PIN_9485 6
  479. #define ATH_LED_PIN_9462 4
  480. #ifdef CONFIG_MAC80211_LEDS
  481. void ath_init_leds(struct ath_softc *sc);
  482. void ath_deinit_leds(struct ath_softc *sc);
  483. void ath_fill_led_pin(struct ath_softc *sc);
  484. #else
  485. static inline void ath_init_leds(struct ath_softc *sc)
  486. {
  487. }
  488. static inline void ath_deinit_leds(struct ath_softc *sc)
  489. {
  490. }
  491. static inline void ath_fill_led_pin(struct ath_softc *sc)
  492. {
  493. }
  494. #endif
  495. /*******************************/
  496. /* Antenna diversity/combining */
  497. /*******************************/
  498. #define ATH_ANT_RX_CURRENT_SHIFT 4
  499. #define ATH_ANT_RX_MAIN_SHIFT 2
  500. #define ATH_ANT_RX_MASK 0x3
  501. #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
  502. #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
  503. #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
  504. #define ATH_ANT_DIV_COMB_INIT_COUNT 95
  505. #define ATH_ANT_DIV_COMB_MAX_COUNT 100
  506. #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
  507. #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
  508. #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
  509. #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
  510. #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
  511. #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
  512. #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
  513. #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
  514. struct ath_ant_comb {
  515. u16 count;
  516. u16 total_pkt_count;
  517. bool scan;
  518. bool scan_not_start;
  519. int main_total_rssi;
  520. int alt_total_rssi;
  521. int alt_recv_cnt;
  522. int main_recv_cnt;
  523. int rssi_lna1;
  524. int rssi_lna2;
  525. int rssi_add;
  526. int rssi_sub;
  527. int rssi_first;
  528. int rssi_second;
  529. int rssi_third;
  530. int ant_ratio;
  531. int ant_ratio2;
  532. bool alt_good;
  533. int quick_scan_cnt;
  534. enum ath9k_ant_div_comb_lna_conf main_conf;
  535. enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
  536. enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
  537. bool first_ratio;
  538. bool second_ratio;
  539. unsigned long scan_start_time;
  540. /*
  541. * Card-specific config values.
  542. */
  543. int low_rssi_thresh;
  544. int fast_div_bias;
  545. };
  546. void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
  547. /********************/
  548. /* Main driver core */
  549. /********************/
  550. #define ATH9K_PCI_CUS198 0x0001
  551. #define ATH9K_PCI_CUS230 0x0002
  552. #define ATH9K_PCI_CUS217 0x0004
  553. #define ATH9K_PCI_WOW 0x0008
  554. #define ATH9K_PCI_BT_ANT_DIV 0x0010
  555. /*
  556. * Default cache line size, in bytes.
  557. * Used when PCI device not fully initialized by bootrom/BIOS
  558. */
  559. #define DEFAULT_CACHELINE 32
  560. #define ATH_REGCLASSIDS_MAX 10
  561. #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
  562. #define ATH_MAX_SW_RETRIES 30
  563. #define ATH_CHAN_MAX 255
  564. #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
  565. #define ATH_RATE_DUMMY_MARKER 0
  566. enum sc_op_flags {
  567. SC_OP_INVALID,
  568. SC_OP_BEACONS,
  569. SC_OP_ANI_RUN,
  570. SC_OP_PRIM_STA_VIF,
  571. SC_OP_HW_RESET,
  572. SC_OP_SCANNING,
  573. };
  574. /* Powersave flags */
  575. #define PS_WAIT_FOR_BEACON BIT(0)
  576. #define PS_WAIT_FOR_CAB BIT(1)
  577. #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
  578. #define PS_WAIT_FOR_TX_ACK BIT(3)
  579. #define PS_BEACON_SYNC BIT(4)
  580. #define PS_WAIT_FOR_ANI BIT(5)
  581. struct ath_rate_table;
  582. struct ath9k_vif_iter_data {
  583. u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
  584. u8 mask[ETH_ALEN]; /* bssid mask */
  585. bool has_hw_macaddr;
  586. int naps; /* number of AP vifs */
  587. int nmeshes; /* number of mesh vifs */
  588. int nstations; /* number of station vifs */
  589. int nwds; /* number of WDS vifs */
  590. int nadhocs; /* number of adhoc vifs */
  591. };
  592. /* enum spectral_mode:
  593. *
  594. * @SPECTRAL_DISABLED: spectral mode is disabled
  595. * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
  596. * something else.
  597. * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
  598. * is performed manually.
  599. * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels
  600. * during a channel scan.
  601. */
  602. enum spectral_mode {
  603. SPECTRAL_DISABLED = 0,
  604. SPECTRAL_BACKGROUND,
  605. SPECTRAL_MANUAL,
  606. SPECTRAL_CHANSCAN,
  607. };
  608. struct ath_softc {
  609. struct ieee80211_hw *hw;
  610. struct device *dev;
  611. struct survey_info *cur_survey;
  612. struct survey_info survey[ATH9K_NUM_CHANNELS];
  613. struct tasklet_struct intr_tq;
  614. struct tasklet_struct bcon_tasklet;
  615. struct ath_hw *sc_ah;
  616. void __iomem *mem;
  617. int irq;
  618. spinlock_t sc_serial_rw;
  619. spinlock_t sc_pm_lock;
  620. spinlock_t sc_pcu_lock;
  621. struct mutex mutex;
  622. struct work_struct paprd_work;
  623. struct work_struct hw_check_work;
  624. struct work_struct hw_reset_work;
  625. struct completion paprd_complete;
  626. unsigned int hw_busy_count;
  627. unsigned long sc_flags;
  628. unsigned long driver_data;
  629. u32 intrstatus;
  630. u16 ps_flags; /* PS_* */
  631. u16 curtxpow;
  632. bool ps_enabled;
  633. bool ps_idle;
  634. short nbcnvifs;
  635. short nvifs;
  636. unsigned long ps_usecount;
  637. struct ath_config config;
  638. struct ath_rx rx;
  639. struct ath_tx tx;
  640. struct ath_beacon beacon;
  641. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  642. #ifdef CONFIG_MAC80211_LEDS
  643. bool led_registered;
  644. char led_name[32];
  645. struct led_classdev led_cdev;
  646. #endif
  647. struct ath9k_hw_cal_data caldata;
  648. int last_rssi;
  649. #ifdef CONFIG_ATH9K_DEBUGFS
  650. struct ath9k_debug debug;
  651. #endif
  652. struct ath_beacon_config cur_beacon_conf;
  653. struct delayed_work tx_complete_work;
  654. struct delayed_work hw_pll_work;
  655. struct timer_list rx_poll_timer;
  656. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  657. struct ath_btcoex btcoex;
  658. struct ath_mci_coex mci_coex;
  659. struct work_struct mci_work;
  660. #endif
  661. struct ath_descdma txsdma;
  662. struct ath_ant_comb ant_comb;
  663. u8 ant_tx, ant_rx;
  664. struct dfs_pattern_detector *dfs_detector;
  665. u32 wow_enabled;
  666. /* relay(fs) channel for spectral scan */
  667. struct rchan *rfs_chan_spec_scan;
  668. enum spectral_mode spectral_mode;
  669. struct ath_spec_scan spec_config;
  670. #ifdef CONFIG_PM_SLEEP
  671. atomic_t wow_got_bmiss_intr;
  672. atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
  673. u32 wow_intr_before_sleep;
  674. #endif
  675. };
  676. #define SPECTRAL_SCAN_BITMASK 0x10
  677. /* Radar info packet format, used for DFS and spectral formats. */
  678. struct ath_radar_info {
  679. u8 pulse_length_pri;
  680. u8 pulse_length_ext;
  681. u8 pulse_bw_info;
  682. } __packed;
  683. /* The HT20 spectral data has 4 bytes of additional information at it's end.
  684. *
  685. * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]}
  686. * [7:0]: all bins max_magnitude[9:2]
  687. * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]}
  688. * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
  689. */
  690. struct ath_ht20_mag_info {
  691. u8 all_bins[3];
  692. u8 max_exp;
  693. } __packed;
  694. #define SPECTRAL_HT20_NUM_BINS 56
  695. /* WARNING: don't actually use this struct! MAC may vary the amount of
  696. * data by -1/+2. This struct is for reference only.
  697. */
  698. struct ath_ht20_fft_packet {
  699. u8 data[SPECTRAL_HT20_NUM_BINS];
  700. struct ath_ht20_mag_info mag_info;
  701. struct ath_radar_info radar_info;
  702. } __packed;
  703. #define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet))
  704. /* Dynamic 20/40 mode:
  705. *
  706. * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]}
  707. * [7:0]: lower bins max_magnitude[9:2]
  708. * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]}
  709. * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]}
  710. * [7:0]: upper bins max_magnitude[9:2]
  711. * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]}
  712. * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
  713. */
  714. struct ath_ht20_40_mag_info {
  715. u8 lower_bins[3];
  716. u8 upper_bins[3];
  717. u8 max_exp;
  718. } __packed;
  719. #define SPECTRAL_HT20_40_NUM_BINS 128
  720. /* WARNING: don't actually use this struct! MAC may vary the amount of
  721. * data. This struct is for reference only.
  722. */
  723. struct ath_ht20_40_fft_packet {
  724. u8 data[SPECTRAL_HT20_40_NUM_BINS];
  725. struct ath_ht20_40_mag_info mag_info;
  726. struct ath_radar_info radar_info;
  727. } __packed;
  728. #define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
  729. /* grabs the max magnitude from the all/upper/lower bins */
  730. static inline u16 spectral_max_magnitude(u8 *bins)
  731. {
  732. return (bins[0] & 0xc0) >> 6 |
  733. (bins[1] & 0xff) << 2 |
  734. (bins[2] & 0x03) << 10;
  735. }
  736. /* return the max magnitude from the all/upper/lower bins */
  737. static inline u8 spectral_max_index(u8 *bins)
  738. {
  739. s8 m = (bins[2] & 0xfc) >> 2;
  740. /* TODO: this still doesn't always report the right values ... */
  741. if (m > 32)
  742. m |= 0xe0;
  743. else
  744. m &= ~0xe0;
  745. return m + 29;
  746. }
  747. /* return the bitmap weight from the all/upper/lower bins */
  748. static inline u8 spectral_bitmap_weight(u8 *bins)
  749. {
  750. return bins[0] & 0x3f;
  751. }
  752. /* FFT sample format given to userspace via debugfs.
  753. *
  754. * Please keep the type/length at the front position and change
  755. * other fields after adding another sample type
  756. *
  757. * TODO: this might need rework when switching to nl80211-based
  758. * interface.
  759. */
  760. enum ath_fft_sample_type {
  761. ATH_FFT_SAMPLE_HT20 = 1,
  762. };
  763. struct fft_sample_tlv {
  764. u8 type; /* see ath_fft_sample */
  765. __be16 length;
  766. /* type dependent data follows */
  767. } __packed;
  768. struct fft_sample_ht20 {
  769. struct fft_sample_tlv tlv;
  770. u8 max_exp;
  771. __be16 freq;
  772. s8 rssi;
  773. s8 noise;
  774. __be16 max_magnitude;
  775. u8 max_index;
  776. u8 bitmap_weight;
  777. __be64 tsf;
  778. u8 data[SPECTRAL_HT20_NUM_BINS];
  779. } __packed;
  780. void ath9k_tasklet(unsigned long data);
  781. int ath_cabq_update(struct ath_softc *);
  782. static inline void ath_read_cachesize(struct ath_common *common, int *csz)
  783. {
  784. common->bus_ops->read_cachesize(common, csz);
  785. }
  786. extern struct ieee80211_ops ath9k_ops;
  787. extern int ath9k_modparam_nohwcrypt;
  788. extern int led_blink;
  789. extern bool is_ath9k_unloaded;
  790. u8 ath9k_parse_mpdudensity(u8 mpdudensity);
  791. irqreturn_t ath_isr(int irq, void *dev);
  792. int ath9k_init_device(u16 devid, struct ath_softc *sc,
  793. const struct ath_bus_ops *bus_ops);
  794. void ath9k_deinit_device(struct ath_softc *sc);
  795. void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
  796. void ath9k_reload_chainmask_settings(struct ath_softc *sc);
  797. bool ath9k_uses_beacons(int type);
  798. void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw);
  799. int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
  800. enum spectral_mode spectral_mode);
  801. #ifdef CONFIG_ATH9K_PCI
  802. int ath_pci_init(void);
  803. void ath_pci_exit(void);
  804. #else
  805. static inline int ath_pci_init(void) { return 0; };
  806. static inline void ath_pci_exit(void) {};
  807. #endif
  808. #ifdef CONFIG_ATH9K_AHB
  809. int ath_ahb_init(void);
  810. void ath_ahb_exit(void);
  811. #else
  812. static inline int ath_ahb_init(void) { return 0; };
  813. static inline void ath_ahb_exit(void) {};
  814. #endif
  815. void ath9k_ps_wakeup(struct ath_softc *sc);
  816. void ath9k_ps_restore(struct ath_softc *sc);
  817. u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
  818. void ath_start_rfkill_poll(struct ath_softc *sc);
  819. extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
  820. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  821. struct ieee80211_vif *vif,
  822. struct ath9k_vif_iter_data *iter_data);
  823. #endif /* ATH9K_H */