enic_main.c 57 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343
  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if.h>
  31. #include <linux/if_ether.h>
  32. #include <linux/if_vlan.h>
  33. #include <linux/in.h>
  34. #include <linux/ip.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/tcp.h>
  37. #include <linux/rtnetlink.h>
  38. #include <linux/prefetch.h>
  39. #include <net/ip6_checksum.h>
  40. #include "cq_enet_desc.h"
  41. #include "vnic_dev.h"
  42. #include "vnic_intr.h"
  43. #include "vnic_stats.h"
  44. #include "vnic_vic.h"
  45. #include "enic_res.h"
  46. #include "enic.h"
  47. #include "enic_dev.h"
  48. #include "enic_pp.h"
  49. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  50. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  51. #define MAX_TSO (1 << 16)
  52. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  53. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  54. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  55. #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
  56. /* Supported devices */
  57. static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
  58. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  59. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  60. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
  61. { 0, } /* end of table */
  62. };
  63. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  64. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  65. MODULE_LICENSE("GPL");
  66. MODULE_VERSION(DRV_VERSION);
  67. MODULE_DEVICE_TABLE(pci, enic_id_table);
  68. int enic_is_dynamic(struct enic *enic)
  69. {
  70. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  71. }
  72. int enic_sriov_enabled(struct enic *enic)
  73. {
  74. return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
  75. }
  76. static int enic_is_sriov_vf(struct enic *enic)
  77. {
  78. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
  79. }
  80. int enic_is_valid_vf(struct enic *enic, int vf)
  81. {
  82. #ifdef CONFIG_PCI_IOV
  83. return vf >= 0 && vf < enic->num_vfs;
  84. #else
  85. return 0;
  86. #endif
  87. }
  88. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  89. {
  90. struct enic *enic = vnic_dev_priv(wq->vdev);
  91. if (buf->sop)
  92. pci_unmap_single(enic->pdev, buf->dma_addr,
  93. buf->len, PCI_DMA_TODEVICE);
  94. else
  95. pci_unmap_page(enic->pdev, buf->dma_addr,
  96. buf->len, PCI_DMA_TODEVICE);
  97. if (buf->os_buf)
  98. dev_kfree_skb_any(buf->os_buf);
  99. }
  100. static void enic_wq_free_buf(struct vnic_wq *wq,
  101. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  102. {
  103. enic_free_wq_buf(wq, buf);
  104. }
  105. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  106. u8 type, u16 q_number, u16 completed_index, void *opaque)
  107. {
  108. struct enic *enic = vnic_dev_priv(vdev);
  109. spin_lock(&enic->wq_lock[q_number]);
  110. vnic_wq_service(&enic->wq[q_number], cq_desc,
  111. completed_index, enic_wq_free_buf,
  112. opaque);
  113. if (netif_queue_stopped(enic->netdev) &&
  114. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  115. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  116. netif_wake_queue(enic->netdev);
  117. spin_unlock(&enic->wq_lock[q_number]);
  118. return 0;
  119. }
  120. static void enic_log_q_error(struct enic *enic)
  121. {
  122. unsigned int i;
  123. u32 error_status;
  124. for (i = 0; i < enic->wq_count; i++) {
  125. error_status = vnic_wq_error_status(&enic->wq[i]);
  126. if (error_status)
  127. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  128. i, error_status);
  129. }
  130. for (i = 0; i < enic->rq_count; i++) {
  131. error_status = vnic_rq_error_status(&enic->rq[i]);
  132. if (error_status)
  133. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  134. i, error_status);
  135. }
  136. }
  137. static void enic_msglvl_check(struct enic *enic)
  138. {
  139. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  140. if (msg_enable != enic->msg_enable) {
  141. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  142. enic->msg_enable, msg_enable);
  143. enic->msg_enable = msg_enable;
  144. }
  145. }
  146. static void enic_mtu_check(struct enic *enic)
  147. {
  148. u32 mtu = vnic_dev_mtu(enic->vdev);
  149. struct net_device *netdev = enic->netdev;
  150. if (mtu && mtu != enic->port_mtu) {
  151. enic->port_mtu = mtu;
  152. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  153. mtu = max_t(int, ENIC_MIN_MTU,
  154. min_t(int, ENIC_MAX_MTU, mtu));
  155. if (mtu != netdev->mtu)
  156. schedule_work(&enic->change_mtu_work);
  157. } else {
  158. if (mtu < netdev->mtu)
  159. netdev_warn(netdev,
  160. "interface MTU (%d) set higher "
  161. "than switch port MTU (%d)\n",
  162. netdev->mtu, mtu);
  163. }
  164. }
  165. }
  166. static void enic_link_check(struct enic *enic)
  167. {
  168. int link_status = vnic_dev_link_status(enic->vdev);
  169. int carrier_ok = netif_carrier_ok(enic->netdev);
  170. if (link_status && !carrier_ok) {
  171. netdev_info(enic->netdev, "Link UP\n");
  172. netif_carrier_on(enic->netdev);
  173. } else if (!link_status && carrier_ok) {
  174. netdev_info(enic->netdev, "Link DOWN\n");
  175. netif_carrier_off(enic->netdev);
  176. }
  177. }
  178. static void enic_notify_check(struct enic *enic)
  179. {
  180. enic_msglvl_check(enic);
  181. enic_mtu_check(enic);
  182. enic_link_check(enic);
  183. }
  184. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  185. static irqreturn_t enic_isr_legacy(int irq, void *data)
  186. {
  187. struct net_device *netdev = data;
  188. struct enic *enic = netdev_priv(netdev);
  189. unsigned int io_intr = enic_legacy_io_intr();
  190. unsigned int err_intr = enic_legacy_err_intr();
  191. unsigned int notify_intr = enic_legacy_notify_intr();
  192. u32 pba;
  193. vnic_intr_mask(&enic->intr[io_intr]);
  194. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  195. if (!pba) {
  196. vnic_intr_unmask(&enic->intr[io_intr]);
  197. return IRQ_NONE; /* not our interrupt */
  198. }
  199. if (ENIC_TEST_INTR(pba, notify_intr)) {
  200. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  201. enic_notify_check(enic);
  202. }
  203. if (ENIC_TEST_INTR(pba, err_intr)) {
  204. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  205. enic_log_q_error(enic);
  206. /* schedule recovery from WQ/RQ error */
  207. schedule_work(&enic->reset);
  208. return IRQ_HANDLED;
  209. }
  210. if (ENIC_TEST_INTR(pba, io_intr)) {
  211. if (napi_schedule_prep(&enic->napi[0]))
  212. __napi_schedule(&enic->napi[0]);
  213. } else {
  214. vnic_intr_unmask(&enic->intr[io_intr]);
  215. }
  216. return IRQ_HANDLED;
  217. }
  218. static irqreturn_t enic_isr_msi(int irq, void *data)
  219. {
  220. struct enic *enic = data;
  221. /* With MSI, there is no sharing of interrupts, so this is
  222. * our interrupt and there is no need to ack it. The device
  223. * is not providing per-vector masking, so the OS will not
  224. * write to PCI config space to mask/unmask the interrupt.
  225. * We're using mask_on_assertion for MSI, so the device
  226. * automatically masks the interrupt when the interrupt is
  227. * generated. Later, when exiting polling, the interrupt
  228. * will be unmasked (see enic_poll).
  229. *
  230. * Also, the device uses the same PCIe Traffic Class (TC)
  231. * for Memory Write data and MSI, so there are no ordering
  232. * issues; the MSI will always arrive at the Root Complex
  233. * _after_ corresponding Memory Writes (i.e. descriptor
  234. * writes).
  235. */
  236. napi_schedule(&enic->napi[0]);
  237. return IRQ_HANDLED;
  238. }
  239. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  240. {
  241. struct napi_struct *napi = data;
  242. /* schedule NAPI polling for RQ cleanup */
  243. napi_schedule(napi);
  244. return IRQ_HANDLED;
  245. }
  246. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  247. {
  248. struct enic *enic = data;
  249. unsigned int cq = enic_cq_wq(enic, 0);
  250. unsigned int intr = enic_msix_wq_intr(enic, 0);
  251. unsigned int wq_work_to_do = -1; /* no limit */
  252. unsigned int wq_work_done;
  253. wq_work_done = vnic_cq_service(&enic->cq[cq],
  254. wq_work_to_do, enic_wq_service, NULL);
  255. vnic_intr_return_credits(&enic->intr[intr],
  256. wq_work_done,
  257. 1 /* unmask intr */,
  258. 1 /* reset intr timer */);
  259. return IRQ_HANDLED;
  260. }
  261. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  262. {
  263. struct enic *enic = data;
  264. unsigned int intr = enic_msix_err_intr(enic);
  265. vnic_intr_return_all_credits(&enic->intr[intr]);
  266. enic_log_q_error(enic);
  267. /* schedule recovery from WQ/RQ error */
  268. schedule_work(&enic->reset);
  269. return IRQ_HANDLED;
  270. }
  271. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  272. {
  273. struct enic *enic = data;
  274. unsigned int intr = enic_msix_notify_intr(enic);
  275. vnic_intr_return_all_credits(&enic->intr[intr]);
  276. enic_notify_check(enic);
  277. return IRQ_HANDLED;
  278. }
  279. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  280. struct vnic_wq *wq, struct sk_buff *skb,
  281. unsigned int len_left, int loopback)
  282. {
  283. const skb_frag_t *frag;
  284. /* Queue additional data fragments */
  285. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  286. len_left -= skb_frag_size(frag);
  287. enic_queue_wq_desc_cont(wq, skb,
  288. skb_frag_dma_map(&enic->pdev->dev,
  289. frag, 0, skb_frag_size(frag),
  290. DMA_TO_DEVICE),
  291. skb_frag_size(frag),
  292. (len_left == 0), /* EOP? */
  293. loopback);
  294. }
  295. }
  296. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  297. struct vnic_wq *wq, struct sk_buff *skb,
  298. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  299. {
  300. unsigned int head_len = skb_headlen(skb);
  301. unsigned int len_left = skb->len - head_len;
  302. int eop = (len_left == 0);
  303. /* Queue the main skb fragment. The fragments are no larger
  304. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  305. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  306. * per fragment is queued.
  307. */
  308. enic_queue_wq_desc(wq, skb,
  309. pci_map_single(enic->pdev, skb->data,
  310. head_len, PCI_DMA_TODEVICE),
  311. head_len,
  312. vlan_tag_insert, vlan_tag,
  313. eop, loopback);
  314. if (!eop)
  315. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  316. }
  317. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  318. struct vnic_wq *wq, struct sk_buff *skb,
  319. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  320. {
  321. unsigned int head_len = skb_headlen(skb);
  322. unsigned int len_left = skb->len - head_len;
  323. unsigned int hdr_len = skb_checksum_start_offset(skb);
  324. unsigned int csum_offset = hdr_len + skb->csum_offset;
  325. int eop = (len_left == 0);
  326. /* Queue the main skb fragment. The fragments are no larger
  327. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  328. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  329. * per fragment is queued.
  330. */
  331. enic_queue_wq_desc_csum_l4(wq, skb,
  332. pci_map_single(enic->pdev, skb->data,
  333. head_len, PCI_DMA_TODEVICE),
  334. head_len,
  335. csum_offset,
  336. hdr_len,
  337. vlan_tag_insert, vlan_tag,
  338. eop, loopback);
  339. if (!eop)
  340. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  341. }
  342. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  343. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  344. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  345. {
  346. unsigned int frag_len_left = skb_headlen(skb);
  347. unsigned int len_left = skb->len - frag_len_left;
  348. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  349. int eop = (len_left == 0);
  350. unsigned int len;
  351. dma_addr_t dma_addr;
  352. unsigned int offset = 0;
  353. skb_frag_t *frag;
  354. /* Preload TCP csum field with IP pseudo hdr calculated
  355. * with IP length set to zero. HW will later add in length
  356. * to each TCP segment resulting from the TSO.
  357. */
  358. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  359. ip_hdr(skb)->check = 0;
  360. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  361. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  362. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  363. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  364. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  365. }
  366. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  367. * for the main skb fragment
  368. */
  369. while (frag_len_left) {
  370. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  371. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  372. len, PCI_DMA_TODEVICE);
  373. enic_queue_wq_desc_tso(wq, skb,
  374. dma_addr,
  375. len,
  376. mss, hdr_len,
  377. vlan_tag_insert, vlan_tag,
  378. eop && (len == frag_len_left), loopback);
  379. frag_len_left -= len;
  380. offset += len;
  381. }
  382. if (eop)
  383. return;
  384. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  385. * for additional data fragments
  386. */
  387. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  388. len_left -= skb_frag_size(frag);
  389. frag_len_left = skb_frag_size(frag);
  390. offset = 0;
  391. while (frag_len_left) {
  392. len = min(frag_len_left,
  393. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  394. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
  395. offset, len,
  396. DMA_TO_DEVICE);
  397. enic_queue_wq_desc_cont(wq, skb,
  398. dma_addr,
  399. len,
  400. (len_left == 0) &&
  401. (len == frag_len_left), /* EOP? */
  402. loopback);
  403. frag_len_left -= len;
  404. offset += len;
  405. }
  406. }
  407. }
  408. static inline void enic_queue_wq_skb(struct enic *enic,
  409. struct vnic_wq *wq, struct sk_buff *skb)
  410. {
  411. unsigned int mss = skb_shinfo(skb)->gso_size;
  412. unsigned int vlan_tag = 0;
  413. int vlan_tag_insert = 0;
  414. int loopback = 0;
  415. if (vlan_tx_tag_present(skb)) {
  416. /* VLAN tag from trunking driver */
  417. vlan_tag_insert = 1;
  418. vlan_tag = vlan_tx_tag_get(skb);
  419. } else if (enic->loop_enable) {
  420. vlan_tag = enic->loop_tag;
  421. loopback = 1;
  422. }
  423. if (mss)
  424. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  425. vlan_tag_insert, vlan_tag, loopback);
  426. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  427. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  428. vlan_tag_insert, vlan_tag, loopback);
  429. else
  430. enic_queue_wq_skb_vlan(enic, wq, skb,
  431. vlan_tag_insert, vlan_tag, loopback);
  432. }
  433. /* netif_tx_lock held, process context with BHs disabled, or BH */
  434. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  435. struct net_device *netdev)
  436. {
  437. struct enic *enic = netdev_priv(netdev);
  438. struct vnic_wq *wq = &enic->wq[0];
  439. unsigned long flags;
  440. if (skb->len <= 0) {
  441. dev_kfree_skb(skb);
  442. return NETDEV_TX_OK;
  443. }
  444. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  445. * which is very likely. In the off chance it's going to take
  446. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  447. */
  448. if (skb_shinfo(skb)->gso_size == 0 &&
  449. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  450. skb_linearize(skb)) {
  451. dev_kfree_skb(skb);
  452. return NETDEV_TX_OK;
  453. }
  454. spin_lock_irqsave(&enic->wq_lock[0], flags);
  455. if (vnic_wq_desc_avail(wq) <
  456. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  457. netif_stop_queue(netdev);
  458. /* This is a hard error, log it */
  459. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  460. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  461. return NETDEV_TX_BUSY;
  462. }
  463. enic_queue_wq_skb(enic, wq, skb);
  464. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  465. netif_stop_queue(netdev);
  466. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  467. return NETDEV_TX_OK;
  468. }
  469. /* dev_base_lock rwlock held, nominally process context */
  470. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  471. struct rtnl_link_stats64 *net_stats)
  472. {
  473. struct enic *enic = netdev_priv(netdev);
  474. struct vnic_stats *stats;
  475. enic_dev_stats_dump(enic, &stats);
  476. net_stats->tx_packets = stats->tx.tx_frames_ok;
  477. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  478. net_stats->tx_errors = stats->tx.tx_errors;
  479. net_stats->tx_dropped = stats->tx.tx_drops;
  480. net_stats->rx_packets = stats->rx.rx_frames_ok;
  481. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  482. net_stats->rx_errors = stats->rx.rx_errors;
  483. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  484. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  485. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  486. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  487. return net_stats;
  488. }
  489. void enic_reset_addr_lists(struct enic *enic)
  490. {
  491. enic->mc_count = 0;
  492. enic->uc_count = 0;
  493. enic->flags = 0;
  494. }
  495. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  496. {
  497. struct enic *enic = netdev_priv(netdev);
  498. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  499. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  500. return -EADDRNOTAVAIL;
  501. } else {
  502. if (!is_valid_ether_addr(addr))
  503. return -EADDRNOTAVAIL;
  504. }
  505. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  506. return 0;
  507. }
  508. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  509. {
  510. struct enic *enic = netdev_priv(netdev);
  511. struct sockaddr *saddr = p;
  512. char *addr = saddr->sa_data;
  513. int err;
  514. if (netif_running(enic->netdev)) {
  515. err = enic_dev_del_station_addr(enic);
  516. if (err)
  517. return err;
  518. }
  519. err = enic_set_mac_addr(netdev, addr);
  520. if (err)
  521. return err;
  522. if (netif_running(enic->netdev)) {
  523. err = enic_dev_add_station_addr(enic);
  524. if (err)
  525. return err;
  526. }
  527. return err;
  528. }
  529. static int enic_set_mac_address(struct net_device *netdev, void *p)
  530. {
  531. struct sockaddr *saddr = p;
  532. char *addr = saddr->sa_data;
  533. struct enic *enic = netdev_priv(netdev);
  534. int err;
  535. err = enic_dev_del_station_addr(enic);
  536. if (err)
  537. return err;
  538. err = enic_set_mac_addr(netdev, addr);
  539. if (err)
  540. return err;
  541. return enic_dev_add_station_addr(enic);
  542. }
  543. static void enic_update_multicast_addr_list(struct enic *enic)
  544. {
  545. struct net_device *netdev = enic->netdev;
  546. struct netdev_hw_addr *ha;
  547. unsigned int mc_count = netdev_mc_count(netdev);
  548. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  549. unsigned int i, j;
  550. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
  551. netdev_warn(netdev, "Registering only %d out of %d "
  552. "multicast addresses\n",
  553. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  554. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  555. }
  556. /* Is there an easier way? Trying to minimize to
  557. * calls to add/del multicast addrs. We keep the
  558. * addrs from the last call in enic->mc_addr and
  559. * look for changes to add/del.
  560. */
  561. i = 0;
  562. netdev_for_each_mc_addr(ha, netdev) {
  563. if (i == mc_count)
  564. break;
  565. memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
  566. }
  567. for (i = 0; i < enic->mc_count; i++) {
  568. for (j = 0; j < mc_count; j++)
  569. if (ether_addr_equal(enic->mc_addr[i], mc_addr[j]))
  570. break;
  571. if (j == mc_count)
  572. enic_dev_del_addr(enic, enic->mc_addr[i]);
  573. }
  574. for (i = 0; i < mc_count; i++) {
  575. for (j = 0; j < enic->mc_count; j++)
  576. if (ether_addr_equal(mc_addr[i], enic->mc_addr[j]))
  577. break;
  578. if (j == enic->mc_count)
  579. enic_dev_add_addr(enic, mc_addr[i]);
  580. }
  581. /* Save the list to compare against next time
  582. */
  583. for (i = 0; i < mc_count; i++)
  584. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  585. enic->mc_count = mc_count;
  586. }
  587. static void enic_update_unicast_addr_list(struct enic *enic)
  588. {
  589. struct net_device *netdev = enic->netdev;
  590. struct netdev_hw_addr *ha;
  591. unsigned int uc_count = netdev_uc_count(netdev);
  592. u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
  593. unsigned int i, j;
  594. if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
  595. netdev_warn(netdev, "Registering only %d out of %d "
  596. "unicast addresses\n",
  597. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  598. uc_count = ENIC_UNICAST_PERFECT_FILTERS;
  599. }
  600. /* Is there an easier way? Trying to minimize to
  601. * calls to add/del unicast addrs. We keep the
  602. * addrs from the last call in enic->uc_addr and
  603. * look for changes to add/del.
  604. */
  605. i = 0;
  606. netdev_for_each_uc_addr(ha, netdev) {
  607. if (i == uc_count)
  608. break;
  609. memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
  610. }
  611. for (i = 0; i < enic->uc_count; i++) {
  612. for (j = 0; j < uc_count; j++)
  613. if (ether_addr_equal(enic->uc_addr[i], uc_addr[j]))
  614. break;
  615. if (j == uc_count)
  616. enic_dev_del_addr(enic, enic->uc_addr[i]);
  617. }
  618. for (i = 0; i < uc_count; i++) {
  619. for (j = 0; j < enic->uc_count; j++)
  620. if (ether_addr_equal(uc_addr[i], enic->uc_addr[j]))
  621. break;
  622. if (j == enic->uc_count)
  623. enic_dev_add_addr(enic, uc_addr[i]);
  624. }
  625. /* Save the list to compare against next time
  626. */
  627. for (i = 0; i < uc_count; i++)
  628. memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
  629. enic->uc_count = uc_count;
  630. }
  631. /* netif_tx_lock held, BHs disabled */
  632. static void enic_set_rx_mode(struct net_device *netdev)
  633. {
  634. struct enic *enic = netdev_priv(netdev);
  635. int directed = 1;
  636. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  637. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  638. int promisc = (netdev->flags & IFF_PROMISC) ||
  639. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  640. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  641. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  642. unsigned int flags = netdev->flags |
  643. (allmulti ? IFF_ALLMULTI : 0) |
  644. (promisc ? IFF_PROMISC : 0);
  645. if (enic->flags != flags) {
  646. enic->flags = flags;
  647. enic_dev_packet_filter(enic, directed,
  648. multicast, broadcast, promisc, allmulti);
  649. }
  650. if (!promisc) {
  651. enic_update_unicast_addr_list(enic);
  652. if (!allmulti)
  653. enic_update_multicast_addr_list(enic);
  654. }
  655. }
  656. /* netif_tx_lock held, BHs disabled */
  657. static void enic_tx_timeout(struct net_device *netdev)
  658. {
  659. struct enic *enic = netdev_priv(netdev);
  660. schedule_work(&enic->reset);
  661. }
  662. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  663. {
  664. struct enic *enic = netdev_priv(netdev);
  665. struct enic_port_profile *pp;
  666. int err;
  667. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  668. if (err)
  669. return err;
  670. if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
  671. if (vf == PORT_SELF_VF) {
  672. memcpy(pp->vf_mac, mac, ETH_ALEN);
  673. return 0;
  674. } else {
  675. /*
  676. * For sriov vf's set the mac in hw
  677. */
  678. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  679. vnic_dev_set_mac_addr, mac);
  680. return enic_dev_status_to_errno(err);
  681. }
  682. } else
  683. return -EINVAL;
  684. }
  685. static int enic_set_vf_port(struct net_device *netdev, int vf,
  686. struct nlattr *port[])
  687. {
  688. struct enic *enic = netdev_priv(netdev);
  689. struct enic_port_profile prev_pp;
  690. struct enic_port_profile *pp;
  691. int err = 0, restore_pp = 1;
  692. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  693. if (err)
  694. return err;
  695. if (!port[IFLA_PORT_REQUEST])
  696. return -EOPNOTSUPP;
  697. memcpy(&prev_pp, pp, sizeof(*enic->pp));
  698. memset(pp, 0, sizeof(*enic->pp));
  699. pp->set |= ENIC_SET_REQUEST;
  700. pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  701. if (port[IFLA_PORT_PROFILE]) {
  702. pp->set |= ENIC_SET_NAME;
  703. memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
  704. PORT_PROFILE_MAX);
  705. }
  706. if (port[IFLA_PORT_INSTANCE_UUID]) {
  707. pp->set |= ENIC_SET_INSTANCE;
  708. memcpy(pp->instance_uuid,
  709. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  710. }
  711. if (port[IFLA_PORT_HOST_UUID]) {
  712. pp->set |= ENIC_SET_HOST;
  713. memcpy(pp->host_uuid,
  714. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  715. }
  716. if (vf == PORT_SELF_VF) {
  717. /* Special case handling: mac came from IFLA_VF_MAC */
  718. if (!is_zero_ether_addr(prev_pp.vf_mac))
  719. memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
  720. if (is_zero_ether_addr(netdev->dev_addr))
  721. eth_hw_addr_random(netdev);
  722. } else {
  723. /* SR-IOV VF: get mac from adapter */
  724. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  725. vnic_dev_get_mac_addr, pp->mac_addr);
  726. if (err) {
  727. netdev_err(netdev, "Error getting mac for vf %d\n", vf);
  728. memcpy(pp, &prev_pp, sizeof(*pp));
  729. return enic_dev_status_to_errno(err);
  730. }
  731. }
  732. err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
  733. if (err) {
  734. if (restore_pp) {
  735. /* Things are still the way they were: Implicit
  736. * DISASSOCIATE failed
  737. */
  738. memcpy(pp, &prev_pp, sizeof(*pp));
  739. } else {
  740. memset(pp, 0, sizeof(*pp));
  741. if (vf == PORT_SELF_VF)
  742. memset(netdev->dev_addr, 0, ETH_ALEN);
  743. }
  744. } else {
  745. /* Set flag to indicate that the port assoc/disassoc
  746. * request has been sent out to fw
  747. */
  748. pp->set |= ENIC_PORT_REQUEST_APPLIED;
  749. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  750. if (pp->request == PORT_REQUEST_DISASSOCIATE) {
  751. memset(pp->mac_addr, 0, ETH_ALEN);
  752. if (vf == PORT_SELF_VF)
  753. memset(netdev->dev_addr, 0, ETH_ALEN);
  754. }
  755. }
  756. if (vf == PORT_SELF_VF)
  757. memset(pp->vf_mac, 0, ETH_ALEN);
  758. return err;
  759. }
  760. static int enic_get_vf_port(struct net_device *netdev, int vf,
  761. struct sk_buff *skb)
  762. {
  763. struct enic *enic = netdev_priv(netdev);
  764. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  765. struct enic_port_profile *pp;
  766. int err;
  767. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  768. if (err)
  769. return err;
  770. if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
  771. return -ENODATA;
  772. err = enic_process_get_pp_request(enic, vf, pp->request, &response);
  773. if (err)
  774. return err;
  775. if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
  776. nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
  777. ((pp->set & ENIC_SET_NAME) &&
  778. nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
  779. ((pp->set & ENIC_SET_INSTANCE) &&
  780. nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  781. pp->instance_uuid)) ||
  782. ((pp->set & ENIC_SET_HOST) &&
  783. nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
  784. goto nla_put_failure;
  785. return 0;
  786. nla_put_failure:
  787. return -EMSGSIZE;
  788. }
  789. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  790. {
  791. struct enic *enic = vnic_dev_priv(rq->vdev);
  792. if (!buf->os_buf)
  793. return;
  794. pci_unmap_single(enic->pdev, buf->dma_addr,
  795. buf->len, PCI_DMA_FROMDEVICE);
  796. dev_kfree_skb_any(buf->os_buf);
  797. }
  798. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  799. {
  800. struct enic *enic = vnic_dev_priv(rq->vdev);
  801. struct net_device *netdev = enic->netdev;
  802. struct sk_buff *skb;
  803. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  804. unsigned int os_buf_index = 0;
  805. dma_addr_t dma_addr;
  806. skb = netdev_alloc_skb_ip_align(netdev, len);
  807. if (!skb)
  808. return -ENOMEM;
  809. dma_addr = pci_map_single(enic->pdev, skb->data,
  810. len, PCI_DMA_FROMDEVICE);
  811. enic_queue_rq_desc(rq, skb, os_buf_index,
  812. dma_addr, len);
  813. return 0;
  814. }
  815. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  816. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  817. int skipped, void *opaque)
  818. {
  819. struct enic *enic = vnic_dev_priv(rq->vdev);
  820. struct net_device *netdev = enic->netdev;
  821. struct sk_buff *skb;
  822. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  823. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  824. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  825. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  826. u8 packet_error;
  827. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  828. u32 rss_hash;
  829. if (skipped)
  830. return;
  831. skb = buf->os_buf;
  832. prefetch(skb->data - NET_IP_ALIGN);
  833. pci_unmap_single(enic->pdev, buf->dma_addr,
  834. buf->len, PCI_DMA_FROMDEVICE);
  835. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  836. &type, &color, &q_number, &completed_index,
  837. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  838. &csum_not_calc, &rss_hash, &bytes_written,
  839. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  840. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  841. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  842. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  843. &fcs_ok);
  844. if (packet_error) {
  845. if (!fcs_ok) {
  846. if (bytes_written > 0)
  847. enic->rq_bad_fcs++;
  848. else if (bytes_written == 0)
  849. enic->rq_truncated_pkts++;
  850. }
  851. dev_kfree_skb_any(skb);
  852. return;
  853. }
  854. if (eop && bytes_written > 0) {
  855. /* Good receive
  856. */
  857. skb_put(skb, bytes_written);
  858. skb->protocol = eth_type_trans(skb, netdev);
  859. if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
  860. skb->csum = htons(checksum);
  861. skb->ip_summed = CHECKSUM_COMPLETE;
  862. }
  863. if (vlan_stripped)
  864. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
  865. if (netdev->features & NETIF_F_GRO)
  866. napi_gro_receive(&enic->napi[q_number], skb);
  867. else
  868. netif_receive_skb(skb);
  869. } else {
  870. /* Buffer overflow
  871. */
  872. dev_kfree_skb_any(skb);
  873. }
  874. }
  875. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  876. u8 type, u16 q_number, u16 completed_index, void *opaque)
  877. {
  878. struct enic *enic = vnic_dev_priv(vdev);
  879. vnic_rq_service(&enic->rq[q_number], cq_desc,
  880. completed_index, VNIC_RQ_RETURN_DESC,
  881. enic_rq_indicate_buf, opaque);
  882. return 0;
  883. }
  884. static int enic_poll(struct napi_struct *napi, int budget)
  885. {
  886. struct net_device *netdev = napi->dev;
  887. struct enic *enic = netdev_priv(netdev);
  888. unsigned int cq_rq = enic_cq_rq(enic, 0);
  889. unsigned int cq_wq = enic_cq_wq(enic, 0);
  890. unsigned int intr = enic_legacy_io_intr();
  891. unsigned int rq_work_to_do = budget;
  892. unsigned int wq_work_to_do = -1; /* no limit */
  893. unsigned int work_done, rq_work_done, wq_work_done;
  894. int err;
  895. /* Service RQ (first) and WQ
  896. */
  897. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  898. rq_work_to_do, enic_rq_service, NULL);
  899. wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
  900. wq_work_to_do, enic_wq_service, NULL);
  901. /* Accumulate intr event credits for this polling
  902. * cycle. An intr event is the completion of a
  903. * a WQ or RQ packet.
  904. */
  905. work_done = rq_work_done + wq_work_done;
  906. if (work_done > 0)
  907. vnic_intr_return_credits(&enic->intr[intr],
  908. work_done,
  909. 0 /* don't unmask intr */,
  910. 0 /* don't reset intr timer */);
  911. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  912. /* Buffer allocation failed. Stay in polling
  913. * mode so we can try to fill the ring again.
  914. */
  915. if (err)
  916. rq_work_done = rq_work_to_do;
  917. if (rq_work_done < rq_work_to_do) {
  918. /* Some work done, but not enough to stay in polling,
  919. * exit polling
  920. */
  921. napi_complete(napi);
  922. vnic_intr_unmask(&enic->intr[intr]);
  923. }
  924. return rq_work_done;
  925. }
  926. static int enic_poll_msix(struct napi_struct *napi, int budget)
  927. {
  928. struct net_device *netdev = napi->dev;
  929. struct enic *enic = netdev_priv(netdev);
  930. unsigned int rq = (napi - &enic->napi[0]);
  931. unsigned int cq = enic_cq_rq(enic, rq);
  932. unsigned int intr = enic_msix_rq_intr(enic, rq);
  933. unsigned int work_to_do = budget;
  934. unsigned int work_done;
  935. int err;
  936. /* Service RQ
  937. */
  938. work_done = vnic_cq_service(&enic->cq[cq],
  939. work_to_do, enic_rq_service, NULL);
  940. /* Return intr event credits for this polling
  941. * cycle. An intr event is the completion of a
  942. * RQ packet.
  943. */
  944. if (work_done > 0)
  945. vnic_intr_return_credits(&enic->intr[intr],
  946. work_done,
  947. 0 /* don't unmask intr */,
  948. 0 /* don't reset intr timer */);
  949. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  950. /* Buffer allocation failed. Stay in polling mode
  951. * so we can try to fill the ring again.
  952. */
  953. if (err)
  954. work_done = work_to_do;
  955. if (work_done < work_to_do) {
  956. /* Some work done, but not enough to stay in polling,
  957. * exit polling
  958. */
  959. napi_complete(napi);
  960. vnic_intr_unmask(&enic->intr[intr]);
  961. }
  962. return work_done;
  963. }
  964. static void enic_notify_timer(unsigned long data)
  965. {
  966. struct enic *enic = (struct enic *)data;
  967. enic_notify_check(enic);
  968. mod_timer(&enic->notify_timer,
  969. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  970. }
  971. static void enic_free_intr(struct enic *enic)
  972. {
  973. struct net_device *netdev = enic->netdev;
  974. unsigned int i;
  975. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  976. case VNIC_DEV_INTR_MODE_INTX:
  977. free_irq(enic->pdev->irq, netdev);
  978. break;
  979. case VNIC_DEV_INTR_MODE_MSI:
  980. free_irq(enic->pdev->irq, enic);
  981. break;
  982. case VNIC_DEV_INTR_MODE_MSIX:
  983. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  984. if (enic->msix[i].requested)
  985. free_irq(enic->msix_entry[i].vector,
  986. enic->msix[i].devid);
  987. break;
  988. default:
  989. break;
  990. }
  991. }
  992. static int enic_request_intr(struct enic *enic)
  993. {
  994. struct net_device *netdev = enic->netdev;
  995. unsigned int i, intr;
  996. int err = 0;
  997. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  998. case VNIC_DEV_INTR_MODE_INTX:
  999. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1000. IRQF_SHARED, netdev->name, netdev);
  1001. break;
  1002. case VNIC_DEV_INTR_MODE_MSI:
  1003. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1004. 0, netdev->name, enic);
  1005. break;
  1006. case VNIC_DEV_INTR_MODE_MSIX:
  1007. for (i = 0; i < enic->rq_count; i++) {
  1008. intr = enic_msix_rq_intr(enic, i);
  1009. snprintf(enic->msix[intr].devname,
  1010. sizeof(enic->msix[intr].devname),
  1011. "%.11s-rx-%d", netdev->name, i);
  1012. enic->msix[intr].isr = enic_isr_msix_rq;
  1013. enic->msix[intr].devid = &enic->napi[i];
  1014. }
  1015. for (i = 0; i < enic->wq_count; i++) {
  1016. intr = enic_msix_wq_intr(enic, i);
  1017. snprintf(enic->msix[intr].devname,
  1018. sizeof(enic->msix[intr].devname),
  1019. "%.11s-tx-%d", netdev->name, i);
  1020. enic->msix[intr].isr = enic_isr_msix_wq;
  1021. enic->msix[intr].devid = enic;
  1022. }
  1023. intr = enic_msix_err_intr(enic);
  1024. snprintf(enic->msix[intr].devname,
  1025. sizeof(enic->msix[intr].devname),
  1026. "%.11s-err", netdev->name);
  1027. enic->msix[intr].isr = enic_isr_msix_err;
  1028. enic->msix[intr].devid = enic;
  1029. intr = enic_msix_notify_intr(enic);
  1030. snprintf(enic->msix[intr].devname,
  1031. sizeof(enic->msix[intr].devname),
  1032. "%.11s-notify", netdev->name);
  1033. enic->msix[intr].isr = enic_isr_msix_notify;
  1034. enic->msix[intr].devid = enic;
  1035. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1036. enic->msix[i].requested = 0;
  1037. for (i = 0; i < enic->intr_count; i++) {
  1038. err = request_irq(enic->msix_entry[i].vector,
  1039. enic->msix[i].isr, 0,
  1040. enic->msix[i].devname,
  1041. enic->msix[i].devid);
  1042. if (err) {
  1043. enic_free_intr(enic);
  1044. break;
  1045. }
  1046. enic->msix[i].requested = 1;
  1047. }
  1048. break;
  1049. default:
  1050. break;
  1051. }
  1052. return err;
  1053. }
  1054. static void enic_synchronize_irqs(struct enic *enic)
  1055. {
  1056. unsigned int i;
  1057. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1058. case VNIC_DEV_INTR_MODE_INTX:
  1059. case VNIC_DEV_INTR_MODE_MSI:
  1060. synchronize_irq(enic->pdev->irq);
  1061. break;
  1062. case VNIC_DEV_INTR_MODE_MSIX:
  1063. for (i = 0; i < enic->intr_count; i++)
  1064. synchronize_irq(enic->msix_entry[i].vector);
  1065. break;
  1066. default:
  1067. break;
  1068. }
  1069. }
  1070. static int enic_dev_notify_set(struct enic *enic)
  1071. {
  1072. int err;
  1073. spin_lock(&enic->devcmd_lock);
  1074. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1075. case VNIC_DEV_INTR_MODE_INTX:
  1076. err = vnic_dev_notify_set(enic->vdev,
  1077. enic_legacy_notify_intr());
  1078. break;
  1079. case VNIC_DEV_INTR_MODE_MSIX:
  1080. err = vnic_dev_notify_set(enic->vdev,
  1081. enic_msix_notify_intr(enic));
  1082. break;
  1083. default:
  1084. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1085. break;
  1086. }
  1087. spin_unlock(&enic->devcmd_lock);
  1088. return err;
  1089. }
  1090. static void enic_notify_timer_start(struct enic *enic)
  1091. {
  1092. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1093. case VNIC_DEV_INTR_MODE_MSI:
  1094. mod_timer(&enic->notify_timer, jiffies);
  1095. break;
  1096. default:
  1097. /* Using intr for notification for INTx/MSI-X */
  1098. break;
  1099. }
  1100. }
  1101. /* rtnl lock is held, process context */
  1102. static int enic_open(struct net_device *netdev)
  1103. {
  1104. struct enic *enic = netdev_priv(netdev);
  1105. unsigned int i;
  1106. int err;
  1107. err = enic_request_intr(enic);
  1108. if (err) {
  1109. netdev_err(netdev, "Unable to request irq.\n");
  1110. return err;
  1111. }
  1112. err = enic_dev_notify_set(enic);
  1113. if (err) {
  1114. netdev_err(netdev,
  1115. "Failed to alloc notify buffer, aborting.\n");
  1116. goto err_out_free_intr;
  1117. }
  1118. for (i = 0; i < enic->rq_count; i++) {
  1119. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1120. /* Need at least one buffer on ring to get going */
  1121. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1122. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1123. err = -ENOMEM;
  1124. goto err_out_notify_unset;
  1125. }
  1126. }
  1127. for (i = 0; i < enic->wq_count; i++)
  1128. vnic_wq_enable(&enic->wq[i]);
  1129. for (i = 0; i < enic->rq_count; i++)
  1130. vnic_rq_enable(&enic->rq[i]);
  1131. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1132. enic_dev_add_station_addr(enic);
  1133. enic_set_rx_mode(netdev);
  1134. netif_wake_queue(netdev);
  1135. for (i = 0; i < enic->rq_count; i++)
  1136. napi_enable(&enic->napi[i]);
  1137. enic_dev_enable(enic);
  1138. for (i = 0; i < enic->intr_count; i++)
  1139. vnic_intr_unmask(&enic->intr[i]);
  1140. enic_notify_timer_start(enic);
  1141. return 0;
  1142. err_out_notify_unset:
  1143. enic_dev_notify_unset(enic);
  1144. err_out_free_intr:
  1145. enic_free_intr(enic);
  1146. return err;
  1147. }
  1148. /* rtnl lock is held, process context */
  1149. static int enic_stop(struct net_device *netdev)
  1150. {
  1151. struct enic *enic = netdev_priv(netdev);
  1152. unsigned int i;
  1153. int err;
  1154. for (i = 0; i < enic->intr_count; i++) {
  1155. vnic_intr_mask(&enic->intr[i]);
  1156. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1157. }
  1158. enic_synchronize_irqs(enic);
  1159. del_timer_sync(&enic->notify_timer);
  1160. enic_dev_disable(enic);
  1161. for (i = 0; i < enic->rq_count; i++)
  1162. napi_disable(&enic->napi[i]);
  1163. netif_carrier_off(netdev);
  1164. netif_tx_disable(netdev);
  1165. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1166. enic_dev_del_station_addr(enic);
  1167. for (i = 0; i < enic->wq_count; i++) {
  1168. err = vnic_wq_disable(&enic->wq[i]);
  1169. if (err)
  1170. return err;
  1171. }
  1172. for (i = 0; i < enic->rq_count; i++) {
  1173. err = vnic_rq_disable(&enic->rq[i]);
  1174. if (err)
  1175. return err;
  1176. }
  1177. enic_dev_notify_unset(enic);
  1178. enic_free_intr(enic);
  1179. for (i = 0; i < enic->wq_count; i++)
  1180. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1181. for (i = 0; i < enic->rq_count; i++)
  1182. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1183. for (i = 0; i < enic->cq_count; i++)
  1184. vnic_cq_clean(&enic->cq[i]);
  1185. for (i = 0; i < enic->intr_count; i++)
  1186. vnic_intr_clean(&enic->intr[i]);
  1187. return 0;
  1188. }
  1189. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1190. {
  1191. struct enic *enic = netdev_priv(netdev);
  1192. int running = netif_running(netdev);
  1193. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1194. return -EINVAL;
  1195. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1196. return -EOPNOTSUPP;
  1197. if (running)
  1198. enic_stop(netdev);
  1199. netdev->mtu = new_mtu;
  1200. if (netdev->mtu > enic->port_mtu)
  1201. netdev_warn(netdev,
  1202. "interface MTU (%d) set higher than port MTU (%d)\n",
  1203. netdev->mtu, enic->port_mtu);
  1204. if (running)
  1205. enic_open(netdev);
  1206. return 0;
  1207. }
  1208. static void enic_change_mtu_work(struct work_struct *work)
  1209. {
  1210. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1211. struct net_device *netdev = enic->netdev;
  1212. int new_mtu = vnic_dev_mtu(enic->vdev);
  1213. int err;
  1214. unsigned int i;
  1215. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1216. rtnl_lock();
  1217. /* Stop RQ */
  1218. del_timer_sync(&enic->notify_timer);
  1219. for (i = 0; i < enic->rq_count; i++)
  1220. napi_disable(&enic->napi[i]);
  1221. vnic_intr_mask(&enic->intr[0]);
  1222. enic_synchronize_irqs(enic);
  1223. err = vnic_rq_disable(&enic->rq[0]);
  1224. if (err) {
  1225. rtnl_unlock();
  1226. netdev_err(netdev, "Unable to disable RQ.\n");
  1227. return;
  1228. }
  1229. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1230. vnic_cq_clean(&enic->cq[0]);
  1231. vnic_intr_clean(&enic->intr[0]);
  1232. /* Fill RQ with new_mtu-sized buffers */
  1233. netdev->mtu = new_mtu;
  1234. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1235. /* Need at least one buffer on ring to get going */
  1236. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1237. rtnl_unlock();
  1238. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1239. return;
  1240. }
  1241. /* Start RQ */
  1242. vnic_rq_enable(&enic->rq[0]);
  1243. napi_enable(&enic->napi[0]);
  1244. vnic_intr_unmask(&enic->intr[0]);
  1245. enic_notify_timer_start(enic);
  1246. rtnl_unlock();
  1247. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1248. }
  1249. #ifdef CONFIG_NET_POLL_CONTROLLER
  1250. static void enic_poll_controller(struct net_device *netdev)
  1251. {
  1252. struct enic *enic = netdev_priv(netdev);
  1253. struct vnic_dev *vdev = enic->vdev;
  1254. unsigned int i, intr;
  1255. switch (vnic_dev_get_intr_mode(vdev)) {
  1256. case VNIC_DEV_INTR_MODE_MSIX:
  1257. for (i = 0; i < enic->rq_count; i++) {
  1258. intr = enic_msix_rq_intr(enic, i);
  1259. enic_isr_msix_rq(enic->msix_entry[intr].vector,
  1260. &enic->napi[i]);
  1261. }
  1262. for (i = 0; i < enic->wq_count; i++) {
  1263. intr = enic_msix_wq_intr(enic, i);
  1264. enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
  1265. }
  1266. break;
  1267. case VNIC_DEV_INTR_MODE_MSI:
  1268. enic_isr_msi(enic->pdev->irq, enic);
  1269. break;
  1270. case VNIC_DEV_INTR_MODE_INTX:
  1271. enic_isr_legacy(enic->pdev->irq, netdev);
  1272. break;
  1273. default:
  1274. break;
  1275. }
  1276. }
  1277. #endif
  1278. static int enic_dev_wait(struct vnic_dev *vdev,
  1279. int (*start)(struct vnic_dev *, int),
  1280. int (*finished)(struct vnic_dev *, int *),
  1281. int arg)
  1282. {
  1283. unsigned long time;
  1284. int done;
  1285. int err;
  1286. BUG_ON(in_interrupt());
  1287. err = start(vdev, arg);
  1288. if (err)
  1289. return err;
  1290. /* Wait for func to complete...2 seconds max
  1291. */
  1292. time = jiffies + (HZ * 2);
  1293. do {
  1294. err = finished(vdev, &done);
  1295. if (err)
  1296. return err;
  1297. if (done)
  1298. return 0;
  1299. schedule_timeout_uninterruptible(HZ / 10);
  1300. } while (time_after(time, jiffies));
  1301. return -ETIMEDOUT;
  1302. }
  1303. static int enic_dev_open(struct enic *enic)
  1304. {
  1305. int err;
  1306. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1307. vnic_dev_open_done, 0);
  1308. if (err)
  1309. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1310. err);
  1311. return err;
  1312. }
  1313. static int enic_dev_hang_reset(struct enic *enic)
  1314. {
  1315. int err;
  1316. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1317. vnic_dev_hang_reset_done, 0);
  1318. if (err)
  1319. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1320. err);
  1321. return err;
  1322. }
  1323. static int enic_set_rsskey(struct enic *enic)
  1324. {
  1325. dma_addr_t rss_key_buf_pa;
  1326. union vnic_rss_key *rss_key_buf_va = NULL;
  1327. union vnic_rss_key rss_key = {
  1328. .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
  1329. .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
  1330. .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
  1331. .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
  1332. };
  1333. int err;
  1334. rss_key_buf_va = pci_alloc_consistent(enic->pdev,
  1335. sizeof(union vnic_rss_key), &rss_key_buf_pa);
  1336. if (!rss_key_buf_va)
  1337. return -ENOMEM;
  1338. memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
  1339. spin_lock(&enic->devcmd_lock);
  1340. err = enic_set_rss_key(enic,
  1341. rss_key_buf_pa,
  1342. sizeof(union vnic_rss_key));
  1343. spin_unlock(&enic->devcmd_lock);
  1344. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1345. rss_key_buf_va, rss_key_buf_pa);
  1346. return err;
  1347. }
  1348. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1349. {
  1350. dma_addr_t rss_cpu_buf_pa;
  1351. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1352. unsigned int i;
  1353. int err;
  1354. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1355. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1356. if (!rss_cpu_buf_va)
  1357. return -ENOMEM;
  1358. for (i = 0; i < (1 << rss_hash_bits); i++)
  1359. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1360. spin_lock(&enic->devcmd_lock);
  1361. err = enic_set_rss_cpu(enic,
  1362. rss_cpu_buf_pa,
  1363. sizeof(union vnic_rss_cpu));
  1364. spin_unlock(&enic->devcmd_lock);
  1365. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1366. rss_cpu_buf_va, rss_cpu_buf_pa);
  1367. return err;
  1368. }
  1369. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1370. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1371. {
  1372. const u8 tso_ipid_split_en = 0;
  1373. const u8 ig_vlan_strip_en = 1;
  1374. int err;
  1375. /* Enable VLAN tag stripping.
  1376. */
  1377. spin_lock(&enic->devcmd_lock);
  1378. err = enic_set_nic_cfg(enic,
  1379. rss_default_cpu, rss_hash_type,
  1380. rss_hash_bits, rss_base_cpu,
  1381. rss_enable, tso_ipid_split_en,
  1382. ig_vlan_strip_en);
  1383. spin_unlock(&enic->devcmd_lock);
  1384. return err;
  1385. }
  1386. static int enic_set_rss_nic_cfg(struct enic *enic)
  1387. {
  1388. struct device *dev = enic_get_dev(enic);
  1389. const u8 rss_default_cpu = 0;
  1390. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1391. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1392. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1393. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1394. const u8 rss_hash_bits = 7;
  1395. const u8 rss_base_cpu = 0;
  1396. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1397. if (rss_enable) {
  1398. if (!enic_set_rsskey(enic)) {
  1399. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1400. rss_enable = 0;
  1401. dev_warn(dev, "RSS disabled, "
  1402. "Failed to set RSS cpu indirection table.");
  1403. }
  1404. } else {
  1405. rss_enable = 0;
  1406. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1407. }
  1408. }
  1409. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1410. rss_hash_bits, rss_base_cpu, rss_enable);
  1411. }
  1412. static void enic_reset(struct work_struct *work)
  1413. {
  1414. struct enic *enic = container_of(work, struct enic, reset);
  1415. if (!netif_running(enic->netdev))
  1416. return;
  1417. rtnl_lock();
  1418. spin_lock(&enic->enic_api_lock);
  1419. enic_dev_hang_notify(enic);
  1420. enic_stop(enic->netdev);
  1421. enic_dev_hang_reset(enic);
  1422. enic_reset_addr_lists(enic);
  1423. enic_init_vnic_resources(enic);
  1424. enic_set_rss_nic_cfg(enic);
  1425. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1426. enic_open(enic->netdev);
  1427. spin_unlock(&enic->enic_api_lock);
  1428. call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
  1429. rtnl_unlock();
  1430. }
  1431. static int enic_set_intr_mode(struct enic *enic)
  1432. {
  1433. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1434. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1435. unsigned int i;
  1436. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1437. * on system capabilities.
  1438. *
  1439. * Try MSI-X first
  1440. *
  1441. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1442. * (the second to last INTR is used for WQ/RQ errors)
  1443. * (the last INTR is used for notifications)
  1444. */
  1445. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1446. for (i = 0; i < n + m + 2; i++)
  1447. enic->msix_entry[i].entry = i;
  1448. /* Use multiple RQs if RSS is enabled
  1449. */
  1450. if (ENIC_SETTING(enic, RSS) &&
  1451. enic->config.intr_mode < 1 &&
  1452. enic->rq_count >= n &&
  1453. enic->wq_count >= m &&
  1454. enic->cq_count >= n + m &&
  1455. enic->intr_count >= n + m + 2) {
  1456. if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1457. enic->rq_count = n;
  1458. enic->wq_count = m;
  1459. enic->cq_count = n + m;
  1460. enic->intr_count = n + m + 2;
  1461. vnic_dev_set_intr_mode(enic->vdev,
  1462. VNIC_DEV_INTR_MODE_MSIX);
  1463. return 0;
  1464. }
  1465. }
  1466. if (enic->config.intr_mode < 1 &&
  1467. enic->rq_count >= 1 &&
  1468. enic->wq_count >= m &&
  1469. enic->cq_count >= 1 + m &&
  1470. enic->intr_count >= 1 + m + 2) {
  1471. if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
  1472. enic->rq_count = 1;
  1473. enic->wq_count = m;
  1474. enic->cq_count = 1 + m;
  1475. enic->intr_count = 1 + m + 2;
  1476. vnic_dev_set_intr_mode(enic->vdev,
  1477. VNIC_DEV_INTR_MODE_MSIX);
  1478. return 0;
  1479. }
  1480. }
  1481. /* Next try MSI
  1482. *
  1483. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1484. */
  1485. if (enic->config.intr_mode < 2 &&
  1486. enic->rq_count >= 1 &&
  1487. enic->wq_count >= 1 &&
  1488. enic->cq_count >= 2 &&
  1489. enic->intr_count >= 1 &&
  1490. !pci_enable_msi(enic->pdev)) {
  1491. enic->rq_count = 1;
  1492. enic->wq_count = 1;
  1493. enic->cq_count = 2;
  1494. enic->intr_count = 1;
  1495. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1496. return 0;
  1497. }
  1498. /* Next try INTx
  1499. *
  1500. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1501. * (the first INTR is used for WQ/RQ)
  1502. * (the second INTR is used for WQ/RQ errors)
  1503. * (the last INTR is used for notifications)
  1504. */
  1505. if (enic->config.intr_mode < 3 &&
  1506. enic->rq_count >= 1 &&
  1507. enic->wq_count >= 1 &&
  1508. enic->cq_count >= 2 &&
  1509. enic->intr_count >= 3) {
  1510. enic->rq_count = 1;
  1511. enic->wq_count = 1;
  1512. enic->cq_count = 2;
  1513. enic->intr_count = 3;
  1514. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1515. return 0;
  1516. }
  1517. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1518. return -EINVAL;
  1519. }
  1520. static void enic_clear_intr_mode(struct enic *enic)
  1521. {
  1522. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1523. case VNIC_DEV_INTR_MODE_MSIX:
  1524. pci_disable_msix(enic->pdev);
  1525. break;
  1526. case VNIC_DEV_INTR_MODE_MSI:
  1527. pci_disable_msi(enic->pdev);
  1528. break;
  1529. default:
  1530. break;
  1531. }
  1532. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1533. }
  1534. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1535. .ndo_open = enic_open,
  1536. .ndo_stop = enic_stop,
  1537. .ndo_start_xmit = enic_hard_start_xmit,
  1538. .ndo_get_stats64 = enic_get_stats,
  1539. .ndo_validate_addr = eth_validate_addr,
  1540. .ndo_set_rx_mode = enic_set_rx_mode,
  1541. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1542. .ndo_change_mtu = enic_change_mtu,
  1543. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1544. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1545. .ndo_tx_timeout = enic_tx_timeout,
  1546. .ndo_set_vf_port = enic_set_vf_port,
  1547. .ndo_get_vf_port = enic_get_vf_port,
  1548. .ndo_set_vf_mac = enic_set_vf_mac,
  1549. #ifdef CONFIG_NET_POLL_CONTROLLER
  1550. .ndo_poll_controller = enic_poll_controller,
  1551. #endif
  1552. };
  1553. static const struct net_device_ops enic_netdev_ops = {
  1554. .ndo_open = enic_open,
  1555. .ndo_stop = enic_stop,
  1556. .ndo_start_xmit = enic_hard_start_xmit,
  1557. .ndo_get_stats64 = enic_get_stats,
  1558. .ndo_validate_addr = eth_validate_addr,
  1559. .ndo_set_mac_address = enic_set_mac_address,
  1560. .ndo_set_rx_mode = enic_set_rx_mode,
  1561. .ndo_change_mtu = enic_change_mtu,
  1562. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1563. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1564. .ndo_tx_timeout = enic_tx_timeout,
  1565. .ndo_set_vf_port = enic_set_vf_port,
  1566. .ndo_get_vf_port = enic_get_vf_port,
  1567. .ndo_set_vf_mac = enic_set_vf_mac,
  1568. #ifdef CONFIG_NET_POLL_CONTROLLER
  1569. .ndo_poll_controller = enic_poll_controller,
  1570. #endif
  1571. };
  1572. static void enic_dev_deinit(struct enic *enic)
  1573. {
  1574. unsigned int i;
  1575. for (i = 0; i < enic->rq_count; i++)
  1576. netif_napi_del(&enic->napi[i]);
  1577. enic_free_vnic_resources(enic);
  1578. enic_clear_intr_mode(enic);
  1579. }
  1580. static int enic_dev_init(struct enic *enic)
  1581. {
  1582. struct device *dev = enic_get_dev(enic);
  1583. struct net_device *netdev = enic->netdev;
  1584. unsigned int i;
  1585. int err;
  1586. /* Get interrupt coalesce timer info */
  1587. err = enic_dev_intr_coal_timer_info(enic);
  1588. if (err) {
  1589. dev_warn(dev, "Using default conversion factor for "
  1590. "interrupt coalesce timer\n");
  1591. vnic_dev_intr_coal_timer_info_default(enic->vdev);
  1592. }
  1593. /* Get vNIC configuration
  1594. */
  1595. err = enic_get_vnic_config(enic);
  1596. if (err) {
  1597. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1598. return err;
  1599. }
  1600. /* Get available resource counts
  1601. */
  1602. enic_get_res_counts(enic);
  1603. /* Set interrupt mode based on resource counts and system
  1604. * capabilities
  1605. */
  1606. err = enic_set_intr_mode(enic);
  1607. if (err) {
  1608. dev_err(dev, "Failed to set intr mode based on resource "
  1609. "counts and system capabilities, aborting\n");
  1610. return err;
  1611. }
  1612. /* Allocate and configure vNIC resources
  1613. */
  1614. err = enic_alloc_vnic_resources(enic);
  1615. if (err) {
  1616. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1617. goto err_out_free_vnic_resources;
  1618. }
  1619. enic_init_vnic_resources(enic);
  1620. err = enic_set_rss_nic_cfg(enic);
  1621. if (err) {
  1622. dev_err(dev, "Failed to config nic, aborting\n");
  1623. goto err_out_free_vnic_resources;
  1624. }
  1625. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1626. default:
  1627. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1628. break;
  1629. case VNIC_DEV_INTR_MODE_MSIX:
  1630. for (i = 0; i < enic->rq_count; i++)
  1631. netif_napi_add(netdev, &enic->napi[i],
  1632. enic_poll_msix, 64);
  1633. break;
  1634. }
  1635. return 0;
  1636. err_out_free_vnic_resources:
  1637. enic_clear_intr_mode(enic);
  1638. enic_free_vnic_resources(enic);
  1639. return err;
  1640. }
  1641. static void enic_iounmap(struct enic *enic)
  1642. {
  1643. unsigned int i;
  1644. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1645. if (enic->bar[i].vaddr)
  1646. iounmap(enic->bar[i].vaddr);
  1647. }
  1648. static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1649. {
  1650. struct device *dev = &pdev->dev;
  1651. struct net_device *netdev;
  1652. struct enic *enic;
  1653. int using_dac = 0;
  1654. unsigned int i;
  1655. int err;
  1656. #ifdef CONFIG_PCI_IOV
  1657. int pos = 0;
  1658. #endif
  1659. int num_pps = 1;
  1660. /* Allocate net device structure and initialize. Private
  1661. * instance data is initialized to zero.
  1662. */
  1663. netdev = alloc_etherdev(sizeof(struct enic));
  1664. if (!netdev)
  1665. return -ENOMEM;
  1666. pci_set_drvdata(pdev, netdev);
  1667. SET_NETDEV_DEV(netdev, &pdev->dev);
  1668. enic = netdev_priv(netdev);
  1669. enic->netdev = netdev;
  1670. enic->pdev = pdev;
  1671. /* Setup PCI resources
  1672. */
  1673. err = pci_enable_device_mem(pdev);
  1674. if (err) {
  1675. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1676. goto err_out_free_netdev;
  1677. }
  1678. err = pci_request_regions(pdev, DRV_NAME);
  1679. if (err) {
  1680. dev_err(dev, "Cannot request PCI regions, aborting\n");
  1681. goto err_out_disable_device;
  1682. }
  1683. pci_set_master(pdev);
  1684. /* Query PCI controller on system for DMA addressing
  1685. * limitation for the device. Try 40-bit first, and
  1686. * fail to 32-bit.
  1687. */
  1688. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1689. if (err) {
  1690. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1691. if (err) {
  1692. dev_err(dev, "No usable DMA configuration, aborting\n");
  1693. goto err_out_release_regions;
  1694. }
  1695. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1696. if (err) {
  1697. dev_err(dev, "Unable to obtain %u-bit DMA "
  1698. "for consistent allocations, aborting\n", 32);
  1699. goto err_out_release_regions;
  1700. }
  1701. } else {
  1702. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1703. if (err) {
  1704. dev_err(dev, "Unable to obtain %u-bit DMA "
  1705. "for consistent allocations, aborting\n", 40);
  1706. goto err_out_release_regions;
  1707. }
  1708. using_dac = 1;
  1709. }
  1710. /* Map vNIC resources from BAR0-5
  1711. */
  1712. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1713. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1714. continue;
  1715. enic->bar[i].len = pci_resource_len(pdev, i);
  1716. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1717. if (!enic->bar[i].vaddr) {
  1718. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  1719. err = -ENODEV;
  1720. goto err_out_iounmap;
  1721. }
  1722. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1723. }
  1724. /* Register vNIC device
  1725. */
  1726. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1727. ARRAY_SIZE(enic->bar));
  1728. if (!enic->vdev) {
  1729. dev_err(dev, "vNIC registration failed, aborting\n");
  1730. err = -ENODEV;
  1731. goto err_out_iounmap;
  1732. }
  1733. #ifdef CONFIG_PCI_IOV
  1734. /* Get number of subvnics */
  1735. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  1736. if (pos) {
  1737. pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
  1738. &enic->num_vfs);
  1739. if (enic->num_vfs) {
  1740. err = pci_enable_sriov(pdev, enic->num_vfs);
  1741. if (err) {
  1742. dev_err(dev, "SRIOV enable failed, aborting."
  1743. " pci_enable_sriov() returned %d\n",
  1744. err);
  1745. goto err_out_vnic_unregister;
  1746. }
  1747. enic->priv_flags |= ENIC_SRIOV_ENABLED;
  1748. num_pps = enic->num_vfs;
  1749. }
  1750. }
  1751. #endif
  1752. /* Allocate structure for port profiles */
  1753. enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
  1754. if (!enic->pp) {
  1755. err = -ENOMEM;
  1756. goto err_out_disable_sriov_pp;
  1757. }
  1758. /* Issue device open to get device in known state
  1759. */
  1760. err = enic_dev_open(enic);
  1761. if (err) {
  1762. dev_err(dev, "vNIC dev open failed, aborting\n");
  1763. goto err_out_disable_sriov;
  1764. }
  1765. /* Setup devcmd lock
  1766. */
  1767. spin_lock_init(&enic->devcmd_lock);
  1768. spin_lock_init(&enic->enic_api_lock);
  1769. /*
  1770. * Set ingress vlan rewrite mode before vnic initialization
  1771. */
  1772. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  1773. if (err) {
  1774. dev_err(dev,
  1775. "Failed to set ingress vlan rewrite mode, aborting.\n");
  1776. goto err_out_dev_close;
  1777. }
  1778. /* Issue device init to initialize the vnic-to-switch link.
  1779. * We'll start with carrier off and wait for link UP
  1780. * notification later to turn on carrier. We don't need
  1781. * to wait here for the vnic-to-switch link initialization
  1782. * to complete; link UP notification is the indication that
  1783. * the process is complete.
  1784. */
  1785. netif_carrier_off(netdev);
  1786. /* Do not call dev_init for a dynamic vnic.
  1787. * For a dynamic vnic, init_prov_info will be
  1788. * called later by an upper layer.
  1789. */
  1790. if (!enic_is_dynamic(enic)) {
  1791. err = vnic_dev_init(enic->vdev, 0);
  1792. if (err) {
  1793. dev_err(dev, "vNIC dev init failed, aborting\n");
  1794. goto err_out_dev_close;
  1795. }
  1796. }
  1797. err = enic_dev_init(enic);
  1798. if (err) {
  1799. dev_err(dev, "Device initialization failed, aborting\n");
  1800. goto err_out_dev_close;
  1801. }
  1802. /* Setup notification timer, HW reset task, and wq locks
  1803. */
  1804. init_timer(&enic->notify_timer);
  1805. enic->notify_timer.function = enic_notify_timer;
  1806. enic->notify_timer.data = (unsigned long)enic;
  1807. INIT_WORK(&enic->reset, enic_reset);
  1808. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  1809. for (i = 0; i < enic->wq_count; i++)
  1810. spin_lock_init(&enic->wq_lock[i]);
  1811. /* Register net device
  1812. */
  1813. enic->port_mtu = enic->config.mtu;
  1814. (void)enic_change_mtu(netdev, enic->port_mtu);
  1815. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1816. if (err) {
  1817. dev_err(dev, "Invalid MAC address, aborting\n");
  1818. goto err_out_dev_deinit;
  1819. }
  1820. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  1821. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  1822. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1823. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  1824. else
  1825. netdev->netdev_ops = &enic_netdev_ops;
  1826. netdev->watchdog_timeo = 2 * HZ;
  1827. enic_set_ethtool_ops(netdev);
  1828. netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  1829. if (ENIC_SETTING(enic, LOOP)) {
  1830. netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  1831. enic->loop_enable = 1;
  1832. enic->loop_tag = enic->config.loop_tag;
  1833. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  1834. }
  1835. if (ENIC_SETTING(enic, TXCSUM))
  1836. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  1837. if (ENIC_SETTING(enic, TSO))
  1838. netdev->hw_features |= NETIF_F_TSO |
  1839. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  1840. if (ENIC_SETTING(enic, RXCSUM))
  1841. netdev->hw_features |= NETIF_F_RXCSUM;
  1842. netdev->features |= netdev->hw_features;
  1843. if (using_dac)
  1844. netdev->features |= NETIF_F_HIGHDMA;
  1845. netdev->priv_flags |= IFF_UNICAST_FLT;
  1846. err = register_netdev(netdev);
  1847. if (err) {
  1848. dev_err(dev, "Cannot register net device, aborting\n");
  1849. goto err_out_dev_deinit;
  1850. }
  1851. return 0;
  1852. err_out_dev_deinit:
  1853. enic_dev_deinit(enic);
  1854. err_out_dev_close:
  1855. vnic_dev_close(enic->vdev);
  1856. err_out_disable_sriov:
  1857. kfree(enic->pp);
  1858. err_out_disable_sriov_pp:
  1859. #ifdef CONFIG_PCI_IOV
  1860. if (enic_sriov_enabled(enic)) {
  1861. pci_disable_sriov(pdev);
  1862. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  1863. }
  1864. err_out_vnic_unregister:
  1865. #endif
  1866. vnic_dev_unregister(enic->vdev);
  1867. err_out_iounmap:
  1868. enic_iounmap(enic);
  1869. err_out_release_regions:
  1870. pci_release_regions(pdev);
  1871. err_out_disable_device:
  1872. pci_disable_device(pdev);
  1873. err_out_free_netdev:
  1874. pci_set_drvdata(pdev, NULL);
  1875. free_netdev(netdev);
  1876. return err;
  1877. }
  1878. static void enic_remove(struct pci_dev *pdev)
  1879. {
  1880. struct net_device *netdev = pci_get_drvdata(pdev);
  1881. if (netdev) {
  1882. struct enic *enic = netdev_priv(netdev);
  1883. cancel_work_sync(&enic->reset);
  1884. cancel_work_sync(&enic->change_mtu_work);
  1885. unregister_netdev(netdev);
  1886. enic_dev_deinit(enic);
  1887. vnic_dev_close(enic->vdev);
  1888. #ifdef CONFIG_PCI_IOV
  1889. if (enic_sriov_enabled(enic)) {
  1890. pci_disable_sriov(pdev);
  1891. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  1892. }
  1893. #endif
  1894. kfree(enic->pp);
  1895. vnic_dev_unregister(enic->vdev);
  1896. enic_iounmap(enic);
  1897. pci_release_regions(pdev);
  1898. pci_disable_device(pdev);
  1899. pci_set_drvdata(pdev, NULL);
  1900. free_netdev(netdev);
  1901. }
  1902. }
  1903. static struct pci_driver enic_driver = {
  1904. .name = DRV_NAME,
  1905. .id_table = enic_id_table,
  1906. .probe = enic_probe,
  1907. .remove = enic_remove,
  1908. };
  1909. static int __init enic_init_module(void)
  1910. {
  1911. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  1912. return pci_register_driver(&enic_driver);
  1913. }
  1914. static void __exit enic_cleanup_module(void)
  1915. {
  1916. pci_unregister_driver(&enic_driver);
  1917. }
  1918. module_init(enic_init_module);
  1919. module_exit(enic_cleanup_module);