setup.c 33 KB

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  1. /*
  2. * arch/blackfin/kernel/setup.c
  3. *
  4. * Copyright 2004-2006 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/console.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/seq_file.h>
  14. #include <linux/cpu.h>
  15. #include <linux/module.h>
  16. #include <linux/tty.h>
  17. #include <linux/pfn.h>
  18. #include <linux/ext2_fs.h>
  19. #include <linux/cramfs_fs.h>
  20. #include <linux/romfs_fs.h>
  21. #include <asm/cplb.h>
  22. #include <asm/cacheflush.h>
  23. #include <asm/blackfin.h>
  24. #include <asm/cplbinit.h>
  25. #include <asm/div64.h>
  26. #include <asm/cpu.h>
  27. #include <asm/fixed_code.h>
  28. #include <asm/early_printk.h>
  29. u16 _bfin_swrst;
  30. EXPORT_SYMBOL(_bfin_swrst);
  31. unsigned long memory_start, memory_end, physical_mem_end;
  32. unsigned long _rambase, _ramstart, _ramend;
  33. unsigned long reserved_mem_dcache_on;
  34. unsigned long reserved_mem_icache_on;
  35. EXPORT_SYMBOL(memory_start);
  36. EXPORT_SYMBOL(memory_end);
  37. EXPORT_SYMBOL(physical_mem_end);
  38. EXPORT_SYMBOL(_ramend);
  39. EXPORT_SYMBOL(reserved_mem_dcache_on);
  40. #ifdef CONFIG_MTD_UCLINUX
  41. unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  42. unsigned long _ebss;
  43. EXPORT_SYMBOL(memory_mtd_end);
  44. EXPORT_SYMBOL(memory_mtd_start);
  45. EXPORT_SYMBOL(mtd_size);
  46. #endif
  47. char __initdata command_line[COMMAND_LINE_SIZE];
  48. void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  49. *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  50. /* boot memmap, for parsing "memmap=" */
  51. #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
  52. #define BFIN_MEMMAP_RAM 1
  53. #define BFIN_MEMMAP_RESERVED 2
  54. struct bfin_memmap {
  55. int nr_map;
  56. struct bfin_memmap_entry {
  57. unsigned long long addr; /* start of memory segment */
  58. unsigned long long size;
  59. unsigned long type;
  60. } map[BFIN_MEMMAP_MAX];
  61. } bfin_memmap __initdata;
  62. /* for memmap sanitization */
  63. struct change_member {
  64. struct bfin_memmap_entry *pentry; /* pointer to original entry */
  65. unsigned long long addr; /* address for this change point */
  66. };
  67. static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  68. static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  69. static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  70. static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  71. DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  72. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  73. void __init generate_cplb_tables(void)
  74. {
  75. unsigned int cpu;
  76. /* Generate per-CPU I&D CPLB tables */
  77. for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  78. generate_cplb_tables_cpu(cpu);
  79. }
  80. #endif
  81. void __cpuinit bfin_setup_caches(unsigned int cpu)
  82. {
  83. #ifdef CONFIG_BFIN_ICACHE
  84. #ifdef CONFIG_MPU
  85. bfin_icache_init(icplb_tbl[cpu]);
  86. #else
  87. bfin_icache_init(icplb_tables[cpu]);
  88. #endif
  89. #endif
  90. #ifdef CONFIG_BFIN_DCACHE
  91. #ifdef CONFIG_MPU
  92. bfin_dcache_init(dcplb_tbl[cpu]);
  93. #else
  94. bfin_dcache_init(dcplb_tables[cpu]);
  95. #endif
  96. #endif
  97. /*
  98. * In cache coherence emulation mode, we need to have the
  99. * D-cache enabled before running any atomic operation which
  100. * might invove cache invalidation (i.e. spinlock, rwlock).
  101. * So printk's are deferred until then.
  102. */
  103. #ifdef CONFIG_BFIN_ICACHE
  104. printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
  105. #endif
  106. #ifdef CONFIG_BFIN_DCACHE
  107. printk(KERN_INFO "Data Cache Enabled for CPU%u"
  108. # if defined CONFIG_BFIN_WB
  109. " (write-back)"
  110. # elif defined CONFIG_BFIN_WT
  111. " (write-through)"
  112. # endif
  113. "\n", cpu);
  114. #endif
  115. }
  116. void __cpuinit bfin_setup_cpudata(unsigned int cpu)
  117. {
  118. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
  119. cpudata->idle = current;
  120. cpudata->loops_per_jiffy = loops_per_jiffy;
  121. cpudata->cclk = get_cclk();
  122. cpudata->imemctl = bfin_read_IMEM_CONTROL();
  123. cpudata->dmemctl = bfin_read_DMEM_CONTROL();
  124. }
  125. void __init bfin_cache_init(void)
  126. {
  127. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  128. generate_cplb_tables();
  129. #endif
  130. bfin_setup_caches(0);
  131. }
  132. void __init bfin_relocate_l1_mem(void)
  133. {
  134. unsigned long l1_code_length;
  135. unsigned long l1_data_a_length;
  136. unsigned long l1_data_b_length;
  137. unsigned long l2_length;
  138. l1_code_length = _etext_l1 - _stext_l1;
  139. if (l1_code_length > L1_CODE_LENGTH)
  140. panic("L1 Instruction SRAM Overflow\n");
  141. /* cannot complain as printk is not available as yet.
  142. * But we can continue booting and complain later!
  143. */
  144. /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
  145. dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
  146. l1_data_a_length = _sbss_l1 - _sdata_l1;
  147. if (l1_data_a_length > L1_DATA_A_LENGTH)
  148. panic("L1 Data SRAM Bank A Overflow\n");
  149. /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
  150. dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
  151. l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
  152. if (l1_data_b_length > L1_DATA_B_LENGTH)
  153. panic("L1 Data SRAM Bank B Overflow\n");
  154. /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
  155. dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
  156. l1_data_a_length, l1_data_b_length);
  157. if (L2_LENGTH != 0) {
  158. l2_length = _sbss_l2 - _stext_l2;
  159. if (l2_length > L2_LENGTH)
  160. panic("L2 SRAM Overflow\n");
  161. /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
  162. dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
  163. }
  164. }
  165. /* add_memory_region to memmap */
  166. static void __init add_memory_region(unsigned long long start,
  167. unsigned long long size, int type)
  168. {
  169. int i;
  170. i = bfin_memmap.nr_map;
  171. if (i == BFIN_MEMMAP_MAX) {
  172. printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
  173. return;
  174. }
  175. bfin_memmap.map[i].addr = start;
  176. bfin_memmap.map[i].size = size;
  177. bfin_memmap.map[i].type = type;
  178. bfin_memmap.nr_map++;
  179. }
  180. /*
  181. * Sanitize the boot memmap, removing overlaps.
  182. */
  183. static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
  184. {
  185. struct change_member *change_tmp;
  186. unsigned long current_type, last_type;
  187. unsigned long long last_addr;
  188. int chgidx, still_changing;
  189. int overlap_entries;
  190. int new_entry;
  191. int old_nr, new_nr, chg_nr;
  192. int i;
  193. /*
  194. Visually we're performing the following (1,2,3,4 = memory types)
  195. Sample memory map (w/overlaps):
  196. ____22__________________
  197. ______________________4_
  198. ____1111________________
  199. _44_____________________
  200. 11111111________________
  201. ____________________33__
  202. ___________44___________
  203. __________33333_________
  204. ______________22________
  205. ___________________2222_
  206. _________111111111______
  207. _____________________11_
  208. _________________4______
  209. Sanitized equivalent (no overlap):
  210. 1_______________________
  211. _44_____________________
  212. ___1____________________
  213. ____22__________________
  214. ______11________________
  215. _________1______________
  216. __________3_____________
  217. ___________44___________
  218. _____________33_________
  219. _______________2________
  220. ________________1_______
  221. _________________4______
  222. ___________________2____
  223. ____________________33__
  224. ______________________4_
  225. */
  226. /* if there's only one memory region, don't bother */
  227. if (*pnr_map < 2)
  228. return -1;
  229. old_nr = *pnr_map;
  230. /* bail out if we find any unreasonable addresses in memmap */
  231. for (i = 0; i < old_nr; i++)
  232. if (map[i].addr + map[i].size < map[i].addr)
  233. return -1;
  234. /* create pointers for initial change-point information (for sorting) */
  235. for (i = 0; i < 2*old_nr; i++)
  236. change_point[i] = &change_point_list[i];
  237. /* record all known change-points (starting and ending addresses),
  238. omitting those that are for empty memory regions */
  239. chgidx = 0;
  240. for (i = 0; i < old_nr; i++) {
  241. if (map[i].size != 0) {
  242. change_point[chgidx]->addr = map[i].addr;
  243. change_point[chgidx++]->pentry = &map[i];
  244. change_point[chgidx]->addr = map[i].addr + map[i].size;
  245. change_point[chgidx++]->pentry = &map[i];
  246. }
  247. }
  248. chg_nr = chgidx; /* true number of change-points */
  249. /* sort change-point list by memory addresses (low -> high) */
  250. still_changing = 1;
  251. while (still_changing) {
  252. still_changing = 0;
  253. for (i = 1; i < chg_nr; i++) {
  254. /* if <current_addr> > <last_addr>, swap */
  255. /* or, if current=<start_addr> & last=<end_addr>, swap */
  256. if ((change_point[i]->addr < change_point[i-1]->addr) ||
  257. ((change_point[i]->addr == change_point[i-1]->addr) &&
  258. (change_point[i]->addr == change_point[i]->pentry->addr) &&
  259. (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
  260. ) {
  261. change_tmp = change_point[i];
  262. change_point[i] = change_point[i-1];
  263. change_point[i-1] = change_tmp;
  264. still_changing = 1;
  265. }
  266. }
  267. }
  268. /* create a new memmap, removing overlaps */
  269. overlap_entries = 0; /* number of entries in the overlap table */
  270. new_entry = 0; /* index for creating new memmap entries */
  271. last_type = 0; /* start with undefined memory type */
  272. last_addr = 0; /* start with 0 as last starting address */
  273. /* loop through change-points, determining affect on the new memmap */
  274. for (chgidx = 0; chgidx < chg_nr; chgidx++) {
  275. /* keep track of all overlapping memmap entries */
  276. if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
  277. /* add map entry to overlap list (> 1 entry implies an overlap) */
  278. overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
  279. } else {
  280. /* remove entry from list (order independent, so swap with last) */
  281. for (i = 0; i < overlap_entries; i++) {
  282. if (overlap_list[i] == change_point[chgidx]->pentry)
  283. overlap_list[i] = overlap_list[overlap_entries-1];
  284. }
  285. overlap_entries--;
  286. }
  287. /* if there are overlapping entries, decide which "type" to use */
  288. /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
  289. current_type = 0;
  290. for (i = 0; i < overlap_entries; i++)
  291. if (overlap_list[i]->type > current_type)
  292. current_type = overlap_list[i]->type;
  293. /* continue building up new memmap based on this information */
  294. if (current_type != last_type) {
  295. if (last_type != 0) {
  296. new_map[new_entry].size =
  297. change_point[chgidx]->addr - last_addr;
  298. /* move forward only if the new size was non-zero */
  299. if (new_map[new_entry].size != 0)
  300. if (++new_entry >= BFIN_MEMMAP_MAX)
  301. break; /* no more space left for new entries */
  302. }
  303. if (current_type != 0) {
  304. new_map[new_entry].addr = change_point[chgidx]->addr;
  305. new_map[new_entry].type = current_type;
  306. last_addr = change_point[chgidx]->addr;
  307. }
  308. last_type = current_type;
  309. }
  310. }
  311. new_nr = new_entry; /* retain count for new entries */
  312. /* copy new mapping into original location */
  313. memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
  314. *pnr_map = new_nr;
  315. return 0;
  316. }
  317. static void __init print_memory_map(char *who)
  318. {
  319. int i;
  320. for (i = 0; i < bfin_memmap.nr_map; i++) {
  321. printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
  322. bfin_memmap.map[i].addr,
  323. bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
  324. switch (bfin_memmap.map[i].type) {
  325. case BFIN_MEMMAP_RAM:
  326. printk("(usable)\n");
  327. break;
  328. case BFIN_MEMMAP_RESERVED:
  329. printk("(reserved)\n");
  330. break;
  331. default: printk("type %lu\n", bfin_memmap.map[i].type);
  332. break;
  333. }
  334. }
  335. }
  336. static __init int parse_memmap(char *arg)
  337. {
  338. unsigned long long start_at, mem_size;
  339. if (!arg)
  340. return -EINVAL;
  341. mem_size = memparse(arg, &arg);
  342. if (*arg == '@') {
  343. start_at = memparse(arg+1, &arg);
  344. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
  345. } else if (*arg == '$') {
  346. start_at = memparse(arg+1, &arg);
  347. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
  348. }
  349. return 0;
  350. }
  351. /*
  352. * Initial parsing of the command line. Currently, we support:
  353. * - Controlling the linux memory size: mem=xxx[KMG]
  354. * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
  355. * $ -> reserved memory is dcacheable
  356. * # -> reserved memory is icacheable
  357. * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
  358. * @ from <start> to <start>+<mem>, type RAM
  359. * $ from <start> to <start>+<mem>, type RESERVED
  360. */
  361. static __init void parse_cmdline_early(char *cmdline_p)
  362. {
  363. char c = ' ', *to = cmdline_p;
  364. unsigned int memsize;
  365. for (;;) {
  366. if (c == ' ') {
  367. if (!memcmp(to, "mem=", 4)) {
  368. to += 4;
  369. memsize = memparse(to, &to);
  370. if (memsize)
  371. _ramend = memsize;
  372. } else if (!memcmp(to, "max_mem=", 8)) {
  373. to += 8;
  374. memsize = memparse(to, &to);
  375. if (memsize) {
  376. physical_mem_end = memsize;
  377. if (*to != ' ') {
  378. if (*to == '$'
  379. || *(to + 1) == '$')
  380. reserved_mem_dcache_on = 1;
  381. if (*to == '#'
  382. || *(to + 1) == '#')
  383. reserved_mem_icache_on = 1;
  384. }
  385. }
  386. } else if (!memcmp(to, "earlyprintk=", 12)) {
  387. to += 12;
  388. setup_early_printk(to);
  389. } else if (!memcmp(to, "memmap=", 7)) {
  390. to += 7;
  391. parse_memmap(to);
  392. }
  393. }
  394. c = *(to++);
  395. if (!c)
  396. break;
  397. }
  398. }
  399. /*
  400. * Setup memory defaults from user config.
  401. * The physical memory layout looks like:
  402. *
  403. * [_rambase, _ramstart]: kernel image
  404. * [memory_start, memory_end]: dynamic memory managed by kernel
  405. * [memory_end, _ramend]: reserved memory
  406. * [memory_mtd_start(memory_end),
  407. * memory_mtd_start + mtd_size]: rootfs (if any)
  408. * [_ramend - DMA_UNCACHED_REGION,
  409. * _ramend]: uncached DMA region
  410. * [_ramend, physical_mem_end]: memory not managed by kernel
  411. */
  412. static __init void memory_setup(void)
  413. {
  414. #ifdef CONFIG_MTD_UCLINUX
  415. unsigned long mtd_phys = 0;
  416. #endif
  417. _rambase = (unsigned long)_stext;
  418. _ramstart = (unsigned long)_end;
  419. if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
  420. console_init();
  421. panic("DMA region exceeds memory limit: %lu.\n",
  422. _ramend - _ramstart);
  423. }
  424. memory_end = _ramend - DMA_UNCACHED_REGION;
  425. #ifdef CONFIG_MPU
  426. /* Round up to multiple of 4MB */
  427. memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
  428. #else
  429. memory_start = PAGE_ALIGN(_ramstart);
  430. #endif
  431. #if defined(CONFIG_MTD_UCLINUX)
  432. /* generic memory mapped MTD driver */
  433. memory_mtd_end = memory_end;
  434. mtd_phys = _ramstart;
  435. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
  436. # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
  437. if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
  438. mtd_size =
  439. PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
  440. # endif
  441. # if defined(CONFIG_CRAMFS)
  442. if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
  443. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
  444. # endif
  445. # if defined(CONFIG_ROMFS_FS)
  446. if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
  447. && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
  448. mtd_size =
  449. PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
  450. # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  451. /* Due to a Hardware Anomaly we need to limit the size of usable
  452. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  453. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  454. */
  455. # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  456. if (memory_end >= 56 * 1024 * 1024)
  457. memory_end = 56 * 1024 * 1024;
  458. # else
  459. if (memory_end >= 60 * 1024 * 1024)
  460. memory_end = 60 * 1024 * 1024;
  461. # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  462. # endif /* ANOMALY_05000263 */
  463. # endif /* CONFIG_ROMFS_FS */
  464. memory_end -= mtd_size;
  465. if (mtd_size == 0) {
  466. console_init();
  467. panic("Don't boot kernel without rootfs attached.\n");
  468. }
  469. /* Relocate MTD image to the top of memory after the uncached memory area */
  470. dma_memcpy((char *)memory_end, _end, mtd_size);
  471. memory_mtd_start = memory_end;
  472. _ebss = memory_mtd_start; /* define _ebss for compatible */
  473. #endif /* CONFIG_MTD_UCLINUX */
  474. #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  475. /* Due to a Hardware Anomaly we need to limit the size of usable
  476. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  477. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  478. */
  479. #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  480. if (memory_end >= 56 * 1024 * 1024)
  481. memory_end = 56 * 1024 * 1024;
  482. #else
  483. if (memory_end >= 60 * 1024 * 1024)
  484. memory_end = 60 * 1024 * 1024;
  485. #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  486. printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
  487. #endif /* ANOMALY_05000263 */
  488. #ifdef CONFIG_MPU
  489. page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
  490. page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
  491. #endif
  492. #if !defined(CONFIG_MTD_UCLINUX)
  493. /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
  494. memory_end -= SIZE_4K;
  495. #endif
  496. init_mm.start_code = (unsigned long)_stext;
  497. init_mm.end_code = (unsigned long)_etext;
  498. init_mm.end_data = (unsigned long)_edata;
  499. init_mm.brk = (unsigned long)0;
  500. printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
  501. printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
  502. printk(KERN_INFO "Memory map:\n"
  503. KERN_INFO " fixedcode = 0x%p-0x%p\n"
  504. KERN_INFO " text = 0x%p-0x%p\n"
  505. KERN_INFO " rodata = 0x%p-0x%p\n"
  506. KERN_INFO " bss = 0x%p-0x%p\n"
  507. KERN_INFO " data = 0x%p-0x%p\n"
  508. KERN_INFO " stack = 0x%p-0x%p\n"
  509. KERN_INFO " init = 0x%p-0x%p\n"
  510. KERN_INFO " available = 0x%p-0x%p\n"
  511. #ifdef CONFIG_MTD_UCLINUX
  512. KERN_INFO " rootfs = 0x%p-0x%p\n"
  513. #endif
  514. #if DMA_UNCACHED_REGION > 0
  515. KERN_INFO " DMA Zone = 0x%p-0x%p\n"
  516. #endif
  517. , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
  518. _stext, _etext,
  519. __start_rodata, __end_rodata,
  520. __bss_start, __bss_stop,
  521. _sdata, _edata,
  522. (void *)&init_thread_union,
  523. (void *)((int)(&init_thread_union) + 0x2000),
  524. __init_begin, __init_end,
  525. (void *)_ramstart, (void *)memory_end
  526. #ifdef CONFIG_MTD_UCLINUX
  527. , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
  528. #endif
  529. #if DMA_UNCACHED_REGION > 0
  530. , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
  531. #endif
  532. );
  533. }
  534. /*
  535. * Find the lowest, highest page frame number we have available
  536. */
  537. void __init find_min_max_pfn(void)
  538. {
  539. int i;
  540. max_pfn = 0;
  541. min_low_pfn = memory_end;
  542. for (i = 0; i < bfin_memmap.nr_map; i++) {
  543. unsigned long start, end;
  544. /* RAM? */
  545. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  546. continue;
  547. start = PFN_UP(bfin_memmap.map[i].addr);
  548. end = PFN_DOWN(bfin_memmap.map[i].addr +
  549. bfin_memmap.map[i].size);
  550. if (start >= end)
  551. continue;
  552. if (end > max_pfn)
  553. max_pfn = end;
  554. if (start < min_low_pfn)
  555. min_low_pfn = start;
  556. }
  557. }
  558. static __init void setup_bootmem_allocator(void)
  559. {
  560. int bootmap_size;
  561. int i;
  562. unsigned long start_pfn, end_pfn;
  563. unsigned long curr_pfn, last_pfn, size;
  564. /* mark memory between memory_start and memory_end usable */
  565. add_memory_region(memory_start,
  566. memory_end - memory_start, BFIN_MEMMAP_RAM);
  567. /* sanity check for overlap */
  568. sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
  569. print_memory_map("boot memmap");
  570. /* intialize globals in linux/bootmem.h */
  571. find_min_max_pfn();
  572. /* pfn of the last usable page frame */
  573. if (max_pfn > memory_end >> PAGE_SHIFT)
  574. max_pfn = memory_end >> PAGE_SHIFT;
  575. /* pfn of last page frame directly mapped by kernel */
  576. max_low_pfn = max_pfn;
  577. /* pfn of the first usable page frame after kernel image*/
  578. if (min_low_pfn < memory_start >> PAGE_SHIFT)
  579. min_low_pfn = memory_start >> PAGE_SHIFT;
  580. start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
  581. end_pfn = memory_end >> PAGE_SHIFT;
  582. /*
  583. * give all the memory to the bootmap allocator, tell it to put the
  584. * boot mem_map at the start of memory.
  585. */
  586. bootmap_size = init_bootmem_node(NODE_DATA(0),
  587. memory_start >> PAGE_SHIFT, /* map goes here */
  588. start_pfn, end_pfn);
  589. /* register the memmap regions with the bootmem allocator */
  590. for (i = 0; i < bfin_memmap.nr_map; i++) {
  591. /*
  592. * Reserve usable memory
  593. */
  594. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  595. continue;
  596. /*
  597. * We are rounding up the start address of usable memory:
  598. */
  599. curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
  600. if (curr_pfn >= end_pfn)
  601. continue;
  602. /*
  603. * ... and at the end of the usable range downwards:
  604. */
  605. last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
  606. bfin_memmap.map[i].size);
  607. if (last_pfn > end_pfn)
  608. last_pfn = end_pfn;
  609. /*
  610. * .. finally, did all the rounding and playing
  611. * around just make the area go away?
  612. */
  613. if (last_pfn <= curr_pfn)
  614. continue;
  615. size = last_pfn - curr_pfn;
  616. free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
  617. }
  618. /* reserve memory before memory_start, including bootmap */
  619. reserve_bootmem(PAGE_OFFSET,
  620. memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
  621. BOOTMEM_DEFAULT);
  622. }
  623. #define EBSZ_TO_MEG(ebsz) \
  624. ({ \
  625. int meg = 0; \
  626. switch (ebsz & 0xf) { \
  627. case 0x1: meg = 16; break; \
  628. case 0x3: meg = 32; break; \
  629. case 0x5: meg = 64; break; \
  630. case 0x7: meg = 128; break; \
  631. case 0x9: meg = 256; break; \
  632. case 0xb: meg = 512; break; \
  633. } \
  634. meg; \
  635. })
  636. static inline int __init get_mem_size(void)
  637. {
  638. #if defined(EBIU_SDBCTL)
  639. # if defined(BF561_FAMILY)
  640. int ret = 0;
  641. u32 sdbctl = bfin_read_EBIU_SDBCTL();
  642. ret += EBSZ_TO_MEG(sdbctl >> 0);
  643. ret += EBSZ_TO_MEG(sdbctl >> 8);
  644. ret += EBSZ_TO_MEG(sdbctl >> 16);
  645. ret += EBSZ_TO_MEG(sdbctl >> 24);
  646. return ret;
  647. # else
  648. return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
  649. # endif
  650. #elif defined(EBIU_DDRCTL1)
  651. u32 ddrctl = bfin_read_EBIU_DDRCTL1();
  652. int ret = 0;
  653. switch (ddrctl & 0xc0000) {
  654. case DEVSZ_64: ret = 64 / 8;
  655. case DEVSZ_128: ret = 128 / 8;
  656. case DEVSZ_256: ret = 256 / 8;
  657. case DEVSZ_512: ret = 512 / 8;
  658. }
  659. switch (ddrctl & 0x30000) {
  660. case DEVWD_4: ret *= 2;
  661. case DEVWD_8: ret *= 2;
  662. case DEVWD_16: break;
  663. }
  664. if ((ddrctl & 0xc000) == 0x4000)
  665. ret *= 2;
  666. return ret;
  667. #endif
  668. BUG();
  669. }
  670. void __init setup_arch(char **cmdline_p)
  671. {
  672. unsigned long sclk, cclk;
  673. #ifdef CONFIG_DUMMY_CONSOLE
  674. conswitchp = &dummy_con;
  675. #endif
  676. #if defined(CONFIG_CMDLINE_BOOL)
  677. strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
  678. command_line[sizeof(command_line) - 1] = 0;
  679. #endif
  680. /* Keep a copy of command line */
  681. *cmdline_p = &command_line[0];
  682. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  683. boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
  684. /* setup memory defaults from the user config */
  685. physical_mem_end = 0;
  686. _ramend = get_mem_size() * 1024 * 1024;
  687. memset(&bfin_memmap, 0, sizeof(bfin_memmap));
  688. parse_cmdline_early(&command_line[0]);
  689. if (physical_mem_end == 0)
  690. physical_mem_end = _ramend;
  691. memory_setup();
  692. /* Initialize Async memory banks */
  693. bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
  694. bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
  695. bfin_write_EBIU_AMGCTL(AMGCTLVAL);
  696. #ifdef CONFIG_EBIU_MBSCTLVAL
  697. bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
  698. bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
  699. bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
  700. #endif
  701. cclk = get_cclk();
  702. sclk = get_sclk();
  703. #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
  704. if (ANOMALY_05000273 && cclk == sclk)
  705. panic("ANOMALY 05000273, SCLK can not be same as CCLK");
  706. #endif
  707. #ifdef BF561_FAMILY
  708. if (ANOMALY_05000266) {
  709. bfin_read_IMDMA_D0_IRQ_STATUS();
  710. bfin_read_IMDMA_D1_IRQ_STATUS();
  711. }
  712. #endif
  713. printk(KERN_INFO "Hardware Trace ");
  714. if (bfin_read_TBUFCTL() & 0x1)
  715. printk("Active ");
  716. else
  717. printk("Off ");
  718. if (bfin_read_TBUFCTL() & 0x2)
  719. printk("and Enabled\n");
  720. else
  721. printk("and Disabled\n");
  722. #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
  723. /* we need to initialize the Flashrom device here since we might
  724. * do things with flash early on in the boot
  725. */
  726. flash_probe();
  727. #endif
  728. _bfin_swrst = bfin_read_SWRST();
  729. #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
  730. bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
  731. #endif
  732. #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
  733. bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
  734. #endif
  735. #ifdef CONFIG_SMP
  736. if (_bfin_swrst & SWRST_DBL_FAULT_A) {
  737. #else
  738. if (_bfin_swrst & RESET_DOUBLE) {
  739. #endif
  740. printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
  741. #ifdef CONFIG_DEBUG_DOUBLEFAULT
  742. /* We assume the crashing kernel, and the current symbol table match */
  743. printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
  744. (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
  745. printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
  746. printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
  747. #endif
  748. printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
  749. init_retx);
  750. } else if (_bfin_swrst & RESET_WDOG)
  751. printk(KERN_INFO "Recovering from Watchdog event\n");
  752. else if (_bfin_swrst & RESET_SOFTWARE)
  753. printk(KERN_NOTICE "Reset caused by Software reset\n");
  754. printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
  755. if (bfin_compiled_revid() == 0xffff)
  756. printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
  757. else if (bfin_compiled_revid() == -1)
  758. printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
  759. else
  760. printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
  761. if (unlikely(CPUID != bfin_cpuid()))
  762. printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
  763. CPU, bfin_cpuid(), bfin_revid());
  764. else {
  765. if (bfin_revid() != bfin_compiled_revid()) {
  766. if (bfin_compiled_revid() == -1)
  767. printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
  768. bfin_revid());
  769. else if (bfin_compiled_revid() != 0xffff)
  770. printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
  771. bfin_compiled_revid(), bfin_revid());
  772. }
  773. if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
  774. printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
  775. CPU, bfin_revid());
  776. }
  777. printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
  778. printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
  779. cclk / 1000000, sclk / 1000000);
  780. if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
  781. printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
  782. setup_bootmem_allocator();
  783. paging_init();
  784. /* Copy atomic sequences to their fixed location, and sanity check that
  785. these locations are the ones that we advertise to userspace. */
  786. memcpy((void *)FIXED_CODE_START, &fixed_code_start,
  787. FIXED_CODE_END - FIXED_CODE_START);
  788. BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
  789. != SIGRETURN_STUB - FIXED_CODE_START);
  790. BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
  791. != ATOMIC_XCHG32 - FIXED_CODE_START);
  792. BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
  793. != ATOMIC_CAS32 - FIXED_CODE_START);
  794. BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
  795. != ATOMIC_ADD32 - FIXED_CODE_START);
  796. BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
  797. != ATOMIC_SUB32 - FIXED_CODE_START);
  798. BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
  799. != ATOMIC_IOR32 - FIXED_CODE_START);
  800. BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
  801. != ATOMIC_AND32 - FIXED_CODE_START);
  802. BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
  803. != ATOMIC_XOR32 - FIXED_CODE_START);
  804. BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
  805. != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
  806. #ifdef CONFIG_SMP
  807. platform_init_cpus();
  808. #endif
  809. init_exception_vectors();
  810. bfin_cache_init(); /* Initialize caches for the boot CPU */
  811. }
  812. static int __init topology_init(void)
  813. {
  814. unsigned int cpu;
  815. /* Record CPU-private information for the boot processor. */
  816. bfin_setup_cpudata(0);
  817. for_each_possible_cpu(cpu) {
  818. register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
  819. }
  820. return 0;
  821. }
  822. subsys_initcall(topology_init);
  823. /* Get the voltage input multiplier */
  824. static u_long cached_vco_pll_ctl, cached_vco;
  825. static u_long get_vco(void)
  826. {
  827. u_long msel;
  828. u_long pll_ctl = bfin_read_PLL_CTL();
  829. if (pll_ctl == cached_vco_pll_ctl)
  830. return cached_vco;
  831. else
  832. cached_vco_pll_ctl = pll_ctl;
  833. msel = (pll_ctl >> 9) & 0x3F;
  834. if (0 == msel)
  835. msel = 64;
  836. cached_vco = CONFIG_CLKIN_HZ;
  837. cached_vco >>= (1 & pll_ctl); /* DF bit */
  838. cached_vco *= msel;
  839. return cached_vco;
  840. }
  841. /* Get the Core clock */
  842. static u_long cached_cclk_pll_div, cached_cclk;
  843. u_long get_cclk(void)
  844. {
  845. u_long csel, ssel;
  846. if (bfin_read_PLL_STAT() & 0x1)
  847. return CONFIG_CLKIN_HZ;
  848. ssel = bfin_read_PLL_DIV();
  849. if (ssel == cached_cclk_pll_div)
  850. return cached_cclk;
  851. else
  852. cached_cclk_pll_div = ssel;
  853. csel = ((ssel >> 4) & 0x03);
  854. ssel &= 0xf;
  855. if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
  856. cached_cclk = get_vco() / ssel;
  857. else
  858. cached_cclk = get_vco() >> csel;
  859. return cached_cclk;
  860. }
  861. EXPORT_SYMBOL(get_cclk);
  862. /* Get the System clock */
  863. static u_long cached_sclk_pll_div, cached_sclk;
  864. u_long get_sclk(void)
  865. {
  866. u_long ssel;
  867. if (bfin_read_PLL_STAT() & 0x1)
  868. return CONFIG_CLKIN_HZ;
  869. ssel = bfin_read_PLL_DIV();
  870. if (ssel == cached_sclk_pll_div)
  871. return cached_sclk;
  872. else
  873. cached_sclk_pll_div = ssel;
  874. ssel &= 0xf;
  875. if (0 == ssel) {
  876. printk(KERN_WARNING "Invalid System Clock\n");
  877. ssel = 1;
  878. }
  879. cached_sclk = get_vco() / ssel;
  880. return cached_sclk;
  881. }
  882. EXPORT_SYMBOL(get_sclk);
  883. unsigned long sclk_to_usecs(unsigned long sclk)
  884. {
  885. u64 tmp = USEC_PER_SEC * (u64)sclk;
  886. do_div(tmp, get_sclk());
  887. return tmp;
  888. }
  889. EXPORT_SYMBOL(sclk_to_usecs);
  890. unsigned long usecs_to_sclk(unsigned long usecs)
  891. {
  892. u64 tmp = get_sclk() * (u64)usecs;
  893. do_div(tmp, USEC_PER_SEC);
  894. return tmp;
  895. }
  896. EXPORT_SYMBOL(usecs_to_sclk);
  897. /*
  898. * Get CPU information for use by the procfs.
  899. */
  900. static int show_cpuinfo(struct seq_file *m, void *v)
  901. {
  902. char *cpu, *mmu, *fpu, *vendor, *cache;
  903. uint32_t revid;
  904. u_long sclk, cclk;
  905. u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
  906. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, *(unsigned int *)v);
  907. cpu = CPU;
  908. mmu = "none";
  909. fpu = "none";
  910. revid = bfin_revid();
  911. sclk = get_sclk();
  912. cclk = get_cclk();
  913. switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
  914. case 0xca:
  915. vendor = "Analog Devices";
  916. break;
  917. default:
  918. vendor = "unknown";
  919. break;
  920. }
  921. seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n",
  922. *(unsigned int *)v, vendor);
  923. if (CPUID == bfin_cpuid())
  924. seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
  925. else
  926. seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
  927. CPUID, bfin_cpuid());
  928. seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
  929. "stepping\t: %d\n",
  930. cpu, cclk/1000000, sclk/1000000,
  931. #ifdef CONFIG_MPU
  932. "mpu on",
  933. #else
  934. "mpu off",
  935. #endif
  936. revid);
  937. seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
  938. cclk/1000000, cclk%1000000,
  939. sclk/1000000, sclk%1000000);
  940. seq_printf(m, "bogomips\t: %lu.%02lu\n"
  941. "Calibration\t: %lu loops\n",
  942. (cpudata->loops_per_jiffy * HZ) / 500000,
  943. ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
  944. (cpudata->loops_per_jiffy * HZ));
  945. /* Check Cache configutation */
  946. switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
  947. case ACACHE_BSRAM:
  948. cache = "dbank-A/B\t: cache/sram";
  949. dcache_size = 16;
  950. dsup_banks = 1;
  951. break;
  952. case ACACHE_BCACHE:
  953. cache = "dbank-A/B\t: cache/cache";
  954. dcache_size = 32;
  955. dsup_banks = 2;
  956. break;
  957. case ASRAM_BSRAM:
  958. cache = "dbank-A/B\t: sram/sram";
  959. dcache_size = 0;
  960. dsup_banks = 0;
  961. break;
  962. default:
  963. cache = "unknown";
  964. dcache_size = 0;
  965. dsup_banks = 0;
  966. break;
  967. }
  968. /* Is it turned on? */
  969. if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
  970. dcache_size = 0;
  971. if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
  972. icache_size = 0;
  973. seq_printf(m, "cache size\t: %d KB(L1 icache) "
  974. "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
  975. icache_size, dcache_size,
  976. #if defined CONFIG_BFIN_WB
  977. "wb"
  978. #elif defined CONFIG_BFIN_WT
  979. "wt"
  980. #endif
  981. "", 0);
  982. seq_printf(m, "%s\n", cache);
  983. if (icache_size)
  984. seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
  985. BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
  986. else
  987. seq_printf(m, "icache setup\t: off\n");
  988. seq_printf(m,
  989. "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
  990. dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
  991. BFIN_DLINES);
  992. #ifdef __ARCH_SYNC_CORE_DCACHE
  993. seq_printf(m,
  994. "SMP Dcache Flushes\t: %lu\n\n",
  995. per_cpu(cpu_data, *(unsigned int *)v).dcache_invld_count);
  996. #endif
  997. #ifdef CONFIG_BFIN_ICACHE_LOCK
  998. switch ((cpudata->imemctl >> 3) & WAYALL_L) {
  999. case WAY0_L:
  1000. seq_printf(m, "Way0 Locked-Down\n");
  1001. break;
  1002. case WAY1_L:
  1003. seq_printf(m, "Way1 Locked-Down\n");
  1004. break;
  1005. case WAY01_L:
  1006. seq_printf(m, "Way0,Way1 Locked-Down\n");
  1007. break;
  1008. case WAY2_L:
  1009. seq_printf(m, "Way2 Locked-Down\n");
  1010. break;
  1011. case WAY02_L:
  1012. seq_printf(m, "Way0,Way2 Locked-Down\n");
  1013. break;
  1014. case WAY12_L:
  1015. seq_printf(m, "Way1,Way2 Locked-Down\n");
  1016. break;
  1017. case WAY012_L:
  1018. seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
  1019. break;
  1020. case WAY3_L:
  1021. seq_printf(m, "Way3 Locked-Down\n");
  1022. break;
  1023. case WAY03_L:
  1024. seq_printf(m, "Way0,Way3 Locked-Down\n");
  1025. break;
  1026. case WAY13_L:
  1027. seq_printf(m, "Way1,Way3 Locked-Down\n");
  1028. break;
  1029. case WAY013_L:
  1030. seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
  1031. break;
  1032. case WAY32_L:
  1033. seq_printf(m, "Way3,Way2 Locked-Down\n");
  1034. break;
  1035. case WAY320_L:
  1036. seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
  1037. break;
  1038. case WAY321_L:
  1039. seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
  1040. break;
  1041. case WAYALL_L:
  1042. seq_printf(m, "All Ways are locked\n");
  1043. break;
  1044. default:
  1045. seq_printf(m, "No Ways are locked\n");
  1046. }
  1047. #endif
  1048. if (*(unsigned int *)v != NR_CPUS-1)
  1049. return 0;
  1050. #if L2_LENGTH
  1051. seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
  1052. #endif
  1053. seq_printf(m, "board name\t: %s\n", bfin_board_name);
  1054. seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
  1055. physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
  1056. seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
  1057. ((int)memory_end - (int)_stext) >> 10,
  1058. _stext,
  1059. (void *)memory_end);
  1060. seq_printf(m, "\n");
  1061. return 0;
  1062. }
  1063. static void *c_start(struct seq_file *m, loff_t *pos)
  1064. {
  1065. if (*pos == 0)
  1066. *pos = first_cpu(cpu_online_map);
  1067. if (*pos >= num_online_cpus())
  1068. return NULL;
  1069. return pos;
  1070. }
  1071. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  1072. {
  1073. *pos = next_cpu(*pos, cpu_online_map);
  1074. return c_start(m, pos);
  1075. }
  1076. static void c_stop(struct seq_file *m, void *v)
  1077. {
  1078. }
  1079. const struct seq_operations cpuinfo_op = {
  1080. .start = c_start,
  1081. .next = c_next,
  1082. .stop = c_stop,
  1083. .show = show_cpuinfo,
  1084. };
  1085. void __init cmdline_init(const char *r0)
  1086. {
  1087. if (r0)
  1088. strncpy(command_line, r0, COMMAND_LINE_SIZE);
  1089. }