cx23885-cards.c 22 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. #include "netup-init.h"
  29. /* ------------------------------------------------------------------ */
  30. /* board config info */
  31. struct cx23885_board cx23885_boards[] = {
  32. [CX23885_BOARD_UNKNOWN] = {
  33. .name = "UNKNOWN/GENERIC",
  34. /* Ensure safe default for unknown boards */
  35. .clk_freq = 0,
  36. .input = {{
  37. .type = CX23885_VMUX_COMPOSITE1,
  38. .vmux = 0,
  39. }, {
  40. .type = CX23885_VMUX_COMPOSITE2,
  41. .vmux = 1,
  42. }, {
  43. .type = CX23885_VMUX_COMPOSITE3,
  44. .vmux = 2,
  45. }, {
  46. .type = CX23885_VMUX_COMPOSITE4,
  47. .vmux = 3,
  48. } },
  49. },
  50. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  51. .name = "Hauppauge WinTV-HVR1800lp",
  52. .portc = CX23885_MPEG_DVB,
  53. .input = {{
  54. .type = CX23885_VMUX_TELEVISION,
  55. .vmux = 0,
  56. .gpio0 = 0xff00,
  57. }, {
  58. .type = CX23885_VMUX_DEBUG,
  59. .vmux = 0,
  60. .gpio0 = 0xff01,
  61. }, {
  62. .type = CX23885_VMUX_COMPOSITE1,
  63. .vmux = 1,
  64. .gpio0 = 0xff02,
  65. }, {
  66. .type = CX23885_VMUX_SVIDEO,
  67. .vmux = 2,
  68. .gpio0 = 0xff02,
  69. } },
  70. },
  71. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  72. .name = "Hauppauge WinTV-HVR1800",
  73. .porta = CX23885_ANALOG_VIDEO,
  74. .portb = CX23885_MPEG_ENCODER,
  75. .portc = CX23885_MPEG_DVB,
  76. .tuner_type = TUNER_PHILIPS_TDA8290,
  77. .tuner_addr = 0x42, /* 0x84 >> 1 */
  78. .input = {{
  79. .type = CX23885_VMUX_TELEVISION,
  80. .vmux = CX25840_VIN7_CH3 |
  81. CX25840_VIN5_CH2 |
  82. CX25840_VIN2_CH1,
  83. .gpio0 = 0,
  84. }, {
  85. .type = CX23885_VMUX_COMPOSITE1,
  86. .vmux = CX25840_VIN7_CH3 |
  87. CX25840_VIN4_CH2 |
  88. CX25840_VIN6_CH1,
  89. .gpio0 = 0,
  90. }, {
  91. .type = CX23885_VMUX_SVIDEO,
  92. .vmux = CX25840_VIN7_CH3 |
  93. CX25840_VIN4_CH2 |
  94. CX25840_VIN8_CH1 |
  95. CX25840_SVIDEO_ON,
  96. .gpio0 = 0,
  97. } },
  98. },
  99. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  100. .name = "Hauppauge WinTV-HVR1250",
  101. .portc = CX23885_MPEG_DVB,
  102. .input = {{
  103. .type = CX23885_VMUX_TELEVISION,
  104. .vmux = 0,
  105. .gpio0 = 0xff00,
  106. }, {
  107. .type = CX23885_VMUX_DEBUG,
  108. .vmux = 0,
  109. .gpio0 = 0xff01,
  110. }, {
  111. .type = CX23885_VMUX_COMPOSITE1,
  112. .vmux = 1,
  113. .gpio0 = 0xff02,
  114. }, {
  115. .type = CX23885_VMUX_SVIDEO,
  116. .vmux = 2,
  117. .gpio0 = 0xff02,
  118. } },
  119. },
  120. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  121. .name = "DViCO FusionHDTV5 Express",
  122. .portb = CX23885_MPEG_DVB,
  123. },
  124. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  125. .name = "Hauppauge WinTV-HVR1500Q",
  126. .portc = CX23885_MPEG_DVB,
  127. },
  128. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  129. .name = "Hauppauge WinTV-HVR1500",
  130. .portc = CX23885_MPEG_DVB,
  131. },
  132. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  133. .name = "Hauppauge WinTV-HVR1200",
  134. .portc = CX23885_MPEG_DVB,
  135. },
  136. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  137. .name = "Hauppauge WinTV-HVR1700",
  138. .portc = CX23885_MPEG_DVB,
  139. },
  140. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  141. .name = "Hauppauge WinTV-HVR1400",
  142. .portc = CX23885_MPEG_DVB,
  143. },
  144. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  145. .name = "DViCO FusionHDTV7 Dual Express",
  146. .portb = CX23885_MPEG_DVB,
  147. .portc = CX23885_MPEG_DVB,
  148. },
  149. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  150. .name = "DViCO FusionHDTV DVB-T Dual Express",
  151. .portb = CX23885_MPEG_DVB,
  152. .portc = CX23885_MPEG_DVB,
  153. },
  154. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  155. .name = "Leadtek Winfast PxDVR3200 H",
  156. .portc = CX23885_MPEG_DVB,
  157. },
  158. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  159. .name = "Compro VideoMate E650F",
  160. .portc = CX23885_MPEG_DVB,
  161. },
  162. [CX23885_BOARD_TBS_6920] = {
  163. .name = "TurboSight TBS 6920",
  164. .portb = CX23885_MPEG_DVB,
  165. },
  166. [CX23885_BOARD_TEVII_S470] = {
  167. .name = "TeVii S470",
  168. .portb = CX23885_MPEG_DVB,
  169. },
  170. [CX23885_BOARD_DVBWORLD_2005] = {
  171. .name = "DVBWorld DVB-S2 2005",
  172. .portb = CX23885_MPEG_DVB,
  173. },
  174. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  175. .cimax = 1,
  176. .name = "NetUP Dual DVB-S2 CI",
  177. .portb = CX23885_MPEG_DVB,
  178. .portc = CX23885_MPEG_DVB,
  179. },
  180. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  181. .name = "Hauppauge WinTV-HVR1270",
  182. .portc = CX23885_MPEG_DVB,
  183. },
  184. };
  185. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  186. /* ------------------------------------------------------------------ */
  187. /* PCI subsystem IDs */
  188. struct cx23885_subid cx23885_subids[] = {
  189. {
  190. .subvendor = 0x0070,
  191. .subdevice = 0x3400,
  192. .card = CX23885_BOARD_UNKNOWN,
  193. }, {
  194. .subvendor = 0x0070,
  195. .subdevice = 0x7600,
  196. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  197. }, {
  198. .subvendor = 0x0070,
  199. .subdevice = 0x7800,
  200. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  201. }, {
  202. .subvendor = 0x0070,
  203. .subdevice = 0x7801,
  204. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  205. }, {
  206. .subvendor = 0x0070,
  207. .subdevice = 0x7809,
  208. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  209. }, {
  210. .subvendor = 0x0070,
  211. .subdevice = 0x7911,
  212. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  213. }, {
  214. .subvendor = 0x18ac,
  215. .subdevice = 0xd500,
  216. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  217. }, {
  218. .subvendor = 0x0070,
  219. .subdevice = 0x7790,
  220. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  221. }, {
  222. .subvendor = 0x0070,
  223. .subdevice = 0x7797,
  224. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  225. }, {
  226. .subvendor = 0x0070,
  227. .subdevice = 0x7710,
  228. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  229. }, {
  230. .subvendor = 0x0070,
  231. .subdevice = 0x7717,
  232. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  233. }, {
  234. .subvendor = 0x0070,
  235. .subdevice = 0x71d1,
  236. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  237. }, {
  238. .subvendor = 0x0070,
  239. .subdevice = 0x71d3,
  240. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  241. }, {
  242. .subvendor = 0x0070,
  243. .subdevice = 0x8101,
  244. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  245. }, {
  246. .subvendor = 0x0070,
  247. .subdevice = 0x8010,
  248. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  249. }, {
  250. .subvendor = 0x18ac,
  251. .subdevice = 0xd618,
  252. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  253. }, {
  254. .subvendor = 0x18ac,
  255. .subdevice = 0xdb78,
  256. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  257. }, {
  258. .subvendor = 0x107d,
  259. .subdevice = 0x6681,
  260. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  261. }, {
  262. .subvendor = 0x185b,
  263. .subdevice = 0xe800,
  264. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  265. }, {
  266. .subvendor = 0x6920,
  267. .subdevice = 0x8888,
  268. .card = CX23885_BOARD_TBS_6920,
  269. }, {
  270. .subvendor = 0xd470,
  271. .subdevice = 0x9022,
  272. .card = CX23885_BOARD_TEVII_S470,
  273. }, {
  274. .subvendor = 0x0001,
  275. .subdevice = 0x2005,
  276. .card = CX23885_BOARD_DVBWORLD_2005,
  277. }, {
  278. .subvendor = 0x1b55,
  279. .subdevice = 0x2a2c,
  280. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  281. }, {
  282. .subvendor = 0x0070,
  283. .subdevice = 0x2211,
  284. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  285. },
  286. };
  287. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  288. void cx23885_card_list(struct cx23885_dev *dev)
  289. {
  290. int i;
  291. if (0 == dev->pci->subsystem_vendor &&
  292. 0 == dev->pci->subsystem_device) {
  293. printk(KERN_INFO
  294. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  295. "%s: be autodetected. Pass card=<n> insmod option\n"
  296. "%s: to workaround that. Redirect complaints to the\n"
  297. "%s: vendor of the TV card. Best regards,\n"
  298. "%s: -- tux\n",
  299. dev->name, dev->name, dev->name, dev->name, dev->name);
  300. } else {
  301. printk(KERN_INFO
  302. "%s: Your board isn't known (yet) to the driver.\n"
  303. "%s: Try to pick one of the existing card configs via\n"
  304. "%s: card=<n> insmod option. Updating to the latest\n"
  305. "%s: version might help as well.\n",
  306. dev->name, dev->name, dev->name, dev->name);
  307. }
  308. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  309. dev->name);
  310. for (i = 0; i < cx23885_bcount; i++)
  311. printk(KERN_INFO "%s: card=%d -> %s\n",
  312. dev->name, i, cx23885_boards[i].name);
  313. }
  314. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  315. {
  316. struct tveeprom tv;
  317. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  318. eeprom_data);
  319. /* Make sure we support the board model */
  320. switch (tv.model) {
  321. case 71009:
  322. /* WinTV-HVR1200 (PCIe, Retail, full height)
  323. * DVB-T and basic analog */
  324. case 71359:
  325. /* WinTV-HVR1200 (PCIe, OEM, half height)
  326. * DVB-T and basic analog */
  327. case 71439:
  328. /* WinTV-HVR1200 (PCIe, OEM, half height)
  329. * DVB-T and basic analog */
  330. case 71449:
  331. /* WinTV-HVR1200 (PCIe, OEM, full height)
  332. * DVB-T and basic analog */
  333. case 71939:
  334. /* WinTV-HVR1200 (PCIe, OEM, half height)
  335. * DVB-T and basic analog */
  336. case 71949:
  337. /* WinTV-HVR1200 (PCIe, OEM, full height)
  338. * DVB-T and basic analog */
  339. case 71959:
  340. /* WinTV-HVR1200 (PCIe, OEM, full height)
  341. * DVB-T and basic analog */
  342. case 71979:
  343. /* WinTV-HVR1200 (PCIe, OEM, half height)
  344. * DVB-T and basic analog */
  345. case 71999:
  346. /* WinTV-HVR1200 (PCIe, OEM, full height)
  347. * DVB-T and basic analog */
  348. case 76601:
  349. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  350. channel ATSC and MPEG2 HW Encoder */
  351. case 77001:
  352. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  353. and Basic analog */
  354. case 77011:
  355. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  356. and Basic analog */
  357. case 77041:
  358. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  359. and Basic analog */
  360. case 77051:
  361. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  362. and Basic analog */
  363. case 78011:
  364. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  365. Dual channel ATSC and MPEG2 HW Encoder */
  366. case 78501:
  367. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  368. Dual channel ATSC and MPEG2 HW Encoder */
  369. case 78521:
  370. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  371. Dual channel ATSC and MPEG2 HW Encoder */
  372. case 78531:
  373. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  374. Dual channel ATSC and MPEG2 HW Encoder */
  375. case 78631:
  376. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  377. Dual channel ATSC and MPEG2 HW Encoder */
  378. case 79001:
  379. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  380. ATSC and Basic analog */
  381. case 79101:
  382. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  383. ATSC and Basic analog */
  384. case 79561:
  385. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  386. ATSC and Basic analog */
  387. case 79571:
  388. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  389. ATSC and Basic analog */
  390. case 79671:
  391. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  392. ATSC and Basic analog */
  393. case 80019:
  394. /* WinTV-HVR1400 (Express Card, Retail, IR,
  395. * DVB-T and Basic analog */
  396. case 81509:
  397. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  398. * DVB-T and MPEG2 HW Encoder */
  399. case 81519:
  400. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  401. * DVB-T and MPEG2 HW Encoder */
  402. break;
  403. default:
  404. printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
  405. dev->name, tv.model);
  406. break;
  407. }
  408. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  409. dev->name, tv.model);
  410. }
  411. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  412. {
  413. struct cx23885_tsport *port = priv;
  414. struct cx23885_dev *dev = port->dev;
  415. u32 bitmask = 0;
  416. if (command == XC2028_RESET_CLK)
  417. return 0;
  418. if (command != 0) {
  419. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  420. __func__, command);
  421. return -EINVAL;
  422. }
  423. switch (dev->board) {
  424. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  425. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  426. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  427. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  428. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  429. /* Tuner Reset Command */
  430. bitmask = 0x04;
  431. break;
  432. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  433. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  434. /* Two identical tuners on two different i2c buses,
  435. * we need to reset the correct gpio. */
  436. if (port->nr == 1)
  437. bitmask = 0x01;
  438. else if (port->nr == 2)
  439. bitmask = 0x04;
  440. break;
  441. }
  442. if (bitmask) {
  443. /* Drive the tuner into reset and back out */
  444. cx_clear(GP0_IO, bitmask);
  445. mdelay(200);
  446. cx_set(GP0_IO, bitmask);
  447. }
  448. return 0;
  449. }
  450. void cx23885_gpio_setup(struct cx23885_dev *dev)
  451. {
  452. switch (dev->board) {
  453. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  454. /* GPIO-0 cx24227 demodulator reset */
  455. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  456. break;
  457. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  458. /* GPIO-0 cx24227 demodulator */
  459. /* GPIO-2 xc3028 tuner */
  460. /* Put the parts into reset */
  461. cx_set(GP0_IO, 0x00050000);
  462. cx_clear(GP0_IO, 0x00000005);
  463. msleep(5);
  464. /* Bring the parts out of reset */
  465. cx_set(GP0_IO, 0x00050005);
  466. break;
  467. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  468. /* GPIO-0 cx24227 demodulator reset */
  469. /* GPIO-2 xc5000 tuner reset */
  470. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  471. break;
  472. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  473. /* GPIO-0 656_CLK */
  474. /* GPIO-1 656_D0 */
  475. /* GPIO-2 8295A Reset */
  476. /* GPIO-3-10 cx23417 data0-7 */
  477. /* GPIO-11-14 cx23417 addr0-3 */
  478. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  479. /* GPIO-19 IR_RX */
  480. /* CX23417 GPIO's */
  481. /* EIO15 Zilog Reset */
  482. /* EIO14 S5H1409/CX24227 Reset */
  483. /* Force the TDA8295A into reset and back */
  484. cx_set(GP0_IO, 0x00040004);
  485. mdelay(20);
  486. cx_clear(GP0_IO, 0x00000004);
  487. mdelay(20);
  488. cx_set(GP0_IO, 0x00040004);
  489. mdelay(20);
  490. break;
  491. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  492. /* GPIO-0 tda10048 demodulator reset */
  493. /* GPIO-2 tda18271 tuner reset */
  494. /* Put the parts into reset and back */
  495. cx_set(GP0_IO, 0x00050000);
  496. mdelay(20);
  497. cx_clear(GP0_IO, 0x00000005);
  498. mdelay(20);
  499. cx_set(GP0_IO, 0x00050005);
  500. break;
  501. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  502. /* GPIO-0 TDA10048 demodulator reset */
  503. /* GPIO-2 TDA8295A Reset */
  504. /* GPIO-3-10 cx23417 data0-7 */
  505. /* GPIO-11-14 cx23417 addr0-3 */
  506. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  507. /* The following GPIO's are on the interna AVCore (cx25840) */
  508. /* GPIO-19 IR_RX */
  509. /* GPIO-20 IR_TX 416/DVBT Select */
  510. /* GPIO-21 IIS DAT */
  511. /* GPIO-22 IIS WCLK */
  512. /* GPIO-23 IIS BCLK */
  513. /* Put the parts into reset and back */
  514. cx_set(GP0_IO, 0x00050000);
  515. mdelay(20);
  516. cx_clear(GP0_IO, 0x00000005);
  517. mdelay(20);
  518. cx_set(GP0_IO, 0x00050005);
  519. break;
  520. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  521. /* GPIO-0 Dibcom7000p demodulator reset */
  522. /* GPIO-2 xc3028L tuner reset */
  523. /* GPIO-13 LED */
  524. /* Put the parts into reset and back */
  525. cx_set(GP0_IO, 0x00050000);
  526. mdelay(20);
  527. cx_clear(GP0_IO, 0x00000005);
  528. mdelay(20);
  529. cx_set(GP0_IO, 0x00050005);
  530. break;
  531. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  532. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  533. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  534. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  535. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  536. /* Put the parts into reset and back */
  537. cx_set(GP0_IO, 0x000f0000);
  538. mdelay(20);
  539. cx_clear(GP0_IO, 0x0000000f);
  540. mdelay(20);
  541. cx_set(GP0_IO, 0x000f000f);
  542. break;
  543. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  544. /* GPIO-0 portb xc3028 reset */
  545. /* GPIO-1 portb zl10353 reset */
  546. /* GPIO-2 portc xc3028 reset */
  547. /* GPIO-3 portc zl10353 reset */
  548. /* Put the parts into reset and back */
  549. cx_set(GP0_IO, 0x000f0000);
  550. mdelay(20);
  551. cx_clear(GP0_IO, 0x0000000f);
  552. mdelay(20);
  553. cx_set(GP0_IO, 0x000f000f);
  554. break;
  555. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  556. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  557. /* GPIO-2 xc3028 tuner reset */
  558. /* The following GPIO's are on the internal AVCore (cx25840) */
  559. /* GPIO-? zl10353 demod reset */
  560. /* Put the parts into reset and back */
  561. cx_set(GP0_IO, 0x00040000);
  562. mdelay(20);
  563. cx_clear(GP0_IO, 0x00000004);
  564. mdelay(20);
  565. cx_set(GP0_IO, 0x00040004);
  566. break;
  567. case CX23885_BOARD_TBS_6920:
  568. case CX23885_BOARD_TEVII_S470:
  569. cx_write(MC417_CTL, 0x00000036);
  570. cx_write(MC417_OEN, 0x00001000);
  571. cx_write(MC417_RWD, 0x00001800);
  572. break;
  573. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  574. /* GPIO-0 INTA from CiMax1
  575. GPIO-1 INTB from CiMax2
  576. GPIO-2 reset chips
  577. GPIO-3 to GPIO-10 data/addr for CA
  578. GPIO-11 ~CS0 to CiMax1
  579. GPIO-12 ~CS1 to CiMax2
  580. GPIO-13 ADL0 load LSB addr
  581. GPIO-14 ADL1 load MSB addr
  582. GPIO-15 ~RDY from CiMax
  583. GPIO-17 ~RD to CiMax
  584. GPIO-18 ~WR to CiMax
  585. */
  586. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  587. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  588. cx_clear(GP0_IO, 0x00030004);
  589. mdelay(100);/* reset delay */
  590. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  591. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  592. /* GPIO-15 IN as ~ACK, rest as OUT */
  593. cx_write(MC417_OEN, 0x00001000);
  594. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  595. cx_write(MC417_RWD, 0x0000c300);
  596. /* enable irq */
  597. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  598. break;
  599. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  600. /* GPIO-6 I2C Gate which can isolate the 3305 from the bus */
  601. /* GPIO-9 LG3305 reset */
  602. /* Put the parts into reset and back */
  603. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6, 1);
  604. cx23885_gpio_set(dev, GPIO_9 | GPIO_6);
  605. cx23885_gpio_clear(dev, GPIO_9);
  606. mdelay(20);
  607. cx23885_gpio_set(dev, GPIO_9);
  608. break;
  609. }
  610. }
  611. int cx23885_ir_init(struct cx23885_dev *dev)
  612. {
  613. switch (dev->board) {
  614. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  615. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  616. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  617. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  618. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  619. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  620. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  621. /* FIXME: Implement me */
  622. break;
  623. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  624. request_module("ir-kbd-i2c");
  625. break;
  626. }
  627. return 0;
  628. }
  629. void cx23885_card_setup(struct cx23885_dev *dev)
  630. {
  631. struct cx23885_tsport *ts1 = &dev->ts1;
  632. struct cx23885_tsport *ts2 = &dev->ts2;
  633. static u8 eeprom[256];
  634. if (dev->i2c_bus[0].i2c_rc == 0) {
  635. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  636. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  637. eeprom, sizeof(eeprom));
  638. }
  639. switch (dev->board) {
  640. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  641. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  642. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  643. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  644. if (dev->i2c_bus[0].i2c_rc == 0)
  645. hauppauge_eeprom(dev, eeprom+0x80);
  646. break;
  647. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  648. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  649. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  650. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  651. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  652. if (dev->i2c_bus[0].i2c_rc == 0)
  653. hauppauge_eeprom(dev, eeprom+0xc0);
  654. break;
  655. }
  656. switch (dev->board) {
  657. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  658. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  659. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  660. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  661. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  662. /* break omitted intentionally */
  663. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  664. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  665. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  666. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  667. break;
  668. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  669. /* Defaults for VID B - Analog encoder */
  670. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  671. ts1->gen_ctrl_val = 0x10e;
  672. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  673. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  674. /* APB_TSVALERR_POL (active low)*/
  675. ts1->vld_misc_val = 0x2000;
  676. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  677. /* Defaults for VID C */
  678. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  679. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  680. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  681. break;
  682. case CX23885_BOARD_TEVII_S470:
  683. case CX23885_BOARD_TBS_6920:
  684. case CX23885_BOARD_DVBWORLD_2005:
  685. ts1->gen_ctrl_val = 0x5; /* Parallel */
  686. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  687. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  688. break;
  689. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  690. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  691. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  692. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  693. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  694. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  695. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  696. break;
  697. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  698. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  699. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  700. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  701. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  702. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  703. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  704. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  705. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  706. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  707. default:
  708. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  709. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  710. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  711. }
  712. /* Certain boards support analog, or require the avcore to be
  713. * loaded, ensure this happens.
  714. */
  715. switch (dev->board) {
  716. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  717. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  718. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  719. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  720. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  721. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  722. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  723. &dev->i2c_bus[2].i2c_adap,
  724. "cx25840", "cx25840", 0x88 >> 1);
  725. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  726. break;
  727. }
  728. /* AUX-PLL 27MHz CLK */
  729. switch (dev->board) {
  730. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  731. netup_initialize(dev);
  732. break;
  733. }
  734. }
  735. /* ------------------------------------------------------------------ */