nv10_fb.c 1.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162
  1. #include "drmP.h"
  2. #include "drm.h"
  3. #include "nouveau_drv.h"
  4. #include "nouveau_drm.h"
  5. void
  6. nv10_fb_init_tile_region(struct drm_device *dev, int i, uint32_t addr,
  7. uint32_t size, uint32_t pitch, uint32_t flags)
  8. {
  9. struct drm_nouveau_private *dev_priv = dev->dev_private;
  10. struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
  11. tile->addr = addr;
  12. tile->limit = max(1u, addr + size) - 1;
  13. tile->pitch = pitch;
  14. if (dev_priv->card_type == NV_20)
  15. tile->addr |= 1;
  16. else
  17. tile->addr |= 1 << 31;
  18. }
  19. void
  20. nv10_fb_free_tile_region(struct drm_device *dev, int i)
  21. {
  22. struct drm_nouveau_private *dev_priv = dev->dev_private;
  23. struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
  24. tile->addr = tile->limit = tile->pitch = 0;
  25. }
  26. void
  27. nv10_fb_set_tile_region(struct drm_device *dev, int i)
  28. {
  29. struct drm_nouveau_private *dev_priv = dev->dev_private;
  30. struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
  31. nv_wr32(dev, NV10_PFB_TLIMIT(i), tile->limit);
  32. nv_wr32(dev, NV10_PFB_TSIZE(i), tile->pitch);
  33. nv_wr32(dev, NV10_PFB_TILE(i), tile->addr);
  34. }
  35. int
  36. nv10_fb_init(struct drm_device *dev)
  37. {
  38. struct drm_nouveau_private *dev_priv = dev->dev_private;
  39. struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
  40. int i;
  41. pfb->num_tiles = NV10_PFB_TILE__SIZE;
  42. /* Turn all the tiling regions off. */
  43. for (i = 0; i < pfb->num_tiles; i++)
  44. pfb->set_tile_region(dev, i);
  45. return 0;
  46. }
  47. void
  48. nv10_fb_takedown(struct drm_device *dev)
  49. {
  50. }