cx88-dvb.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852
  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
  36. # include "cx88-vp3054-i2c.h"
  37. #endif
  38. #include "zl10353.h"
  39. #include "cx22702.h"
  40. #include "or51132.h"
  41. #include "lgdt330x.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  46. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  47. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  48. MODULE_LICENSE("GPL");
  49. static unsigned int debug = 0;
  50. module_param(debug, int, 0644);
  51. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  52. #define dprintk(level,fmt, arg...) if (debug >= level) \
  53. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  54. /* ------------------------------------------------------------------ */
  55. static int dvb_buf_setup(struct videobuf_queue *q,
  56. unsigned int *count, unsigned int *size)
  57. {
  58. struct cx8802_dev *dev = q->priv_data;
  59. dev->ts_packet_size = 188 * 4;
  60. dev->ts_packet_count = 32;
  61. *size = dev->ts_packet_size * dev->ts_packet_count;
  62. *count = 32;
  63. return 0;
  64. }
  65. static int dvb_buf_prepare(struct videobuf_queue *q,
  66. struct videobuf_buffer *vb, enum v4l2_field field)
  67. {
  68. struct cx8802_dev *dev = q->priv_data;
  69. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  70. }
  71. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  72. {
  73. struct cx8802_dev *dev = q->priv_data;
  74. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  75. }
  76. static void dvb_buf_release(struct videobuf_queue *q,
  77. struct videobuf_buffer *vb)
  78. {
  79. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  80. }
  81. static struct videobuf_queue_ops dvb_qops = {
  82. .buf_setup = dvb_buf_setup,
  83. .buf_prepare = dvb_buf_prepare,
  84. .buf_queue = dvb_buf_queue,
  85. .buf_release = dvb_buf_release,
  86. };
  87. /* ------------------------------------------------------------------ */
  88. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  89. {
  90. struct cx8802_dev *dev= fe->dvb->priv;
  91. struct cx8802_driver *drv = NULL;
  92. int ret = 0;
  93. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  94. if (drv) {
  95. if (acquire)
  96. ret = drv->request_acquire(drv);
  97. else
  98. ret = drv->request_release(drv);
  99. }
  100. return ret;
  101. }
  102. /* ------------------------------------------------------------------ */
  103. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  104. {
  105. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  106. static u8 reset [] = { RESET, 0x80 };
  107. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  108. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  109. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  110. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  111. mt352_write(fe, clock_config, sizeof(clock_config));
  112. udelay(200);
  113. mt352_write(fe, reset, sizeof(reset));
  114. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  115. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  116. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  117. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  118. return 0;
  119. }
  120. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  121. {
  122. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  123. static u8 reset [] = { RESET, 0x80 };
  124. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  125. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  126. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  127. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  128. mt352_write(fe, clock_config, sizeof(clock_config));
  129. udelay(200);
  130. mt352_write(fe, reset, sizeof(reset));
  131. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  132. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  133. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  134. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  135. return 0;
  136. }
  137. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  138. {
  139. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  140. static u8 reset [] = { 0x50, 0x80 };
  141. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  142. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  143. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  144. static u8 dntv_extra[] = { 0xB5, 0x7A };
  145. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  146. mt352_write(fe, clock_config, sizeof(clock_config));
  147. udelay(2000);
  148. mt352_write(fe, reset, sizeof(reset));
  149. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  150. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  151. udelay(2000);
  152. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  153. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  154. return 0;
  155. }
  156. static struct mt352_config dvico_fusionhdtv = {
  157. .demod_address = 0x0f,
  158. .demod_init = dvico_fusionhdtv_demod_init,
  159. };
  160. static struct mt352_config dntv_live_dvbt_config = {
  161. .demod_address = 0x0f,
  162. .demod_init = dntv_live_dvbt_demod_init,
  163. };
  164. static struct mt352_config dvico_fusionhdtv_dual = {
  165. .demod_address = 0x0f,
  166. .demod_init = dvico_dual_demod_init,
  167. };
  168. #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
  169. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  170. {
  171. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  172. static u8 reset [] = { 0x50, 0x80 };
  173. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  174. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  175. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  176. static u8 dntv_extra[] = { 0xB5, 0x7A };
  177. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  178. mt352_write(fe, clock_config, sizeof(clock_config));
  179. udelay(2000);
  180. mt352_write(fe, reset, sizeof(reset));
  181. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  182. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  183. udelay(2000);
  184. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  185. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  186. return 0;
  187. }
  188. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  189. {
  190. struct cx8802_dev *dev= fe->dvb->priv;
  191. /* this message is to set up ATC and ALC */
  192. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  193. struct i2c_msg msg =
  194. { .addr = dev->core->pll_addr, .flags = 0,
  195. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  196. int err;
  197. if (fe->ops.i2c_gate_ctrl)
  198. fe->ops.i2c_gate_ctrl(fe, 1);
  199. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  200. if (err < 0)
  201. return err;
  202. else
  203. return -EREMOTEIO;
  204. }
  205. return 0;
  206. }
  207. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  208. struct dvb_frontend_parameters* params)
  209. {
  210. struct cx8802_dev *dev= fe->dvb->priv;
  211. u8 buf[4];
  212. struct i2c_msg msg =
  213. { .addr = dev->core->pll_addr, .flags = 0,
  214. .buf = buf, .len = 4 };
  215. int err;
  216. /* Switch PLL to DVB mode */
  217. err = philips_fmd1216_pll_init(fe);
  218. if (err)
  219. return err;
  220. /* Tune PLL */
  221. dvb_pll_configure(dev->core->pll_desc, buf,
  222. params->frequency,
  223. params->u.ofdm.bandwidth);
  224. if (fe->ops.i2c_gate_ctrl)
  225. fe->ops.i2c_gate_ctrl(fe, 1);
  226. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  227. printk(KERN_WARNING "cx88-dvb: %s error "
  228. "(addr %02x <- %02x, err = %i)\n",
  229. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  230. if (err < 0)
  231. return err;
  232. else
  233. return -EREMOTEIO;
  234. }
  235. return 0;
  236. }
  237. static struct mt352_config dntv_live_dvbt_pro_config = {
  238. .demod_address = 0x0f,
  239. .no_tuner = 1,
  240. .demod_init = dntv_live_dvbt_pro_demod_init,
  241. };
  242. #endif
  243. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  244. .demod_address = 0x0f,
  245. .no_tuner = 1,
  246. };
  247. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  248. .demod_address = 0x0f,
  249. };
  250. static struct cx22702_config connexant_refboard_config = {
  251. .demod_address = 0x43,
  252. .output_mode = CX22702_SERIAL_OUTPUT,
  253. };
  254. static struct cx22702_config hauppauge_hvr_config = {
  255. .demod_address = 0x63,
  256. .output_mode = CX22702_SERIAL_OUTPUT,
  257. };
  258. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  259. {
  260. struct cx8802_dev *dev= fe->dvb->priv;
  261. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  262. return 0;
  263. }
  264. static struct or51132_config pchdtv_hd3000 = {
  265. .demod_address = 0x15,
  266. .set_ts_params = or51132_set_ts_param,
  267. };
  268. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  269. {
  270. struct cx8802_dev *dev= fe->dvb->priv;
  271. struct cx88_core *core = dev->core;
  272. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  273. if (index == 0)
  274. cx_clear(MO_GP0_IO, 8);
  275. else
  276. cx_set(MO_GP0_IO, 8);
  277. return 0;
  278. }
  279. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  280. {
  281. struct cx8802_dev *dev= fe->dvb->priv;
  282. if (is_punctured)
  283. dev->ts_gen_cntrl |= 0x04;
  284. else
  285. dev->ts_gen_cntrl &= ~0x04;
  286. return 0;
  287. }
  288. static struct lgdt330x_config fusionhdtv_3_gold = {
  289. .demod_address = 0x0e,
  290. .demod_chip = LGDT3302,
  291. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  292. .set_ts_params = lgdt330x_set_ts_param,
  293. };
  294. static struct lgdt330x_config fusionhdtv_5_gold = {
  295. .demod_address = 0x0e,
  296. .demod_chip = LGDT3303,
  297. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  298. .set_ts_params = lgdt330x_set_ts_param,
  299. };
  300. static struct lgdt330x_config pchdtv_hd5500 = {
  301. .demod_address = 0x59,
  302. .demod_chip = LGDT3303,
  303. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  304. .set_ts_params = lgdt330x_set_ts_param,
  305. };
  306. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  307. {
  308. struct cx8802_dev *dev= fe->dvb->priv;
  309. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  310. return 0;
  311. }
  312. static int nxt200x_set_pll_input(u8* buf, int input)
  313. {
  314. if (input)
  315. buf[3] |= 0x08;
  316. else
  317. buf[3] &= ~0x08;
  318. return 0;
  319. }
  320. static struct nxt200x_config ati_hdtvwonder = {
  321. .demod_address = 0x0a,
  322. .set_pll_input = nxt200x_set_pll_input,
  323. .set_ts_params = nxt200x_set_ts_param,
  324. };
  325. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  326. int is_punctured)
  327. {
  328. struct cx8802_dev *dev= fe->dvb->priv;
  329. dev->ts_gen_cntrl = 0x02;
  330. return 0;
  331. }
  332. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  333. fe_sec_voltage_t voltage)
  334. {
  335. struct cx8802_dev *dev= fe->dvb->priv;
  336. struct cx88_core *core = dev->core;
  337. if (voltage == SEC_VOLTAGE_OFF)
  338. cx_write(MO_GP0_IO, 0x000006fb);
  339. else
  340. cx_write(MO_GP0_IO, 0x000006f9);
  341. if (core->prev_set_voltage)
  342. return core->prev_set_voltage(fe, voltage);
  343. return 0;
  344. }
  345. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  346. fe_sec_voltage_t voltage)
  347. {
  348. struct cx8802_dev *dev= fe->dvb->priv;
  349. struct cx88_core *core = dev->core;
  350. if (voltage == SEC_VOLTAGE_OFF) {
  351. dprintk(1,"LNB Voltage OFF\n");
  352. cx_write(MO_GP0_IO, 0x0000efff);
  353. }
  354. if (core->prev_set_voltage)
  355. return core->prev_set_voltage(fe, voltage);
  356. return 0;
  357. }
  358. static struct cx24123_config geniatech_dvbs_config = {
  359. .demod_address = 0x55,
  360. .set_ts_params = cx24123_set_ts_param,
  361. };
  362. static struct cx24123_config hauppauge_novas_config = {
  363. .demod_address = 0x55,
  364. .set_ts_params = cx24123_set_ts_param,
  365. };
  366. static struct cx24123_config kworld_dvbs_100_config = {
  367. .demod_address = 0x15,
  368. .set_ts_params = cx24123_set_ts_param,
  369. .lnb_polarity = 1,
  370. };
  371. static int dvb_register(struct cx8802_dev *dev)
  372. {
  373. /* init struct videobuf_dvb */
  374. dev->dvb.name = dev->core->name;
  375. dev->ts_gen_cntrl = 0x0c;
  376. /* init frontend */
  377. switch (dev->core->board) {
  378. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  379. dev->dvb.frontend = dvb_attach(cx22702_attach,
  380. &connexant_refboard_config,
  381. &dev->core->i2c_adap);
  382. if (dev->dvb.frontend != NULL) {
  383. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  384. &dev->core->i2c_adap,
  385. &dvb_pll_thomson_dtt759x);
  386. }
  387. break;
  388. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  389. case CX88_BOARD_CONEXANT_DVB_T1:
  390. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  391. case CX88_BOARD_WINFAST_DTV1000:
  392. dev->dvb.frontend = dvb_attach(cx22702_attach,
  393. &connexant_refboard_config,
  394. &dev->core->i2c_adap);
  395. if (dev->dvb.frontend != NULL) {
  396. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  397. &dev->core->i2c_adap,
  398. &dvb_pll_thomson_dtt7579);
  399. }
  400. break;
  401. case CX88_BOARD_WINFAST_DTV2000H:
  402. case CX88_BOARD_HAUPPAUGE_HVR1100:
  403. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  404. case CX88_BOARD_HAUPPAUGE_HVR1300:
  405. case CX88_BOARD_HAUPPAUGE_HVR3000:
  406. dev->dvb.frontend = dvb_attach(cx22702_attach,
  407. &hauppauge_hvr_config,
  408. &dev->core->i2c_adap);
  409. if (dev->dvb.frontend != NULL) {
  410. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  411. &dev->core->i2c_adap, &dvb_pll_fmd1216me);
  412. }
  413. break;
  414. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  415. dev->dvb.frontend = dvb_attach(mt352_attach,
  416. &dvico_fusionhdtv,
  417. &dev->core->i2c_adap);
  418. if (dev->dvb.frontend != NULL) {
  419. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  420. NULL, &dvb_pll_thomson_dtt7579);
  421. break;
  422. }
  423. /* ZL10353 replaces MT352 on later cards */
  424. dev->dvb.frontend = dvb_attach(zl10353_attach,
  425. &dvico_fusionhdtv_plus_v1_1,
  426. &dev->core->i2c_adap);
  427. if (dev->dvb.frontend != NULL) {
  428. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  429. NULL, &dvb_pll_thomson_dtt7579);
  430. }
  431. break;
  432. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  433. /* The tin box says DEE1601, but it seems to be DTT7579
  434. * compatible, with a slightly different MT352 AGC gain. */
  435. dev->dvb.frontend = dvb_attach(mt352_attach,
  436. &dvico_fusionhdtv_dual,
  437. &dev->core->i2c_adap);
  438. if (dev->dvb.frontend != NULL) {
  439. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  440. NULL, &dvb_pll_thomson_dtt7579);
  441. break;
  442. }
  443. /* ZL10353 replaces MT352 on later cards */
  444. dev->dvb.frontend = dvb_attach(zl10353_attach,
  445. &dvico_fusionhdtv_plus_v1_1,
  446. &dev->core->i2c_adap);
  447. if (dev->dvb.frontend != NULL) {
  448. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  449. NULL, &dvb_pll_thomson_dtt7579);
  450. }
  451. break;
  452. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  453. dev->dvb.frontend = dvb_attach(mt352_attach,
  454. &dvico_fusionhdtv,
  455. &dev->core->i2c_adap);
  456. if (dev->dvb.frontend != NULL) {
  457. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  458. NULL, &dvb_pll_lg_z201);
  459. }
  460. break;
  461. case CX88_BOARD_KWORLD_DVB_T:
  462. case CX88_BOARD_DNTV_LIVE_DVB_T:
  463. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  464. dev->dvb.frontend = dvb_attach(mt352_attach,
  465. &dntv_live_dvbt_config,
  466. &dev->core->i2c_adap);
  467. if (dev->dvb.frontend != NULL) {
  468. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  469. NULL, &dvb_pll_unknown_1);
  470. }
  471. break;
  472. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  473. #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
  474. dev->core->pll_addr = 0x61;
  475. dev->core->pll_desc = &dvb_pll_fmd1216me;
  476. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  477. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  478. if (dev->dvb.frontend != NULL) {
  479. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  480. }
  481. #else
  482. printk("%s: built without vp3054 support\n", dev->core->name);
  483. #endif
  484. break;
  485. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  486. dev->dvb.frontend = dvb_attach(zl10353_attach,
  487. &dvico_fusionhdtv_hybrid,
  488. &dev->core->i2c_adap);
  489. if (dev->dvb.frontend != NULL) {
  490. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  491. &dev->core->i2c_adap,
  492. &dvb_pll_thomson_fe6600);
  493. }
  494. break;
  495. case CX88_BOARD_PCHDTV_HD3000:
  496. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  497. &dev->core->i2c_adap);
  498. if (dev->dvb.frontend != NULL) {
  499. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  500. &dev->core->i2c_adap,
  501. &dvb_pll_thomson_dtt761x);
  502. }
  503. break;
  504. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  505. dev->ts_gen_cntrl = 0x08;
  506. {
  507. /* Do a hardware reset of chip before using it. */
  508. struct cx88_core *core = dev->core;
  509. cx_clear(MO_GP0_IO, 1);
  510. mdelay(100);
  511. cx_set(MO_GP0_IO, 1);
  512. mdelay(200);
  513. /* Select RF connector callback */
  514. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  515. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  516. &fusionhdtv_3_gold,
  517. &dev->core->i2c_adap);
  518. if (dev->dvb.frontend != NULL) {
  519. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  520. &dev->core->i2c_adap,
  521. &dvb_pll_microtune_4042);
  522. }
  523. }
  524. break;
  525. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  526. dev->ts_gen_cntrl = 0x08;
  527. {
  528. /* Do a hardware reset of chip before using it. */
  529. struct cx88_core *core = dev->core;
  530. cx_clear(MO_GP0_IO, 1);
  531. mdelay(100);
  532. cx_set(MO_GP0_IO, 9);
  533. mdelay(200);
  534. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  535. &fusionhdtv_3_gold,
  536. &dev->core->i2c_adap);
  537. if (dev->dvb.frontend != NULL) {
  538. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  539. &dev->core->i2c_adap,
  540. &dvb_pll_thomson_dtt761x);
  541. }
  542. }
  543. break;
  544. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  545. dev->ts_gen_cntrl = 0x08;
  546. {
  547. /* Do a hardware reset of chip before using it. */
  548. struct cx88_core *core = dev->core;
  549. cx_clear(MO_GP0_IO, 1);
  550. mdelay(100);
  551. cx_set(MO_GP0_IO, 1);
  552. mdelay(200);
  553. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  554. &fusionhdtv_5_gold,
  555. &dev->core->i2c_adap);
  556. if (dev->dvb.frontend != NULL) {
  557. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  558. &dev->core->i2c_adap,
  559. &dvb_pll_lg_tdvs_h06xf);
  560. }
  561. }
  562. break;
  563. case CX88_BOARD_PCHDTV_HD5500:
  564. dev->ts_gen_cntrl = 0x08;
  565. {
  566. /* Do a hardware reset of chip before using it. */
  567. struct cx88_core *core = dev->core;
  568. cx_clear(MO_GP0_IO, 1);
  569. mdelay(100);
  570. cx_set(MO_GP0_IO, 1);
  571. mdelay(200);
  572. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  573. &pchdtv_hd5500,
  574. &dev->core->i2c_adap);
  575. if (dev->dvb.frontend != NULL) {
  576. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  577. &dev->core->i2c_adap,
  578. &dvb_pll_lg_tdvs_h06xf);
  579. }
  580. }
  581. break;
  582. case CX88_BOARD_ATI_HDTVWONDER:
  583. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  584. &ati_hdtvwonder,
  585. &dev->core->i2c_adap);
  586. if (dev->dvb.frontend != NULL) {
  587. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  588. NULL, &dvb_pll_tuv1236d);
  589. }
  590. break;
  591. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  592. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  593. dev->dvb.frontend = dvb_attach(cx24123_attach,
  594. &hauppauge_novas_config,
  595. &dev->core->i2c_adap);
  596. if (dev->dvb.frontend) {
  597. dvb_attach(isl6421_attach, dev->dvb.frontend,
  598. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  599. }
  600. break;
  601. case CX88_BOARD_KWORLD_DVBS_100:
  602. dev->dvb.frontend = dvb_attach(cx24123_attach,
  603. &kworld_dvbs_100_config,
  604. &dev->core->i2c_adap);
  605. if (dev->dvb.frontend) {
  606. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  607. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  608. }
  609. break;
  610. case CX88_BOARD_GENIATECH_DVBS:
  611. dev->dvb.frontend = dvb_attach(cx24123_attach,
  612. &geniatech_dvbs_config,
  613. &dev->core->i2c_adap);
  614. if (dev->dvb.frontend) {
  615. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  616. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  617. }
  618. break;
  619. default:
  620. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  621. dev->core->name);
  622. break;
  623. }
  624. if (NULL == dev->dvb.frontend) {
  625. printk("%s: frontend initialization failed\n",dev->core->name);
  626. return -1;
  627. }
  628. if (dev->core->pll_desc) {
  629. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  630. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  631. }
  632. /* Ensure all frontends negotiate bus access */
  633. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  634. /* Put the analog decoder in standby to keep it quiet */
  635. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  636. /* register everything */
  637. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  638. }
  639. /* ----------------------------------------------------------- */
  640. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  641. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  642. {
  643. struct cx88_core *core = drv->core;
  644. int err = 0;
  645. dprintk( 1, "%s\n", __FUNCTION__);
  646. switch (core->board) {
  647. case CX88_BOARD_HAUPPAUGE_HVR1300:
  648. /* We arrive here with either the cx23416 or the cx22702
  649. * on the bus. Take the bus from the cx23416 and enable the
  650. * cx22702 demod
  651. */
  652. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  653. cx_clear(MO_GP0_IO, 0x00000004);
  654. udelay(1000);
  655. break;
  656. default:
  657. err = -ENODEV;
  658. }
  659. return err;
  660. }
  661. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  662. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  663. {
  664. struct cx88_core *core = drv->core;
  665. int err = 0;
  666. dprintk( 1, "%s\n", __FUNCTION__);
  667. switch (core->board) {
  668. case CX88_BOARD_HAUPPAUGE_HVR1300:
  669. /* Do Nothing, leave the cx22702 on the bus. */
  670. break;
  671. default:
  672. err = -ENODEV;
  673. }
  674. return err;
  675. }
  676. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  677. {
  678. struct cx88_core *core = drv->core;
  679. struct cx8802_dev *dev = drv->core->dvbdev;
  680. int err;
  681. dprintk( 1, "%s\n", __FUNCTION__);
  682. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  683. core->board,
  684. core->name,
  685. core->pci_bus,
  686. core->pci_slot);
  687. err = -ENODEV;
  688. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  689. goto fail_core;
  690. #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
  691. err = vp3054_i2c_probe(dev);
  692. if (0 != err)
  693. goto fail_core;
  694. #endif
  695. /* dvb stuff */
  696. printk("%s/2: cx2388x based dvb card\n", core->name);
  697. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  698. dev->pci, &dev->slock,
  699. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  700. V4L2_FIELD_TOP,
  701. sizeof(struct cx88_buffer),
  702. dev);
  703. err = dvb_register(dev);
  704. if (err != 0)
  705. printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
  706. fail_core:
  707. return err;
  708. }
  709. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  710. {
  711. struct cx8802_dev *dev = drv->core->dvbdev;
  712. /* dvb */
  713. videobuf_dvb_unregister(&dev->dvb);
  714. #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
  715. vp3054_i2c_remove(dev);
  716. #endif
  717. return 0;
  718. }
  719. static struct cx8802_driver cx8802_dvb_driver = {
  720. .type_id = CX88_MPEG_DVB,
  721. .hw_access = CX8802_DRVCTL_SHARED,
  722. .probe = cx8802_dvb_probe,
  723. .remove = cx8802_dvb_remove,
  724. .advise_acquire = cx8802_dvb_advise_acquire,
  725. .advise_release = cx8802_dvb_advise_release,
  726. };
  727. static int dvb_init(void)
  728. {
  729. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  730. (CX88_VERSION_CODE >> 16) & 0xff,
  731. (CX88_VERSION_CODE >> 8) & 0xff,
  732. CX88_VERSION_CODE & 0xff);
  733. #ifdef SNAPSHOT
  734. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  735. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  736. #endif
  737. return cx8802_register_driver(&cx8802_dvb_driver);
  738. }
  739. static void dvb_fini(void)
  740. {
  741. cx8802_unregister_driver(&cx8802_dvb_driver);
  742. }
  743. module_init(dvb_init);
  744. module_exit(dvb_fini);
  745. /*
  746. * Local variables:
  747. * c-basic-offset: 8
  748. * compile-command: "make DVB=1"
  749. * End:
  750. */