core.h 7.7 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _CORE_H_
  18. #define _CORE_H_
  19. #include <linux/completion.h>
  20. #include <linux/if_ether.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include "htc.h"
  24. #include "hw.h"
  25. #include "targaddrs.h"
  26. #include "wmi.h"
  27. #include "../ath.h"
  28. #include "../regd.h"
  29. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  30. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  31. #define WO(_f) ((_f##_OFFSET) >> 2)
  32. #define ATH10K_SCAN_ID 0
  33. #define WMI_READY_TIMEOUT (5 * HZ)
  34. #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
  35. /* Antenna noise floor */
  36. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  37. struct ath10k;
  38. enum ath10k_bus {
  39. ATH10K_BUS_PCI,
  40. };
  41. struct ath10k_skb_cb {
  42. dma_addr_t paddr;
  43. bool is_mapped;
  44. bool is_aborted;
  45. struct {
  46. u8 vdev_id;
  47. u16 msdu_id;
  48. u8 tid;
  49. bool is_offchan;
  50. bool is_conf;
  51. bool discard;
  52. bool no_ack;
  53. u8 refcount;
  54. struct sk_buff *txfrag;
  55. struct sk_buff *msdu;
  56. } __packed htt;
  57. /* 4 bytes left on 64bit arch */
  58. } __packed;
  59. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  60. {
  61. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  62. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  63. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  64. }
  65. static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
  66. {
  67. if (ATH10K_SKB_CB(skb)->is_mapped)
  68. return -EINVAL;
  69. ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
  70. DMA_TO_DEVICE);
  71. if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
  72. return -EIO;
  73. ATH10K_SKB_CB(skb)->is_mapped = true;
  74. return 0;
  75. }
  76. static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
  77. {
  78. if (!ATH10K_SKB_CB(skb)->is_mapped)
  79. return -EINVAL;
  80. dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
  81. DMA_TO_DEVICE);
  82. ATH10K_SKB_CB(skb)->is_mapped = false;
  83. return 0;
  84. }
  85. static inline u32 host_interest_item_address(u32 item_offset)
  86. {
  87. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  88. }
  89. struct ath10k_bmi {
  90. bool done_sent;
  91. };
  92. struct ath10k_wmi {
  93. enum ath10k_htc_ep_id eid;
  94. struct completion service_ready;
  95. struct completion unified_ready;
  96. atomic_t pending_tx_count;
  97. wait_queue_head_t wq;
  98. struct sk_buff_head wmi_event_list;
  99. struct work_struct wmi_event_work;
  100. };
  101. struct ath10k_peer_stat {
  102. u8 peer_macaddr[ETH_ALEN];
  103. u32 peer_rssi;
  104. u32 peer_tx_rate;
  105. };
  106. struct ath10k_target_stats {
  107. /* PDEV stats */
  108. s32 ch_noise_floor;
  109. u32 tx_frame_count;
  110. u32 rx_frame_count;
  111. u32 rx_clear_count;
  112. u32 cycle_count;
  113. u32 phy_err_count;
  114. u32 chan_tx_power;
  115. /* PDEV TX stats */
  116. s32 comp_queued;
  117. s32 comp_delivered;
  118. s32 msdu_enqued;
  119. s32 mpdu_enqued;
  120. s32 wmm_drop;
  121. s32 local_enqued;
  122. s32 local_freed;
  123. s32 hw_queued;
  124. s32 hw_reaped;
  125. s32 underrun;
  126. s32 tx_abort;
  127. s32 mpdus_requed;
  128. u32 tx_ko;
  129. u32 data_rc;
  130. u32 self_triggers;
  131. u32 sw_retry_failure;
  132. u32 illgl_rate_phy_err;
  133. u32 pdev_cont_xretry;
  134. u32 pdev_tx_timeout;
  135. u32 pdev_resets;
  136. u32 phy_underrun;
  137. u32 txop_ovf;
  138. /* PDEV RX stats */
  139. s32 mid_ppdu_route_change;
  140. s32 status_rcvd;
  141. s32 r0_frags;
  142. s32 r1_frags;
  143. s32 r2_frags;
  144. s32 r3_frags;
  145. s32 htt_msdus;
  146. s32 htt_mpdus;
  147. s32 loc_msdus;
  148. s32 loc_mpdus;
  149. s32 oversize_amsdu;
  150. s32 phy_errs;
  151. s32 phy_err_drop;
  152. s32 mpdu_errs;
  153. /* VDEV STATS */
  154. /* PEER STATS */
  155. u8 peers;
  156. struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
  157. /* TODO: Beacon filter stats */
  158. };
  159. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  160. struct ath10k_peer {
  161. struct list_head list;
  162. int vdev_id;
  163. u8 addr[ETH_ALEN];
  164. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  165. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  166. };
  167. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
  168. struct ath10k_vif {
  169. u32 vdev_id;
  170. enum wmi_vdev_type vdev_type;
  171. enum wmi_vdev_subtype vdev_subtype;
  172. u32 beacon_interval;
  173. u32 dtim_period;
  174. struct ath10k *ar;
  175. struct ieee80211_vif *vif;
  176. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  177. u8 def_wep_key_index;
  178. u16 tx_seq_no;
  179. union {
  180. struct {
  181. u8 bssid[ETH_ALEN];
  182. u32 uapsd;
  183. } sta;
  184. struct {
  185. /* 127 stations; wmi limit */
  186. u8 tim_bitmap[16];
  187. u8 tim_len;
  188. u32 ssid_len;
  189. u8 ssid[IEEE80211_MAX_SSID_LEN];
  190. bool hidden_ssid;
  191. /* P2P_IE with NoA attribute for P2P_GO case */
  192. u32 noa_len;
  193. u8 *noa_data;
  194. } ap;
  195. struct {
  196. u8 bssid[ETH_ALEN];
  197. } ibss;
  198. } u;
  199. };
  200. struct ath10k_vif_iter {
  201. u32 vdev_id;
  202. struct ath10k_vif *arvif;
  203. };
  204. struct ath10k_debug {
  205. struct dentry *debugfs_phy;
  206. struct ath10k_target_stats target_stats;
  207. u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  208. struct completion event_stats_compl;
  209. };
  210. struct ath10k {
  211. struct ath_common ath_common;
  212. struct ieee80211_hw *hw;
  213. struct device *dev;
  214. u8 mac_addr[ETH_ALEN];
  215. u32 target_version;
  216. u8 fw_version_major;
  217. u32 fw_version_minor;
  218. u16 fw_version_release;
  219. u16 fw_version_build;
  220. u32 phy_capability;
  221. u32 hw_min_tx_power;
  222. u32 hw_max_tx_power;
  223. u32 ht_cap_info;
  224. u32 vht_cap_info;
  225. struct targetdef *targetdef;
  226. struct hostdef *hostdef;
  227. bool p2p;
  228. struct {
  229. void *priv;
  230. enum ath10k_bus bus;
  231. const struct ath10k_hif_ops *ops;
  232. } hif;
  233. struct ath10k_wmi wmi;
  234. wait_queue_head_t event_queue;
  235. bool is_target_paused;
  236. struct ath10k_bmi bmi;
  237. struct ath10k_htc *htc;
  238. struct ath10k_htt *htt;
  239. struct ath10k_hw_params {
  240. u32 id;
  241. const char *name;
  242. u32 patch_load_addr;
  243. struct ath10k_hw_params_fw {
  244. const char *dir;
  245. const char *fw;
  246. const char *otp;
  247. const char *board;
  248. } fw;
  249. } hw_params;
  250. struct {
  251. struct completion started;
  252. struct completion completed;
  253. struct completion on_channel;
  254. struct timer_list timeout;
  255. bool is_roc;
  256. bool in_progress;
  257. bool aborting;
  258. int vdev_id;
  259. int roc_freq;
  260. } scan;
  261. struct {
  262. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  263. } mac;
  264. /* should never be NULL; needed for regular htt rx */
  265. struct ieee80211_channel *rx_channel;
  266. /* valid during scan; needed for mgmt rx during scan */
  267. struct ieee80211_channel *scan_channel;
  268. int free_vdev_map;
  269. int monitor_vdev_id;
  270. bool monitor_enabled;
  271. bool monitor_present;
  272. unsigned int filter_flags;
  273. struct wmi_pdev_set_wmm_params_arg wmm_params;
  274. struct completion install_key_done;
  275. struct completion vdev_setup_done;
  276. struct workqueue_struct *workqueue;
  277. /* prevents concurrent FW reconfiguration */
  278. struct mutex conf_mutex;
  279. /* protects shared structure data */
  280. spinlock_t data_lock;
  281. struct list_head peers;
  282. wait_queue_head_t peer_mapping_wq;
  283. struct work_struct offchan_tx_work;
  284. struct sk_buff_head offchan_tx_queue;
  285. struct completion offchan_tx_completed;
  286. struct sk_buff *offchan_tx_skb;
  287. #ifdef CONFIG_ATH10K_DEBUGFS
  288. struct ath10k_debug debug;
  289. #endif
  290. };
  291. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  292. enum ath10k_bus bus,
  293. const struct ath10k_hif_ops *hif_ops);
  294. void ath10k_core_destroy(struct ath10k *ar);
  295. int ath10k_core_register(struct ath10k *ar);
  296. void ath10k_core_unregister(struct ath10k *ar);
  297. int ath10k_core_target_suspend(struct ath10k *ar);
  298. int ath10k_core_target_resume(struct ath10k *ar);
  299. #endif /* _CORE_H_ */