core.c 15 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. unsigned int ath10k_debug_mask;
  28. static bool uart_print;
  29. static unsigned int ath10k_p2p;
  30. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  31. module_param(uart_print, bool, 0644);
  32. module_param_named(p2p, ath10k_p2p, uint, 0644);
  33. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  34. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  35. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  36. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  37. {
  38. .id = QCA988X_HW_1_0_VERSION,
  39. .name = "qca988x hw1.0",
  40. .patch_load_addr = QCA988X_HW_1_0_PATCH_LOAD_ADDR,
  41. .fw = {
  42. .dir = QCA988X_HW_1_0_FW_DIR,
  43. .fw = QCA988X_HW_1_0_FW_FILE,
  44. .otp = QCA988X_HW_1_0_OTP_FILE,
  45. .board = QCA988X_HW_1_0_BOARD_DATA_FILE,
  46. },
  47. },
  48. {
  49. .id = QCA988X_HW_2_0_VERSION,
  50. .name = "qca988x hw2.0",
  51. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  52. .fw = {
  53. .dir = QCA988X_HW_2_0_FW_DIR,
  54. .fw = QCA988X_HW_2_0_FW_FILE,
  55. .otp = QCA988X_HW_2_0_OTP_FILE,
  56. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  57. },
  58. },
  59. };
  60. static void ath10k_send_suspend_complete(struct ath10k *ar)
  61. {
  62. ath10k_dbg(ATH10K_DBG_CORE, "%s\n", __func__);
  63. ar->is_target_paused = true;
  64. wake_up(&ar->event_queue);
  65. }
  66. static int ath10k_check_fw_version(struct ath10k *ar)
  67. {
  68. char version[32];
  69. if (ar->fw_version_major >= SUPPORTED_FW_MAJOR &&
  70. ar->fw_version_minor >= SUPPORTED_FW_MINOR &&
  71. ar->fw_version_release >= SUPPORTED_FW_RELEASE &&
  72. ar->fw_version_build >= SUPPORTED_FW_BUILD)
  73. return 0;
  74. snprintf(version, sizeof(version), "%u.%u.%u.%u",
  75. SUPPORTED_FW_MAJOR, SUPPORTED_FW_MINOR,
  76. SUPPORTED_FW_RELEASE, SUPPORTED_FW_BUILD);
  77. ath10k_warn("WARNING: Firmware version %s is not officially supported.\n",
  78. ar->hw->wiphy->fw_version);
  79. ath10k_warn("Please upgrade to version %s (or newer)\n", version);
  80. return 0;
  81. }
  82. static int ath10k_init_connect_htc(struct ath10k *ar)
  83. {
  84. int status;
  85. status = ath10k_wmi_connect_htc_service(ar);
  86. if (status)
  87. goto conn_fail;
  88. /* Start HTC */
  89. status = ath10k_htc_start(ar->htc);
  90. if (status)
  91. goto conn_fail;
  92. /* Wait for WMI event to be ready */
  93. status = ath10k_wmi_wait_for_service_ready(ar);
  94. if (status <= 0) {
  95. ath10k_warn("wmi service ready event not received");
  96. status = -ETIMEDOUT;
  97. goto timeout;
  98. }
  99. ath10k_dbg(ATH10K_DBG_CORE, "core wmi ready\n");
  100. return 0;
  101. timeout:
  102. ath10k_htc_stop(ar->htc);
  103. conn_fail:
  104. return status;
  105. }
  106. static int ath10k_init_configure_target(struct ath10k *ar)
  107. {
  108. u32 param_host;
  109. int ret;
  110. /* tell target which HTC version it is used*/
  111. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  112. HTC_PROTOCOL_VERSION);
  113. if (ret) {
  114. ath10k_err("settings HTC version failed\n");
  115. return ret;
  116. }
  117. /* set the firmware mode to STA/IBSS/AP */
  118. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  119. if (ret) {
  120. ath10k_err("setting firmware mode (1/2) failed\n");
  121. return ret;
  122. }
  123. /* TODO following parameters need to be re-visited. */
  124. /* num_device */
  125. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  126. /* Firmware mode */
  127. /* FIXME: Why FW_MODE_AP ??.*/
  128. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  129. /* mac_addr_method */
  130. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  131. /* firmware_bridge */
  132. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  133. /* fwsubmode */
  134. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  135. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  136. if (ret) {
  137. ath10k_err("setting firmware mode (2/2) failed\n");
  138. return ret;
  139. }
  140. /* We do all byte-swapping on the host */
  141. ret = ath10k_bmi_write32(ar, hi_be, 0);
  142. if (ret) {
  143. ath10k_err("setting host CPU BE mode failed\n");
  144. return ret;
  145. }
  146. /* FW descriptor/Data swap flags */
  147. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  148. if (ret) {
  149. ath10k_err("setting FW data/desc swap flags failed\n");
  150. return ret;
  151. }
  152. return 0;
  153. }
  154. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  155. const char *dir,
  156. const char *file)
  157. {
  158. char filename[100];
  159. const struct firmware *fw;
  160. int ret;
  161. if (file == NULL)
  162. return ERR_PTR(-ENOENT);
  163. if (dir == NULL)
  164. dir = ".";
  165. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  166. ret = request_firmware(&fw, filename, ar->dev);
  167. if (ret)
  168. return ERR_PTR(ret);
  169. return fw;
  170. }
  171. static int ath10k_push_board_ext_data(struct ath10k *ar,
  172. const struct firmware *fw)
  173. {
  174. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  175. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  176. u32 board_ext_data_addr;
  177. int ret;
  178. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  179. if (ret) {
  180. ath10k_err("could not read board ext data addr (%d)\n", ret);
  181. return ret;
  182. }
  183. ath10k_dbg(ATH10K_DBG_CORE,
  184. "ath10k: Board extended Data download addr: 0x%x\n",
  185. board_ext_data_addr);
  186. if (board_ext_data_addr == 0)
  187. return 0;
  188. if (fw->size != (board_data_size + board_ext_data_size)) {
  189. ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
  190. fw->size, board_data_size, board_ext_data_size);
  191. return -EINVAL;
  192. }
  193. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  194. fw->data + board_data_size,
  195. board_ext_data_size);
  196. if (ret) {
  197. ath10k_err("could not write board ext data (%d)\n", ret);
  198. return ret;
  199. }
  200. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  201. (board_ext_data_size << 16) | 1);
  202. if (ret) {
  203. ath10k_err("could not write board ext data bit (%d)\n", ret);
  204. return ret;
  205. }
  206. return 0;
  207. }
  208. static int ath10k_download_board_data(struct ath10k *ar)
  209. {
  210. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  211. u32 address;
  212. const struct firmware *fw;
  213. int ret;
  214. fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
  215. ar->hw_params.fw.board);
  216. if (IS_ERR(fw)) {
  217. ath10k_err("could not fetch board data fw file (%ld)\n",
  218. PTR_ERR(fw));
  219. return PTR_ERR(fw);
  220. }
  221. ret = ath10k_push_board_ext_data(ar, fw);
  222. if (ret) {
  223. ath10k_err("could not push board ext data (%d)\n", ret);
  224. goto exit;
  225. }
  226. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  227. if (ret) {
  228. ath10k_err("could not read board data addr (%d)\n", ret);
  229. goto exit;
  230. }
  231. ret = ath10k_bmi_write_memory(ar, address, fw->data,
  232. min_t(u32, board_data_size, fw->size));
  233. if (ret) {
  234. ath10k_err("could not write board data (%d)\n", ret);
  235. goto exit;
  236. }
  237. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  238. if (ret) {
  239. ath10k_err("could not write board data bit (%d)\n", ret);
  240. goto exit;
  241. }
  242. exit:
  243. release_firmware(fw);
  244. return ret;
  245. }
  246. static int ath10k_download_and_run_otp(struct ath10k *ar)
  247. {
  248. const struct firmware *fw;
  249. u32 address;
  250. u32 exec_param;
  251. int ret;
  252. /* OTP is optional */
  253. if (ar->hw_params.fw.otp == NULL) {
  254. ath10k_info("otp file not defined\n");
  255. return 0;
  256. }
  257. address = ar->hw_params.patch_load_addr;
  258. fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
  259. ar->hw_params.fw.otp);
  260. if (IS_ERR(fw)) {
  261. ath10k_warn("could not fetch otp (%ld)\n", PTR_ERR(fw));
  262. return 0;
  263. }
  264. ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
  265. if (ret) {
  266. ath10k_err("could not write otp (%d)\n", ret);
  267. goto exit;
  268. }
  269. exec_param = 0;
  270. ret = ath10k_bmi_execute(ar, address, &exec_param);
  271. if (ret) {
  272. ath10k_err("could not execute otp (%d)\n", ret);
  273. goto exit;
  274. }
  275. exit:
  276. release_firmware(fw);
  277. return ret;
  278. }
  279. static int ath10k_download_fw(struct ath10k *ar)
  280. {
  281. const struct firmware *fw;
  282. u32 address;
  283. int ret;
  284. if (ar->hw_params.fw.fw == NULL)
  285. return -EINVAL;
  286. address = ar->hw_params.patch_load_addr;
  287. fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
  288. ar->hw_params.fw.fw);
  289. if (IS_ERR(fw)) {
  290. ath10k_err("could not fetch fw (%ld)\n", PTR_ERR(fw));
  291. return PTR_ERR(fw);
  292. }
  293. ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
  294. if (ret) {
  295. ath10k_err("could not write fw (%d)\n", ret);
  296. goto exit;
  297. }
  298. exit:
  299. release_firmware(fw);
  300. return ret;
  301. }
  302. static int ath10k_init_download_firmware(struct ath10k *ar)
  303. {
  304. int ret;
  305. ret = ath10k_download_board_data(ar);
  306. if (ret)
  307. return ret;
  308. ret = ath10k_download_and_run_otp(ar);
  309. if (ret)
  310. return ret;
  311. ret = ath10k_download_fw(ar);
  312. if (ret)
  313. return ret;
  314. return ret;
  315. }
  316. static int ath10k_init_uart(struct ath10k *ar)
  317. {
  318. int ret;
  319. /*
  320. * Explicitly setting UART prints to zero as target turns it on
  321. * based on scratch registers.
  322. */
  323. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  324. if (ret) {
  325. ath10k_warn("could not disable UART prints (%d)\n", ret);
  326. return ret;
  327. }
  328. if (!uart_print) {
  329. ath10k_info("UART prints disabled\n");
  330. return 0;
  331. }
  332. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  333. if (ret) {
  334. ath10k_warn("could not enable UART prints (%d)\n", ret);
  335. return ret;
  336. }
  337. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  338. if (ret) {
  339. ath10k_warn("could not enable UART prints (%d)\n", ret);
  340. return ret;
  341. }
  342. ath10k_info("UART prints enabled\n");
  343. return 0;
  344. }
  345. static int ath10k_init_hw_params(struct ath10k *ar)
  346. {
  347. const struct ath10k_hw_params *uninitialized_var(hw_params);
  348. int i;
  349. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  350. hw_params = &ath10k_hw_params_list[i];
  351. if (hw_params->id == ar->target_version)
  352. break;
  353. }
  354. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  355. ath10k_err("Unsupported hardware version: 0x%x\n",
  356. ar->target_version);
  357. return -EINVAL;
  358. }
  359. ar->hw_params = *hw_params;
  360. ath10k_info("Hardware name %s version 0x%x\n",
  361. ar->hw_params.name, ar->target_version);
  362. return 0;
  363. }
  364. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  365. enum ath10k_bus bus,
  366. const struct ath10k_hif_ops *hif_ops)
  367. {
  368. struct ath10k *ar;
  369. ar = ath10k_mac_create();
  370. if (!ar)
  371. return NULL;
  372. ar->ath_common.priv = ar;
  373. ar->ath_common.hw = ar->hw;
  374. ar->p2p = !!ath10k_p2p;
  375. ar->dev = dev;
  376. ar->hif.priv = hif_priv;
  377. ar->hif.ops = hif_ops;
  378. ar->hif.bus = bus;
  379. ar->free_vdev_map = 0xFF; /* 8 vdevs */
  380. init_completion(&ar->scan.started);
  381. init_completion(&ar->scan.completed);
  382. init_completion(&ar->scan.on_channel);
  383. init_completion(&ar->install_key_done);
  384. init_completion(&ar->vdev_setup_done);
  385. setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
  386. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  387. if (!ar->workqueue)
  388. goto err_wq;
  389. mutex_init(&ar->conf_mutex);
  390. spin_lock_init(&ar->data_lock);
  391. INIT_LIST_HEAD(&ar->peers);
  392. init_waitqueue_head(&ar->peer_mapping_wq);
  393. init_completion(&ar->offchan_tx_completed);
  394. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  395. skb_queue_head_init(&ar->offchan_tx_queue);
  396. init_waitqueue_head(&ar->event_queue);
  397. return ar;
  398. err_wq:
  399. ath10k_mac_destroy(ar);
  400. return NULL;
  401. }
  402. EXPORT_SYMBOL(ath10k_core_create);
  403. void ath10k_core_destroy(struct ath10k *ar)
  404. {
  405. flush_workqueue(ar->workqueue);
  406. destroy_workqueue(ar->workqueue);
  407. ath10k_mac_destroy(ar);
  408. }
  409. EXPORT_SYMBOL(ath10k_core_destroy);
  410. int ath10k_core_register(struct ath10k *ar)
  411. {
  412. struct ath10k_htc_ops htc_ops;
  413. struct bmi_target_info target_info;
  414. int status;
  415. memset(&target_info, 0, sizeof(target_info));
  416. status = ath10k_bmi_get_target_info(ar, &target_info);
  417. if (status)
  418. goto err;
  419. ar->target_version = target_info.version;
  420. ar->hw->wiphy->hw_version = target_info.version;
  421. status = ath10k_init_hw_params(ar);
  422. if (status)
  423. goto err;
  424. if (ath10k_init_configure_target(ar)) {
  425. status = -EINVAL;
  426. goto err;
  427. }
  428. status = ath10k_init_download_firmware(ar);
  429. if (status)
  430. goto err;
  431. status = ath10k_init_uart(ar);
  432. if (status)
  433. goto err;
  434. htc_ops.target_send_suspend_complete = ath10k_send_suspend_complete;
  435. ar->htc = ath10k_htc_create(ar, &htc_ops);
  436. if (IS_ERR(ar->htc)) {
  437. status = PTR_ERR(ar->htc);
  438. ath10k_err("could not create HTC (%d)\n", status);
  439. goto err;
  440. }
  441. status = ath10k_bmi_done(ar);
  442. if (status)
  443. goto err_htc_destroy;
  444. status = ath10k_wmi_attach(ar);
  445. if (status) {
  446. ath10k_err("WMI attach failed: %d\n", status);
  447. goto err_htc_destroy;
  448. }
  449. status = ath10k_htc_wait_target(ar->htc);
  450. if (status)
  451. goto err_wmi_detach;
  452. ar->htt = ath10k_htt_attach(ar);
  453. if (!ar->htt) {
  454. status = -ENOMEM;
  455. goto err_wmi_detach;
  456. }
  457. status = ath10k_init_connect_htc(ar);
  458. if (status)
  459. goto err_htt_detach;
  460. ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version);
  461. status = ath10k_check_fw_version(ar);
  462. if (status)
  463. goto err_disconnect_htc;
  464. status = ath10k_wmi_cmd_init(ar);
  465. if (status) {
  466. ath10k_err("could not send WMI init command (%d)\n", status);
  467. goto err_disconnect_htc;
  468. }
  469. status = ath10k_wmi_wait_for_unified_ready(ar);
  470. if (status <= 0) {
  471. ath10k_err("wmi unified ready event not received\n");
  472. status = -ETIMEDOUT;
  473. goto err_disconnect_htc;
  474. }
  475. status = ath10k_htt_attach_target(ar->htt);
  476. if (status)
  477. goto err_disconnect_htc;
  478. status = ath10k_mac_register(ar);
  479. if (status)
  480. goto err_disconnect_htc;
  481. status = ath10k_debug_create(ar);
  482. if (status) {
  483. ath10k_err("unable to initialize debugfs\n");
  484. goto err_unregister_mac;
  485. }
  486. return 0;
  487. err_unregister_mac:
  488. ath10k_mac_unregister(ar);
  489. err_disconnect_htc:
  490. ath10k_htc_stop(ar->htc);
  491. err_htt_detach:
  492. ath10k_htt_detach(ar->htt);
  493. err_wmi_detach:
  494. ath10k_wmi_detach(ar);
  495. err_htc_destroy:
  496. ath10k_htc_destroy(ar->htc);
  497. err:
  498. return status;
  499. }
  500. EXPORT_SYMBOL(ath10k_core_register);
  501. void ath10k_core_unregister(struct ath10k *ar)
  502. {
  503. /* We must unregister from mac80211 before we stop HTC and HIF.
  504. * Otherwise we will fail to submit commands to FW and mac80211 will be
  505. * unhappy about callback failures. */
  506. ath10k_mac_unregister(ar);
  507. ath10k_htc_stop(ar->htc);
  508. ath10k_htt_detach(ar->htt);
  509. ath10k_wmi_detach(ar);
  510. ath10k_htc_destroy(ar->htc);
  511. }
  512. EXPORT_SYMBOL(ath10k_core_unregister);
  513. int ath10k_core_target_suspend(struct ath10k *ar)
  514. {
  515. int ret;
  516. ath10k_dbg(ATH10K_DBG_CORE, "%s: called", __func__);
  517. ret = ath10k_wmi_pdev_suspend_target(ar);
  518. if (ret)
  519. ath10k_warn("could not suspend target (%d)\n", ret);
  520. return ret;
  521. }
  522. EXPORT_SYMBOL(ath10k_core_target_suspend);
  523. int ath10k_core_target_resume(struct ath10k *ar)
  524. {
  525. int ret;
  526. ath10k_dbg(ATH10K_DBG_CORE, "%s: called", __func__);
  527. ret = ath10k_wmi_pdev_resume_target(ar);
  528. if (ret)
  529. ath10k_warn("could not resume target (%d)\n", ret);
  530. return ret;
  531. }
  532. EXPORT_SYMBOL(ath10k_core_target_resume);
  533. MODULE_AUTHOR("Qualcomm Atheros");
  534. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  535. MODULE_LICENSE("Dual BSD/GPL");