lpfc_sli.c 105 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "%d (%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. phba->brd_no, \
  51. pmbox->vport ? pmbox->vport->vpi : 0, \
  52. pmbox->mb.mbxCommand, \
  53. phba->pport->port_state, \
  54. psli->sli_flag, \
  55. flag)
  56. /* There are only four IOCB completion types. */
  57. typedef enum _lpfc_iocb_type {
  58. LPFC_UNKNOWN_IOCB,
  59. LPFC_UNSOL_IOCB,
  60. LPFC_SOL_IOCB,
  61. LPFC_ABORT_IOCB
  62. } lpfc_iocb_type;
  63. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  64. * to the start of the ring, and the slot number of the
  65. * desired iocb entry, calc a pointer to that entry.
  66. */
  67. static inline IOCB_t *
  68. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  69. {
  70. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  71. pring->cmdidx * phba->iocb_cmd_size);
  72. }
  73. static inline IOCB_t *
  74. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  75. {
  76. return (IOCB_t *) (((char *) pring->rspringaddr) +
  77. pring->rspidx * phba->iocb_rsp_size);
  78. }
  79. static struct lpfc_iocbq *
  80. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  81. {
  82. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  83. struct lpfc_iocbq * iocbq = NULL;
  84. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  85. return iocbq;
  86. }
  87. struct lpfc_iocbq *
  88. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  89. {
  90. struct lpfc_iocbq * iocbq = NULL;
  91. unsigned long iflags;
  92. spin_lock_irqsave(&phba->hbalock, iflags);
  93. iocbq = __lpfc_sli_get_iocbq(phba);
  94. spin_unlock_irqrestore(&phba->hbalock, iflags);
  95. return iocbq;
  96. }
  97. void
  98. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  99. {
  100. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  101. /*
  102. * Clean all volatile data fields, preserve iotag and node struct.
  103. */
  104. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  105. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  106. }
  107. void
  108. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  109. {
  110. unsigned long iflags;
  111. /*
  112. * Clean all volatile data fields, preserve iotag and node struct.
  113. */
  114. spin_lock_irqsave(&phba->hbalock, iflags);
  115. __lpfc_sli_release_iocbq(phba, iocbq);
  116. spin_unlock_irqrestore(&phba->hbalock, iflags);
  117. }
  118. /*
  119. * Translate the iocb command to an iocb command type used to decide the final
  120. * disposition of each completed IOCB.
  121. */
  122. static lpfc_iocb_type
  123. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  124. {
  125. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  126. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  127. return 0;
  128. switch (iocb_cmnd) {
  129. case CMD_XMIT_SEQUENCE_CR:
  130. case CMD_XMIT_SEQUENCE_CX:
  131. case CMD_XMIT_BCAST_CN:
  132. case CMD_XMIT_BCAST_CX:
  133. case CMD_ELS_REQUEST_CR:
  134. case CMD_ELS_REQUEST_CX:
  135. case CMD_CREATE_XRI_CR:
  136. case CMD_CREATE_XRI_CX:
  137. case CMD_GET_RPI_CN:
  138. case CMD_XMIT_ELS_RSP_CX:
  139. case CMD_GET_RPI_CR:
  140. case CMD_FCP_IWRITE_CR:
  141. case CMD_FCP_IWRITE_CX:
  142. case CMD_FCP_IREAD_CR:
  143. case CMD_FCP_IREAD_CX:
  144. case CMD_FCP_ICMND_CR:
  145. case CMD_FCP_ICMND_CX:
  146. case CMD_FCP_TSEND_CX:
  147. case CMD_FCP_TRSP_CX:
  148. case CMD_FCP_TRECEIVE_CX:
  149. case CMD_FCP_AUTO_TRSP_CX:
  150. case CMD_ADAPTER_MSG:
  151. case CMD_ADAPTER_DUMP:
  152. case CMD_XMIT_SEQUENCE64_CR:
  153. case CMD_XMIT_SEQUENCE64_CX:
  154. case CMD_XMIT_BCAST64_CN:
  155. case CMD_XMIT_BCAST64_CX:
  156. case CMD_ELS_REQUEST64_CR:
  157. case CMD_ELS_REQUEST64_CX:
  158. case CMD_FCP_IWRITE64_CR:
  159. case CMD_FCP_IWRITE64_CX:
  160. case CMD_FCP_IREAD64_CR:
  161. case CMD_FCP_IREAD64_CX:
  162. case CMD_FCP_ICMND64_CR:
  163. case CMD_FCP_ICMND64_CX:
  164. case CMD_FCP_TSEND64_CX:
  165. case CMD_FCP_TRSP64_CX:
  166. case CMD_FCP_TRECEIVE64_CX:
  167. case CMD_GEN_REQUEST64_CR:
  168. case CMD_GEN_REQUEST64_CX:
  169. case CMD_XMIT_ELS_RSP64_CX:
  170. type = LPFC_SOL_IOCB;
  171. break;
  172. case CMD_ABORT_XRI_CN:
  173. case CMD_ABORT_XRI_CX:
  174. case CMD_CLOSE_XRI_CN:
  175. case CMD_CLOSE_XRI_CX:
  176. case CMD_XRI_ABORTED_CX:
  177. case CMD_ABORT_MXRI64_CN:
  178. type = LPFC_ABORT_IOCB;
  179. break;
  180. case CMD_RCV_SEQUENCE_CX:
  181. case CMD_RCV_ELS_REQ_CX:
  182. case CMD_RCV_SEQUENCE64_CX:
  183. case CMD_RCV_ELS_REQ64_CX:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "%d:0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. phba->brd_no, rc,
  216. pmbox->mbxCommand,
  217. pmbox->mbxStatus,
  218. i);
  219. phba->link_state = LPFC_HBA_ERROR;
  220. ret = -ENXIO;
  221. break;
  222. }
  223. }
  224. mempool_free(pmb, phba->mbox_mem_pool);
  225. return ret;
  226. }
  227. static int
  228. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  229. struct lpfc_iocbq *piocb)
  230. {
  231. list_add_tail(&piocb->list, &pring->txcmplq);
  232. pring->txcmplq_cnt++;
  233. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  234. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  235. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  236. if (!piocb->vport)
  237. BUG();
  238. else
  239. mod_timer(&piocb->vport->els_tmofunc,
  240. jiffies + HZ * (phba->fc_ratov << 1));
  241. }
  242. return 0;
  243. }
  244. static struct lpfc_iocbq *
  245. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  246. {
  247. struct lpfc_iocbq *cmd_iocb;
  248. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  249. if (cmd_iocb != NULL)
  250. pring->txq_cnt--;
  251. return cmd_iocb;
  252. }
  253. static IOCB_t *
  254. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  255. {
  256. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  257. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  258. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  259. uint32_t max_cmd_idx = pring->numCiocb;
  260. if ((pring->next_cmdidx == pring->cmdidx) &&
  261. (++pring->next_cmdidx >= max_cmd_idx))
  262. pring->next_cmdidx = 0;
  263. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  264. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  265. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  266. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  267. "%d:0315 Ring %d issue: portCmdGet %d "
  268. "is bigger then cmd ring %d\n",
  269. phba->brd_no, pring->ringno,
  270. pring->local_getidx, max_cmd_idx);
  271. phba->link_state = LPFC_HBA_ERROR;
  272. /*
  273. * All error attention handlers are posted to
  274. * worker thread
  275. */
  276. phba->work_ha |= HA_ERATT;
  277. phba->work_hs = HS_FFER3;
  278. /* hbalock should already be held */
  279. if (phba->work_wait)
  280. lpfc_worker_wake_up(phba);
  281. return NULL;
  282. }
  283. if (pring->local_getidx == pring->next_cmdidx)
  284. return NULL;
  285. }
  286. return lpfc_cmd_iocb(phba, pring);
  287. }
  288. uint16_t
  289. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  290. {
  291. struct lpfc_iocbq **new_arr;
  292. struct lpfc_iocbq **old_arr;
  293. size_t new_len;
  294. struct lpfc_sli *psli = &phba->sli;
  295. uint16_t iotag;
  296. spin_lock_irq(&phba->hbalock);
  297. iotag = psli->last_iotag;
  298. if(++iotag < psli->iocbq_lookup_len) {
  299. psli->last_iotag = iotag;
  300. psli->iocbq_lookup[iotag] = iocbq;
  301. spin_unlock_irq(&phba->hbalock);
  302. iocbq->iotag = iotag;
  303. return iotag;
  304. } else if (psli->iocbq_lookup_len < (0xffff
  305. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  306. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  307. spin_unlock_irq(&phba->hbalock);
  308. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  309. GFP_KERNEL);
  310. if (new_arr) {
  311. spin_lock_irq(&phba->hbalock);
  312. old_arr = psli->iocbq_lookup;
  313. if (new_len <= psli->iocbq_lookup_len) {
  314. /* highly unprobable case */
  315. kfree(new_arr);
  316. iotag = psli->last_iotag;
  317. if(++iotag < psli->iocbq_lookup_len) {
  318. psli->last_iotag = iotag;
  319. psli->iocbq_lookup[iotag] = iocbq;
  320. spin_unlock_irq(&phba->hbalock);
  321. iocbq->iotag = iotag;
  322. return iotag;
  323. }
  324. spin_unlock_irq(&phba->hbalock);
  325. return 0;
  326. }
  327. if (psli->iocbq_lookup)
  328. memcpy(new_arr, old_arr,
  329. ((psli->last_iotag + 1) *
  330. sizeof (struct lpfc_iocbq *)));
  331. psli->iocbq_lookup = new_arr;
  332. psli->iocbq_lookup_len = new_len;
  333. psli->last_iotag = iotag;
  334. psli->iocbq_lookup[iotag] = iocbq;
  335. spin_unlock_irq(&phba->hbalock);
  336. iocbq->iotag = iotag;
  337. kfree(old_arr);
  338. return iotag;
  339. }
  340. } else
  341. spin_unlock_irq(&phba->hbalock);
  342. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  343. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  344. phba->brd_no, psli->last_iotag);
  345. return 0;
  346. }
  347. static void
  348. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  349. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  350. {
  351. /*
  352. * Set up an iotag
  353. */
  354. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  355. if (pring->ringno == LPFC_ELS_RING) {
  356. lpfc_debugfs_slow_ring_trc(phba,
  357. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  358. *(((uint32_t *) &nextiocb->iocb) + 4),
  359. *(((uint32_t *) &nextiocb->iocb) + 6),
  360. *(((uint32_t *) &nextiocb->iocb) + 7));
  361. }
  362. /*
  363. * Issue iocb command to adapter
  364. */
  365. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  366. wmb();
  367. pring->stats.iocb_cmd++;
  368. /*
  369. * If there is no completion routine to call, we can release the
  370. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  371. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  372. */
  373. if (nextiocb->iocb_cmpl)
  374. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  375. else
  376. __lpfc_sli_release_iocbq(phba, nextiocb);
  377. /*
  378. * Let the HBA know what IOCB slot will be the next one the
  379. * driver will put a command into.
  380. */
  381. pring->cmdidx = pring->next_cmdidx;
  382. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  383. }
  384. static void
  385. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  386. {
  387. int ringno = pring->ringno;
  388. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  389. wmb();
  390. /*
  391. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  392. * The HBA will tell us when an IOCB entry is available.
  393. */
  394. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  395. readl(phba->CAregaddr); /* flush */
  396. pring->stats.iocb_cmd_full++;
  397. }
  398. static void
  399. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  400. {
  401. int ringno = pring->ringno;
  402. /*
  403. * Tell the HBA that there is work to do in this ring.
  404. */
  405. wmb();
  406. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  407. readl(phba->CAregaddr); /* flush */
  408. }
  409. static void
  410. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  411. {
  412. IOCB_t *iocb;
  413. struct lpfc_iocbq *nextiocb;
  414. /*
  415. * Check to see if:
  416. * (a) there is anything on the txq to send
  417. * (b) link is up
  418. * (c) link attention events can be processed (fcp ring only)
  419. * (d) IOCB processing is not blocked by the outstanding mbox command.
  420. */
  421. if (pring->txq_cnt &&
  422. lpfc_is_link_up(phba) &&
  423. (pring->ringno != phba->sli.fcp_ring ||
  424. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  425. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  426. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  427. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  428. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  429. if (iocb)
  430. lpfc_sli_update_ring(phba, pring);
  431. else
  432. lpfc_sli_update_full_ring(phba, pring);
  433. }
  434. return;
  435. }
  436. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  437. static void
  438. lpfc_sli_turn_on_ring(struct lpfc_hba *phba, int ringno)
  439. {
  440. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  441. &phba->slim2p->mbx.us.s3_pgp.port[ringno] :
  442. &phba->slim2p->mbx.us.s2.port[ringno];
  443. unsigned long iflags;
  444. /* If the ring is active, flag it */
  445. spin_lock_irqsave(&phba->hbalock, iflags);
  446. if (phba->sli.ring[ringno].cmdringaddr) {
  447. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  448. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  449. /*
  450. * Force update of the local copy of cmdGetInx
  451. */
  452. phba->sli.ring[ringno].local_getidx
  453. = le32_to_cpu(pgp->cmdGetInx);
  454. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  455. }
  456. }
  457. spin_unlock_irqrestore(&phba->hbalock, iflags);
  458. }
  459. struct lpfc_hbq_entry *
  460. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  461. {
  462. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  463. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  464. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  465. hbqp->next_hbqPutIdx = 0;
  466. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  467. uint32_t raw_index = phba->hbq_get[hbqno];
  468. uint32_t getidx = le32_to_cpu(raw_index);
  469. hbqp->local_hbqGetIdx = getidx;
  470. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  471. lpfc_printf_log(phba, KERN_ERR,
  472. LOG_SLI | LOG_VPORT,
  473. "%d:1802 HBQ %d: local_hbqGetIdx "
  474. "%u is > than hbqp->entry_count %u\n",
  475. phba->brd_no, hbqno,
  476. hbqp->local_hbqGetIdx,
  477. hbqp->entry_count);
  478. phba->link_state = LPFC_HBA_ERROR;
  479. return NULL;
  480. }
  481. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  482. return NULL;
  483. }
  484. return (struct lpfc_hbq_entry *) phba->hbqslimp.virt + hbqp->hbqPutIdx;
  485. }
  486. void
  487. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  488. {
  489. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  490. struct hbq_dmabuf *hbq_buf;
  491. /* Return all memory used by all HBQs */
  492. list_for_each_entry_safe(dmabuf, next_dmabuf,
  493. &phba->hbq_buffer_list, list) {
  494. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  495. list_del(&hbq_buf->dbuf.list);
  496. lpfc_hbq_free(phba, hbq_buf->dbuf.virt, hbq_buf->dbuf.phys);
  497. kfree(hbq_buf);
  498. }
  499. }
  500. static void
  501. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  502. struct hbq_dmabuf *hbq_buf)
  503. {
  504. struct lpfc_hbq_entry *hbqe;
  505. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  506. /* Get next HBQ entry slot to use */
  507. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  508. if (hbqe) {
  509. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  510. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  511. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  512. hbqe->bde.tus.f.bdeSize = FCELSSIZE;
  513. hbqe->bde.tus.f.bdeFlags = 0;
  514. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  515. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  516. /* Sync SLIM */
  517. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  518. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  519. /* flush */
  520. readl(phba->hbq_put + hbqno);
  521. list_add_tail(&hbq_buf->dbuf.list, &phba->hbq_buffer_list);
  522. }
  523. }
  524. static struct lpfc_hbq_init lpfc_els_hbq = {
  525. .rn = 1,
  526. .entry_count = 200,
  527. .mask_count = 0,
  528. .profile = 0,
  529. .ring_mask = 1 << LPFC_ELS_RING,
  530. .buffer_count = 0,
  531. .init_count = 20,
  532. .add_count = 5,
  533. };
  534. static struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  535. &lpfc_els_hbq,
  536. };
  537. int
  538. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  539. {
  540. uint32_t i, start, end;
  541. struct hbq_dmabuf *hbq_buffer;
  542. start = lpfc_hbq_defs[hbqno]->buffer_count;
  543. end = count + lpfc_hbq_defs[hbqno]->buffer_count;
  544. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  545. end = lpfc_hbq_defs[hbqno]->entry_count;
  546. }
  547. /* Populate HBQ entries */
  548. for (i = start; i < end; i++) {
  549. hbq_buffer = kmalloc(sizeof(struct hbq_dmabuf),
  550. GFP_KERNEL);
  551. if (!hbq_buffer)
  552. return 1;
  553. hbq_buffer->dbuf.virt = lpfc_hbq_alloc(phba, MEM_PRI,
  554. &hbq_buffer->dbuf.phys);
  555. if (hbq_buffer->dbuf.virt == NULL)
  556. return 1;
  557. hbq_buffer->tag = (i | (hbqno << 16));
  558. lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer);
  559. lpfc_hbq_defs[hbqno]->buffer_count++;
  560. }
  561. return 0;
  562. }
  563. int
  564. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  565. {
  566. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  567. lpfc_hbq_defs[qno]->add_count));
  568. }
  569. int
  570. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  571. {
  572. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  573. lpfc_hbq_defs[qno]->init_count));
  574. }
  575. struct hbq_dmabuf *
  576. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  577. {
  578. struct lpfc_dmabuf *d_buf;
  579. struct hbq_dmabuf *hbq_buf;
  580. list_for_each_entry(d_buf, &phba->hbq_buffer_list, list) {
  581. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  582. if ((hbq_buf->tag & 0xffff) == tag) {
  583. return hbq_buf;
  584. }
  585. }
  586. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  587. "%d:1803 Bad hbq tag. Data: x%x x%x\n",
  588. phba->brd_no, tag,
  589. lpfc_hbq_defs[tag >> 16]->buffer_count);
  590. return NULL;
  591. }
  592. void
  593. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *sp)
  594. {
  595. uint32_t hbqno;
  596. if (sp) {
  597. hbqno = sp->tag >> 16;
  598. lpfc_sli_hbq_to_firmware(phba, hbqno, sp);
  599. }
  600. }
  601. static int
  602. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  603. {
  604. uint8_t ret;
  605. switch (mbxCommand) {
  606. case MBX_LOAD_SM:
  607. case MBX_READ_NV:
  608. case MBX_WRITE_NV:
  609. case MBX_RUN_BIU_DIAG:
  610. case MBX_INIT_LINK:
  611. case MBX_DOWN_LINK:
  612. case MBX_CONFIG_LINK:
  613. case MBX_CONFIG_RING:
  614. case MBX_RESET_RING:
  615. case MBX_READ_CONFIG:
  616. case MBX_READ_RCONFIG:
  617. case MBX_READ_SPARM:
  618. case MBX_READ_STATUS:
  619. case MBX_READ_RPI:
  620. case MBX_READ_XRI:
  621. case MBX_READ_REV:
  622. case MBX_READ_LNK_STAT:
  623. case MBX_REG_LOGIN:
  624. case MBX_UNREG_LOGIN:
  625. case MBX_READ_LA:
  626. case MBX_CLEAR_LA:
  627. case MBX_DUMP_MEMORY:
  628. case MBX_DUMP_CONTEXT:
  629. case MBX_RUN_DIAGS:
  630. case MBX_RESTART:
  631. case MBX_UPDATE_CFG:
  632. case MBX_DOWN_LOAD:
  633. case MBX_DEL_LD_ENTRY:
  634. case MBX_RUN_PROGRAM:
  635. case MBX_SET_MASK:
  636. case MBX_SET_SLIM:
  637. case MBX_UNREG_D_ID:
  638. case MBX_KILL_BOARD:
  639. case MBX_CONFIG_FARP:
  640. case MBX_BEACON:
  641. case MBX_LOAD_AREA:
  642. case MBX_RUN_BIU_DIAG64:
  643. case MBX_CONFIG_PORT:
  644. case MBX_READ_SPARM64:
  645. case MBX_READ_RPI64:
  646. case MBX_REG_LOGIN64:
  647. case MBX_READ_LA64:
  648. case MBX_FLASH_WR_ULA:
  649. case MBX_SET_DEBUG:
  650. case MBX_LOAD_EXP_ROM:
  651. case MBX_REG_VPI:
  652. case MBX_UNREG_VPI:
  653. case MBX_HEARTBEAT:
  654. ret = mbxCommand;
  655. break;
  656. default:
  657. ret = MBX_SHUTDOWN;
  658. break;
  659. }
  660. return ret;
  661. }
  662. static void
  663. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  664. {
  665. wait_queue_head_t *pdone_q;
  666. unsigned long drvr_flag;
  667. /*
  668. * If pdone_q is empty, the driver thread gave up waiting and
  669. * continued running.
  670. */
  671. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  672. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  673. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  674. if (pdone_q)
  675. wake_up_interruptible(pdone_q);
  676. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  677. return;
  678. }
  679. void
  680. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  681. {
  682. struct lpfc_dmabuf *mp;
  683. uint16_t rpi;
  684. int rc;
  685. mp = (struct lpfc_dmabuf *) (pmb->context1);
  686. if (mp) {
  687. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  688. kfree(mp);
  689. }
  690. /*
  691. * If a REG_LOGIN succeeded after node is destroyed or node
  692. * is in re-discovery driver need to cleanup the RPI.
  693. */
  694. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  695. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  696. !pmb->mb.mbxStatus) {
  697. rpi = pmb->mb.un.varWords[0];
  698. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  699. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  700. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  701. if (rc != MBX_NOT_FINISHED)
  702. return;
  703. }
  704. mempool_free(pmb, phba->mbox_mem_pool);
  705. return;
  706. }
  707. int
  708. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  709. {
  710. MAILBOX_t *pmbox;
  711. LPFC_MBOXQ_t *pmb;
  712. int rc;
  713. LIST_HEAD(cmplq);
  714. phba->sli.slistat.mbox_event++;
  715. /* Get all completed mailboxe buffers into the cmplq */
  716. spin_lock_irq(&phba->hbalock);
  717. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  718. spin_unlock_irq(&phba->hbalock);
  719. /* Get a Mailbox buffer to setup mailbox commands for callback */
  720. do {
  721. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  722. if (pmb == NULL)
  723. break;
  724. pmbox = &pmb->mb;
  725. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  726. if (pmb->vport) {
  727. lpfc_debugfs_disc_trc(pmb->vport,
  728. LPFC_DISC_TRC_MBOX_VPORT,
  729. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  730. (uint32_t)pmbox->mbxCommand,
  731. pmbox->un.varWords[0],
  732. pmbox->un.varWords[1]);
  733. }
  734. else {
  735. lpfc_debugfs_disc_trc(phba->pport,
  736. LPFC_DISC_TRC_MBOX,
  737. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  738. (uint32_t)pmbox->mbxCommand,
  739. pmbox->un.varWords[0],
  740. pmbox->un.varWords[1]);
  741. }
  742. }
  743. /*
  744. * It is a fatal error if unknown mbox command completion.
  745. */
  746. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  747. MBX_SHUTDOWN) {
  748. /* Unknow mailbox command compl */
  749. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  750. "%d (%d):0323 Unknown Mailbox command "
  751. "%x Cmpl\n",
  752. phba->brd_no,
  753. pmb->vport ? pmb->vport->vpi : 0,
  754. pmbox->mbxCommand);
  755. phba->link_state = LPFC_HBA_ERROR;
  756. phba->work_hs = HS_FFER3;
  757. lpfc_handle_eratt(phba);
  758. continue;
  759. }
  760. if (pmbox->mbxStatus) {
  761. phba->sli.slistat.mbox_stat_err++;
  762. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  763. /* Mbox cmd cmpl error - RETRYing */
  764. lpfc_printf_log(phba, KERN_INFO,
  765. LOG_MBOX | LOG_SLI,
  766. "%d (%d):0305 Mbox cmd cmpl "
  767. "error - RETRYing Data: x%x "
  768. "x%x x%x x%x\n",
  769. phba->brd_no,
  770. pmb->vport ? pmb->vport->vpi :0,
  771. pmbox->mbxCommand,
  772. pmbox->mbxStatus,
  773. pmbox->un.varWords[0],
  774. pmb->vport->port_state);
  775. pmbox->mbxStatus = 0;
  776. pmbox->mbxOwner = OWN_HOST;
  777. spin_lock_irq(&phba->hbalock);
  778. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  779. spin_unlock_irq(&phba->hbalock);
  780. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  781. if (rc == MBX_SUCCESS)
  782. continue;
  783. }
  784. }
  785. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  786. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  787. "%d (%d):0307 Mailbox cmd x%x Cmpl x%p "
  788. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  789. phba->brd_no,
  790. pmb->vport ? pmb->vport->vpi : 0,
  791. pmbox->mbxCommand,
  792. pmb->mbox_cmpl,
  793. *((uint32_t *) pmbox),
  794. pmbox->un.varWords[0],
  795. pmbox->un.varWords[1],
  796. pmbox->un.varWords[2],
  797. pmbox->un.varWords[3],
  798. pmbox->un.varWords[4],
  799. pmbox->un.varWords[5],
  800. pmbox->un.varWords[6],
  801. pmbox->un.varWords[7]);
  802. if (pmb->mbox_cmpl)
  803. pmb->mbox_cmpl(phba,pmb);
  804. } while (1);
  805. return 0;
  806. }
  807. static struct lpfc_dmabuf *
  808. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  809. {
  810. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  811. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  812. if (hbq_entry == NULL)
  813. return NULL;
  814. list_del(&hbq_entry->dbuf.list);
  815. new_hbq_entry = kmalloc(sizeof(struct hbq_dmabuf), GFP_ATOMIC);
  816. if (new_hbq_entry == NULL)
  817. return &hbq_entry->dbuf;
  818. new_hbq_entry->dbuf = hbq_entry->dbuf;
  819. new_hbq_entry->tag = -1;
  820. hbq_entry->dbuf.virt = lpfc_hbq_alloc(phba, 0, &hbq_entry->dbuf.phys);
  821. if (hbq_entry->dbuf.virt == NULL) {
  822. kfree(new_hbq_entry);
  823. return &hbq_entry->dbuf;
  824. }
  825. lpfc_sli_free_hbq(phba, hbq_entry);
  826. return &new_hbq_entry->dbuf;
  827. }
  828. static int
  829. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  830. struct lpfc_iocbq *saveq)
  831. {
  832. IOCB_t * irsp;
  833. WORD5 * w5p;
  834. uint32_t Rctl, Type;
  835. uint32_t match, i;
  836. match = 0;
  837. irsp = &(saveq->iocb);
  838. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  839. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  840. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  841. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  842. Rctl = FC_ELS_REQ;
  843. Type = FC_ELS_DATA;
  844. } else {
  845. w5p =
  846. (WORD5 *) & (saveq->iocb.un.
  847. ulpWord[5]);
  848. Rctl = w5p->hcsw.Rctl;
  849. Type = w5p->hcsw.Type;
  850. /* Firmware Workaround */
  851. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  852. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  853. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  854. Rctl = FC_ELS_REQ;
  855. Type = FC_ELS_DATA;
  856. w5p->hcsw.Rctl = Rctl;
  857. w5p->hcsw.Type = Type;
  858. }
  859. }
  860. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  861. if (irsp->ulpBdeCount != 0)
  862. saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
  863. irsp->un.ulpWord[3]);
  864. if (irsp->ulpBdeCount == 2)
  865. saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
  866. irsp->un.ulpWord[15]);
  867. }
  868. /* unSolicited Responses */
  869. if (pring->prt[0].profile) {
  870. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  871. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  872. saveq);
  873. match = 1;
  874. } else {
  875. /* We must search, based on rctl / type
  876. for the right routine */
  877. for (i = 0; i < pring->num_mask;
  878. i++) {
  879. if ((pring->prt[i].rctl ==
  880. Rctl)
  881. && (pring->prt[i].
  882. type == Type)) {
  883. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  884. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  885. (phba, pring, saveq);
  886. match = 1;
  887. break;
  888. }
  889. }
  890. }
  891. if (match == 0) {
  892. /* Unexpected Rctl / Type received */
  893. /* Ring <ringno> handler: unexpected
  894. Rctl <Rctl> Type <Type> received */
  895. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  896. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  897. "Type x%x received\n",
  898. phba->brd_no,
  899. pring->ringno,
  900. Rctl,
  901. Type);
  902. }
  903. return 1;
  904. }
  905. static struct lpfc_iocbq *
  906. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  907. struct lpfc_sli_ring *pring,
  908. struct lpfc_iocbq *prspiocb)
  909. {
  910. struct lpfc_iocbq *cmd_iocb = NULL;
  911. uint16_t iotag;
  912. iotag = prspiocb->iocb.ulpIoTag;
  913. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  914. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  915. list_del_init(&cmd_iocb->list);
  916. pring->txcmplq_cnt--;
  917. return cmd_iocb;
  918. }
  919. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  920. "%d:0317 iotag x%x is out off "
  921. "range: max iotag x%x wd0 x%x\n",
  922. phba->brd_no, iotag,
  923. phba->sli.last_iotag,
  924. *(((uint32_t *) &prspiocb->iocb) + 7));
  925. return NULL;
  926. }
  927. static int
  928. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  929. struct lpfc_iocbq *saveq)
  930. {
  931. struct lpfc_iocbq *cmdiocbp;
  932. int rc = 1;
  933. unsigned long iflag;
  934. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  935. spin_lock_irqsave(&phba->hbalock, iflag);
  936. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  937. spin_unlock_irqrestore(&phba->hbalock, iflag);
  938. if (cmdiocbp) {
  939. if (cmdiocbp->iocb_cmpl) {
  940. /*
  941. * Post all ELS completions to the worker thread.
  942. * All other are passed to the completion callback.
  943. */
  944. if (pring->ringno == LPFC_ELS_RING) {
  945. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  946. cmdiocbp->iocb_flag &=
  947. ~LPFC_DRIVER_ABORTED;
  948. saveq->iocb.ulpStatus =
  949. IOSTAT_LOCAL_REJECT;
  950. saveq->iocb.un.ulpWord[4] =
  951. IOERR_SLI_ABORTED;
  952. }
  953. }
  954. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  955. } else
  956. lpfc_sli_release_iocbq(phba, cmdiocbp);
  957. } else {
  958. /*
  959. * Unknown initiating command based on the response iotag.
  960. * This could be the case on the ELS ring because of
  961. * lpfc_els_abort().
  962. */
  963. if (pring->ringno != LPFC_ELS_RING) {
  964. /*
  965. * Ring <ringno> handler: unexpected completion IoTag
  966. * <IoTag>
  967. */
  968. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  969. "%d (%d):0322 Ring %d handler: "
  970. "unexpected completion IoTag x%x "
  971. "Data: x%x x%x x%x x%x\n",
  972. phba->brd_no,
  973. cmdiocbp->vport->vpi,
  974. pring->ringno,
  975. saveq->iocb.ulpIoTag,
  976. saveq->iocb.ulpStatus,
  977. saveq->iocb.un.ulpWord[4],
  978. saveq->iocb.ulpCommand,
  979. saveq->iocb.ulpContext);
  980. }
  981. }
  982. return rc;
  983. }
  984. static void
  985. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  986. {
  987. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  988. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  989. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  990. /*
  991. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  992. * rsp ring <portRspMax>
  993. */
  994. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  995. "%d:0312 Ring %d handler: portRspPut %d "
  996. "is bigger then rsp ring %d\n",
  997. phba->brd_no, pring->ringno,
  998. le32_to_cpu(pgp->rspPutInx),
  999. pring->numRiocb);
  1000. phba->link_state = LPFC_HBA_ERROR;
  1001. /*
  1002. * All error attention handlers are posted to
  1003. * worker thread
  1004. */
  1005. phba->work_ha |= HA_ERATT;
  1006. phba->work_hs = HS_FFER3;
  1007. /* hbalock should already be held */
  1008. if (phba->work_wait)
  1009. lpfc_worker_wake_up(phba);
  1010. return;
  1011. }
  1012. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1013. {
  1014. struct lpfc_sli *psli = &phba->sli;
  1015. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1016. IOCB_t *irsp = NULL;
  1017. IOCB_t *entry = NULL;
  1018. struct lpfc_iocbq *cmdiocbq = NULL;
  1019. struct lpfc_iocbq rspiocbq;
  1020. struct lpfc_pgp *pgp;
  1021. uint32_t status;
  1022. uint32_t portRspPut, portRspMax;
  1023. int type;
  1024. uint32_t rsp_cmpl = 0;
  1025. uint32_t ha_copy;
  1026. unsigned long iflags;
  1027. pring->stats.iocb_event++;
  1028. pgp = (phba->sli_rev == 3) ?
  1029. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1030. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1031. /*
  1032. * The next available response entry should never exceed the maximum
  1033. * entries. If it does, treat it as an adapter hardware error.
  1034. */
  1035. portRspMax = pring->numRiocb;
  1036. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1037. if (unlikely(portRspPut >= portRspMax)) {
  1038. lpfc_sli_rsp_pointers_error(phba, pring);
  1039. return;
  1040. }
  1041. rmb();
  1042. while (pring->rspidx != portRspPut) {
  1043. entry = lpfc_resp_iocb(phba, pring);
  1044. if (++pring->rspidx >= portRspMax)
  1045. pring->rspidx = 0;
  1046. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1047. (uint32_t *) &rspiocbq.iocb,
  1048. phba->iocb_rsp_size);
  1049. irsp = &rspiocbq.iocb;
  1050. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1051. pring->stats.iocb_rsp++;
  1052. rsp_cmpl++;
  1053. if (unlikely(irsp->ulpStatus)) {
  1054. /* Rsp ring <ringno> error: IOCB */
  1055. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1056. "%d:0326 Rsp Ring %d error: IOCB Data: "
  1057. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1058. phba->brd_no, pring->ringno,
  1059. irsp->un.ulpWord[0],
  1060. irsp->un.ulpWord[1],
  1061. irsp->un.ulpWord[2],
  1062. irsp->un.ulpWord[3],
  1063. irsp->un.ulpWord[4],
  1064. irsp->un.ulpWord[5],
  1065. *(((uint32_t *) irsp) + 6),
  1066. *(((uint32_t *) irsp) + 7));
  1067. }
  1068. switch (type) {
  1069. case LPFC_ABORT_IOCB:
  1070. case LPFC_SOL_IOCB:
  1071. /*
  1072. * Idle exchange closed via ABTS from port. No iocb
  1073. * resources need to be recovered.
  1074. */
  1075. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1076. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1077. "%d:0314 IOCB cmd 0x%x"
  1078. " processed. Skipping"
  1079. " completion", phba->brd_no,
  1080. irsp->ulpCommand);
  1081. break;
  1082. }
  1083. spin_lock_irqsave(&phba->hbalock, iflags);
  1084. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1085. &rspiocbq);
  1086. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1087. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1088. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1089. &rspiocbq);
  1090. }
  1091. break;
  1092. default:
  1093. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1094. char adaptermsg[LPFC_MAX_ADPTMSG];
  1095. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1096. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1097. MAX_MSG_DATA);
  1098. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1099. phba->brd_no, adaptermsg);
  1100. } else {
  1101. /* Unknown IOCB command */
  1102. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1103. "%d:0321 Unknown IOCB command "
  1104. "Data: x%x, x%x x%x x%x x%x\n",
  1105. phba->brd_no, type,
  1106. irsp->ulpCommand,
  1107. irsp->ulpStatus,
  1108. irsp->ulpIoTag,
  1109. irsp->ulpContext);
  1110. }
  1111. break;
  1112. }
  1113. /*
  1114. * The response IOCB has been processed. Update the ring
  1115. * pointer in SLIM. If the port response put pointer has not
  1116. * been updated, sync the pgp->rspPutInx and fetch the new port
  1117. * response put pointer.
  1118. */
  1119. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1120. if (pring->rspidx == portRspPut)
  1121. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1122. }
  1123. ha_copy = readl(phba->HAregaddr);
  1124. ha_copy >>= (LPFC_FCP_RING * 4);
  1125. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1126. spin_lock_irqsave(&phba->hbalock, iflags);
  1127. pring->stats.iocb_rsp_full++;
  1128. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1129. writel(status, phba->CAregaddr);
  1130. readl(phba->CAregaddr);
  1131. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1132. }
  1133. if ((ha_copy & HA_R0CE_RSP) &&
  1134. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1135. spin_lock_irqsave(&phba->hbalock, iflags);
  1136. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1137. pring->stats.iocb_cmd_empty++;
  1138. /* Force update of the local copy of cmdGetInx */
  1139. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1140. lpfc_sli_resume_iocb(phba, pring);
  1141. if ((pring->lpfc_sli_cmd_available))
  1142. (pring->lpfc_sli_cmd_available) (phba, pring);
  1143. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1144. }
  1145. return;
  1146. }
  1147. /*
  1148. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1149. * to check it explicitly.
  1150. */
  1151. static int
  1152. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1153. struct lpfc_sli_ring *pring, uint32_t mask)
  1154. {
  1155. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1156. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1157. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1158. IOCB_t *irsp = NULL;
  1159. IOCB_t *entry = NULL;
  1160. struct lpfc_iocbq *cmdiocbq = NULL;
  1161. struct lpfc_iocbq rspiocbq;
  1162. uint32_t status;
  1163. uint32_t portRspPut, portRspMax;
  1164. int rc = 1;
  1165. lpfc_iocb_type type;
  1166. unsigned long iflag;
  1167. uint32_t rsp_cmpl = 0;
  1168. spin_lock_irqsave(&phba->hbalock, iflag);
  1169. pring->stats.iocb_event++;
  1170. /*
  1171. * The next available response entry should never exceed the maximum
  1172. * entries. If it does, treat it as an adapter hardware error.
  1173. */
  1174. portRspMax = pring->numRiocb;
  1175. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1176. if (unlikely(portRspPut >= portRspMax)) {
  1177. lpfc_sli_rsp_pointers_error(phba, pring);
  1178. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1179. return 1;
  1180. }
  1181. rmb();
  1182. while (pring->rspidx != portRspPut) {
  1183. /*
  1184. * Fetch an entry off the ring and copy it into a local data
  1185. * structure. The copy involves a byte-swap since the
  1186. * network byte order and pci byte orders are different.
  1187. */
  1188. entry = lpfc_resp_iocb(phba, pring);
  1189. phba->last_completion_time = jiffies;
  1190. if (++pring->rspidx >= portRspMax)
  1191. pring->rspidx = 0;
  1192. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1193. (uint32_t *) &rspiocbq.iocb,
  1194. phba->iocb_rsp_size);
  1195. INIT_LIST_HEAD(&(rspiocbq.list));
  1196. irsp = &rspiocbq.iocb;
  1197. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1198. pring->stats.iocb_rsp++;
  1199. rsp_cmpl++;
  1200. if (unlikely(irsp->ulpStatus)) {
  1201. /*
  1202. * If resource errors reported from HBA, reduce
  1203. * queuedepths of the SCSI device.
  1204. */
  1205. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1206. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1207. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1208. lpfc_adjust_queue_depth(phba);
  1209. spin_lock_irqsave(&phba->hbalock, iflag);
  1210. }
  1211. /* Rsp ring <ringno> error: IOCB */
  1212. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1213. "%d:0336 Rsp Ring %d error: IOCB Data: "
  1214. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1215. phba->brd_no, pring->ringno,
  1216. irsp->un.ulpWord[0],
  1217. irsp->un.ulpWord[1],
  1218. irsp->un.ulpWord[2],
  1219. irsp->un.ulpWord[3],
  1220. irsp->un.ulpWord[4],
  1221. irsp->un.ulpWord[5],
  1222. *(((uint32_t *) irsp) + 6),
  1223. *(((uint32_t *) irsp) + 7));
  1224. }
  1225. switch (type) {
  1226. case LPFC_ABORT_IOCB:
  1227. case LPFC_SOL_IOCB:
  1228. /*
  1229. * Idle exchange closed via ABTS from port. No iocb
  1230. * resources need to be recovered.
  1231. */
  1232. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1233. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1234. "%d:0333 IOCB cmd 0x%x"
  1235. " processed. Skipping"
  1236. " completion\n",
  1237. phba->brd_no,
  1238. irsp->ulpCommand);
  1239. break;
  1240. }
  1241. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1242. &rspiocbq);
  1243. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1244. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1245. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1246. &rspiocbq);
  1247. } else {
  1248. spin_unlock_irqrestore(&phba->hbalock,
  1249. iflag);
  1250. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1251. &rspiocbq);
  1252. spin_lock_irqsave(&phba->hbalock,
  1253. iflag);
  1254. }
  1255. }
  1256. break;
  1257. case LPFC_UNSOL_IOCB:
  1258. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1259. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1260. spin_lock_irqsave(&phba->hbalock, iflag);
  1261. break;
  1262. default:
  1263. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1264. char adaptermsg[LPFC_MAX_ADPTMSG];
  1265. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1266. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1267. MAX_MSG_DATA);
  1268. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1269. phba->brd_no, adaptermsg);
  1270. } else {
  1271. /* Unknown IOCB command */
  1272. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1273. "%d:0334 Unknown IOCB command "
  1274. "Data: x%x, x%x x%x x%x x%x\n",
  1275. phba->brd_no, type,
  1276. irsp->ulpCommand,
  1277. irsp->ulpStatus,
  1278. irsp->ulpIoTag,
  1279. irsp->ulpContext);
  1280. }
  1281. break;
  1282. }
  1283. /*
  1284. * The response IOCB has been processed. Update the ring
  1285. * pointer in SLIM. If the port response put pointer has not
  1286. * been updated, sync the pgp->rspPutInx and fetch the new port
  1287. * response put pointer.
  1288. */
  1289. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1290. if (pring->rspidx == portRspPut)
  1291. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1292. }
  1293. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1294. pring->stats.iocb_rsp_full++;
  1295. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1296. writel(status, phba->CAregaddr);
  1297. readl(phba->CAregaddr);
  1298. }
  1299. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1300. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1301. pring->stats.iocb_cmd_empty++;
  1302. /* Force update of the local copy of cmdGetInx */
  1303. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1304. lpfc_sli_resume_iocb(phba, pring);
  1305. if ((pring->lpfc_sli_cmd_available))
  1306. (pring->lpfc_sli_cmd_available) (phba, pring);
  1307. }
  1308. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1309. return rc;
  1310. }
  1311. int
  1312. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1313. struct lpfc_sli_ring *pring, uint32_t mask)
  1314. {
  1315. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1316. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1317. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1318. IOCB_t *entry;
  1319. IOCB_t *irsp = NULL;
  1320. struct lpfc_iocbq *rspiocbp = NULL;
  1321. struct lpfc_iocbq *next_iocb;
  1322. struct lpfc_iocbq *cmdiocbp;
  1323. struct lpfc_iocbq *saveq;
  1324. uint8_t iocb_cmd_type;
  1325. lpfc_iocb_type type;
  1326. uint32_t status, free_saveq;
  1327. uint32_t portRspPut, portRspMax;
  1328. int rc = 1;
  1329. unsigned long iflag;
  1330. spin_lock_irqsave(&phba->hbalock, iflag);
  1331. pring->stats.iocb_event++;
  1332. /*
  1333. * The next available response entry should never exceed the maximum
  1334. * entries. If it does, treat it as an adapter hardware error.
  1335. */
  1336. portRspMax = pring->numRiocb;
  1337. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1338. if (portRspPut >= portRspMax) {
  1339. /*
  1340. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1341. * rsp ring <portRspMax>
  1342. */
  1343. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1344. "%d:0303 Ring %d handler: portRspPut %d "
  1345. "is bigger then rsp ring %d\n",
  1346. phba->brd_no, pring->ringno, portRspPut,
  1347. portRspMax);
  1348. phba->link_state = LPFC_HBA_ERROR;
  1349. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1350. phba->work_hs = HS_FFER3;
  1351. lpfc_handle_eratt(phba);
  1352. return 1;
  1353. }
  1354. rmb();
  1355. while (pring->rspidx != portRspPut) {
  1356. /*
  1357. * Build a completion list and call the appropriate handler.
  1358. * The process is to get the next available response iocb, get
  1359. * a free iocb from the list, copy the response data into the
  1360. * free iocb, insert to the continuation list, and update the
  1361. * next response index to slim. This process makes response
  1362. * iocb's in the ring available to DMA as fast as possible but
  1363. * pays a penalty for a copy operation. Since the iocb is
  1364. * only 32 bytes, this penalty is considered small relative to
  1365. * the PCI reads for register values and a slim write. When
  1366. * the ulpLe field is set, the entire Command has been
  1367. * received.
  1368. */
  1369. entry = lpfc_resp_iocb(phba, pring);
  1370. phba->last_completion_time = jiffies;
  1371. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1372. if (rspiocbp == NULL) {
  1373. printk(KERN_ERR "%s: out of buffers! Failing "
  1374. "completion.\n", __FUNCTION__);
  1375. break;
  1376. }
  1377. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1378. phba->iocb_rsp_size);
  1379. irsp = &rspiocbp->iocb;
  1380. if (++pring->rspidx >= portRspMax)
  1381. pring->rspidx = 0;
  1382. if (pring->ringno == LPFC_ELS_RING) {
  1383. lpfc_debugfs_slow_ring_trc(phba,
  1384. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1385. *(((uint32_t *) irsp) + 4),
  1386. *(((uint32_t *) irsp) + 6),
  1387. *(((uint32_t *) irsp) + 7));
  1388. }
  1389. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1390. if (list_empty(&(pring->iocb_continueq))) {
  1391. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1392. } else {
  1393. list_add_tail(&rspiocbp->list,
  1394. &(pring->iocb_continueq));
  1395. }
  1396. pring->iocb_continueq_cnt++;
  1397. if (irsp->ulpLe) {
  1398. /*
  1399. * By default, the driver expects to free all resources
  1400. * associated with this iocb completion.
  1401. */
  1402. free_saveq = 1;
  1403. saveq = list_get_first(&pring->iocb_continueq,
  1404. struct lpfc_iocbq, list);
  1405. irsp = &(saveq->iocb);
  1406. list_del_init(&pring->iocb_continueq);
  1407. pring->iocb_continueq_cnt = 0;
  1408. pring->stats.iocb_rsp++;
  1409. /*
  1410. * If resource errors reported from HBA, reduce
  1411. * queuedepths of the SCSI device.
  1412. */
  1413. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1414. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1415. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1416. lpfc_adjust_queue_depth(phba);
  1417. spin_lock_irqsave(&phba->hbalock, iflag);
  1418. }
  1419. if (irsp->ulpStatus) {
  1420. /* Rsp ring <ringno> error: IOCB */
  1421. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1422. "%d:0328 Rsp Ring %d error: "
  1423. "IOCB Data: "
  1424. "x%x x%x x%x x%x "
  1425. "x%x x%x x%x x%x "
  1426. "x%x x%x x%x x%x "
  1427. "x%x x%x x%x x%x\n",
  1428. phba->brd_no,
  1429. pring->ringno,
  1430. irsp->un.ulpWord[0],
  1431. irsp->un.ulpWord[1],
  1432. irsp->un.ulpWord[2],
  1433. irsp->un.ulpWord[3],
  1434. irsp->un.ulpWord[4],
  1435. irsp->un.ulpWord[5],
  1436. *(((uint32_t *) irsp) + 6),
  1437. *(((uint32_t *) irsp) + 7),
  1438. *(((uint32_t *) irsp) + 8),
  1439. *(((uint32_t *) irsp) + 9),
  1440. *(((uint32_t *) irsp) + 10),
  1441. *(((uint32_t *) irsp) + 11),
  1442. *(((uint32_t *) irsp) + 12),
  1443. *(((uint32_t *) irsp) + 13),
  1444. *(((uint32_t *) irsp) + 14),
  1445. *(((uint32_t *) irsp) + 15));
  1446. }
  1447. /*
  1448. * Fetch the IOCB command type and call the correct
  1449. * completion routine. Solicited and Unsolicited
  1450. * IOCBs on the ELS ring get freed back to the
  1451. * lpfc_iocb_list by the discovery kernel thread.
  1452. */
  1453. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1454. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1455. if (type == LPFC_SOL_IOCB) {
  1456. spin_unlock_irqrestore(&phba->hbalock,
  1457. iflag);
  1458. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1459. saveq);
  1460. spin_lock_irqsave(&phba->hbalock, iflag);
  1461. } else if (type == LPFC_UNSOL_IOCB) {
  1462. spin_unlock_irqrestore(&phba->hbalock,
  1463. iflag);
  1464. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1465. saveq);
  1466. spin_lock_irqsave(&phba->hbalock, iflag);
  1467. } else if (type == LPFC_ABORT_IOCB) {
  1468. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1469. ((cmdiocbp =
  1470. lpfc_sli_iocbq_lookup(phba, pring,
  1471. saveq)))) {
  1472. /* Call the specified completion
  1473. routine */
  1474. if (cmdiocbp->iocb_cmpl) {
  1475. spin_unlock_irqrestore(
  1476. &phba->hbalock,
  1477. iflag);
  1478. (cmdiocbp->iocb_cmpl) (phba,
  1479. cmdiocbp, saveq);
  1480. spin_lock_irqsave(
  1481. &phba->hbalock,
  1482. iflag);
  1483. } else
  1484. __lpfc_sli_release_iocbq(phba,
  1485. cmdiocbp);
  1486. }
  1487. } else if (type == LPFC_UNKNOWN_IOCB) {
  1488. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1489. char adaptermsg[LPFC_MAX_ADPTMSG];
  1490. memset(adaptermsg, 0,
  1491. LPFC_MAX_ADPTMSG);
  1492. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1493. MAX_MSG_DATA);
  1494. dev_warn(&((phba->pcidev)->dev),
  1495. "lpfc%d: %s",
  1496. phba->brd_no, adaptermsg);
  1497. } else {
  1498. /* Unknown IOCB command */
  1499. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1500. "%d:0335 Unknown IOCB "
  1501. "command Data: x%x "
  1502. "x%x x%x x%x\n",
  1503. phba->brd_no,
  1504. irsp->ulpCommand,
  1505. irsp->ulpStatus,
  1506. irsp->ulpIoTag,
  1507. irsp->ulpContext);
  1508. }
  1509. }
  1510. if (free_saveq) {
  1511. list_for_each_entry_safe(rspiocbp, next_iocb,
  1512. &saveq->list, list) {
  1513. list_del(&rspiocbp->list);
  1514. __lpfc_sli_release_iocbq(phba,
  1515. rspiocbp);
  1516. }
  1517. __lpfc_sli_release_iocbq(phba, saveq);
  1518. }
  1519. rspiocbp = NULL;
  1520. }
  1521. /*
  1522. * If the port response put pointer has not been updated, sync
  1523. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1524. * response put pointer.
  1525. */
  1526. if (pring->rspidx == portRspPut) {
  1527. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1528. }
  1529. } /* while (pring->rspidx != portRspPut) */
  1530. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1531. /* At least one response entry has been freed */
  1532. pring->stats.iocb_rsp_full++;
  1533. /* SET RxRE_RSP in Chip Att register */
  1534. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1535. writel(status, phba->CAregaddr);
  1536. readl(phba->CAregaddr); /* flush */
  1537. }
  1538. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1539. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1540. pring->stats.iocb_cmd_empty++;
  1541. /* Force update of the local copy of cmdGetInx */
  1542. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1543. lpfc_sli_resume_iocb(phba, pring);
  1544. if ((pring->lpfc_sli_cmd_available))
  1545. (pring->lpfc_sli_cmd_available) (phba, pring);
  1546. }
  1547. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1548. return rc;
  1549. }
  1550. void
  1551. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1552. {
  1553. LIST_HEAD(completions);
  1554. struct lpfc_iocbq *iocb, *next_iocb;
  1555. IOCB_t *cmd = NULL;
  1556. if (pring->ringno == LPFC_ELS_RING) {
  1557. lpfc_fabric_abort_hba(phba);
  1558. }
  1559. /* Error everything on txq and txcmplq
  1560. * First do the txq.
  1561. */
  1562. spin_lock_irq(&phba->hbalock);
  1563. list_splice_init(&pring->txq, &completions);
  1564. pring->txq_cnt = 0;
  1565. /* Next issue ABTS for everything on the txcmplq */
  1566. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1567. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1568. spin_unlock_irq(&phba->hbalock);
  1569. while (!list_empty(&completions)) {
  1570. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1571. cmd = &iocb->iocb;
  1572. list_del_init(&iocb->list);
  1573. if (!iocb->iocb_cmpl)
  1574. lpfc_sli_release_iocbq(phba, iocb);
  1575. else {
  1576. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1577. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1578. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1579. }
  1580. }
  1581. }
  1582. int
  1583. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1584. {
  1585. uint32_t status;
  1586. int i = 0;
  1587. int retval = 0;
  1588. /* Read the HBA Host Status Register */
  1589. status = readl(phba->HSregaddr);
  1590. /*
  1591. * Check status register every 100ms for 5 retries, then every
  1592. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1593. * every 2.5 sec for 4.
  1594. * Break our of the loop if errors occurred during init.
  1595. */
  1596. while (((status & mask) != mask) &&
  1597. !(status & HS_FFERM) &&
  1598. i++ < 20) {
  1599. if (i <= 5)
  1600. msleep(10);
  1601. else if (i <= 10)
  1602. msleep(500);
  1603. else
  1604. msleep(2500);
  1605. if (i == 15) {
  1606. /* Do post */
  1607. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1608. lpfc_sli_brdrestart(phba);
  1609. }
  1610. /* Read the HBA Host Status Register */
  1611. status = readl(phba->HSregaddr);
  1612. }
  1613. /* Check to see if any errors occurred during init */
  1614. if ((status & HS_FFERM) || (i >= 20)) {
  1615. phba->link_state = LPFC_HBA_ERROR;
  1616. retval = 1;
  1617. }
  1618. return retval;
  1619. }
  1620. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1621. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1622. {
  1623. uint32_t __iomem *resp_buf;
  1624. uint32_t __iomem *mbox_buf;
  1625. volatile uint32_t mbox;
  1626. uint32_t hc_copy;
  1627. int i;
  1628. uint8_t hdrtype;
  1629. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1630. if (hdrtype != 0x80 ||
  1631. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1632. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1633. return;
  1634. /*
  1635. * Tell the other part of the chip to suspend temporarily all
  1636. * its DMA activity.
  1637. */
  1638. resp_buf = phba->MBslimaddr;
  1639. /* Disable the error attention */
  1640. hc_copy = readl(phba->HCregaddr);
  1641. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1642. readl(phba->HCregaddr); /* flush */
  1643. phba->link_flag |= LS_IGNORE_ERATT;
  1644. if (readl(phba->HAregaddr) & HA_ERATT) {
  1645. /* Clear Chip error bit */
  1646. writel(HA_ERATT, phba->HAregaddr);
  1647. phba->pport->stopped = 1;
  1648. }
  1649. mbox = 0;
  1650. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1651. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1652. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1653. mbox_buf = phba->MBslimaddr;
  1654. writel(mbox, mbox_buf);
  1655. for (i = 0;
  1656. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1657. mdelay(1);
  1658. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1659. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1660. phba->pport->stopped)
  1661. goto restore_hc;
  1662. else
  1663. goto clear_errat;
  1664. }
  1665. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1666. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1667. mdelay(1);
  1668. clear_errat:
  1669. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1670. mdelay(1);
  1671. if (readl(phba->HAregaddr) & HA_ERATT) {
  1672. writel(HA_ERATT, phba->HAregaddr);
  1673. phba->pport->stopped = 1;
  1674. }
  1675. restore_hc:
  1676. phba->link_flag &= ~LS_IGNORE_ERATT;
  1677. writel(hc_copy, phba->HCregaddr);
  1678. readl(phba->HCregaddr); /* flush */
  1679. }
  1680. int
  1681. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1682. {
  1683. struct lpfc_sli *psli;
  1684. LPFC_MBOXQ_t *pmb;
  1685. uint32_t status;
  1686. uint32_t ha_copy;
  1687. int retval;
  1688. int i = 0;
  1689. psli = &phba->sli;
  1690. /* Kill HBA */
  1691. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1692. "%d:0329 Kill HBA Data: x%x x%x\n",
  1693. phba->brd_no, phba->pport->port_state, psli->sli_flag);
  1694. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1695. GFP_KERNEL)) == 0)
  1696. return 1;
  1697. /* Disable the error attention */
  1698. spin_lock_irq(&phba->hbalock);
  1699. status = readl(phba->HCregaddr);
  1700. status &= ~HC_ERINT_ENA;
  1701. writel(status, phba->HCregaddr);
  1702. readl(phba->HCregaddr); /* flush */
  1703. phba->link_flag |= LS_IGNORE_ERATT;
  1704. spin_unlock_irq(&phba->hbalock);
  1705. lpfc_kill_board(phba, pmb);
  1706. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1707. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1708. if (retval != MBX_SUCCESS) {
  1709. if (retval != MBX_BUSY)
  1710. mempool_free(pmb, phba->mbox_mem_pool);
  1711. spin_lock_irq(&phba->hbalock);
  1712. phba->link_flag &= ~LS_IGNORE_ERATT;
  1713. spin_unlock_irq(&phba->hbalock);
  1714. return 1;
  1715. }
  1716. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1717. mempool_free(pmb, phba->mbox_mem_pool);
  1718. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1719. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1720. * 3 seconds we still set HBA_ERROR state because the status of the
  1721. * board is now undefined.
  1722. */
  1723. ha_copy = readl(phba->HAregaddr);
  1724. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1725. mdelay(100);
  1726. ha_copy = readl(phba->HAregaddr);
  1727. }
  1728. del_timer_sync(&psli->mbox_tmo);
  1729. if (ha_copy & HA_ERATT) {
  1730. writel(HA_ERATT, phba->HAregaddr);
  1731. phba->pport->stopped = 1;
  1732. }
  1733. spin_lock_irq(&phba->hbalock);
  1734. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1735. phba->link_flag &= ~LS_IGNORE_ERATT;
  1736. spin_unlock_irq(&phba->hbalock);
  1737. psli->mbox_active = NULL;
  1738. lpfc_hba_down_post(phba);
  1739. phba->link_state = LPFC_HBA_ERROR;
  1740. return ha_copy & HA_ERATT ? 0 : 1;
  1741. }
  1742. int
  1743. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1744. {
  1745. struct lpfc_sli *psli;
  1746. struct lpfc_sli_ring *pring;
  1747. uint16_t cfg_value;
  1748. int i;
  1749. psli = &phba->sli;
  1750. /* Reset HBA */
  1751. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1752. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1753. phba->pport->port_state, psli->sli_flag);
  1754. /* perform board reset */
  1755. phba->fc_eventTag = 0;
  1756. phba->pport->fc_myDID = 0;
  1757. phba->pport->fc_prevDID = 0;
  1758. /* Turn off parity checking and serr during the physical reset */
  1759. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1760. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1761. (cfg_value &
  1762. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1763. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1764. /* Now toggle INITFF bit in the Host Control Register */
  1765. writel(HC_INITFF, phba->HCregaddr);
  1766. mdelay(1);
  1767. readl(phba->HCregaddr); /* flush */
  1768. writel(0, phba->HCregaddr);
  1769. readl(phba->HCregaddr); /* flush */
  1770. /* Restore PCI cmd register */
  1771. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1772. /* Initialize relevant SLI info */
  1773. for (i = 0; i < psli->num_rings; i++) {
  1774. pring = &psli->ring[i];
  1775. pring->flag = 0;
  1776. pring->rspidx = 0;
  1777. pring->next_cmdidx = 0;
  1778. pring->local_getidx = 0;
  1779. pring->cmdidx = 0;
  1780. pring->missbufcnt = 0;
  1781. }
  1782. phba->link_state = LPFC_WARM_START;
  1783. return 0;
  1784. }
  1785. int
  1786. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1787. {
  1788. MAILBOX_t *mb;
  1789. struct lpfc_sli *psli;
  1790. uint16_t skip_post;
  1791. volatile uint32_t word0;
  1792. void __iomem *to_slim;
  1793. spin_lock_irq(&phba->hbalock);
  1794. psli = &phba->sli;
  1795. /* Restart HBA */
  1796. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1797. "%d:0337 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1798. phba->pport->port_state, psli->sli_flag);
  1799. word0 = 0;
  1800. mb = (MAILBOX_t *) &word0;
  1801. mb->mbxCommand = MBX_RESTART;
  1802. mb->mbxHc = 1;
  1803. lpfc_reset_barrier(phba);
  1804. to_slim = phba->MBslimaddr;
  1805. writel(*(uint32_t *) mb, to_slim);
  1806. readl(to_slim); /* flush */
  1807. /* Only skip post after fc_ffinit is completed */
  1808. if (phba->pport->port_state) {
  1809. skip_post = 1;
  1810. word0 = 1; /* This is really setting up word1 */
  1811. } else {
  1812. skip_post = 0;
  1813. word0 = 0; /* This is really setting up word1 */
  1814. }
  1815. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1816. writel(*(uint32_t *) mb, to_slim);
  1817. readl(to_slim); /* flush */
  1818. lpfc_sli_brdreset(phba);
  1819. phba->pport->stopped = 0;
  1820. phba->link_state = LPFC_INIT_START;
  1821. spin_unlock_irq(&phba->hbalock);
  1822. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1823. psli->stats_start = get_seconds();
  1824. if (skip_post)
  1825. mdelay(100);
  1826. else
  1827. mdelay(2000);
  1828. lpfc_hba_down_post(phba);
  1829. return 0;
  1830. }
  1831. static int
  1832. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1833. {
  1834. uint32_t status, i = 0;
  1835. /* Read the HBA Host Status Register */
  1836. status = readl(phba->HSregaddr);
  1837. /* Check status register to see what current state is */
  1838. i = 0;
  1839. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1840. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1841. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1842. * 4.
  1843. */
  1844. if (i++ >= 20) {
  1845. /* Adapter failed to init, timeout, status reg
  1846. <status> */
  1847. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1848. "%d:0436 Adapter failed to init, "
  1849. "timeout, status reg x%x\n",
  1850. phba->brd_no, status);
  1851. phba->link_state = LPFC_HBA_ERROR;
  1852. return -ETIMEDOUT;
  1853. }
  1854. /* Check to see if any errors occurred during init */
  1855. if (status & HS_FFERM) {
  1856. /* ERROR: During chipset initialization */
  1857. /* Adapter failed to init, chipset, status reg
  1858. <status> */
  1859. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1860. "%d:0437 Adapter failed to init, "
  1861. "chipset, status reg x%x\n",
  1862. phba->brd_no,
  1863. status);
  1864. phba->link_state = LPFC_HBA_ERROR;
  1865. return -EIO;
  1866. }
  1867. if (i <= 5) {
  1868. msleep(10);
  1869. } else if (i <= 10) {
  1870. msleep(500);
  1871. } else {
  1872. msleep(2500);
  1873. }
  1874. if (i == 15) {
  1875. /* Do post */
  1876. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1877. lpfc_sli_brdrestart(phba);
  1878. }
  1879. /* Read the HBA Host Status Register */
  1880. status = readl(phba->HSregaddr);
  1881. }
  1882. /* Check to see if any errors occurred during init */
  1883. if (status & HS_FFERM) {
  1884. /* ERROR: During chipset initialization */
  1885. /* Adapter failed to init, chipset, status reg <status> */
  1886. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1887. "%d:0438 Adapter failed to init, chipset, "
  1888. "status reg x%x\n",
  1889. phba->brd_no,
  1890. status);
  1891. phba->link_state = LPFC_HBA_ERROR;
  1892. return -EIO;
  1893. }
  1894. /* Clear all interrupt enable conditions */
  1895. writel(0, phba->HCregaddr);
  1896. readl(phba->HCregaddr); /* flush */
  1897. /* setup host attn register */
  1898. writel(0xffffffff, phba->HAregaddr);
  1899. readl(phba->HAregaddr); /* flush */
  1900. return 0;
  1901. }
  1902. static int
  1903. lpfc_sli_hbq_count(void)
  1904. {
  1905. return ARRAY_SIZE(lpfc_hbq_defs);
  1906. }
  1907. static int
  1908. lpfc_sli_hbq_entry_count(void)
  1909. {
  1910. int hbq_count = lpfc_sli_hbq_count();
  1911. int count = 0;
  1912. int i;
  1913. for (i = 0; i < hbq_count; ++i)
  1914. count += lpfc_hbq_defs[i]->entry_count;
  1915. return count;
  1916. }
  1917. int
  1918. lpfc_sli_hbq_size(void)
  1919. {
  1920. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1921. }
  1922. static int
  1923. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1924. {
  1925. int hbq_count = lpfc_sli_hbq_count();
  1926. LPFC_MBOXQ_t *pmb;
  1927. MAILBOX_t *pmbox;
  1928. uint32_t hbqno;
  1929. uint32_t hbq_entry_index;
  1930. /* Get a Mailbox buffer to setup mailbox
  1931. * commands for HBA initialization
  1932. */
  1933. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1934. if (!pmb)
  1935. return -ENOMEM;
  1936. pmbox = &pmb->mb;
  1937. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  1938. phba->link_state = LPFC_INIT_MBX_CMDS;
  1939. hbq_entry_index = 0;
  1940. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1941. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  1942. phba->hbqs[hbqno].hbqPutIdx = 0;
  1943. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  1944. phba->hbqs[hbqno].entry_count =
  1945. lpfc_hbq_defs[hbqno]->entry_count;
  1946. lpfc_config_hbq(phba, lpfc_hbq_defs[hbqno], hbq_entry_index,
  1947. pmb);
  1948. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  1949. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  1950. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  1951. mbxStatus <status>, ring <num> */
  1952. lpfc_printf_log(phba, KERN_ERR,
  1953. LOG_SLI | LOG_VPORT,
  1954. "%d:1805 Adapter failed to init. "
  1955. "Data: x%x x%x x%x\n",
  1956. phba->brd_no, pmbox->mbxCommand,
  1957. pmbox->mbxStatus, hbqno);
  1958. phba->link_state = LPFC_HBA_ERROR;
  1959. mempool_free(pmb, phba->mbox_mem_pool);
  1960. return ENXIO;
  1961. }
  1962. }
  1963. phba->hbq_count = hbq_count;
  1964. mempool_free(pmb, phba->mbox_mem_pool);
  1965. /* Initially populate or replenish the HBQs */
  1966. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1967. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  1968. return -ENOMEM;
  1969. }
  1970. return 0;
  1971. }
  1972. static int
  1973. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  1974. {
  1975. LPFC_MBOXQ_t *pmb;
  1976. uint32_t resetcount = 0, rc = 0, done = 0;
  1977. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1978. if (!pmb) {
  1979. phba->link_state = LPFC_HBA_ERROR;
  1980. return -ENOMEM;
  1981. }
  1982. phba->sli_rev = sli_mode;
  1983. while (resetcount < 2 && !done) {
  1984. spin_lock_irq(&phba->hbalock);
  1985. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1986. spin_unlock_irq(&phba->hbalock);
  1987. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1988. lpfc_sli_brdrestart(phba);
  1989. msleep(2500);
  1990. rc = lpfc_sli_chipset_init(phba);
  1991. if (rc)
  1992. break;
  1993. spin_lock_irq(&phba->hbalock);
  1994. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1995. spin_unlock_irq(&phba->hbalock);
  1996. resetcount++;
  1997. /* Call pre CONFIG_PORT mailbox command initialization. A
  1998. * value of 0 means the call was successful. Any other
  1999. * nonzero value is a failure, but if ERESTART is returned,
  2000. * the driver may reset the HBA and try again.
  2001. */
  2002. rc = lpfc_config_port_prep(phba);
  2003. if (rc == -ERESTART) {
  2004. phba->link_state = LPFC_LINK_UNKNOWN;
  2005. continue;
  2006. } else if (rc) {
  2007. break;
  2008. }
  2009. phba->link_state = LPFC_INIT_MBX_CMDS;
  2010. lpfc_config_port(phba, pmb);
  2011. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2012. if (rc != MBX_SUCCESS) {
  2013. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2014. "%d:0442 Adapter failed to init, mbxCmd x%x "
  2015. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2016. phba->brd_no, pmb->mb.mbxCommand,
  2017. pmb->mb.mbxStatus, 0);
  2018. spin_lock_irq(&phba->hbalock);
  2019. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2020. spin_unlock_irq(&phba->hbalock);
  2021. rc = -ENXIO;
  2022. } else {
  2023. done = 1;
  2024. phba->max_vpi = (phba->max_vpi &&
  2025. pmb->mb.un.varCfgPort.gmv) != 0
  2026. ? pmb->mb.un.varCfgPort.max_vpi
  2027. : 0;
  2028. }
  2029. }
  2030. if (!done) {
  2031. rc = -EINVAL;
  2032. goto do_prep_failed;
  2033. }
  2034. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2035. (!pmb->mb.un.varCfgPort.cMA)) {
  2036. rc = -ENXIO;
  2037. goto do_prep_failed;
  2038. }
  2039. return rc;
  2040. do_prep_failed:
  2041. mempool_free(pmb, phba->mbox_mem_pool);
  2042. return rc;
  2043. }
  2044. int
  2045. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2046. {
  2047. uint32_t rc;
  2048. int mode = 3;
  2049. switch (lpfc_sli_mode) {
  2050. case 2:
  2051. if (phba->cfg_npiv_enable) {
  2052. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2053. "%d:1824 NPIV enabled: Override lpfc_sli_mode "
  2054. "parameter (%d) to auto (0).\n",
  2055. phba->brd_no, lpfc_sli_mode);
  2056. break;
  2057. }
  2058. mode = 2;
  2059. break;
  2060. case 0:
  2061. case 3:
  2062. break;
  2063. default:
  2064. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2065. "%d:1819 Unrecognized lpfc_sli_mode "
  2066. "parameter: %d.\n",
  2067. phba->brd_no, lpfc_sli_mode);
  2068. break;
  2069. }
  2070. rc = lpfc_do_config_port(phba, mode);
  2071. if (rc && lpfc_sli_mode == 3)
  2072. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2073. "%d:1820 Unable to select SLI-3. "
  2074. "Not supported by adapter.\n",
  2075. phba->brd_no);
  2076. if (rc && mode != 2)
  2077. rc = lpfc_do_config_port(phba, 2);
  2078. if (rc)
  2079. goto lpfc_sli_hba_setup_error;
  2080. if (phba->sli_rev == 3) {
  2081. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2082. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2083. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2084. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2085. } else {
  2086. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2087. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2088. phba->sli3_options = 0;
  2089. }
  2090. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2091. "%d:0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2092. phba->brd_no, phba->sli_rev, phba->max_vpi);
  2093. rc = lpfc_sli_ring_map(phba);
  2094. if (rc)
  2095. goto lpfc_sli_hba_setup_error;
  2096. /* Init HBQs */
  2097. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2098. rc = lpfc_sli_hbq_setup(phba);
  2099. if (rc)
  2100. goto lpfc_sli_hba_setup_error;
  2101. }
  2102. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2103. rc = lpfc_config_port_post(phba);
  2104. if (rc)
  2105. goto lpfc_sli_hba_setup_error;
  2106. return rc;
  2107. lpfc_sli_hba_setup_error:
  2108. phba->link_state = LPFC_HBA_ERROR;
  2109. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2110. "%d:0445 Firmware initialization failed\n",
  2111. phba->brd_no);
  2112. return rc;
  2113. }
  2114. /*! lpfc_mbox_timeout
  2115. *
  2116. * \pre
  2117. * \post
  2118. * \param hba Pointer to per struct lpfc_hba structure
  2119. * \param l1 Pointer to the driver's mailbox queue.
  2120. * \return
  2121. * void
  2122. *
  2123. * \b Description:
  2124. *
  2125. * This routine handles mailbox timeout events at timer interrupt context.
  2126. */
  2127. void
  2128. lpfc_mbox_timeout(unsigned long ptr)
  2129. {
  2130. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2131. unsigned long iflag;
  2132. uint32_t tmo_posted;
  2133. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2134. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2135. if (!tmo_posted)
  2136. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2137. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2138. if (!tmo_posted) {
  2139. spin_lock_irqsave(&phba->hbalock, iflag);
  2140. if (phba->work_wait)
  2141. lpfc_worker_wake_up(phba);
  2142. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2143. }
  2144. }
  2145. void
  2146. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2147. {
  2148. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2149. MAILBOX_t *mb = &pmbox->mb;
  2150. struct lpfc_sli *psli = &phba->sli;
  2151. struct lpfc_sli_ring *pring;
  2152. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2153. return;
  2154. }
  2155. /* Mbox cmd <mbxCommand> timeout */
  2156. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2157. "%d:0310 Mailbox command x%x timeout Data: x%x x%x "
  2158. "x%p\n",
  2159. phba->brd_no,
  2160. mb->mbxCommand,
  2161. phba->pport->port_state,
  2162. phba->sli.sli_flag,
  2163. phba->sli.mbox_active);
  2164. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2165. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2166. * it to fail all oustanding SCSI IO.
  2167. */
  2168. spin_lock_irq(&phba->pport->work_port_lock);
  2169. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2170. spin_unlock_irq(&phba->pport->work_port_lock);
  2171. spin_lock_irq(&phba->hbalock);
  2172. phba->link_state = LPFC_LINK_UNKNOWN;
  2173. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2174. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2175. spin_unlock_irq(&phba->hbalock);
  2176. pring = &psli->ring[psli->fcp_ring];
  2177. lpfc_sli_abort_iocb_ring(phba, pring);
  2178. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2179. "%d:0316 Resetting board due to mailbox timeout\n",
  2180. phba->brd_no);
  2181. /*
  2182. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2183. * on oustanding mailbox commands.
  2184. */
  2185. lpfc_offline_prep(phba);
  2186. lpfc_offline(phba);
  2187. lpfc_sli_brdrestart(phba);
  2188. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2189. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2190. lpfc_unblock_mgmt_io(phba);
  2191. return;
  2192. }
  2193. int
  2194. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2195. {
  2196. MAILBOX_t *mb;
  2197. struct lpfc_sli *psli = &phba->sli;
  2198. uint32_t status, evtctr;
  2199. uint32_t ha_copy;
  2200. int i;
  2201. unsigned long drvr_flag = 0;
  2202. volatile uint32_t word0, ldata;
  2203. void __iomem *to_slim;
  2204. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2205. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2206. if(!pmbox->vport) {
  2207. lpfc_printf_log(phba, KERN_ERR,
  2208. LOG_MBOX | LOG_VPORT,
  2209. "%d:1806 Mbox x%x failed. No vport\n",
  2210. phba->brd_no,
  2211. pmbox->mb.mbxCommand);
  2212. dump_stack();
  2213. return MBXERR_ERROR;
  2214. }
  2215. }
  2216. /* If the PCI channel is in offline state, do not post mbox. */
  2217. if (unlikely(pci_channel_offline(phba->pcidev)))
  2218. return MBX_NOT_FINISHED;
  2219. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2220. psli = &phba->sli;
  2221. mb = &pmbox->mb;
  2222. status = MBX_SUCCESS;
  2223. if (phba->link_state == LPFC_HBA_ERROR) {
  2224. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2225. /* Mbox command <mbxCommand> cannot issue */
  2226. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2227. return MBX_NOT_FINISHED;
  2228. }
  2229. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2230. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2231. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2232. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2233. return MBX_NOT_FINISHED;
  2234. }
  2235. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2236. /* Polling for a mbox command when another one is already active
  2237. * is not allowed in SLI. Also, the driver must have established
  2238. * SLI2 mode to queue and process multiple mbox commands.
  2239. */
  2240. if (flag & MBX_POLL) {
  2241. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2242. /* Mbox command <mbxCommand> cannot issue */
  2243. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2244. return MBX_NOT_FINISHED;
  2245. }
  2246. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2247. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2248. /* Mbox command <mbxCommand> cannot issue */
  2249. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2250. return MBX_NOT_FINISHED;
  2251. }
  2252. /* Handle STOP IOCB processing flag. This is only meaningful
  2253. * if we are not polling for mbox completion.
  2254. */
  2255. if (flag & MBX_STOP_IOCB) {
  2256. flag &= ~MBX_STOP_IOCB;
  2257. /* Now flag each ring */
  2258. for (i = 0; i < psli->num_rings; i++) {
  2259. /* If the ring is active, flag it */
  2260. if (psli->ring[i].cmdringaddr) {
  2261. psli->ring[i].flag |=
  2262. LPFC_STOP_IOCB_MBX;
  2263. }
  2264. }
  2265. }
  2266. /* Another mailbox command is still being processed, queue this
  2267. * command to be processed later.
  2268. */
  2269. lpfc_mbox_put(phba, pmbox);
  2270. /* Mbox cmd issue - BUSY */
  2271. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2272. "%d (%d):0308 Mbox cmd issue - BUSY Data: "
  2273. "x%x x%x x%x x%x\n",
  2274. phba->brd_no,
  2275. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2276. mb->mbxCommand, phba->pport->port_state,
  2277. psli->sli_flag, flag);
  2278. psli->slistat.mbox_busy++;
  2279. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2280. if (pmbox->vport) {
  2281. lpfc_debugfs_disc_trc(pmbox->vport,
  2282. LPFC_DISC_TRC_MBOX_VPORT,
  2283. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2284. (uint32_t)mb->mbxCommand,
  2285. mb->un.varWords[0], mb->un.varWords[1]);
  2286. }
  2287. else {
  2288. lpfc_debugfs_disc_trc(phba->pport,
  2289. LPFC_DISC_TRC_MBOX,
  2290. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2291. (uint32_t)mb->mbxCommand,
  2292. mb->un.varWords[0], mb->un.varWords[1]);
  2293. }
  2294. return MBX_BUSY;
  2295. }
  2296. /* Handle STOP IOCB processing flag. This is only meaningful
  2297. * if we are not polling for mbox completion.
  2298. */
  2299. if (flag & MBX_STOP_IOCB) {
  2300. flag &= ~MBX_STOP_IOCB;
  2301. if (flag == MBX_NOWAIT) {
  2302. /* Now flag each ring */
  2303. for (i = 0; i < psli->num_rings; i++) {
  2304. /* If the ring is active, flag it */
  2305. if (psli->ring[i].cmdringaddr) {
  2306. psli->ring[i].flag |=
  2307. LPFC_STOP_IOCB_MBX;
  2308. }
  2309. }
  2310. }
  2311. }
  2312. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2313. /* If we are not polling, we MUST be in SLI2 mode */
  2314. if (flag != MBX_POLL) {
  2315. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2316. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2317. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2318. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2319. /* Mbox command <mbxCommand> cannot issue */
  2320. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2321. return MBX_NOT_FINISHED;
  2322. }
  2323. /* timeout active mbox command */
  2324. mod_timer(&psli->mbox_tmo, (jiffies +
  2325. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2326. }
  2327. /* Mailbox cmd <cmd> issue */
  2328. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2329. "%d (%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2330. "x%x\n",
  2331. phba->brd_no, pmbox->vport ? pmbox->vport->vpi : 0,
  2332. mb->mbxCommand, phba->pport->port_state,
  2333. psli->sli_flag, flag);
  2334. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2335. if (pmbox->vport) {
  2336. lpfc_debugfs_disc_trc(pmbox->vport,
  2337. LPFC_DISC_TRC_MBOX_VPORT,
  2338. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2339. (uint32_t)mb->mbxCommand,
  2340. mb->un.varWords[0], mb->un.varWords[1]);
  2341. }
  2342. else {
  2343. lpfc_debugfs_disc_trc(phba->pport,
  2344. LPFC_DISC_TRC_MBOX,
  2345. "MBOX Send: cmd:x%x mb:x%x x%x",
  2346. (uint32_t)mb->mbxCommand,
  2347. mb->un.varWords[0], mb->un.varWords[1]);
  2348. }
  2349. }
  2350. psli->slistat.mbox_cmd++;
  2351. evtctr = psli->slistat.mbox_event;
  2352. /* next set own bit for the adapter and copy over command word */
  2353. mb->mbxOwner = OWN_CHIP;
  2354. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2355. /* First copy command data to host SLIM area */
  2356. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2357. } else {
  2358. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2359. /* copy command data into host mbox for cmpl */
  2360. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2361. MAILBOX_CMD_SIZE);
  2362. }
  2363. /* First copy mbox command data to HBA SLIM, skip past first
  2364. word */
  2365. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2366. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2367. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2368. /* Next copy over first word, with mbxOwner set */
  2369. ldata = *((volatile uint32_t *)mb);
  2370. to_slim = phba->MBslimaddr;
  2371. writel(ldata, to_slim);
  2372. readl(to_slim); /* flush */
  2373. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2374. /* switch over to host mailbox */
  2375. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2376. }
  2377. }
  2378. wmb();
  2379. /* interrupt board to doit right away */
  2380. writel(CA_MBATT, phba->CAregaddr);
  2381. readl(phba->CAregaddr); /* flush */
  2382. switch (flag) {
  2383. case MBX_NOWAIT:
  2384. /* Don't wait for it to finish, just return */
  2385. psli->mbox_active = pmbox;
  2386. break;
  2387. case MBX_POLL:
  2388. psli->mbox_active = NULL;
  2389. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2390. /* First read mbox status word */
  2391. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2392. word0 = le32_to_cpu(word0);
  2393. } else {
  2394. /* First read mbox status word */
  2395. word0 = readl(phba->MBslimaddr);
  2396. }
  2397. /* Read the HBA Host Attention Register */
  2398. ha_copy = readl(phba->HAregaddr);
  2399. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2400. i *= 1000; /* Convert to ms */
  2401. /* Wait for command to complete */
  2402. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2403. (!(ha_copy & HA_MBATT) &&
  2404. (phba->link_state > LPFC_WARM_START))) {
  2405. if (i-- <= 0) {
  2406. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2407. spin_unlock_irqrestore(&phba->hbalock,
  2408. drvr_flag);
  2409. return MBX_NOT_FINISHED;
  2410. }
  2411. /* Check if we took a mbox interrupt while we were
  2412. polling */
  2413. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2414. && (evtctr != psli->slistat.mbox_event))
  2415. break;
  2416. spin_unlock_irqrestore(&phba->hbalock,
  2417. drvr_flag);
  2418. msleep(1);
  2419. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2420. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2421. /* First copy command data */
  2422. word0 = *((volatile uint32_t *)
  2423. &phba->slim2p->mbx);
  2424. word0 = le32_to_cpu(word0);
  2425. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2426. MAILBOX_t *slimmb;
  2427. volatile uint32_t slimword0;
  2428. /* Check real SLIM for any errors */
  2429. slimword0 = readl(phba->MBslimaddr);
  2430. slimmb = (MAILBOX_t *) & slimword0;
  2431. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2432. && slimmb->mbxStatus) {
  2433. psli->sli_flag &=
  2434. ~LPFC_SLI2_ACTIVE;
  2435. word0 = slimword0;
  2436. }
  2437. }
  2438. } else {
  2439. /* First copy command data */
  2440. word0 = readl(phba->MBslimaddr);
  2441. }
  2442. /* Read the HBA Host Attention Register */
  2443. ha_copy = readl(phba->HAregaddr);
  2444. }
  2445. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2446. /* copy results back to user */
  2447. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2448. MAILBOX_CMD_SIZE);
  2449. } else {
  2450. /* First copy command data */
  2451. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2452. MAILBOX_CMD_SIZE);
  2453. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2454. pmbox->context2) {
  2455. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2456. phba->MBslimaddr + DMP_RSP_OFFSET,
  2457. mb->un.varDmp.word_cnt);
  2458. }
  2459. }
  2460. writel(HA_MBATT, phba->HAregaddr);
  2461. readl(phba->HAregaddr); /* flush */
  2462. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2463. status = mb->mbxStatus;
  2464. }
  2465. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2466. return status;
  2467. }
  2468. /*
  2469. * Caller needs to hold lock.
  2470. */
  2471. static void
  2472. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2473. struct lpfc_iocbq *piocb)
  2474. {
  2475. /* Insert the caller's iocb in the txq tail for later processing. */
  2476. list_add_tail(&piocb->list, &pring->txq);
  2477. pring->txq_cnt++;
  2478. }
  2479. static struct lpfc_iocbq *
  2480. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2481. struct lpfc_iocbq **piocb)
  2482. {
  2483. struct lpfc_iocbq * nextiocb;
  2484. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2485. if (!nextiocb) {
  2486. nextiocb = *piocb;
  2487. *piocb = NULL;
  2488. }
  2489. return nextiocb;
  2490. }
  2491. /*
  2492. * Lockless version of lpfc_sli_issue_iocb.
  2493. */
  2494. int
  2495. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2496. struct lpfc_iocbq *piocb, uint32_t flag)
  2497. {
  2498. struct lpfc_iocbq *nextiocb;
  2499. IOCB_t *iocb;
  2500. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2501. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2502. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2503. lpfc_printf_log(phba, KERN_ERR,
  2504. LOG_SLI | LOG_VPORT,
  2505. "%d:1807 IOCB x%x failed. No vport\n",
  2506. phba->brd_no,
  2507. piocb->iocb.ulpCommand);
  2508. dump_stack();
  2509. return IOCB_ERROR;
  2510. }
  2511. /* If the PCI channel is in offline state, do not post iocbs. */
  2512. if (unlikely(pci_channel_offline(phba->pcidev)))
  2513. return IOCB_ERROR;
  2514. /*
  2515. * We should never get an IOCB if we are in a < LINK_DOWN state
  2516. */
  2517. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2518. return IOCB_ERROR;
  2519. /*
  2520. * Check to see if we are blocking IOCB processing because of a
  2521. * outstanding mbox command.
  2522. */
  2523. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2524. goto iocb_busy;
  2525. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2526. /*
  2527. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2528. * can be issued if the link is not up.
  2529. */
  2530. switch (piocb->iocb.ulpCommand) {
  2531. case CMD_QUE_RING_BUF_CN:
  2532. case CMD_QUE_RING_BUF64_CN:
  2533. /*
  2534. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2535. * completion, iocb_cmpl MUST be 0.
  2536. */
  2537. if (piocb->iocb_cmpl)
  2538. piocb->iocb_cmpl = NULL;
  2539. /*FALLTHROUGH*/
  2540. case CMD_CREATE_XRI_CR:
  2541. case CMD_CLOSE_XRI_CN:
  2542. case CMD_CLOSE_XRI_CX:
  2543. break;
  2544. default:
  2545. goto iocb_busy;
  2546. }
  2547. /*
  2548. * For FCP commands, we must be in a state where we can process link
  2549. * attention events.
  2550. */
  2551. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2552. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2553. goto iocb_busy;
  2554. }
  2555. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2556. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2557. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2558. if (iocb)
  2559. lpfc_sli_update_ring(phba, pring);
  2560. else
  2561. lpfc_sli_update_full_ring(phba, pring);
  2562. if (!piocb)
  2563. return IOCB_SUCCESS;
  2564. goto out_busy;
  2565. iocb_busy:
  2566. pring->stats.iocb_cmd_delay++;
  2567. out_busy:
  2568. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2569. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2570. return IOCB_SUCCESS;
  2571. }
  2572. return IOCB_BUSY;
  2573. }
  2574. int
  2575. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2576. struct lpfc_iocbq *piocb, uint32_t flag)
  2577. {
  2578. unsigned long iflags;
  2579. int rc;
  2580. spin_lock_irqsave(&phba->hbalock, iflags);
  2581. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2582. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2583. return rc;
  2584. }
  2585. static int
  2586. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2587. {
  2588. struct lpfc_sli *psli;
  2589. struct lpfc_sli_ring *pring;
  2590. psli = &phba->sli;
  2591. /* Adjust cmd/rsp ring iocb entries more evenly */
  2592. /* Take some away from the FCP ring */
  2593. pring = &psli->ring[psli->fcp_ring];
  2594. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2595. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2596. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2597. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2598. /* and give them to the extra ring */
  2599. pring = &psli->ring[psli->extra_ring];
  2600. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2601. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2602. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2603. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2604. /* Setup default profile for this ring */
  2605. pring->iotag_max = 4096;
  2606. pring->num_mask = 1;
  2607. pring->prt[0].profile = 0; /* Mask 0 */
  2608. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2609. pring->prt[0].type = phba->cfg_multi_ring_type;
  2610. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2611. return 0;
  2612. }
  2613. int
  2614. lpfc_sli_setup(struct lpfc_hba *phba)
  2615. {
  2616. int i, totiocbsize = 0;
  2617. struct lpfc_sli *psli = &phba->sli;
  2618. struct lpfc_sli_ring *pring;
  2619. psli->num_rings = MAX_CONFIGURED_RINGS;
  2620. psli->sli_flag = 0;
  2621. psli->fcp_ring = LPFC_FCP_RING;
  2622. psli->next_ring = LPFC_FCP_NEXT_RING;
  2623. psli->extra_ring = LPFC_EXTRA_RING;
  2624. psli->iocbq_lookup = NULL;
  2625. psli->iocbq_lookup_len = 0;
  2626. psli->last_iotag = 0;
  2627. for (i = 0; i < psli->num_rings; i++) {
  2628. pring = &psli->ring[i];
  2629. switch (i) {
  2630. case LPFC_FCP_RING: /* ring 0 - FCP */
  2631. /* numCiocb and numRiocb are used in config_port */
  2632. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2633. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2634. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2635. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2636. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2637. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2638. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2639. SLI3_IOCB_CMD_SIZE :
  2640. SLI2_IOCB_CMD_SIZE;
  2641. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2642. SLI3_IOCB_RSP_SIZE :
  2643. SLI2_IOCB_RSP_SIZE;
  2644. pring->iotag_ctr = 0;
  2645. pring->iotag_max =
  2646. (phba->cfg_hba_queue_depth * 2);
  2647. pring->fast_iotag = pring->iotag_max;
  2648. pring->num_mask = 0;
  2649. break;
  2650. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2651. /* numCiocb and numRiocb are used in config_port */
  2652. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2653. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2654. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2655. SLI3_IOCB_CMD_SIZE :
  2656. SLI2_IOCB_CMD_SIZE;
  2657. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2658. SLI3_IOCB_RSP_SIZE :
  2659. SLI2_IOCB_RSP_SIZE;
  2660. pring->iotag_max = phba->cfg_hba_queue_depth;
  2661. pring->num_mask = 0;
  2662. break;
  2663. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2664. /* numCiocb and numRiocb are used in config_port */
  2665. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2666. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2667. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2668. SLI3_IOCB_CMD_SIZE :
  2669. SLI2_IOCB_CMD_SIZE;
  2670. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2671. SLI3_IOCB_RSP_SIZE :
  2672. SLI2_IOCB_RSP_SIZE;
  2673. pring->fast_iotag = 0;
  2674. pring->iotag_ctr = 0;
  2675. pring->iotag_max = 4096;
  2676. pring->num_mask = 4;
  2677. pring->prt[0].profile = 0; /* Mask 0 */
  2678. pring->prt[0].rctl = FC_ELS_REQ;
  2679. pring->prt[0].type = FC_ELS_DATA;
  2680. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2681. lpfc_els_unsol_event;
  2682. pring->prt[1].profile = 0; /* Mask 1 */
  2683. pring->prt[1].rctl = FC_ELS_RSP;
  2684. pring->prt[1].type = FC_ELS_DATA;
  2685. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2686. lpfc_els_unsol_event;
  2687. pring->prt[2].profile = 0; /* Mask 2 */
  2688. /* NameServer Inquiry */
  2689. pring->prt[2].rctl = FC_UNSOL_CTL;
  2690. /* NameServer */
  2691. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2692. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2693. lpfc_ct_unsol_event;
  2694. pring->prt[3].profile = 0; /* Mask 3 */
  2695. /* NameServer response */
  2696. pring->prt[3].rctl = FC_SOL_CTL;
  2697. /* NameServer */
  2698. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2699. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2700. lpfc_ct_unsol_event;
  2701. break;
  2702. }
  2703. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2704. (pring->numRiocb * pring->sizeRiocb);
  2705. }
  2706. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2707. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2708. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2709. "%d:0462 Too many cmd / rsp ring entries in "
  2710. "SLI2 SLIM Data: x%x x%lx\n",
  2711. phba->brd_no, totiocbsize,
  2712. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2713. }
  2714. if (phba->cfg_multi_ring_support == 2)
  2715. lpfc_extra_ring_setup(phba);
  2716. return 0;
  2717. }
  2718. int
  2719. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2720. {
  2721. struct lpfc_sli *psli;
  2722. struct lpfc_sli_ring *pring;
  2723. int i;
  2724. psli = &phba->sli;
  2725. spin_lock_irq(&phba->hbalock);
  2726. INIT_LIST_HEAD(&psli->mboxq);
  2727. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2728. /* Initialize list headers for txq and txcmplq as double linked lists */
  2729. for (i = 0; i < psli->num_rings; i++) {
  2730. pring = &psli->ring[i];
  2731. pring->ringno = i;
  2732. pring->next_cmdidx = 0;
  2733. pring->local_getidx = 0;
  2734. pring->cmdidx = 0;
  2735. INIT_LIST_HEAD(&pring->txq);
  2736. INIT_LIST_HEAD(&pring->txcmplq);
  2737. INIT_LIST_HEAD(&pring->iocb_continueq);
  2738. INIT_LIST_HEAD(&pring->postbufq);
  2739. }
  2740. spin_unlock_irq(&phba->hbalock);
  2741. return 1;
  2742. }
  2743. int
  2744. lpfc_sli_host_down(struct lpfc_vport *vport)
  2745. {
  2746. LIST_HEAD(completions);
  2747. struct lpfc_hba *phba = vport->phba;
  2748. struct lpfc_sli *psli = &phba->sli;
  2749. struct lpfc_sli_ring *pring;
  2750. struct lpfc_iocbq *iocb, *next_iocb;
  2751. int i;
  2752. unsigned long flags = 0;
  2753. uint16_t prev_pring_flag;
  2754. lpfc_cleanup_discovery_resources(vport);
  2755. spin_lock_irqsave(&phba->hbalock, flags);
  2756. for (i = 0; i < psli->num_rings; i++) {
  2757. pring = &psli->ring[i];
  2758. prev_pring_flag = pring->flag;
  2759. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2760. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2761. /*
  2762. * Error everything on the txq since these iocbs have not been
  2763. * given to the FW yet.
  2764. */
  2765. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2766. if (iocb->vport != vport)
  2767. continue;
  2768. list_move_tail(&iocb->list, &completions);
  2769. pring->txq_cnt--;
  2770. }
  2771. /* Next issue ABTS for everything on the txcmplq */
  2772. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2773. list) {
  2774. if (iocb->vport != vport)
  2775. continue;
  2776. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2777. }
  2778. pring->flag = prev_pring_flag;
  2779. }
  2780. spin_unlock_irqrestore(&phba->hbalock, flags);
  2781. while (!list_empty(&completions)) {
  2782. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2783. if (!iocb->iocb_cmpl)
  2784. lpfc_sli_release_iocbq(phba, iocb);
  2785. else {
  2786. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2787. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2788. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2789. }
  2790. }
  2791. return 1;
  2792. }
  2793. int
  2794. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2795. {
  2796. LIST_HEAD(completions);
  2797. struct lpfc_sli *psli = &phba->sli;
  2798. struct lpfc_sli_ring *pring;
  2799. LPFC_MBOXQ_t *pmb;
  2800. struct lpfc_iocbq *iocb;
  2801. IOCB_t *cmd = NULL;
  2802. int i;
  2803. unsigned long flags = 0;
  2804. lpfc_hba_down_prep(phba);
  2805. lpfc_fabric_abort_hba(phba);
  2806. spin_lock_irqsave(&phba->hbalock, flags);
  2807. for (i = 0; i < psli->num_rings; i++) {
  2808. pring = &psli->ring[i];
  2809. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2810. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2811. /*
  2812. * Error everything on the txq since these iocbs have not been
  2813. * given to the FW yet.
  2814. */
  2815. list_splice_init(&pring->txq, &completions);
  2816. pring->txq_cnt = 0;
  2817. }
  2818. spin_unlock_irqrestore(&phba->hbalock, flags);
  2819. while (!list_empty(&completions)) {
  2820. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2821. cmd = &iocb->iocb;
  2822. if (!iocb->iocb_cmpl)
  2823. lpfc_sli_release_iocbq(phba, iocb);
  2824. else {
  2825. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2826. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2827. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2828. }
  2829. }
  2830. /* Return any active mbox cmds */
  2831. del_timer_sync(&psli->mbox_tmo);
  2832. spin_lock_irqsave(&phba->hbalock, flags);
  2833. spin_lock(&phba->pport->work_port_lock);
  2834. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2835. spin_unlock(&phba->pport->work_port_lock);
  2836. if (psli->mbox_active) {
  2837. list_add_tail(&psli->mbox_active->list, &completions);
  2838. psli->mbox_active = NULL;
  2839. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2840. }
  2841. /* Return any pending or completed mbox cmds */
  2842. list_splice_init(&phba->sli.mboxq, &completions);
  2843. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2844. INIT_LIST_HEAD(&psli->mboxq);
  2845. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2846. spin_unlock_irqrestore(&phba->hbalock, flags);
  2847. while (!list_empty(&completions)) {
  2848. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2849. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2850. if (pmb->mbox_cmpl) {
  2851. pmb->mbox_cmpl(phba,pmb);
  2852. }
  2853. }
  2854. return 1;
  2855. }
  2856. void
  2857. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2858. {
  2859. uint32_t *src = srcp;
  2860. uint32_t *dest = destp;
  2861. uint32_t ldata;
  2862. int i;
  2863. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2864. ldata = *src;
  2865. ldata = le32_to_cpu(ldata);
  2866. *dest = ldata;
  2867. src++;
  2868. dest++;
  2869. }
  2870. }
  2871. int
  2872. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2873. struct lpfc_dmabuf *mp)
  2874. {
  2875. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2876. later */
  2877. spin_lock_irq(&phba->hbalock);
  2878. list_add_tail(&mp->list, &pring->postbufq);
  2879. pring->postbufq_cnt++;
  2880. spin_unlock_irq(&phba->hbalock);
  2881. return 0;
  2882. }
  2883. struct lpfc_dmabuf *
  2884. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2885. dma_addr_t phys)
  2886. {
  2887. struct lpfc_dmabuf *mp, *next_mp;
  2888. struct list_head *slp = &pring->postbufq;
  2889. /* Search postbufq, from the begining, looking for a match on phys */
  2890. spin_lock_irq(&phba->hbalock);
  2891. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2892. if (mp->phys == phys) {
  2893. list_del_init(&mp->list);
  2894. pring->postbufq_cnt--;
  2895. spin_unlock_irq(&phba->hbalock);
  2896. return mp;
  2897. }
  2898. }
  2899. spin_unlock_irq(&phba->hbalock);
  2900. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2901. "%d:0410 Cannot find virtual addr for mapped buf on "
  2902. "ring %d Data x%llx x%p x%p x%x\n",
  2903. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2904. slp->next, slp->prev, pring->postbufq_cnt);
  2905. return NULL;
  2906. }
  2907. static void
  2908. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2909. struct lpfc_iocbq *rspiocb)
  2910. {
  2911. IOCB_t *irsp = &rspiocb->iocb;
  2912. uint16_t abort_iotag, abort_context;
  2913. struct lpfc_iocbq *abort_iocb;
  2914. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  2915. abort_iocb = NULL;
  2916. if (irsp->ulpStatus) {
  2917. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  2918. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  2919. spin_lock_irq(&phba->hbalock);
  2920. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  2921. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  2922. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  2923. "%d:0327 Cannot abort els iocb %p "
  2924. "with tag %x context %x, abort status %x, "
  2925. "abort code %x\n",
  2926. phba->brd_no, abort_iocb, abort_iotag,
  2927. abort_context, irsp->ulpStatus,
  2928. irsp->un.ulpWord[4]);
  2929. /*
  2930. * make sure we have the right iocbq before taking it
  2931. * off the txcmplq and try to call completion routine.
  2932. */
  2933. if (!abort_iocb ||
  2934. abort_iocb->iocb.ulpContext != abort_context ||
  2935. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  2936. spin_unlock_irq(&phba->hbalock);
  2937. else {
  2938. list_del_init(&abort_iocb->list);
  2939. pring->txcmplq_cnt--;
  2940. spin_unlock_irq(&phba->hbalock);
  2941. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  2942. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2943. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  2944. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  2945. }
  2946. }
  2947. lpfc_sli_release_iocbq(phba, cmdiocb);
  2948. return;
  2949. }
  2950. static void
  2951. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2952. struct lpfc_iocbq *rspiocb)
  2953. {
  2954. IOCB_t *irsp = &rspiocb->iocb;
  2955. /* ELS cmd tag <ulpIoTag> completes */
  2956. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  2957. "%d (X):0133 Ignoring ELS cmd tag x%x completion Data: "
  2958. "x%x x%x x%x\n",
  2959. phba->brd_no, irsp->ulpIoTag, irsp->ulpStatus,
  2960. irsp->un.ulpWord[4], irsp->ulpTimeout);
  2961. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  2962. lpfc_ct_free_iocb(phba, cmdiocb);
  2963. else
  2964. lpfc_els_free_iocb(phba, cmdiocb);
  2965. return;
  2966. }
  2967. int
  2968. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2969. struct lpfc_iocbq *cmdiocb)
  2970. {
  2971. struct lpfc_vport *vport = cmdiocb->vport;
  2972. struct lpfc_iocbq *abtsiocbp;
  2973. IOCB_t *icmd = NULL;
  2974. IOCB_t *iabt = NULL;
  2975. int retval = IOCB_ERROR;
  2976. /*
  2977. * There are certain command types we don't want to abort. And we
  2978. * don't want to abort commands that are already in the process of
  2979. * being aborted.
  2980. */
  2981. icmd = &cmdiocb->iocb;
  2982. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  2983. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  2984. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  2985. return 0;
  2986. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  2987. * callback so that nothing happens when it finishes.
  2988. */
  2989. if ((vport->load_flag & FC_UNLOADING) &&
  2990. (pring->ringno == LPFC_ELS_RING)) {
  2991. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  2992. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  2993. else
  2994. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  2995. goto abort_iotag_exit;
  2996. }
  2997. /* issue ABTS for this IOCB based on iotag */
  2998. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  2999. if (abtsiocbp == NULL)
  3000. return 0;
  3001. /* This signals the response to set the correct status
  3002. * before calling the completion handler.
  3003. */
  3004. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  3005. iabt = &abtsiocbp->iocb;
  3006. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  3007. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  3008. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  3009. iabt->ulpLe = 1;
  3010. iabt->ulpClass = icmd->ulpClass;
  3011. if (phba->link_state >= LPFC_LINK_UP)
  3012. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3013. else
  3014. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3015. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3016. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3017. "%d (%d):0339 Abort xri x%x, original iotag x%x, "
  3018. "abort cmd iotag x%x\n",
  3019. phba->brd_no, vport->vpi,
  3020. iabt->un.acxri.abortContextTag,
  3021. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3022. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3023. abort_iotag_exit:
  3024. /*
  3025. * Caller to this routine should check for IOCB_ERROR
  3026. * and handle it properly. This routine no longer removes
  3027. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3028. */
  3029. return retval;
  3030. }
  3031. static int
  3032. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  3033. uint64_t lun_id, uint32_t ctx,
  3034. lpfc_ctx_cmd ctx_cmd)
  3035. {
  3036. struct lpfc_scsi_buf *lpfc_cmd;
  3037. struct scsi_cmnd *cmnd;
  3038. int rc = 1;
  3039. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3040. return rc;
  3041. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3042. cmnd = lpfc_cmd->pCmd;
  3043. if (cmnd == NULL)
  3044. return rc;
  3045. switch (ctx_cmd) {
  3046. case LPFC_CTX_LUN:
  3047. if ((cmnd->device->id == tgt_id) &&
  3048. (cmnd->device->lun == lun_id))
  3049. rc = 0;
  3050. break;
  3051. case LPFC_CTX_TGT:
  3052. if (cmnd->device->id == tgt_id)
  3053. rc = 0;
  3054. break;
  3055. case LPFC_CTX_CTX:
  3056. if (iocbq->iocb.ulpContext == ctx)
  3057. rc = 0;
  3058. break;
  3059. case LPFC_CTX_HOST:
  3060. rc = 0;
  3061. break;
  3062. default:
  3063. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3064. __FUNCTION__, ctx_cmd);
  3065. break;
  3066. }
  3067. return rc;
  3068. }
  3069. int
  3070. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3071. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  3072. {
  3073. struct lpfc_iocbq *iocbq;
  3074. int sum, i;
  3075. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3076. iocbq = phba->sli.iocbq_lookup[i];
  3077. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  3078. 0, ctx_cmd) == 0)
  3079. sum++;
  3080. }
  3081. return sum;
  3082. }
  3083. void
  3084. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3085. struct lpfc_iocbq *rspiocb)
  3086. {
  3087. lpfc_sli_release_iocbq(phba, cmdiocb);
  3088. return;
  3089. }
  3090. int
  3091. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3092. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  3093. lpfc_ctx_cmd abort_cmd)
  3094. {
  3095. struct lpfc_iocbq *iocbq;
  3096. struct lpfc_iocbq *abtsiocb;
  3097. IOCB_t *cmd = NULL;
  3098. int errcnt = 0, ret_val = 0;
  3099. int i;
  3100. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3101. iocbq = phba->sli.iocbq_lookup[i];
  3102. if (lpfc_sli_validate_fcp_iocb(iocbq, tgt_id, lun_id, 0,
  3103. abort_cmd) != 0)
  3104. continue;
  3105. /* issue ABTS for this IOCB based on iotag */
  3106. abtsiocb = lpfc_sli_get_iocbq(phba);
  3107. if (abtsiocb == NULL) {
  3108. errcnt++;
  3109. continue;
  3110. }
  3111. cmd = &iocbq->iocb;
  3112. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3113. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3114. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3115. abtsiocb->iocb.ulpLe = 1;
  3116. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3117. abtsiocb->vport = phba->pport;
  3118. if (lpfc_is_link_up(phba))
  3119. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3120. else
  3121. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3122. /* Setup callback routine and issue the command. */
  3123. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3124. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3125. if (ret_val == IOCB_ERROR) {
  3126. lpfc_sli_release_iocbq(phba, abtsiocb);
  3127. errcnt++;
  3128. continue;
  3129. }
  3130. }
  3131. return errcnt;
  3132. }
  3133. static void
  3134. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3135. struct lpfc_iocbq *cmdiocbq,
  3136. struct lpfc_iocbq *rspiocbq)
  3137. {
  3138. wait_queue_head_t *pdone_q;
  3139. unsigned long iflags;
  3140. spin_lock_irqsave(&phba->hbalock, iflags);
  3141. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3142. if (cmdiocbq->context2 && rspiocbq)
  3143. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3144. &rspiocbq->iocb, sizeof(IOCB_t));
  3145. pdone_q = cmdiocbq->context_un.wait_queue;
  3146. if (pdone_q)
  3147. wake_up(pdone_q);
  3148. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3149. return;
  3150. }
  3151. /*
  3152. * Issue the caller's iocb and wait for its completion, but no longer than the
  3153. * caller's timeout. Note that iocb_flags is cleared before the
  3154. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3155. * definition this is a wait function.
  3156. */
  3157. int
  3158. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3159. struct lpfc_sli_ring *pring,
  3160. struct lpfc_iocbq *piocb,
  3161. struct lpfc_iocbq *prspiocbq,
  3162. uint32_t timeout)
  3163. {
  3164. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3165. long timeleft, timeout_req = 0;
  3166. int retval = IOCB_SUCCESS;
  3167. uint32_t creg_val;
  3168. /*
  3169. * If the caller has provided a response iocbq buffer, then context2
  3170. * is NULL or its an error.
  3171. */
  3172. if (prspiocbq) {
  3173. if (piocb->context2)
  3174. return IOCB_ERROR;
  3175. piocb->context2 = prspiocbq;
  3176. }
  3177. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3178. piocb->context_un.wait_queue = &done_q;
  3179. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3180. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3181. creg_val = readl(phba->HCregaddr);
  3182. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3183. writel(creg_val, phba->HCregaddr);
  3184. readl(phba->HCregaddr); /* flush */
  3185. }
  3186. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3187. if (retval == IOCB_SUCCESS) {
  3188. timeout_req = timeout * HZ;
  3189. timeleft = wait_event_timeout(done_q,
  3190. piocb->iocb_flag & LPFC_IO_WAKE,
  3191. timeout_req);
  3192. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3193. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3194. "%d:0331 IOCB wake signaled\n",
  3195. phba->brd_no);
  3196. } else if (timeleft == 0) {
  3197. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3198. "%d:0338 IOCB wait timeout error - no "
  3199. "wake response Data x%x\n",
  3200. phba->brd_no, timeout);
  3201. retval = IOCB_TIMEDOUT;
  3202. } else {
  3203. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3204. "%d:0330 IOCB wake NOT set, "
  3205. "Data x%x x%lx\n", phba->brd_no,
  3206. timeout, (timeleft / jiffies));
  3207. retval = IOCB_TIMEDOUT;
  3208. }
  3209. } else {
  3210. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3211. "%d:0332 IOCB wait issue failed, Data x%x\n",
  3212. phba->brd_no, retval);
  3213. retval = IOCB_ERROR;
  3214. }
  3215. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3216. creg_val = readl(phba->HCregaddr);
  3217. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3218. writel(creg_val, phba->HCregaddr);
  3219. readl(phba->HCregaddr); /* flush */
  3220. }
  3221. if (prspiocbq)
  3222. piocb->context2 = NULL;
  3223. piocb->context_un.wait_queue = NULL;
  3224. piocb->iocb_cmpl = NULL;
  3225. return retval;
  3226. }
  3227. int
  3228. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3229. uint32_t timeout)
  3230. {
  3231. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3232. int retval;
  3233. unsigned long flag;
  3234. /* The caller must leave context1 empty. */
  3235. if (pmboxq->context1 != 0)
  3236. return MBX_NOT_FINISHED;
  3237. /* setup wake call as IOCB callback */
  3238. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3239. /* setup context field to pass wait_queue pointer to wake function */
  3240. pmboxq->context1 = &done_q;
  3241. /* now issue the command */
  3242. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3243. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3244. wait_event_interruptible_timeout(done_q,
  3245. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3246. timeout * HZ);
  3247. spin_lock_irqsave(&phba->hbalock, flag);
  3248. pmboxq->context1 = NULL;
  3249. /*
  3250. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3251. * else do not free the resources.
  3252. */
  3253. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3254. retval = MBX_SUCCESS;
  3255. else {
  3256. retval = MBX_TIMEOUT;
  3257. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3258. }
  3259. spin_unlock_irqrestore(&phba->hbalock, flag);
  3260. }
  3261. return retval;
  3262. }
  3263. int
  3264. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3265. {
  3266. struct lpfc_vport *vport = phba->pport;
  3267. int i = 0;
  3268. uint32_t ha_copy;
  3269. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3270. if (i++ > LPFC_MBOX_TMO * 1000)
  3271. return 1;
  3272. /*
  3273. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3274. * did finish. This way we won't get the misleading
  3275. * "Stray Mailbox Interrupt" message.
  3276. */
  3277. spin_lock_irq(&phba->hbalock);
  3278. ha_copy = phba->work_ha;
  3279. phba->work_ha &= ~HA_MBATT;
  3280. spin_unlock_irq(&phba->hbalock);
  3281. if (ha_copy & HA_MBATT)
  3282. if (lpfc_sli_handle_mb_event(phba) == 0)
  3283. i = 0;
  3284. msleep(1);
  3285. }
  3286. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3287. }
  3288. irqreturn_t
  3289. lpfc_intr_handler(int irq, void *dev_id)
  3290. {
  3291. struct lpfc_hba *phba;
  3292. uint32_t ha_copy;
  3293. uint32_t work_ha_copy;
  3294. unsigned long status;
  3295. int i;
  3296. uint32_t control;
  3297. MAILBOX_t *mbox, *pmbox;
  3298. struct lpfc_vport *vport;
  3299. struct lpfc_nodelist *ndlp;
  3300. struct lpfc_dmabuf *mp;
  3301. LPFC_MBOXQ_t *pmb;
  3302. int rc;
  3303. /*
  3304. * Get the driver's phba structure from the dev_id and
  3305. * assume the HBA is not interrupting.
  3306. */
  3307. phba = (struct lpfc_hba *) dev_id;
  3308. if (unlikely(!phba))
  3309. return IRQ_NONE;
  3310. /* If the pci channel is offline, ignore all the interrupts. */
  3311. if (unlikely(pci_channel_offline(phba->pcidev)))
  3312. return IRQ_NONE;
  3313. phba->sli.slistat.sli_intr++;
  3314. /*
  3315. * Call the HBA to see if it is interrupting. If not, don't claim
  3316. * the interrupt
  3317. */
  3318. /* Ignore all interrupts during initialization. */
  3319. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3320. return IRQ_NONE;
  3321. /*
  3322. * Read host attention register to determine interrupt source
  3323. * Clear Attention Sources, except Error Attention (to
  3324. * preserve status) and Link Attention
  3325. */
  3326. spin_lock(&phba->hbalock);
  3327. ha_copy = readl(phba->HAregaddr);
  3328. /* If somebody is waiting to handle an eratt don't process it
  3329. * here. The brdkill function will do this.
  3330. */
  3331. if (phba->link_flag & LS_IGNORE_ERATT)
  3332. ha_copy &= ~HA_ERATT;
  3333. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3334. readl(phba->HAregaddr); /* flush */
  3335. spin_unlock(&phba->hbalock);
  3336. if (unlikely(!ha_copy))
  3337. return IRQ_NONE;
  3338. work_ha_copy = ha_copy & phba->work_ha_mask;
  3339. if (unlikely(work_ha_copy)) {
  3340. if (work_ha_copy & HA_LATT) {
  3341. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3342. /*
  3343. * Turn off Link Attention interrupts
  3344. * until CLEAR_LA done
  3345. */
  3346. spin_lock(&phba->hbalock);
  3347. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3348. control = readl(phba->HCregaddr);
  3349. control &= ~HC_LAINT_ENA;
  3350. writel(control, phba->HCregaddr);
  3351. readl(phba->HCregaddr); /* flush */
  3352. spin_unlock(&phba->hbalock);
  3353. }
  3354. else
  3355. work_ha_copy &= ~HA_LATT;
  3356. }
  3357. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3358. /*
  3359. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3360. * the only slow ring.
  3361. */
  3362. status = (work_ha_copy &
  3363. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3364. status >>= (4*LPFC_ELS_RING);
  3365. if (status & HA_RXMASK) {
  3366. spin_lock(&phba->hbalock);
  3367. control = readl(phba->HCregaddr);
  3368. lpfc_debugfs_slow_ring_trc(phba,
  3369. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3370. control, status,
  3371. (uint32_t)phba->sli.slistat.sli_intr);
  3372. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3373. lpfc_debugfs_slow_ring_trc(phba,
  3374. "ISR Disable ring:"
  3375. "pwork:x%x hawork:x%x wait:x%x",
  3376. phba->work_ha, work_ha_copy,
  3377. (uint32_t)((unsigned long)
  3378. phba->work_wait));
  3379. control &=
  3380. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3381. writel(control, phba->HCregaddr);
  3382. readl(phba->HCregaddr); /* flush */
  3383. }
  3384. else {
  3385. lpfc_debugfs_slow_ring_trc(phba,
  3386. "ISR slow ring: pwork:"
  3387. "x%x hawork:x%x wait:x%x",
  3388. phba->work_ha, work_ha_copy,
  3389. (uint32_t)((unsigned long)
  3390. phba->work_wait));
  3391. }
  3392. spin_unlock(&phba->hbalock);
  3393. }
  3394. }
  3395. if (work_ha_copy & HA_ERATT) {
  3396. phba->link_state = LPFC_HBA_ERROR;
  3397. /*
  3398. * There was a link/board error. Read the
  3399. * status register to retrieve the error event
  3400. * and process it.
  3401. */
  3402. phba->sli.slistat.err_attn_event++;
  3403. /* Save status info */
  3404. phba->work_hs = readl(phba->HSregaddr);
  3405. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3406. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3407. /* Clear Chip error bit */
  3408. writel(HA_ERATT, phba->HAregaddr);
  3409. readl(phba->HAregaddr); /* flush */
  3410. phba->pport->stopped = 1;
  3411. }
  3412. if ((work_ha_copy & HA_MBATT) &&
  3413. (phba->sli.mbox_active)) {
  3414. pmb = phba->sli.mbox_active;
  3415. pmbox = &pmb->mb;
  3416. mbox = &phba->slim2p->mbx;
  3417. vport = pmb->vport;
  3418. /* First check out the status word */
  3419. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3420. if (pmbox->mbxOwner != OWN_HOST) {
  3421. /*
  3422. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3423. * mbxStatus <status>
  3424. */
  3425. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3426. LOG_SLI,
  3427. "%d (%d):0304 Stray Mailbox "
  3428. "Interrupt mbxCommand x%x "
  3429. "mbxStatus x%x\n",
  3430. phba->brd_no,
  3431. (vport
  3432. ? vport->vpi : 0),
  3433. pmbox->mbxCommand,
  3434. pmbox->mbxStatus);
  3435. }
  3436. phba->last_completion_time = jiffies;
  3437. del_timer_sync(&phba->sli.mbox_tmo);
  3438. phba->sli.mbox_active = NULL;
  3439. if (pmb->mbox_cmpl) {
  3440. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3441. MAILBOX_CMD_SIZE);
  3442. }
  3443. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3444. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3445. lpfc_debugfs_disc_trc(vport,
  3446. LPFC_DISC_TRC_MBOX_VPORT,
  3447. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3448. (uint32_t)pmbox->mbxStatus,
  3449. pmbox->un.varWords[0], 0);
  3450. if ( !pmbox->mbxStatus) {
  3451. mp = (struct lpfc_dmabuf *)
  3452. (pmb->context1);
  3453. ndlp = (struct lpfc_nodelist *)
  3454. pmb->context2;
  3455. /* Reg_LOGIN of dflt RPI was successful.
  3456. * new lets get rid of the RPI using the
  3457. * same mbox buffer.
  3458. */
  3459. lpfc_unreg_login(phba, vport->vpi,
  3460. pmbox->un.varWords[0], pmb);
  3461. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3462. pmb->context1 = mp;
  3463. pmb->context2 = ndlp;
  3464. pmb->vport = vport;
  3465. spin_lock(&phba->hbalock);
  3466. phba->sli.sli_flag &=
  3467. ~LPFC_SLI_MBOX_ACTIVE;
  3468. spin_unlock(&phba->hbalock);
  3469. goto send_current_mbox;
  3470. }
  3471. }
  3472. spin_lock(&phba->pport->work_port_lock);
  3473. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3474. spin_unlock(&phba->pport->work_port_lock);
  3475. lpfc_mbox_cmpl_put(phba, pmb);
  3476. }
  3477. if ((work_ha_copy & HA_MBATT) &&
  3478. (phba->sli.mbox_active == NULL)) {
  3479. send_next_mbox:
  3480. spin_lock(&phba->hbalock);
  3481. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3482. pmb = lpfc_mbox_get(phba);
  3483. spin_unlock(&phba->hbalock);
  3484. send_current_mbox:
  3485. /* Process next mailbox command if there is one */
  3486. if (pmb != NULL) {
  3487. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3488. if (rc == MBX_NOT_FINISHED) {
  3489. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3490. lpfc_mbox_cmpl_put(phba, pmb);
  3491. goto send_next_mbox;
  3492. }
  3493. } else {
  3494. /* Turn on IOCB processing */
  3495. for (i = 0; i < phba->sli.num_rings; i++)
  3496. lpfc_sli_turn_on_ring(phba, i);
  3497. }
  3498. }
  3499. spin_lock(&phba->hbalock);
  3500. phba->work_ha |= work_ha_copy;
  3501. if (phba->work_wait)
  3502. lpfc_worker_wake_up(phba);
  3503. spin_unlock(&phba->hbalock);
  3504. }
  3505. ha_copy &= ~(phba->work_ha_mask);
  3506. /*
  3507. * Process all events on FCP ring. Take the optimized path for
  3508. * FCP IO. Any other IO is slow path and is handled by
  3509. * the worker thread.
  3510. */
  3511. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3512. status >>= (4*LPFC_FCP_RING);
  3513. if (status & HA_RXMASK)
  3514. lpfc_sli_handle_fast_ring_event(phba,
  3515. &phba->sli.ring[LPFC_FCP_RING],
  3516. status);
  3517. if (phba->cfg_multi_ring_support == 2) {
  3518. /*
  3519. * Process all events on extra ring. Take the optimized path
  3520. * for extra ring IO. Any other IO is slow path and is handled
  3521. * by the worker thread.
  3522. */
  3523. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3524. status >>= (4*LPFC_EXTRA_RING);
  3525. if (status & HA_RXMASK) {
  3526. lpfc_sli_handle_fast_ring_event(phba,
  3527. &phba->sli.ring[LPFC_EXTRA_RING],
  3528. status);
  3529. }
  3530. }
  3531. return IRQ_HANDLED;
  3532. } /* lpfc_intr_handler */