boot.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489
  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2008-2010 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/wl12xx.h>
  25. #include <linux/export.h>
  26. #include "debug.h"
  27. #include "acx.h"
  28. #include "boot.h"
  29. #include "io.h"
  30. #include "event.h"
  31. #include "rx.h"
  32. #include "hw_ops.h"
  33. static int wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
  34. {
  35. u32 cpu_ctrl;
  36. int ret;
  37. /* 10.5.0 run the firmware (I) */
  38. ret = wlcore_read_reg(wl, REG_ECPU_CONTROL, &cpu_ctrl);
  39. if (ret < 0)
  40. goto out;
  41. /* 10.5.1 run the firmware (II) */
  42. cpu_ctrl |= flag;
  43. ret = wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
  44. out:
  45. return ret;
  46. }
  47. static int wlcore_boot_parse_fw_ver(struct wl1271 *wl,
  48. struct wl1271_static_data *static_data)
  49. {
  50. int ret;
  51. strncpy(wl->chip.fw_ver_str, static_data->fw_version,
  52. sizeof(wl->chip.fw_ver_str));
  53. /* make sure the string is NULL-terminated */
  54. wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
  55. ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
  56. &wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
  57. &wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
  58. &wl->chip.fw_ver[4]);
  59. if (ret != 5) {
  60. wl1271_warning("fw version incorrect value");
  61. memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
  62. ret = -EINVAL;
  63. goto out;
  64. }
  65. ret = wlcore_identify_fw(wl);
  66. if (ret < 0)
  67. goto out;
  68. out:
  69. return ret;
  70. }
  71. static int wlcore_boot_static_data(struct wl1271 *wl)
  72. {
  73. struct wl1271_static_data *static_data;
  74. size_t len = sizeof(*static_data) + wl->static_data_priv_len;
  75. int ret;
  76. static_data = kmalloc(len, GFP_KERNEL);
  77. if (!static_data) {
  78. ret = -ENOMEM;
  79. goto out;
  80. }
  81. ret = wlcore_read(wl, wl->cmd_box_addr, static_data, len, false);
  82. if (ret < 0)
  83. goto out_free;
  84. ret = wlcore_boot_parse_fw_ver(wl, static_data);
  85. if (ret < 0)
  86. goto out_free;
  87. ret = wlcore_handle_static_data(wl, static_data);
  88. if (ret < 0)
  89. goto out_free;
  90. out_free:
  91. kfree(static_data);
  92. out:
  93. return ret;
  94. }
  95. static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
  96. size_t fw_data_len, u32 dest)
  97. {
  98. struct wlcore_partition_set partition;
  99. int addr, chunk_num, partition_limit;
  100. u8 *p, *chunk;
  101. int ret;
  102. /* whal_FwCtrl_LoadFwImageSm() */
  103. wl1271_debug(DEBUG_BOOT, "starting firmware upload");
  104. wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
  105. fw_data_len, CHUNK_SIZE);
  106. if ((fw_data_len % 4) != 0) {
  107. wl1271_error("firmware length not multiple of four");
  108. return -EIO;
  109. }
  110. chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
  111. if (!chunk) {
  112. wl1271_error("allocation for firmware upload chunk failed");
  113. return -ENOMEM;
  114. }
  115. memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
  116. partition.mem.start = dest;
  117. ret = wlcore_set_partition(wl, &partition);
  118. if (ret < 0)
  119. return ret;
  120. /* 10.1 set partition limit and chunk num */
  121. chunk_num = 0;
  122. partition_limit = wl->ptable[PART_DOWN].mem.size;
  123. while (chunk_num < fw_data_len / CHUNK_SIZE) {
  124. /* 10.2 update partition, if needed */
  125. addr = dest + (chunk_num + 2) * CHUNK_SIZE;
  126. if (addr > partition_limit) {
  127. addr = dest + chunk_num * CHUNK_SIZE;
  128. partition_limit = chunk_num * CHUNK_SIZE +
  129. wl->ptable[PART_DOWN].mem.size;
  130. partition.mem.start = addr;
  131. ret = wlcore_set_partition(wl, &partition);
  132. if (ret < 0)
  133. return ret;
  134. }
  135. /* 10.3 upload the chunk */
  136. addr = dest + chunk_num * CHUNK_SIZE;
  137. p = buf + chunk_num * CHUNK_SIZE;
  138. memcpy(chunk, p, CHUNK_SIZE);
  139. wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
  140. p, addr);
  141. ret = wlcore_write(wl, addr, chunk, CHUNK_SIZE, false);
  142. if (ret < 0)
  143. goto out;
  144. chunk_num++;
  145. }
  146. /* 10.4 upload the last chunk */
  147. addr = dest + chunk_num * CHUNK_SIZE;
  148. p = buf + chunk_num * CHUNK_SIZE;
  149. memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
  150. wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
  151. fw_data_len % CHUNK_SIZE, p, addr);
  152. ret = wlcore_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
  153. out:
  154. kfree(chunk);
  155. return ret;
  156. }
  157. int wlcore_boot_upload_firmware(struct wl1271 *wl)
  158. {
  159. u32 chunks, addr, len;
  160. int ret = 0;
  161. u8 *fw;
  162. fw = wl->fw;
  163. chunks = be32_to_cpup((__be32 *) fw);
  164. fw += sizeof(u32);
  165. wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
  166. while (chunks--) {
  167. addr = be32_to_cpup((__be32 *) fw);
  168. fw += sizeof(u32);
  169. len = be32_to_cpup((__be32 *) fw);
  170. fw += sizeof(u32);
  171. if (len > 300000) {
  172. wl1271_info("firmware chunk too long: %u", len);
  173. return -EINVAL;
  174. }
  175. wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
  176. chunks, addr, len);
  177. ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
  178. if (ret != 0)
  179. break;
  180. fw += len;
  181. }
  182. return ret;
  183. }
  184. EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
  185. int wlcore_boot_upload_nvs(struct wl1271 *wl)
  186. {
  187. size_t nvs_len, burst_len;
  188. int i;
  189. u32 dest_addr, val;
  190. u8 *nvs_ptr, *nvs_aligned;
  191. int ret;
  192. if (wl->nvs == NULL) {
  193. wl1271_error("NVS file is needed during boot");
  194. return -ENODEV;
  195. }
  196. if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
  197. struct wl1271_nvs_file *nvs =
  198. (struct wl1271_nvs_file *)wl->nvs;
  199. /*
  200. * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz
  201. * band configurations) can be removed when those NVS files stop
  202. * floating around.
  203. */
  204. if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
  205. wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
  206. if (nvs->general_params.dual_mode_select)
  207. wl->enable_11a = true;
  208. }
  209. if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
  210. (wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
  211. wl->enable_11a)) {
  212. wl1271_error("nvs size is not as expected: %zu != %zu",
  213. wl->nvs_len, sizeof(struct wl1271_nvs_file));
  214. kfree(wl->nvs);
  215. wl->nvs = NULL;
  216. wl->nvs_len = 0;
  217. return -EILSEQ;
  218. }
  219. /* only the first part of the NVS needs to be uploaded */
  220. nvs_len = sizeof(nvs->nvs);
  221. nvs_ptr = (u8 *) nvs->nvs;
  222. } else {
  223. struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl->nvs;
  224. if (wl->nvs_len == sizeof(struct wl128x_nvs_file)) {
  225. if (nvs->general_params.dual_mode_select)
  226. wl->enable_11a = true;
  227. } else {
  228. wl1271_error("nvs size is not as expected: %zu != %zu",
  229. wl->nvs_len,
  230. sizeof(struct wl128x_nvs_file));
  231. kfree(wl->nvs);
  232. wl->nvs = NULL;
  233. wl->nvs_len = 0;
  234. return -EILSEQ;
  235. }
  236. /* only the first part of the NVS needs to be uploaded */
  237. nvs_len = sizeof(nvs->nvs);
  238. nvs_ptr = (u8 *)nvs->nvs;
  239. }
  240. /* update current MAC address to NVS */
  241. nvs_ptr[11] = wl->addresses[0].addr[0];
  242. nvs_ptr[10] = wl->addresses[0].addr[1];
  243. nvs_ptr[6] = wl->addresses[0].addr[2];
  244. nvs_ptr[5] = wl->addresses[0].addr[3];
  245. nvs_ptr[4] = wl->addresses[0].addr[4];
  246. nvs_ptr[3] = wl->addresses[0].addr[5];
  247. /*
  248. * Layout before the actual NVS tables:
  249. * 1 byte : burst length.
  250. * 2 bytes: destination address.
  251. * n bytes: data to burst copy.
  252. *
  253. * This is ended by a 0 length, then the NVS tables.
  254. */
  255. /* FIXME: Do we need to check here whether the LSB is 1? */
  256. while (nvs_ptr[0]) {
  257. burst_len = nvs_ptr[0];
  258. dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
  259. /*
  260. * Due to our new wl1271_translate_reg_addr function,
  261. * we need to add the register partition start address
  262. * to the destination
  263. */
  264. dest_addr += wl->curr_part.reg.start;
  265. /* We move our pointer to the data */
  266. nvs_ptr += 3;
  267. for (i = 0; i < burst_len; i++) {
  268. if (nvs_ptr + 3 >= (u8 *) wl->nvs + nvs_len)
  269. goto out_badnvs;
  270. val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
  271. | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
  272. wl1271_debug(DEBUG_BOOT,
  273. "nvs burst write 0x%x: 0x%x",
  274. dest_addr, val);
  275. ret = wlcore_write32(wl, dest_addr, val);
  276. if (ret < 0)
  277. return ret;
  278. nvs_ptr += 4;
  279. dest_addr += 4;
  280. }
  281. if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
  282. goto out_badnvs;
  283. }
  284. /*
  285. * We've reached the first zero length, the first NVS table
  286. * is located at an aligned offset which is at least 7 bytes further.
  287. * NOTE: The wl->nvs->nvs element must be first, in order to
  288. * simplify the casting, we assume it is at the beginning of
  289. * the wl->nvs structure.
  290. */
  291. nvs_ptr = (u8 *)wl->nvs +
  292. ALIGN(nvs_ptr - (u8 *)wl->nvs + 7, 4);
  293. if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
  294. goto out_badnvs;
  295. nvs_len -= nvs_ptr - (u8 *)wl->nvs;
  296. /* Now we must set the partition correctly */
  297. ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
  298. if (ret < 0)
  299. return ret;
  300. /* Copy the NVS tables to a new block to ensure alignment */
  301. nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
  302. if (!nvs_aligned)
  303. return -ENOMEM;
  304. /* And finally we upload the NVS tables */
  305. ret = wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS, nvs_aligned, nvs_len,
  306. false);
  307. kfree(nvs_aligned);
  308. return ret;
  309. out_badnvs:
  310. wl1271_error("nvs data is malformed");
  311. return -EILSEQ;
  312. }
  313. EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);
  314. int wlcore_boot_run_firmware(struct wl1271 *wl)
  315. {
  316. int loop, ret;
  317. u32 chip_id, intr;
  318. /* Make sure we have the boot partition */
  319. ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
  320. if (ret < 0)
  321. return ret;
  322. ret = wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
  323. if (ret < 0)
  324. return ret;
  325. ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &chip_id);
  326. if (ret < 0)
  327. return ret;
  328. wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
  329. if (chip_id != wl->chip.id) {
  330. wl1271_error("chip id doesn't match after firmware boot");
  331. return -EIO;
  332. }
  333. /* wait for init to complete */
  334. loop = 0;
  335. while (loop++ < INIT_LOOP) {
  336. udelay(INIT_LOOP_DELAY);
  337. ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);
  338. if (ret < 0)
  339. return ret;
  340. if (intr == 0xffffffff) {
  341. wl1271_error("error reading hardware complete "
  342. "init indication");
  343. return -EIO;
  344. }
  345. /* check that ACX_INTR_INIT_COMPLETE is enabled */
  346. else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
  347. ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK,
  348. WL1271_ACX_INTR_INIT_COMPLETE);
  349. if (ret < 0)
  350. return ret;
  351. break;
  352. }
  353. }
  354. if (loop > INIT_LOOP) {
  355. wl1271_error("timeout waiting for the hardware to "
  356. "complete initialization");
  357. return -EIO;
  358. }
  359. /* get hardware config command mail box */
  360. ret = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR, &wl->cmd_box_addr);
  361. if (ret < 0)
  362. return ret;
  363. wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl->cmd_box_addr);
  364. /* get hardware config event mail box */
  365. ret = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR, &wl->mbox_ptr[0]);
  366. if (ret < 0)
  367. return ret;
  368. wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox);
  369. wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
  370. wl->mbox_ptr[0], wl->mbox_ptr[1]);
  371. ret = wlcore_boot_static_data(wl);
  372. if (ret < 0) {
  373. wl1271_error("error getting static data");
  374. return ret;
  375. }
  376. /*
  377. * in case of full asynchronous mode the firmware event must be
  378. * ready to receive event from the command mailbox
  379. */
  380. /* unmask required mbox events */
  381. wl->event_mask = BSS_LOSE_EVENT_ID |
  382. REGAINED_BSS_EVENT_ID |
  383. SCAN_COMPLETE_EVENT_ID |
  384. ROLE_STOP_COMPLETE_EVENT_ID |
  385. RSSI_SNR_TRIGGER_0_EVENT_ID |
  386. PSPOLL_DELIVERY_FAILURE_EVENT_ID |
  387. SOFT_GEMINI_SENSE_EVENT_ID |
  388. PERIODIC_SCAN_REPORT_EVENT_ID |
  389. PERIODIC_SCAN_COMPLETE_EVENT_ID |
  390. DUMMY_PACKET_EVENT_ID |
  391. PEER_REMOVE_COMPLETE_EVENT_ID |
  392. BA_SESSION_RX_CONSTRAINT_EVENT_ID |
  393. REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID |
  394. INACTIVE_STA_EVENT_ID |
  395. MAX_TX_RETRY_EVENT_ID |
  396. CHANNEL_SWITCH_COMPLETE_EVENT_ID;
  397. ret = wl1271_event_unmask(wl);
  398. if (ret < 0) {
  399. wl1271_error("EVENT mask setting failed");
  400. return ret;
  401. }
  402. /* set the working partition to its "running" mode offset */
  403. ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
  404. /* firmware startup completed */
  405. return ret;
  406. }
  407. EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);