pgtable_32.h 3.9 KB

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  1. #ifndef _ASM_X86_PGTABLE_32_H
  2. #define _ASM_X86_PGTABLE_32_H
  3. /*
  4. * The Linux memory management assumes a three-level page table setup. On
  5. * the i386, we use that, but "fold" the mid level into the top-level page
  6. * table, so that we physically have the same two-level page table as the
  7. * i386 mmu expects.
  8. *
  9. * This file contains the functions and defines necessary to modify and use
  10. * the i386 page table tree.
  11. */
  12. #ifndef __ASSEMBLY__
  13. #include <asm/processor.h>
  14. #include <asm/fixmap.h>
  15. #include <linux/threads.h>
  16. #include <asm/paravirt.h>
  17. #include <linux/bitops.h>
  18. #include <linux/slab.h>
  19. #include <linux/list.h>
  20. #include <linux/spinlock.h>
  21. struct mm_struct;
  22. struct vm_area_struct;
  23. extern pgd_t swapper_pg_dir[1024];
  24. static inline void pgtable_cache_init(void) { }
  25. static inline void check_pgt_cache(void) { }
  26. void paging_init(void);
  27. extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
  28. /*
  29. * The Linux x86 paging architecture is 'compile-time dual-mode', it
  30. * implements both the traditional 2-level x86 page tables and the
  31. * newer 3-level PAE-mode page tables.
  32. */
  33. #ifdef CONFIG_X86_PAE
  34. # include <asm/pgtable-3level-defs.h>
  35. # define PMD_SIZE (1UL << PMD_SHIFT)
  36. # define PMD_MASK (~(PMD_SIZE - 1))
  37. #else
  38. # include <asm/pgtable-2level-defs.h>
  39. #endif
  40. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  41. #define PGDIR_MASK (~(PGDIR_SIZE - 1))
  42. /* Just any arbitrary offset to the start of the vmalloc VM area: the
  43. * current 8MB value just means that there will be a 8MB "hole" after the
  44. * physical memory until the kernel virtual memory starts. That means that
  45. * any out-of-bounds memory accesses will hopefully be caught.
  46. * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  47. * area for the same reason. ;)
  48. */
  49. #define VMALLOC_OFFSET (8 * 1024 * 1024)
  50. #define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
  51. #ifdef CONFIG_X86_PAE
  52. #define LAST_PKMAP 512
  53. #else
  54. #define LAST_PKMAP 1024
  55. #endif
  56. #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
  57. & PMD_MASK)
  58. #ifdef CONFIG_HIGHMEM
  59. # define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
  60. #else
  61. # define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
  62. #endif
  63. #define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
  64. /*
  65. * Define this if things work differently on an i386 and an i486:
  66. * it will (on an i486) warn about kernel memory accesses that are
  67. * done without a 'access_ok(VERIFY_WRITE,..)'
  68. */
  69. #undef TEST_ACCESS_OK
  70. /* The boot page tables (all created as a single array) */
  71. extern unsigned long pg0[];
  72. #ifdef CONFIG_X86_PAE
  73. # include <asm/pgtable-3level.h>
  74. #else
  75. # include <asm/pgtable-2level.h>
  76. #endif
  77. #if defined(CONFIG_HIGHPTE)
  78. #define pte_offset_map(dir, address) \
  79. ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \
  80. pte_index((address)))
  81. #define pte_offset_map_nested(dir, address) \
  82. ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) + \
  83. pte_index((address)))
  84. #define pte_unmap(pte) kunmap_atomic((pte), KM_PTE0)
  85. #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
  86. #else
  87. #define pte_offset_map(dir, address) \
  88. ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
  89. #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
  90. #define pte_unmap(pte) do { } while (0)
  91. #define pte_unmap_nested(pte) do { } while (0)
  92. #endif
  93. /* Clear a kernel PTE and flush it from the TLB */
  94. #define kpte_clear_flush(ptep, vaddr) \
  95. do { \
  96. pte_clear(&init_mm, (vaddr), (ptep)); \
  97. __flush_tlb_one((vaddr)); \
  98. } while (0)
  99. /*
  100. * The i386 doesn't have any external MMU info: the kernel page
  101. * tables contain all the necessary information.
  102. */
  103. #define update_mmu_cache(vma, address, pte) do { } while (0)
  104. #endif /* !__ASSEMBLY__ */
  105. /*
  106. * kern_addr_valid() is (1) for FLATMEM and (0) for
  107. * SPARSEMEM and DISCONTIGMEM
  108. */
  109. #ifdef CONFIG_FLATMEM
  110. #define kern_addr_valid(addr) (1)
  111. #else
  112. #define kern_addr_valid(kaddr) (0)
  113. #endif
  114. #endif /* _ASM_X86_PGTABLE_32_H */