rtc-twl.c 16 KB

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  1. /*
  2. * rtc-twl.c -- TWL Real Time Clock interface
  3. *
  4. * Copyright (C) 2007 MontaVista Software, Inc
  5. * Author: Alexandre Rusev <source@mvista.com>
  6. *
  7. * Based on original TI driver twl4030-rtc.c
  8. * Copyright (C) 2006 Texas Instruments, Inc.
  9. *
  10. * Based on rtc-omap.c
  11. * Copyright (C) 2003 MontaVista Software, Inc.
  12. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13. * Copyright (C) 2006 David Brownell
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/rtc.h>
  26. #include <linux/bcd.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/of.h>
  30. #include <linux/i2c/twl.h>
  31. /*
  32. * RTC block register offsets (use TWL_MODULE_RTC)
  33. */
  34. enum {
  35. REG_SECONDS_REG = 0,
  36. REG_MINUTES_REG,
  37. REG_HOURS_REG,
  38. REG_DAYS_REG,
  39. REG_MONTHS_REG,
  40. REG_YEARS_REG,
  41. REG_WEEKS_REG,
  42. REG_ALARM_SECONDS_REG,
  43. REG_ALARM_MINUTES_REG,
  44. REG_ALARM_HOURS_REG,
  45. REG_ALARM_DAYS_REG,
  46. REG_ALARM_MONTHS_REG,
  47. REG_ALARM_YEARS_REG,
  48. REG_RTC_CTRL_REG,
  49. REG_RTC_STATUS_REG,
  50. REG_RTC_INTERRUPTS_REG,
  51. REG_RTC_COMP_LSB_REG,
  52. REG_RTC_COMP_MSB_REG,
  53. };
  54. static const u8 twl4030_rtc_reg_map[] = {
  55. [REG_SECONDS_REG] = 0x00,
  56. [REG_MINUTES_REG] = 0x01,
  57. [REG_HOURS_REG] = 0x02,
  58. [REG_DAYS_REG] = 0x03,
  59. [REG_MONTHS_REG] = 0x04,
  60. [REG_YEARS_REG] = 0x05,
  61. [REG_WEEKS_REG] = 0x06,
  62. [REG_ALARM_SECONDS_REG] = 0x07,
  63. [REG_ALARM_MINUTES_REG] = 0x08,
  64. [REG_ALARM_HOURS_REG] = 0x09,
  65. [REG_ALARM_DAYS_REG] = 0x0A,
  66. [REG_ALARM_MONTHS_REG] = 0x0B,
  67. [REG_ALARM_YEARS_REG] = 0x0C,
  68. [REG_RTC_CTRL_REG] = 0x0D,
  69. [REG_RTC_STATUS_REG] = 0x0E,
  70. [REG_RTC_INTERRUPTS_REG] = 0x0F,
  71. [REG_RTC_COMP_LSB_REG] = 0x10,
  72. [REG_RTC_COMP_MSB_REG] = 0x11,
  73. };
  74. static const u8 twl6030_rtc_reg_map[] = {
  75. [REG_SECONDS_REG] = 0x00,
  76. [REG_MINUTES_REG] = 0x01,
  77. [REG_HOURS_REG] = 0x02,
  78. [REG_DAYS_REG] = 0x03,
  79. [REG_MONTHS_REG] = 0x04,
  80. [REG_YEARS_REG] = 0x05,
  81. [REG_WEEKS_REG] = 0x06,
  82. [REG_ALARM_SECONDS_REG] = 0x08,
  83. [REG_ALARM_MINUTES_REG] = 0x09,
  84. [REG_ALARM_HOURS_REG] = 0x0A,
  85. [REG_ALARM_DAYS_REG] = 0x0B,
  86. [REG_ALARM_MONTHS_REG] = 0x0C,
  87. [REG_ALARM_YEARS_REG] = 0x0D,
  88. [REG_RTC_CTRL_REG] = 0x10,
  89. [REG_RTC_STATUS_REG] = 0x11,
  90. [REG_RTC_INTERRUPTS_REG] = 0x12,
  91. [REG_RTC_COMP_LSB_REG] = 0x13,
  92. [REG_RTC_COMP_MSB_REG] = 0x14,
  93. };
  94. /* RTC_CTRL_REG bitfields */
  95. #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
  96. #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
  97. #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
  98. #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
  99. #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
  100. #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
  101. #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
  102. #define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80
  103. /* RTC_STATUS_REG bitfields */
  104. #define BIT_RTC_STATUS_REG_RUN_M 0x02
  105. #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
  106. #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
  107. #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
  108. #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
  109. #define BIT_RTC_STATUS_REG_ALARM_M 0x40
  110. #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
  111. /* RTC_INTERRUPTS_REG bitfields */
  112. #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
  113. #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
  114. #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
  115. /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
  116. #define ALL_TIME_REGS 6
  117. /*----------------------------------------------------------------------*/
  118. static u8 *rtc_reg_map;
  119. /*
  120. * Supports 1 byte read from TWL RTC register.
  121. */
  122. static int twl_rtc_read_u8(u8 *data, u8 reg)
  123. {
  124. int ret;
  125. ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
  126. if (ret < 0)
  127. pr_err("twl_rtc: Could not read TWL"
  128. "register %X - error %d\n", reg, ret);
  129. return ret;
  130. }
  131. /*
  132. * Supports 1 byte write to TWL RTC registers.
  133. */
  134. static int twl_rtc_write_u8(u8 data, u8 reg)
  135. {
  136. int ret;
  137. ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
  138. if (ret < 0)
  139. pr_err("twl_rtc: Could not write TWL"
  140. "register %X - error %d\n", reg, ret);
  141. return ret;
  142. }
  143. /*
  144. * Cache the value for timer/alarm interrupts register; this is
  145. * only changed by callers holding rtc ops lock (or resume).
  146. */
  147. static unsigned char rtc_irq_bits;
  148. /*
  149. * Enable 1/second update and/or alarm interrupts.
  150. */
  151. static int set_rtc_irq_bit(unsigned char bit)
  152. {
  153. unsigned char val;
  154. int ret;
  155. /* if the bit is set, return from here */
  156. if (rtc_irq_bits & bit)
  157. return 0;
  158. val = rtc_irq_bits | bit;
  159. val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
  160. ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  161. if (ret == 0)
  162. rtc_irq_bits = val;
  163. return ret;
  164. }
  165. /*
  166. * Disable update and/or alarm interrupts.
  167. */
  168. static int mask_rtc_irq_bit(unsigned char bit)
  169. {
  170. unsigned char val;
  171. int ret;
  172. /* if the bit is clear, return from here */
  173. if (!(rtc_irq_bits & bit))
  174. return 0;
  175. val = rtc_irq_bits & ~bit;
  176. ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  177. if (ret == 0)
  178. rtc_irq_bits = val;
  179. return ret;
  180. }
  181. static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
  182. {
  183. int ret;
  184. if (enabled)
  185. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  186. else
  187. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  188. return ret;
  189. }
  190. /*
  191. * Gets current TWL RTC time and date parameters.
  192. *
  193. * The RTC's time/alarm representation is not what gmtime(3) requires
  194. * Linux to use:
  195. *
  196. * - Months are 1..12 vs Linux 0-11
  197. * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
  198. */
  199. static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
  200. {
  201. unsigned char rtc_data[ALL_TIME_REGS];
  202. int ret;
  203. u8 save_control;
  204. u8 rtc_control;
  205. ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  206. if (ret < 0) {
  207. dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret);
  208. return ret;
  209. }
  210. /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */
  211. if (twl_class_is_6030()) {
  212. if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) {
  213. save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M;
  214. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  215. if (ret < 0) {
  216. dev_err(dev, "%s clr GET_TIME, error %d\n",
  217. __func__, ret);
  218. return ret;
  219. }
  220. }
  221. }
  222. /* Copy RTC counting registers to static registers or latches */
  223. rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M;
  224. /* for twl6030/32 enable read access to static shadowed registers */
  225. if (twl_class_is_6030())
  226. rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT;
  227. ret = twl_rtc_write_u8(rtc_control, REG_RTC_CTRL_REG);
  228. if (ret < 0) {
  229. dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret);
  230. return ret;
  231. }
  232. ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
  233. (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
  234. if (ret < 0) {
  235. dev_err(dev, "%s: reading data, error %d\n", __func__, ret);
  236. return ret;
  237. }
  238. /* for twl6030 restore original state of rtc control register */
  239. if (twl_class_is_6030()) {
  240. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  241. if (ret < 0) {
  242. dev_err(dev, "%s: restore CTRL_REG, error %d\n",
  243. __func__, ret);
  244. return ret;
  245. }
  246. }
  247. tm->tm_sec = bcd2bin(rtc_data[0]);
  248. tm->tm_min = bcd2bin(rtc_data[1]);
  249. tm->tm_hour = bcd2bin(rtc_data[2]);
  250. tm->tm_mday = bcd2bin(rtc_data[3]);
  251. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  252. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  253. return ret;
  254. }
  255. static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
  256. {
  257. unsigned char save_control;
  258. unsigned char rtc_data[ALL_TIME_REGS];
  259. int ret;
  260. rtc_data[0] = bin2bcd(tm->tm_sec);
  261. rtc_data[1] = bin2bcd(tm->tm_min);
  262. rtc_data[2] = bin2bcd(tm->tm_hour);
  263. rtc_data[3] = bin2bcd(tm->tm_mday);
  264. rtc_data[4] = bin2bcd(tm->tm_mon + 1);
  265. rtc_data[5] = bin2bcd(tm->tm_year - 100);
  266. /* Stop RTC while updating the TC registers */
  267. ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  268. if (ret < 0)
  269. goto out;
  270. save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
  271. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  272. if (ret < 0)
  273. goto out;
  274. /* update all the time registers in one shot */
  275. ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
  276. (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
  277. if (ret < 0) {
  278. dev_err(dev, "rtc_set_time error %d\n", ret);
  279. goto out;
  280. }
  281. /* Start back RTC */
  282. save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
  283. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  284. out:
  285. return ret;
  286. }
  287. /*
  288. * Gets current TWL RTC alarm time.
  289. */
  290. static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  291. {
  292. unsigned char rtc_data[ALL_TIME_REGS];
  293. int ret;
  294. ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
  295. (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
  296. if (ret < 0) {
  297. dev_err(dev, "rtc_read_alarm error %d\n", ret);
  298. return ret;
  299. }
  300. /* some of these fields may be wildcard/"match all" */
  301. alm->time.tm_sec = bcd2bin(rtc_data[0]);
  302. alm->time.tm_min = bcd2bin(rtc_data[1]);
  303. alm->time.tm_hour = bcd2bin(rtc_data[2]);
  304. alm->time.tm_mday = bcd2bin(rtc_data[3]);
  305. alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
  306. alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
  307. /* report cached alarm enable state */
  308. if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
  309. alm->enabled = 1;
  310. return ret;
  311. }
  312. static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  313. {
  314. unsigned char alarm_data[ALL_TIME_REGS];
  315. int ret;
  316. ret = twl_rtc_alarm_irq_enable(dev, 0);
  317. if (ret)
  318. goto out;
  319. alarm_data[0] = bin2bcd(alm->time.tm_sec);
  320. alarm_data[1] = bin2bcd(alm->time.tm_min);
  321. alarm_data[2] = bin2bcd(alm->time.tm_hour);
  322. alarm_data[3] = bin2bcd(alm->time.tm_mday);
  323. alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
  324. alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
  325. /* update all the alarm registers in one shot */
  326. ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
  327. (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
  328. if (ret) {
  329. dev_err(dev, "rtc_set_alarm error %d\n", ret);
  330. goto out;
  331. }
  332. if (alm->enabled)
  333. ret = twl_rtc_alarm_irq_enable(dev, 1);
  334. out:
  335. return ret;
  336. }
  337. static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
  338. {
  339. unsigned long events;
  340. int ret = IRQ_NONE;
  341. int res;
  342. u8 rd_reg;
  343. res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  344. if (res)
  345. goto out;
  346. /*
  347. * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
  348. * only one (ALARM or RTC) interrupt source may be enabled
  349. * at time, we also could check our results
  350. * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
  351. */
  352. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  353. events = RTC_IRQF | RTC_AF;
  354. else
  355. events = RTC_IRQF | RTC_PF;
  356. res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M,
  357. REG_RTC_STATUS_REG);
  358. if (res)
  359. goto out;
  360. if (twl_class_is_4030()) {
  361. /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
  362. * needs 2 reads to clear the interrupt. One read is done in
  363. * do_twl_pwrirq(). Doing the second read, to clear
  364. * the bit.
  365. *
  366. * FIXME the reason PWR_ISR1 needs an extra read is that
  367. * RTC_IF retriggered until we cleared REG_ALARM_M above.
  368. * But re-reading like this is a bad hack; by doing so we
  369. * risk wrongly clearing status for some other IRQ (losing
  370. * the interrupt). Be smarter about handling RTC_UF ...
  371. */
  372. res = twl_i2c_read_u8(TWL4030_MODULE_INT,
  373. &rd_reg, TWL4030_INT_PWR_ISR1);
  374. if (res)
  375. goto out;
  376. }
  377. /* Notify RTC core on event */
  378. rtc_update_irq(rtc, 1, events);
  379. ret = IRQ_HANDLED;
  380. out:
  381. return ret;
  382. }
  383. static struct rtc_class_ops twl_rtc_ops = {
  384. .read_time = twl_rtc_read_time,
  385. .set_time = twl_rtc_set_time,
  386. .read_alarm = twl_rtc_read_alarm,
  387. .set_alarm = twl_rtc_set_alarm,
  388. .alarm_irq_enable = twl_rtc_alarm_irq_enable,
  389. };
  390. /*----------------------------------------------------------------------*/
  391. static int twl_rtc_probe(struct platform_device *pdev)
  392. {
  393. struct rtc_device *rtc;
  394. int ret = -EINVAL;
  395. int irq = platform_get_irq(pdev, 0);
  396. u8 rd_reg;
  397. if (irq <= 0)
  398. goto out1;
  399. ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  400. if (ret < 0)
  401. goto out1;
  402. if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
  403. dev_warn(&pdev->dev, "Power up reset detected.\n");
  404. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  405. dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
  406. /* Clear RTC Power up reset and pending alarm interrupts */
  407. ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
  408. if (ret < 0)
  409. goto out1;
  410. if (twl_class_is_6030()) {
  411. twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
  412. REG_INT_MSK_LINE_A);
  413. twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
  414. REG_INT_MSK_STS_A);
  415. }
  416. dev_info(&pdev->dev, "Enabling TWL-RTC\n");
  417. ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG);
  418. if (ret < 0)
  419. goto out1;
  420. /* ensure interrupts are disabled, bootloaders can be strange */
  421. ret = twl_rtc_write_u8(0, REG_RTC_INTERRUPTS_REG);
  422. if (ret < 0)
  423. dev_warn(&pdev->dev, "unable to disable interrupt\n");
  424. /* init cached IRQ enable bits */
  425. ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
  426. if (ret < 0)
  427. goto out1;
  428. rtc = rtc_device_register(pdev->name,
  429. &pdev->dev, &twl_rtc_ops, THIS_MODULE);
  430. if (IS_ERR(rtc)) {
  431. ret = PTR_ERR(rtc);
  432. dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
  433. PTR_ERR(rtc));
  434. goto out1;
  435. }
  436. ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt,
  437. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  438. dev_name(&rtc->dev), rtc);
  439. if (ret < 0) {
  440. dev_err(&pdev->dev, "IRQ is not free.\n");
  441. goto out2;
  442. }
  443. platform_set_drvdata(pdev, rtc);
  444. device_init_wakeup(&pdev->dev, 1);
  445. return 0;
  446. out2:
  447. rtc_device_unregister(rtc);
  448. out1:
  449. return ret;
  450. }
  451. /*
  452. * Disable all TWL RTC module interrupts.
  453. * Sets status flag to free.
  454. */
  455. static int twl_rtc_remove(struct platform_device *pdev)
  456. {
  457. /* leave rtc running, but disable irqs */
  458. struct rtc_device *rtc = platform_get_drvdata(pdev);
  459. int irq = platform_get_irq(pdev, 0);
  460. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  461. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  462. if (twl_class_is_6030()) {
  463. twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
  464. REG_INT_MSK_LINE_A);
  465. twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
  466. REG_INT_MSK_STS_A);
  467. }
  468. free_irq(irq, rtc);
  469. rtc_device_unregister(rtc);
  470. platform_set_drvdata(pdev, NULL);
  471. return 0;
  472. }
  473. static void twl_rtc_shutdown(struct platform_device *pdev)
  474. {
  475. /* mask timer interrupts, but leave alarm interrupts on to enable
  476. power-on when alarm is triggered */
  477. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  478. }
  479. #ifdef CONFIG_PM_SLEEP
  480. static unsigned char irqstat;
  481. static int twl_rtc_suspend(struct device *dev)
  482. {
  483. irqstat = rtc_irq_bits;
  484. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  485. return 0;
  486. }
  487. static int twl_rtc_resume(struct device *dev)
  488. {
  489. set_rtc_irq_bit(irqstat);
  490. return 0;
  491. }
  492. #endif
  493. static SIMPLE_DEV_PM_OPS(twl_rtc_pm_ops, twl_rtc_suspend, twl_rtc_resume);
  494. #ifdef CONFIG_OF
  495. static const struct of_device_id twl_rtc_of_match[] = {
  496. {.compatible = "ti,twl4030-rtc", },
  497. { },
  498. };
  499. MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
  500. #endif
  501. MODULE_ALIAS("platform:twl_rtc");
  502. static struct platform_driver twl4030rtc_driver = {
  503. .probe = twl_rtc_probe,
  504. .remove = twl_rtc_remove,
  505. .shutdown = twl_rtc_shutdown,
  506. .driver = {
  507. .owner = THIS_MODULE,
  508. .name = "twl_rtc",
  509. .pm = &twl_rtc_pm_ops,
  510. .of_match_table = of_match_ptr(twl_rtc_of_match),
  511. },
  512. };
  513. static int __init twl_rtc_init(void)
  514. {
  515. if (twl_class_is_4030())
  516. rtc_reg_map = (u8 *) twl4030_rtc_reg_map;
  517. else
  518. rtc_reg_map = (u8 *) twl6030_rtc_reg_map;
  519. return platform_driver_register(&twl4030rtc_driver);
  520. }
  521. module_init(twl_rtc_init);
  522. static void __exit twl_rtc_exit(void)
  523. {
  524. platform_driver_unregister(&twl4030rtc_driver);
  525. }
  526. module_exit(twl_rtc_exit);
  527. MODULE_AUTHOR("Texas Instruments, MontaVista Software");
  528. MODULE_LICENSE("GPL");