setup-common.c 15 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/utsname.h>
  26. #include <linux/screen_info.h>
  27. #include <linux/root_dev.h>
  28. #include <linux/notifier.h>
  29. #include <linux/cpu.h>
  30. #include <linux/unistd.h>
  31. #include <linux/serial.h>
  32. #include <linux/serial_8250.h>
  33. #include <linux/debugfs.h>
  34. #include <linux/percpu.h>
  35. #include <linux/lmb.h>
  36. #include <asm/io.h>
  37. #include <asm/prom.h>
  38. #include <asm/processor.h>
  39. #include <asm/vdso_datapage.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/smp.h>
  42. #include <asm/elf.h>
  43. #include <asm/machdep.h>
  44. #include <asm/time.h>
  45. #include <asm/cputable.h>
  46. #include <asm/sections.h>
  47. #include <asm/firmware.h>
  48. #include <asm/btext.h>
  49. #include <asm/nvram.h>
  50. #include <asm/setup.h>
  51. #include <asm/system.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include "setup.h"
  61. #ifdef DEBUG
  62. #include <asm/udbg.h>
  63. #define DBG(fmt...) udbg_printf(fmt)
  64. #else
  65. #define DBG(fmt...)
  66. #endif
  67. /* The main machine-dep calls structure
  68. */
  69. struct machdep_calls ppc_md;
  70. EXPORT_SYMBOL(ppc_md);
  71. struct machdep_calls *machine_id;
  72. EXPORT_SYMBOL(machine_id);
  73. unsigned long klimit = (unsigned long) _end;
  74. char cmd_line[COMMAND_LINE_SIZE];
  75. /*
  76. * This still seems to be needed... -- paulus
  77. */
  78. struct screen_info screen_info = {
  79. .orig_x = 0,
  80. .orig_y = 25,
  81. .orig_video_cols = 80,
  82. .orig_video_lines = 25,
  83. .orig_video_isVGA = 1,
  84. .orig_video_points = 16
  85. };
  86. #ifdef __DO_IRQ_CANON
  87. /* XXX should go elsewhere eventually */
  88. int ppc_do_canonicalize_irqs;
  89. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  90. #endif
  91. /* also used by kexec */
  92. void machine_shutdown(void)
  93. {
  94. if (ppc_md.machine_shutdown)
  95. ppc_md.machine_shutdown();
  96. }
  97. void machine_restart(char *cmd)
  98. {
  99. machine_shutdown();
  100. if (ppc_md.restart)
  101. ppc_md.restart(cmd);
  102. #ifdef CONFIG_SMP
  103. smp_send_stop();
  104. #endif
  105. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  106. local_irq_disable();
  107. while (1) ;
  108. }
  109. void machine_power_off(void)
  110. {
  111. machine_shutdown();
  112. if (ppc_md.power_off)
  113. ppc_md.power_off();
  114. #ifdef CONFIG_SMP
  115. smp_send_stop();
  116. #endif
  117. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  118. local_irq_disable();
  119. while (1) ;
  120. }
  121. /* Used by the G5 thermal driver */
  122. EXPORT_SYMBOL_GPL(machine_power_off);
  123. void (*pm_power_off)(void) = machine_power_off;
  124. EXPORT_SYMBOL_GPL(pm_power_off);
  125. void machine_halt(void)
  126. {
  127. machine_shutdown();
  128. if (ppc_md.halt)
  129. ppc_md.halt();
  130. #ifdef CONFIG_SMP
  131. smp_send_stop();
  132. #endif
  133. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  134. local_irq_disable();
  135. while (1) ;
  136. }
  137. #ifdef CONFIG_TAU
  138. extern u32 cpu_temp(unsigned long cpu);
  139. extern u32 cpu_temp_both(unsigned long cpu);
  140. #endif /* CONFIG_TAU */
  141. #ifdef CONFIG_SMP
  142. DEFINE_PER_CPU(unsigned int, pvr);
  143. #endif
  144. static int show_cpuinfo(struct seq_file *m, void *v)
  145. {
  146. unsigned long cpu_id = (unsigned long)v - 1;
  147. unsigned int pvr;
  148. unsigned short maj;
  149. unsigned short min;
  150. if (cpu_id == NR_CPUS) {
  151. struct device_node *root;
  152. const char *model = NULL;
  153. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  154. unsigned long bogosum = 0;
  155. int i;
  156. for_each_online_cpu(i)
  157. bogosum += loops_per_jiffy;
  158. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  159. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  160. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  161. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  162. if (ppc_md.name)
  163. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  164. root = of_find_node_by_path("/");
  165. if (root)
  166. model = of_get_property(root, "model", NULL);
  167. if (model)
  168. seq_printf(m, "model\t\t: %s\n", model);
  169. of_node_put(root);
  170. if (ppc_md.show_cpuinfo != NULL)
  171. ppc_md.show_cpuinfo(m);
  172. return 0;
  173. }
  174. /* We only show online cpus: disable preempt (overzealous, I
  175. * knew) to prevent cpu going down. */
  176. preempt_disable();
  177. if (!cpu_online(cpu_id)) {
  178. preempt_enable();
  179. return 0;
  180. }
  181. #ifdef CONFIG_SMP
  182. pvr = per_cpu(pvr, cpu_id);
  183. #else
  184. pvr = mfspr(SPRN_PVR);
  185. #endif
  186. maj = (pvr >> 8) & 0xFF;
  187. min = pvr & 0xFF;
  188. seq_printf(m, "processor\t: %lu\n", cpu_id);
  189. seq_printf(m, "cpu\t\t: ");
  190. if (cur_cpu_spec->pvr_mask)
  191. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  192. else
  193. seq_printf(m, "unknown (%08x)", pvr);
  194. #ifdef CONFIG_ALTIVEC
  195. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  196. seq_printf(m, ", altivec supported");
  197. #endif /* CONFIG_ALTIVEC */
  198. seq_printf(m, "\n");
  199. #ifdef CONFIG_TAU
  200. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  201. #ifdef CONFIG_TAU_AVERAGE
  202. /* more straightforward, but potentially misleading */
  203. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  204. cpu_temp(cpu_id));
  205. #else
  206. /* show the actual temp sensor range */
  207. u32 temp;
  208. temp = cpu_temp_both(cpu_id);
  209. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  210. temp & 0xff, temp >> 16);
  211. #endif
  212. }
  213. #endif /* CONFIG_TAU */
  214. /*
  215. * Assume here that all clock rates are the same in a
  216. * smp system. -- Cort
  217. */
  218. if (ppc_proc_freq)
  219. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  220. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  221. if (ppc_md.show_percpuinfo != NULL)
  222. ppc_md.show_percpuinfo(m, cpu_id);
  223. /* If we are a Freescale core do a simple check so
  224. * we dont have to keep adding cases in the future */
  225. if (PVR_VER(pvr) & 0x8000) {
  226. switch (PVR_VER(pvr)) {
  227. case 0x8000: /* 7441/7450/7451, Voyager */
  228. case 0x8001: /* 7445/7455, Apollo 6 */
  229. case 0x8002: /* 7447/7457, Apollo 7 */
  230. case 0x8003: /* 7447A, Apollo 7 PM */
  231. case 0x8004: /* 7448, Apollo 8 */
  232. case 0x800c: /* 7410, Nitro */
  233. maj = ((pvr >> 8) & 0xF);
  234. min = PVR_MIN(pvr);
  235. break;
  236. default: /* e500/book-e */
  237. maj = PVR_MAJ(pvr);
  238. min = PVR_MIN(pvr);
  239. break;
  240. }
  241. } else {
  242. switch (PVR_VER(pvr)) {
  243. case 0x0020: /* 403 family */
  244. maj = PVR_MAJ(pvr) + 1;
  245. min = PVR_MIN(pvr);
  246. break;
  247. case 0x1008: /* 740P/750P ?? */
  248. maj = ((pvr >> 8) & 0xFF) - 1;
  249. min = pvr & 0xFF;
  250. break;
  251. default:
  252. maj = (pvr >> 8) & 0xFF;
  253. min = pvr & 0xFF;
  254. break;
  255. }
  256. }
  257. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  258. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  259. #ifdef CONFIG_PPC32
  260. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  261. loops_per_jiffy / (500000/HZ),
  262. (loops_per_jiffy / (5000/HZ)) % 100);
  263. #endif
  264. #ifdef CONFIG_SMP
  265. seq_printf(m, "\n");
  266. #endif
  267. preempt_enable();
  268. return 0;
  269. }
  270. static void *c_start(struct seq_file *m, loff_t *pos)
  271. {
  272. unsigned long i = *pos;
  273. return i <= NR_CPUS ? (void *)(i + 1) : NULL;
  274. }
  275. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  276. {
  277. ++*pos;
  278. return c_start(m, pos);
  279. }
  280. static void c_stop(struct seq_file *m, void *v)
  281. {
  282. }
  283. struct seq_operations cpuinfo_op = {
  284. .start =c_start,
  285. .next = c_next,
  286. .stop = c_stop,
  287. .show = show_cpuinfo,
  288. };
  289. void __init check_for_initrd(void)
  290. {
  291. #ifdef CONFIG_BLK_DEV_INITRD
  292. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  293. initrd_start, initrd_end);
  294. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  295. * look sensible. If not, clear initrd reference.
  296. */
  297. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  298. initrd_end > initrd_start)
  299. ROOT_DEV = Root_RAM0;
  300. else
  301. initrd_start = initrd_end = 0;
  302. if (initrd_start)
  303. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  304. DBG(" <- check_for_initrd()\n");
  305. #endif /* CONFIG_BLK_DEV_INITRD */
  306. }
  307. #ifdef CONFIG_SMP
  308. int threads_per_core, threads_shift;
  309. cpumask_t threads_core_mask;
  310. static void __init cpu_init_thread_core_maps(int tpc)
  311. {
  312. int i;
  313. threads_per_core = tpc;
  314. threads_core_mask = CPU_MASK_NONE;
  315. /* This implementation only supports power of 2 number of threads
  316. * for simplicity and performance
  317. */
  318. threads_shift = ilog2(tpc);
  319. BUG_ON(tpc != (1 << threads_shift));
  320. for (i = 0; i < tpc; i++)
  321. cpu_set(i, threads_core_mask);
  322. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  323. tpc, tpc > 1 ? "s" : "");
  324. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  325. }
  326. /**
  327. * setup_cpu_maps - initialize the following cpu maps:
  328. * cpu_possible_map
  329. * cpu_present_map
  330. *
  331. * Having the possible map set up early allows us to restrict allocations
  332. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  333. *
  334. * We do not initialize the online map here; cpus set their own bits in
  335. * cpu_online_map as they come up.
  336. *
  337. * This function is valid only for Open Firmware systems. finish_device_tree
  338. * must be called before using this.
  339. *
  340. * While we're here, we may as well set the "physical" cpu ids in the paca.
  341. *
  342. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  343. */
  344. void __init smp_setup_cpu_maps(void)
  345. {
  346. struct device_node *dn = NULL;
  347. int cpu = 0;
  348. int nthreads = 1;
  349. DBG("smp_setup_cpu_maps()\n");
  350. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  351. const int *intserv;
  352. int j, len;
  353. DBG(" * %s...\n", dn->full_name);
  354. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  355. &len);
  356. if (intserv) {
  357. nthreads = len / sizeof(int);
  358. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  359. nthreads);
  360. } else {
  361. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  362. intserv = of_get_property(dn, "reg", NULL);
  363. if (!intserv)
  364. intserv = &cpu; /* assume logical == phys */
  365. }
  366. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  367. DBG(" thread %d -> cpu %d (hard id %d)\n",
  368. j, cpu, intserv[j]);
  369. cpu_set(cpu, cpu_present_map);
  370. set_hard_smp_processor_id(cpu, intserv[j]);
  371. cpu_set(cpu, cpu_possible_map);
  372. cpu++;
  373. }
  374. }
  375. /* If no SMT supported, nthreads is forced to 1 */
  376. if (!cpu_has_feature(CPU_FTR_SMT)) {
  377. DBG(" SMT disabled ! nthreads forced to 1\n");
  378. nthreads = 1;
  379. }
  380. #ifdef CONFIG_PPC64
  381. /*
  382. * On pSeries LPAR, we need to know how many cpus
  383. * could possibly be added to this partition.
  384. */
  385. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  386. (dn = of_find_node_by_path("/rtas"))) {
  387. int num_addr_cell, num_size_cell, maxcpus;
  388. const unsigned int *ireg;
  389. num_addr_cell = of_n_addr_cells(dn);
  390. num_size_cell = of_n_size_cells(dn);
  391. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  392. if (!ireg)
  393. goto out;
  394. maxcpus = ireg[num_addr_cell + num_size_cell];
  395. /* Double maxcpus for processors which have SMT capability */
  396. if (cpu_has_feature(CPU_FTR_SMT))
  397. maxcpus *= nthreads;
  398. if (maxcpus > NR_CPUS) {
  399. printk(KERN_WARNING
  400. "Partition configured for %d cpus, "
  401. "operating system maximum is %d.\n",
  402. maxcpus, NR_CPUS);
  403. maxcpus = NR_CPUS;
  404. } else
  405. printk(KERN_INFO "Partition configured for %d cpus.\n",
  406. maxcpus);
  407. for (cpu = 0; cpu < maxcpus; cpu++)
  408. cpu_set(cpu, cpu_possible_map);
  409. out:
  410. of_node_put(dn);
  411. }
  412. vdso_data->processorCount = num_present_cpus();
  413. #endif /* CONFIG_PPC64 */
  414. /* Initialize CPU <=> thread mapping/
  415. *
  416. * WARNING: We assume that the number of threads is the same for
  417. * every CPU in the system. If that is not the case, then some code
  418. * here will have to be reworked
  419. */
  420. cpu_init_thread_core_maps(nthreads);
  421. }
  422. #endif /* CONFIG_SMP */
  423. #ifdef CONFIG_PCSPKR_PLATFORM
  424. static __init int add_pcspkr(void)
  425. {
  426. struct device_node *np;
  427. struct platform_device *pd;
  428. int ret;
  429. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  430. of_node_put(np);
  431. if (!np)
  432. return -ENODEV;
  433. pd = platform_device_alloc("pcspkr", -1);
  434. if (!pd)
  435. return -ENOMEM;
  436. ret = platform_device_add(pd);
  437. if (ret)
  438. platform_device_put(pd);
  439. return ret;
  440. }
  441. device_initcall(add_pcspkr);
  442. #endif /* CONFIG_PCSPKR_PLATFORM */
  443. void probe_machine(void)
  444. {
  445. extern struct machdep_calls __machine_desc_start;
  446. extern struct machdep_calls __machine_desc_end;
  447. /*
  448. * Iterate all ppc_md structures until we find the proper
  449. * one for the current machine type
  450. */
  451. DBG("Probing machine type ...\n");
  452. for (machine_id = &__machine_desc_start;
  453. machine_id < &__machine_desc_end;
  454. machine_id++) {
  455. DBG(" %s ...", machine_id->name);
  456. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  457. if (ppc_md.probe()) {
  458. DBG(" match !\n");
  459. break;
  460. }
  461. DBG("\n");
  462. }
  463. /* What can we do if we didn't find ? */
  464. if (machine_id >= &__machine_desc_end) {
  465. DBG("No suitable machine found !\n");
  466. for (;;);
  467. }
  468. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  469. }
  470. /* Match a class of boards, not a specific device configuration. */
  471. int check_legacy_ioport(unsigned long base_port)
  472. {
  473. struct device_node *parent, *np = NULL;
  474. int ret = -ENODEV;
  475. switch(base_port) {
  476. case I8042_DATA_REG:
  477. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  478. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  479. if (np) {
  480. parent = of_get_parent(np);
  481. of_node_put(np);
  482. np = parent;
  483. break;
  484. }
  485. np = of_find_node_by_type(NULL, "8042");
  486. /* Pegasos has no device_type on its 8042 node, look for the
  487. * name instead */
  488. if (!np)
  489. np = of_find_node_by_name(NULL, "8042");
  490. break;
  491. case FDC_BASE: /* FDC1 */
  492. np = of_find_node_by_type(NULL, "fdc");
  493. break;
  494. #ifdef CONFIG_PPC_PREP
  495. case _PIDXR:
  496. case _PNPWRP:
  497. case PNPBIOS_BASE:
  498. /* implement me */
  499. #endif
  500. default:
  501. /* ipmi is supposed to fail here */
  502. break;
  503. }
  504. if (!np)
  505. return ret;
  506. parent = of_get_parent(np);
  507. if (parent) {
  508. if (strcmp(parent->type, "isa") == 0)
  509. ret = 0;
  510. of_node_put(parent);
  511. }
  512. of_node_put(np);
  513. return ret;
  514. }
  515. EXPORT_SYMBOL(check_legacy_ioport);
  516. static int ppc_panic_event(struct notifier_block *this,
  517. unsigned long event, void *ptr)
  518. {
  519. ppc_md.panic(ptr); /* May not return */
  520. return NOTIFY_DONE;
  521. }
  522. static struct notifier_block ppc_panic_block = {
  523. .notifier_call = ppc_panic_event,
  524. .priority = INT_MIN /* may not return; must be done last */
  525. };
  526. void __init setup_panic(void)
  527. {
  528. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  529. }
  530. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  531. /*
  532. * For platforms that have configurable cache-coherency. This function
  533. * checks that the cache coherency setting of the kernel matches the setting
  534. * left by the firmware, as indicated in the device tree. Since a mismatch
  535. * will eventually result in DMA failures, we print * and error and call
  536. * BUG() in that case.
  537. */
  538. #ifdef CONFIG_NOT_COHERENT_CACHE
  539. #define KERNEL_COHERENCY 0
  540. #else
  541. #define KERNEL_COHERENCY 1
  542. #endif
  543. static int __init check_cache_coherency(void)
  544. {
  545. struct device_node *np;
  546. const void *prop;
  547. int devtree_coherency;
  548. np = of_find_node_by_path("/");
  549. prop = of_get_property(np, "coherency-off", NULL);
  550. of_node_put(np);
  551. devtree_coherency = prop ? 0 : 1;
  552. if (devtree_coherency != KERNEL_COHERENCY) {
  553. printk(KERN_ERR
  554. "kernel coherency:%s != device tree_coherency:%s\n",
  555. KERNEL_COHERENCY ? "on" : "off",
  556. devtree_coherency ? "on" : "off");
  557. BUG();
  558. }
  559. return 0;
  560. }
  561. late_initcall(check_cache_coherency);
  562. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  563. #ifdef CONFIG_DEBUG_FS
  564. struct dentry *powerpc_debugfs_root;
  565. static int powerpc_debugfs_init(void)
  566. {
  567. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  568. return powerpc_debugfs_root == NULL;
  569. }
  570. arch_initcall(powerpc_debugfs_init);
  571. #endif