qla_init.c 146 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /* SRB Extensions ---------------------------------------------------------- */
  36. static void
  37. qla2x00_ctx_sp_timeout(unsigned long __data)
  38. {
  39. srb_t *sp = (srb_t *)__data;
  40. struct srb_ctx *ctx;
  41. struct srb_iocb *iocb;
  42. fc_port_t *fcport = sp->fcport;
  43. struct qla_hw_data *ha = fcport->vha->hw;
  44. struct req_que *req;
  45. unsigned long flags;
  46. spin_lock_irqsave(&ha->hardware_lock, flags);
  47. req = ha->req_q_map[0];
  48. req->outstanding_cmds[sp->handle] = NULL;
  49. ctx = sp->ctx;
  50. iocb = ctx->u.iocb_cmd;
  51. iocb->timeout(sp);
  52. iocb->free(sp);
  53. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  54. }
  55. static void
  56. qla2x00_ctx_sp_free(srb_t *sp)
  57. {
  58. struct srb_ctx *ctx = sp->ctx;
  59. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  60. struct scsi_qla_host *vha = sp->fcport->vha;
  61. del_timer(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. QLA_VHA_MARK_NOT_BUSY(vha);
  66. }
  67. inline srb_t *
  68. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  69. unsigned long tmo)
  70. {
  71. srb_t *sp = NULL;
  72. struct qla_hw_data *ha = vha->hw;
  73. struct srb_ctx *ctx;
  74. struct srb_iocb *iocb;
  75. uint8_t bail;
  76. QLA_VHA_MARK_BUSY(vha, bail);
  77. if (bail)
  78. return NULL;
  79. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  80. if (!sp)
  81. goto done;
  82. ctx = kzalloc(size, GFP_KERNEL);
  83. if (!ctx) {
  84. mempool_free(sp, ha->srb_mempool);
  85. sp = NULL;
  86. goto done;
  87. }
  88. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  89. if (!iocb) {
  90. mempool_free(sp, ha->srb_mempool);
  91. sp = NULL;
  92. kfree(ctx);
  93. goto done;
  94. }
  95. memset(sp, 0, sizeof(*sp));
  96. sp->fcport = fcport;
  97. sp->ctx = ctx;
  98. ctx->u.iocb_cmd = iocb;
  99. iocb->free = qla2x00_ctx_sp_free;
  100. init_timer(&iocb->timer);
  101. if (!tmo)
  102. goto done;
  103. iocb->timer.expires = jiffies + tmo * HZ;
  104. iocb->timer.data = (unsigned long)sp;
  105. iocb->timer.function = qla2x00_ctx_sp_timeout;
  106. add_timer(&iocb->timer);
  107. done:
  108. if (!sp)
  109. QLA_VHA_MARK_NOT_BUSY(vha);
  110. return sp;
  111. }
  112. /* Asynchronous Login/Logout Routines -------------------------------------- */
  113. static inline unsigned long
  114. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  115. {
  116. unsigned long tmo;
  117. struct qla_hw_data *ha = vha->hw;
  118. /* Firmware should use switch negotiated r_a_tov for timeout. */
  119. tmo = ha->r_a_tov / 10 * 2;
  120. if (!IS_FWI2_CAPABLE(ha)) {
  121. /*
  122. * Except for earlier ISPs where the timeout is seeded from the
  123. * initialization control block.
  124. */
  125. tmo = ha->login_timeout;
  126. }
  127. return tmo;
  128. }
  129. static void
  130. qla2x00_async_iocb_timeout(srb_t *sp)
  131. {
  132. fc_port_t *fcport = sp->fcport;
  133. struct srb_ctx *ctx = sp->ctx;
  134. DEBUG2(printk(KERN_WARNING
  135. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  136. fcport->vha->host_no, sp->handle,
  137. ctx->name, fcport->d_id.b.domain,
  138. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  139. fcport->flags &= ~FCF_ASYNC_SENT;
  140. if (ctx->type == SRB_LOGIN_CMD) {
  141. struct srb_iocb *lio = ctx->u.iocb_cmd;
  142. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  143. /* Retry as needed. */
  144. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  145. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  146. QLA_LOGIO_LOGIN_RETRIED : 0;
  147. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  148. lio->u.logio.data);
  149. }
  150. }
  151. static void
  152. qla2x00_async_login_ctx_done(srb_t *sp)
  153. {
  154. struct srb_ctx *ctx = sp->ctx;
  155. struct srb_iocb *lio = ctx->u.iocb_cmd;
  156. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  157. lio->u.logio.data);
  158. lio->free(sp);
  159. }
  160. int
  161. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  162. uint16_t *data)
  163. {
  164. srb_t *sp;
  165. struct srb_ctx *ctx;
  166. struct srb_iocb *lio;
  167. int rval;
  168. rval = QLA_FUNCTION_FAILED;
  169. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  170. qla2x00_get_async_timeout(vha) + 2);
  171. if (!sp)
  172. goto done;
  173. ctx = sp->ctx;
  174. ctx->type = SRB_LOGIN_CMD;
  175. ctx->name = "login";
  176. lio = ctx->u.iocb_cmd;
  177. lio->timeout = qla2x00_async_iocb_timeout;
  178. lio->done = qla2x00_async_login_ctx_done;
  179. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  180. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  181. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  182. rval = qla2x00_start_sp(sp);
  183. if (rval != QLA_SUCCESS)
  184. goto done_free_sp;
  185. DEBUG2(printk(KERN_DEBUG
  186. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  187. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  188. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  189. fcport->login_retry));
  190. return rval;
  191. done_free_sp:
  192. lio->free(sp);
  193. done:
  194. return rval;
  195. }
  196. static void
  197. qla2x00_async_logout_ctx_done(srb_t *sp)
  198. {
  199. struct srb_ctx *ctx = sp->ctx;
  200. struct srb_iocb *lio = ctx->u.iocb_cmd;
  201. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  202. lio->u.logio.data);
  203. lio->free(sp);
  204. }
  205. int
  206. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  207. {
  208. srb_t *sp;
  209. struct srb_ctx *ctx;
  210. struct srb_iocb *lio;
  211. int rval;
  212. rval = QLA_FUNCTION_FAILED;
  213. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  214. qla2x00_get_async_timeout(vha) + 2);
  215. if (!sp)
  216. goto done;
  217. ctx = sp->ctx;
  218. ctx->type = SRB_LOGOUT_CMD;
  219. ctx->name = "logout";
  220. lio = ctx->u.iocb_cmd;
  221. lio->timeout = qla2x00_async_iocb_timeout;
  222. lio->done = qla2x00_async_logout_ctx_done;
  223. rval = qla2x00_start_sp(sp);
  224. if (rval != QLA_SUCCESS)
  225. goto done_free_sp;
  226. DEBUG2(printk(KERN_DEBUG
  227. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  228. fcport->vha->host_no, sp->handle, fcport->loop_id,
  229. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  230. return rval;
  231. done_free_sp:
  232. lio->free(sp);
  233. done:
  234. return rval;
  235. }
  236. static void
  237. qla2x00_async_adisc_ctx_done(srb_t *sp)
  238. {
  239. struct srb_ctx *ctx = sp->ctx;
  240. struct srb_iocb *lio = ctx->u.iocb_cmd;
  241. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  242. lio->u.logio.data);
  243. lio->free(sp);
  244. }
  245. int
  246. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  247. uint16_t *data)
  248. {
  249. srb_t *sp;
  250. struct srb_ctx *ctx;
  251. struct srb_iocb *lio;
  252. int rval;
  253. rval = QLA_FUNCTION_FAILED;
  254. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  255. qla2x00_get_async_timeout(vha) + 2);
  256. if (!sp)
  257. goto done;
  258. ctx = sp->ctx;
  259. ctx->type = SRB_ADISC_CMD;
  260. ctx->name = "adisc";
  261. lio = ctx->u.iocb_cmd;
  262. lio->timeout = qla2x00_async_iocb_timeout;
  263. lio->done = qla2x00_async_adisc_ctx_done;
  264. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  265. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  266. rval = qla2x00_start_sp(sp);
  267. if (rval != QLA_SUCCESS)
  268. goto done_free_sp;
  269. DEBUG2(printk(KERN_DEBUG
  270. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  271. fcport->vha->host_no, sp->handle, fcport->loop_id,
  272. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  273. return rval;
  274. done_free_sp:
  275. lio->free(sp);
  276. done:
  277. return rval;
  278. }
  279. static void
  280. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  281. {
  282. struct srb_ctx *ctx = sp->ctx;
  283. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  284. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  285. iocb->free(sp);
  286. }
  287. int
  288. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  289. uint32_t tag)
  290. {
  291. struct scsi_qla_host *vha = fcport->vha;
  292. srb_t *sp;
  293. struct srb_ctx *ctx;
  294. struct srb_iocb *tcf;
  295. int rval;
  296. rval = QLA_FUNCTION_FAILED;
  297. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  298. qla2x00_get_async_timeout(vha) + 2);
  299. if (!sp)
  300. goto done;
  301. ctx = sp->ctx;
  302. ctx->type = SRB_TM_CMD;
  303. ctx->name = "tmf";
  304. tcf = ctx->u.iocb_cmd;
  305. tcf->u.tmf.flags = flags;
  306. tcf->u.tmf.lun = lun;
  307. tcf->u.tmf.data = tag;
  308. tcf->timeout = qla2x00_async_iocb_timeout;
  309. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  310. rval = qla2x00_start_sp(sp);
  311. if (rval != QLA_SUCCESS)
  312. goto done_free_sp;
  313. DEBUG2(printk(KERN_DEBUG
  314. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  315. fcport->vha->host_no, sp->handle, fcport->loop_id,
  316. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  317. return rval;
  318. done_free_sp:
  319. tcf->free(sp);
  320. done:
  321. return rval;
  322. }
  323. void
  324. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  325. uint16_t *data)
  326. {
  327. int rval;
  328. switch (data[0]) {
  329. case MBS_COMMAND_COMPLETE:
  330. /*
  331. * Driver must validate login state - If PRLI not complete,
  332. * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
  333. * requests.
  334. */
  335. rval = qla2x00_get_port_database(vha, fcport, 0);
  336. if (rval != QLA_SUCCESS) {
  337. qla2x00_post_async_logout_work(vha, fcport, NULL);
  338. qla2x00_post_async_login_work(vha, fcport, NULL);
  339. break;
  340. }
  341. if (fcport->flags & FCF_FCP2_DEVICE) {
  342. qla2x00_post_async_adisc_work(vha, fcport, data);
  343. break;
  344. }
  345. qla2x00_update_fcport(vha, fcport);
  346. break;
  347. case MBS_COMMAND_ERROR:
  348. fcport->flags &= ~FCF_ASYNC_SENT;
  349. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  350. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  351. else
  352. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  353. break;
  354. case MBS_PORT_ID_USED:
  355. fcport->loop_id = data[1];
  356. qla2x00_post_async_logout_work(vha, fcport, NULL);
  357. qla2x00_post_async_login_work(vha, fcport, NULL);
  358. break;
  359. case MBS_LOOP_ID_USED:
  360. fcport->loop_id++;
  361. rval = qla2x00_find_new_loop_id(vha, fcport);
  362. if (rval != QLA_SUCCESS) {
  363. fcport->flags &= ~FCF_ASYNC_SENT;
  364. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  365. break;
  366. }
  367. qla2x00_post_async_login_work(vha, fcport, NULL);
  368. break;
  369. }
  370. return;
  371. }
  372. void
  373. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  374. uint16_t *data)
  375. {
  376. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  377. return;
  378. }
  379. void
  380. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  381. uint16_t *data)
  382. {
  383. if (data[0] == MBS_COMMAND_COMPLETE) {
  384. qla2x00_update_fcport(vha, fcport);
  385. return;
  386. }
  387. /* Retry login. */
  388. fcport->flags &= ~FCF_ASYNC_SENT;
  389. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  390. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  391. else
  392. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  393. return;
  394. }
  395. void
  396. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  397. struct srb_iocb *iocb)
  398. {
  399. int rval;
  400. uint32_t flags;
  401. uint16_t lun;
  402. flags = iocb->u.tmf.flags;
  403. lun = (uint16_t)iocb->u.tmf.lun;
  404. /* Issue Marker IOCB */
  405. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  406. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  407. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  408. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  409. DEBUG2_3_11(printk(KERN_WARNING
  410. "%s(%ld): TM IOCB failed (%x).\n",
  411. __func__, vha->host_no, rval));
  412. }
  413. return;
  414. }
  415. /****************************************************************************/
  416. /* QLogic ISP2x00 Hardware Support Functions. */
  417. /****************************************************************************/
  418. /*
  419. * qla2x00_initialize_adapter
  420. * Initialize board.
  421. *
  422. * Input:
  423. * ha = adapter block pointer.
  424. *
  425. * Returns:
  426. * 0 = success
  427. */
  428. int
  429. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  430. {
  431. int rval;
  432. struct qla_hw_data *ha = vha->hw;
  433. struct req_que *req = ha->req_q_map[0];
  434. /* Clear adapter flags. */
  435. vha->flags.online = 0;
  436. ha->flags.chip_reset_done = 0;
  437. vha->flags.reset_active = 0;
  438. ha->flags.pci_channel_io_perm_failure = 0;
  439. ha->flags.eeh_busy = 0;
  440. ha->flags.thermal_supported = 1;
  441. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  442. atomic_set(&vha->loop_state, LOOP_DOWN);
  443. vha->device_flags = DFLG_NO_CABLE;
  444. vha->dpc_flags = 0;
  445. vha->flags.management_server_logged_in = 0;
  446. vha->marker_needed = 0;
  447. ha->isp_abort_cnt = 0;
  448. ha->beacon_blink_led = 0;
  449. set_bit(0, ha->req_qid_map);
  450. set_bit(0, ha->rsp_qid_map);
  451. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  452. rval = ha->isp_ops->pci_config(vha);
  453. if (rval) {
  454. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  455. vha->host_no));
  456. return (rval);
  457. }
  458. ha->isp_ops->reset_chip(vha);
  459. rval = qla2xxx_get_flash_info(vha);
  460. if (rval) {
  461. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  462. vha->host_no));
  463. return (rval);
  464. }
  465. ha->isp_ops->get_flash_version(vha, req->ring);
  466. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  467. ha->isp_ops->nvram_config(vha);
  468. if (ha->flags.disable_serdes) {
  469. /* Mask HBA via NVRAM settings? */
  470. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  471. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  472. vha->port_name[0], vha->port_name[1],
  473. vha->port_name[2], vha->port_name[3],
  474. vha->port_name[4], vha->port_name[5],
  475. vha->port_name[6], vha->port_name[7]);
  476. return QLA_FUNCTION_FAILED;
  477. }
  478. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  479. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  480. rval = ha->isp_ops->chip_diag(vha);
  481. if (rval)
  482. return (rval);
  483. rval = qla2x00_setup_chip(vha);
  484. if (rval)
  485. return (rval);
  486. }
  487. if (IS_QLA84XX(ha)) {
  488. ha->cs84xx = qla84xx_get_chip(vha);
  489. if (!ha->cs84xx) {
  490. qla_printk(KERN_ERR, ha,
  491. "Unable to configure ISP84XX.\n");
  492. return QLA_FUNCTION_FAILED;
  493. }
  494. }
  495. rval = qla2x00_init_rings(vha);
  496. ha->flags.chip_reset_done = 1;
  497. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  498. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  499. rval = qla84xx_init_chip(vha);
  500. if (rval != QLA_SUCCESS) {
  501. qla_printk(KERN_ERR, ha,
  502. "Unable to initialize ISP84XX.\n");
  503. qla84xx_put_chip(vha);
  504. }
  505. }
  506. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  507. qla24xx_read_fcp_prio_cfg(vha);
  508. return (rval);
  509. }
  510. /**
  511. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  512. * @ha: HA context
  513. *
  514. * Returns 0 on success.
  515. */
  516. int
  517. qla2100_pci_config(scsi_qla_host_t *vha)
  518. {
  519. uint16_t w;
  520. unsigned long flags;
  521. struct qla_hw_data *ha = vha->hw;
  522. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  523. pci_set_master(ha->pdev);
  524. pci_try_set_mwi(ha->pdev);
  525. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  526. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  527. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  528. pci_disable_rom(ha->pdev);
  529. /* Get PCI bus information. */
  530. spin_lock_irqsave(&ha->hardware_lock, flags);
  531. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  532. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  533. return QLA_SUCCESS;
  534. }
  535. /**
  536. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  537. * @ha: HA context
  538. *
  539. * Returns 0 on success.
  540. */
  541. int
  542. qla2300_pci_config(scsi_qla_host_t *vha)
  543. {
  544. uint16_t w;
  545. unsigned long flags = 0;
  546. uint32_t cnt;
  547. struct qla_hw_data *ha = vha->hw;
  548. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  549. pci_set_master(ha->pdev);
  550. pci_try_set_mwi(ha->pdev);
  551. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  552. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  553. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  554. w &= ~PCI_COMMAND_INTX_DISABLE;
  555. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  556. /*
  557. * If this is a 2300 card and not 2312, reset the
  558. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  559. * the 2310 also reports itself as a 2300 so we need to get the
  560. * fb revision level -- a 6 indicates it really is a 2300 and
  561. * not a 2310.
  562. */
  563. if (IS_QLA2300(ha)) {
  564. spin_lock_irqsave(&ha->hardware_lock, flags);
  565. /* Pause RISC. */
  566. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  567. for (cnt = 0; cnt < 30000; cnt++) {
  568. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  569. break;
  570. udelay(10);
  571. }
  572. /* Select FPM registers. */
  573. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  574. RD_REG_WORD(&reg->ctrl_status);
  575. /* Get the fb rev level */
  576. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  577. if (ha->fb_rev == FPM_2300)
  578. pci_clear_mwi(ha->pdev);
  579. /* Deselect FPM registers. */
  580. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  581. RD_REG_WORD(&reg->ctrl_status);
  582. /* Release RISC module. */
  583. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  584. for (cnt = 0; cnt < 30000; cnt++) {
  585. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  586. break;
  587. udelay(10);
  588. }
  589. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  590. }
  591. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  592. pci_disable_rom(ha->pdev);
  593. /* Get PCI bus information. */
  594. spin_lock_irqsave(&ha->hardware_lock, flags);
  595. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  596. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  597. return QLA_SUCCESS;
  598. }
  599. /**
  600. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  601. * @ha: HA context
  602. *
  603. * Returns 0 on success.
  604. */
  605. int
  606. qla24xx_pci_config(scsi_qla_host_t *vha)
  607. {
  608. uint16_t w;
  609. unsigned long flags = 0;
  610. struct qla_hw_data *ha = vha->hw;
  611. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  612. pci_set_master(ha->pdev);
  613. pci_try_set_mwi(ha->pdev);
  614. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  615. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  616. w &= ~PCI_COMMAND_INTX_DISABLE;
  617. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  618. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  619. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  620. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  621. pcix_set_mmrbc(ha->pdev, 2048);
  622. /* PCIe -- adjust Maximum Read Request Size (2048). */
  623. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  624. pcie_set_readrq(ha->pdev, 2048);
  625. pci_disable_rom(ha->pdev);
  626. ha->chip_revision = ha->pdev->revision;
  627. /* Get PCI bus information. */
  628. spin_lock_irqsave(&ha->hardware_lock, flags);
  629. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  630. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  631. return QLA_SUCCESS;
  632. }
  633. /**
  634. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  635. * @ha: HA context
  636. *
  637. * Returns 0 on success.
  638. */
  639. int
  640. qla25xx_pci_config(scsi_qla_host_t *vha)
  641. {
  642. uint16_t w;
  643. struct qla_hw_data *ha = vha->hw;
  644. pci_set_master(ha->pdev);
  645. pci_try_set_mwi(ha->pdev);
  646. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  647. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  648. w &= ~PCI_COMMAND_INTX_DISABLE;
  649. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  650. /* PCIe -- adjust Maximum Read Request Size (2048). */
  651. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  652. pcie_set_readrq(ha->pdev, 2048);
  653. pci_disable_rom(ha->pdev);
  654. ha->chip_revision = ha->pdev->revision;
  655. return QLA_SUCCESS;
  656. }
  657. /**
  658. * qla2x00_isp_firmware() - Choose firmware image.
  659. * @ha: HA context
  660. *
  661. * Returns 0 on success.
  662. */
  663. static int
  664. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  665. {
  666. int rval;
  667. uint16_t loop_id, topo, sw_cap;
  668. uint8_t domain, area, al_pa;
  669. struct qla_hw_data *ha = vha->hw;
  670. /* Assume loading risc code */
  671. rval = QLA_FUNCTION_FAILED;
  672. if (ha->flags.disable_risc_code_load) {
  673. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  674. vha->host_no));
  675. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  676. /* Verify checksum of loaded RISC code. */
  677. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  678. if (rval == QLA_SUCCESS) {
  679. /* And, verify we are not in ROM code. */
  680. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  681. &area, &domain, &topo, &sw_cap);
  682. }
  683. }
  684. if (rval) {
  685. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  686. vha->host_no));
  687. }
  688. return (rval);
  689. }
  690. /**
  691. * qla2x00_reset_chip() - Reset ISP chip.
  692. * @ha: HA context
  693. *
  694. * Returns 0 on success.
  695. */
  696. void
  697. qla2x00_reset_chip(scsi_qla_host_t *vha)
  698. {
  699. unsigned long flags = 0;
  700. struct qla_hw_data *ha = vha->hw;
  701. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  702. uint32_t cnt;
  703. uint16_t cmd;
  704. if (unlikely(pci_channel_offline(ha->pdev)))
  705. return;
  706. ha->isp_ops->disable_intrs(ha);
  707. spin_lock_irqsave(&ha->hardware_lock, flags);
  708. /* Turn off master enable */
  709. cmd = 0;
  710. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  711. cmd &= ~PCI_COMMAND_MASTER;
  712. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  713. if (!IS_QLA2100(ha)) {
  714. /* Pause RISC. */
  715. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  716. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  717. for (cnt = 0; cnt < 30000; cnt++) {
  718. if ((RD_REG_WORD(&reg->hccr) &
  719. HCCR_RISC_PAUSE) != 0)
  720. break;
  721. udelay(100);
  722. }
  723. } else {
  724. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  725. udelay(10);
  726. }
  727. /* Select FPM registers. */
  728. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  729. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  730. /* FPM Soft Reset. */
  731. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  732. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  733. /* Toggle Fpm Reset. */
  734. if (!IS_QLA2200(ha)) {
  735. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  736. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  737. }
  738. /* Select frame buffer registers. */
  739. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  740. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  741. /* Reset frame buffer FIFOs. */
  742. if (IS_QLA2200(ha)) {
  743. WRT_FB_CMD_REG(ha, reg, 0xa000);
  744. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  745. } else {
  746. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  747. /* Read back fb_cmd until zero or 3 seconds max */
  748. for (cnt = 0; cnt < 3000; cnt++) {
  749. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  750. break;
  751. udelay(100);
  752. }
  753. }
  754. /* Select RISC module registers. */
  755. WRT_REG_WORD(&reg->ctrl_status, 0);
  756. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  757. /* Reset RISC processor. */
  758. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  759. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  760. /* Release RISC processor. */
  761. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  762. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  763. }
  764. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  765. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  766. /* Reset ISP chip. */
  767. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  768. /* Wait for RISC to recover from reset. */
  769. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  770. /*
  771. * It is necessary to for a delay here since the card doesn't
  772. * respond to PCI reads during a reset. On some architectures
  773. * this will result in an MCA.
  774. */
  775. udelay(20);
  776. for (cnt = 30000; cnt; cnt--) {
  777. if ((RD_REG_WORD(&reg->ctrl_status) &
  778. CSR_ISP_SOFT_RESET) == 0)
  779. break;
  780. udelay(100);
  781. }
  782. } else
  783. udelay(10);
  784. /* Reset RISC processor. */
  785. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  786. WRT_REG_WORD(&reg->semaphore, 0);
  787. /* Release RISC processor. */
  788. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  789. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  790. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  791. for (cnt = 0; cnt < 30000; cnt++) {
  792. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  793. break;
  794. udelay(100);
  795. }
  796. } else
  797. udelay(100);
  798. /* Turn on master enable */
  799. cmd |= PCI_COMMAND_MASTER;
  800. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  801. /* Disable RISC pause on FPM parity error. */
  802. if (!IS_QLA2100(ha)) {
  803. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  804. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  805. }
  806. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  807. }
  808. /**
  809. * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
  810. *
  811. * Returns 0 on success.
  812. */
  813. int
  814. qla81xx_reset_mpi(scsi_qla_host_t *vha)
  815. {
  816. uint16_t mb[4] = {0x1010, 0, 1, 0};
  817. return qla81xx_write_mpi_register(vha, mb);
  818. }
  819. /**
  820. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  821. * @ha: HA context
  822. *
  823. * Returns 0 on success.
  824. */
  825. static inline void
  826. qla24xx_reset_risc(scsi_qla_host_t *vha)
  827. {
  828. unsigned long flags = 0;
  829. struct qla_hw_data *ha = vha->hw;
  830. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  831. uint32_t cnt, d2;
  832. uint16_t wd;
  833. static int abts_cnt; /* ISP abort retry counts */
  834. spin_lock_irqsave(&ha->hardware_lock, flags);
  835. /* Reset RISC. */
  836. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  837. for (cnt = 0; cnt < 30000; cnt++) {
  838. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  839. break;
  840. udelay(10);
  841. }
  842. WRT_REG_DWORD(&reg->ctrl_status,
  843. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  844. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  845. udelay(100);
  846. /* Wait for firmware to complete NVRAM accesses. */
  847. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  848. for (cnt = 10000 ; cnt && d2; cnt--) {
  849. udelay(5);
  850. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  851. barrier();
  852. }
  853. /* Wait for soft-reset to complete. */
  854. d2 = RD_REG_DWORD(&reg->ctrl_status);
  855. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  856. udelay(5);
  857. d2 = RD_REG_DWORD(&reg->ctrl_status);
  858. barrier();
  859. }
  860. /* If required, do an MPI FW reset now */
  861. if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
  862. if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
  863. if (++abts_cnt < 5) {
  864. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  865. set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
  866. } else {
  867. /*
  868. * We exhausted the ISP abort retries. We have to
  869. * set the board offline.
  870. */
  871. abts_cnt = 0;
  872. vha->flags.online = 0;
  873. }
  874. }
  875. }
  876. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  877. RD_REG_DWORD(&reg->hccr);
  878. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  879. RD_REG_DWORD(&reg->hccr);
  880. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  881. RD_REG_DWORD(&reg->hccr);
  882. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  883. for (cnt = 6000000 ; cnt && d2; cnt--) {
  884. udelay(5);
  885. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  886. barrier();
  887. }
  888. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  889. if (IS_NOPOLLING_TYPE(ha))
  890. ha->isp_ops->enable_intrs(ha);
  891. }
  892. /**
  893. * qla24xx_reset_chip() - Reset ISP24xx chip.
  894. * @ha: HA context
  895. *
  896. * Returns 0 on success.
  897. */
  898. void
  899. qla24xx_reset_chip(scsi_qla_host_t *vha)
  900. {
  901. struct qla_hw_data *ha = vha->hw;
  902. if (pci_channel_offline(ha->pdev) &&
  903. ha->flags.pci_channel_io_perm_failure) {
  904. return;
  905. }
  906. ha->isp_ops->disable_intrs(ha);
  907. /* Perform RISC reset. */
  908. qla24xx_reset_risc(vha);
  909. }
  910. /**
  911. * qla2x00_chip_diag() - Test chip for proper operation.
  912. * @ha: HA context
  913. *
  914. * Returns 0 on success.
  915. */
  916. int
  917. qla2x00_chip_diag(scsi_qla_host_t *vha)
  918. {
  919. int rval;
  920. struct qla_hw_data *ha = vha->hw;
  921. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  922. unsigned long flags = 0;
  923. uint16_t data;
  924. uint32_t cnt;
  925. uint16_t mb[5];
  926. struct req_que *req = ha->req_q_map[0];
  927. /* Assume a failed state */
  928. rval = QLA_FUNCTION_FAILED;
  929. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  930. vha->host_no, (u_long)&reg->flash_address));
  931. spin_lock_irqsave(&ha->hardware_lock, flags);
  932. /* Reset ISP chip. */
  933. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  934. /*
  935. * We need to have a delay here since the card will not respond while
  936. * in reset causing an MCA on some architectures.
  937. */
  938. udelay(20);
  939. data = qla2x00_debounce_register(&reg->ctrl_status);
  940. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  941. udelay(5);
  942. data = RD_REG_WORD(&reg->ctrl_status);
  943. barrier();
  944. }
  945. if (!cnt)
  946. goto chip_diag_failed;
  947. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  948. vha->host_no));
  949. /* Reset RISC processor. */
  950. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  951. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  952. /* Workaround for QLA2312 PCI parity error */
  953. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  954. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  955. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  956. udelay(5);
  957. data = RD_MAILBOX_REG(ha, reg, 0);
  958. barrier();
  959. }
  960. } else
  961. udelay(10);
  962. if (!cnt)
  963. goto chip_diag_failed;
  964. /* Check product ID of chip */
  965. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  966. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  967. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  968. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  969. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  970. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  971. mb[3] != PROD_ID_3) {
  972. qla_printk(KERN_WARNING, ha,
  973. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  974. goto chip_diag_failed;
  975. }
  976. ha->product_id[0] = mb[1];
  977. ha->product_id[1] = mb[2];
  978. ha->product_id[2] = mb[3];
  979. ha->product_id[3] = mb[4];
  980. /* Adjust fw RISC transfer size */
  981. if (req->length > 1024)
  982. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  983. else
  984. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  985. req->length;
  986. if (IS_QLA2200(ha) &&
  987. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  988. /* Limit firmware transfer size with a 2200A */
  989. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  990. vha->host_no));
  991. ha->device_type |= DT_ISP2200A;
  992. ha->fw_transfer_size = 128;
  993. }
  994. /* Wrap Incoming Mailboxes Test. */
  995. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  996. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  997. rval = qla2x00_mbx_reg_test(vha);
  998. if (rval) {
  999. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1000. vha->host_no));
  1001. qla_printk(KERN_WARNING, ha,
  1002. "Failed mailbox send register test\n");
  1003. }
  1004. else {
  1005. /* Flag a successful rval */
  1006. rval = QLA_SUCCESS;
  1007. }
  1008. spin_lock_irqsave(&ha->hardware_lock, flags);
  1009. chip_diag_failed:
  1010. if (rval)
  1011. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1012. "****\n", vha->host_no));
  1013. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1014. return (rval);
  1015. }
  1016. /**
  1017. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1018. * @ha: HA context
  1019. *
  1020. * Returns 0 on success.
  1021. */
  1022. int
  1023. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1024. {
  1025. int rval;
  1026. struct qla_hw_data *ha = vha->hw;
  1027. struct req_que *req = ha->req_q_map[0];
  1028. if (IS_QLA82XX(ha))
  1029. return QLA_SUCCESS;
  1030. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1031. rval = qla2x00_mbx_reg_test(vha);
  1032. if (rval) {
  1033. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1034. vha->host_no));
  1035. qla_printk(KERN_WARNING, ha,
  1036. "Failed mailbox send register test\n");
  1037. } else {
  1038. /* Flag a successful rval */
  1039. rval = QLA_SUCCESS;
  1040. }
  1041. return rval;
  1042. }
  1043. void
  1044. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1045. {
  1046. int rval;
  1047. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1048. eft_size, fce_size, mq_size;
  1049. dma_addr_t tc_dma;
  1050. void *tc;
  1051. struct qla_hw_data *ha = vha->hw;
  1052. struct req_que *req = ha->req_q_map[0];
  1053. struct rsp_que *rsp = ha->rsp_q_map[0];
  1054. if (ha->fw_dump) {
  1055. qla_printk(KERN_WARNING, ha,
  1056. "Firmware dump previously allocated.\n");
  1057. return;
  1058. }
  1059. ha->fw_dumped = 0;
  1060. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1061. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1062. fixed_size = sizeof(struct qla2100_fw_dump);
  1063. } else if (IS_QLA23XX(ha)) {
  1064. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1065. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1066. sizeof(uint16_t);
  1067. } else if (IS_FWI2_CAPABLE(ha)) {
  1068. if (IS_QLA81XX(ha))
  1069. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1070. else if (IS_QLA25XX(ha))
  1071. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1072. else
  1073. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1074. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1075. sizeof(uint32_t);
  1076. if (ha->mqenable)
  1077. mq_size = sizeof(struct qla2xxx_mq_chain);
  1078. /* Allocate memory for Fibre Channel Event Buffer. */
  1079. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1080. goto try_eft;
  1081. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1082. GFP_KERNEL);
  1083. if (!tc) {
  1084. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1085. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1086. goto try_eft;
  1087. }
  1088. memset(tc, 0, FCE_SIZE);
  1089. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1090. ha->fce_mb, &ha->fce_bufs);
  1091. if (rval) {
  1092. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1093. "FCE (%d).\n", rval);
  1094. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1095. tc_dma);
  1096. ha->flags.fce_enabled = 0;
  1097. goto try_eft;
  1098. }
  1099. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1100. FCE_SIZE / 1024);
  1101. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1102. ha->flags.fce_enabled = 1;
  1103. ha->fce_dma = tc_dma;
  1104. ha->fce = tc;
  1105. try_eft:
  1106. /* Allocate memory for Extended Trace Buffer. */
  1107. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1108. GFP_KERNEL);
  1109. if (!tc) {
  1110. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1111. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1112. goto cont_alloc;
  1113. }
  1114. memset(tc, 0, EFT_SIZE);
  1115. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1116. if (rval) {
  1117. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1118. "EFT (%d).\n", rval);
  1119. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1120. tc_dma);
  1121. goto cont_alloc;
  1122. }
  1123. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1124. EFT_SIZE / 1024);
  1125. eft_size = EFT_SIZE;
  1126. ha->eft_dma = tc_dma;
  1127. ha->eft = tc;
  1128. }
  1129. cont_alloc:
  1130. req_q_size = req->length * sizeof(request_t);
  1131. rsp_q_size = rsp->length * sizeof(response_t);
  1132. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1133. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1134. ha->chain_offset = dump_size;
  1135. dump_size += mq_size + fce_size;
  1136. ha->fw_dump = vmalloc(dump_size);
  1137. if (!ha->fw_dump) {
  1138. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1139. "firmware dump!!!\n", dump_size / 1024);
  1140. if (ha->fce) {
  1141. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  1142. ha->fce_dma);
  1143. ha->fce = NULL;
  1144. ha->fce_dma = 0;
  1145. }
  1146. if (ha->eft) {
  1147. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1148. ha->eft_dma);
  1149. ha->eft = NULL;
  1150. ha->eft_dma = 0;
  1151. }
  1152. return;
  1153. }
  1154. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1155. dump_size / 1024);
  1156. ha->fw_dump_len = dump_size;
  1157. ha->fw_dump->signature[0] = 'Q';
  1158. ha->fw_dump->signature[1] = 'L';
  1159. ha->fw_dump->signature[2] = 'G';
  1160. ha->fw_dump->signature[3] = 'C';
  1161. ha->fw_dump->version = __constant_htonl(1);
  1162. ha->fw_dump->fixed_size = htonl(fixed_size);
  1163. ha->fw_dump->mem_size = htonl(mem_size);
  1164. ha->fw_dump->req_q_size = htonl(req_q_size);
  1165. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1166. ha->fw_dump->eft_size = htonl(eft_size);
  1167. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1168. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1169. ha->fw_dump->header_size =
  1170. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1171. }
  1172. static int
  1173. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1174. {
  1175. #define MPS_MASK 0xe0
  1176. int rval;
  1177. uint16_t dc;
  1178. uint32_t dw;
  1179. struct qla_hw_data *ha = vha->hw;
  1180. if (!IS_QLA81XX(vha->hw))
  1181. return QLA_SUCCESS;
  1182. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1183. if (rval != QLA_SUCCESS) {
  1184. DEBUG2(qla_printk(KERN_WARNING, ha,
  1185. "Sync-MPI: Unable to acquire semaphore.\n"));
  1186. goto done;
  1187. }
  1188. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1189. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1190. if (rval != QLA_SUCCESS) {
  1191. DEBUG2(qla_printk(KERN_WARNING, ha,
  1192. "Sync-MPI: Unable to read sync.\n"));
  1193. goto done_release;
  1194. }
  1195. dc &= MPS_MASK;
  1196. if (dc == (dw & MPS_MASK))
  1197. goto done_release;
  1198. dw &= ~MPS_MASK;
  1199. dw |= dc;
  1200. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1201. if (rval != QLA_SUCCESS) {
  1202. DEBUG2(qla_printk(KERN_WARNING, ha,
  1203. "Sync-MPI: Unable to gain sync.\n"));
  1204. }
  1205. done_release:
  1206. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1207. if (rval != QLA_SUCCESS) {
  1208. DEBUG2(qla_printk(KERN_WARNING, ha,
  1209. "Sync-MPI: Unable to release semaphore.\n"));
  1210. }
  1211. done:
  1212. return rval;
  1213. }
  1214. /**
  1215. * qla2x00_setup_chip() - Load and start RISC firmware.
  1216. * @ha: HA context
  1217. *
  1218. * Returns 0 on success.
  1219. */
  1220. static int
  1221. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1222. {
  1223. int rval;
  1224. uint32_t srisc_address = 0;
  1225. struct qla_hw_data *ha = vha->hw;
  1226. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1227. unsigned long flags;
  1228. uint16_t fw_major_version;
  1229. if (IS_QLA82XX(ha)) {
  1230. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1231. if (rval == QLA_SUCCESS) {
  1232. qla2x00_stop_firmware(vha);
  1233. goto enable_82xx_npiv;
  1234. } else
  1235. goto failed;
  1236. }
  1237. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1238. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1239. spin_lock_irqsave(&ha->hardware_lock, flags);
  1240. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1241. RD_REG_WORD(&reg->hccr);
  1242. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1243. }
  1244. qla81xx_mpi_sync(vha);
  1245. /* Load firmware sequences */
  1246. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1247. if (rval == QLA_SUCCESS) {
  1248. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1249. "code.\n", vha->host_no));
  1250. rval = qla2x00_verify_checksum(vha, srisc_address);
  1251. if (rval == QLA_SUCCESS) {
  1252. /* Start firmware execution. */
  1253. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1254. "firmware.\n", vha->host_no));
  1255. rval = qla2x00_execute_fw(vha, srisc_address);
  1256. /* Retrieve firmware information. */
  1257. if (rval == QLA_SUCCESS) {
  1258. enable_82xx_npiv:
  1259. fw_major_version = ha->fw_major_version;
  1260. rval = qla2x00_get_fw_version(vha,
  1261. &ha->fw_major_version,
  1262. &ha->fw_minor_version,
  1263. &ha->fw_subminor_version,
  1264. &ha->fw_attributes, &ha->fw_memory_size,
  1265. ha->mpi_version, &ha->mpi_capabilities,
  1266. ha->phy_version);
  1267. if (rval != QLA_SUCCESS)
  1268. goto failed;
  1269. ha->flags.npiv_supported = 0;
  1270. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1271. (ha->fw_attributes & BIT_2)) {
  1272. ha->flags.npiv_supported = 1;
  1273. if ((!ha->max_npiv_vports) ||
  1274. ((ha->max_npiv_vports + 1) %
  1275. MIN_MULTI_ID_FABRIC))
  1276. ha->max_npiv_vports =
  1277. MIN_MULTI_ID_FABRIC - 1;
  1278. }
  1279. qla2x00_get_resource_cnts(vha, NULL,
  1280. &ha->fw_xcb_count, NULL, NULL,
  1281. &ha->max_npiv_vports, NULL);
  1282. if (!fw_major_version && ql2xallocfwdump) {
  1283. if (!IS_QLA82XX(ha))
  1284. qla2x00_alloc_fw_dump(vha);
  1285. }
  1286. }
  1287. } else {
  1288. DEBUG2(printk(KERN_INFO
  1289. "scsi(%ld): ISP Firmware failed checksum.\n",
  1290. vha->host_no));
  1291. }
  1292. }
  1293. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1294. /* Enable proper parity. */
  1295. spin_lock_irqsave(&ha->hardware_lock, flags);
  1296. if (IS_QLA2300(ha))
  1297. /* SRAM parity */
  1298. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1299. else
  1300. /* SRAM, Instruction RAM and GP RAM parity */
  1301. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1302. RD_REG_WORD(&reg->hccr);
  1303. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1304. }
  1305. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1306. uint32_t size;
  1307. rval = qla81xx_fac_get_sector_size(vha, &size);
  1308. if (rval == QLA_SUCCESS) {
  1309. ha->flags.fac_supported = 1;
  1310. ha->fdt_block_size = size << 2;
  1311. } else {
  1312. qla_printk(KERN_ERR, ha,
  1313. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1314. ha->fw_major_version, ha->fw_minor_version,
  1315. ha->fw_subminor_version);
  1316. }
  1317. }
  1318. failed:
  1319. if (rval) {
  1320. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1321. vha->host_no));
  1322. }
  1323. return (rval);
  1324. }
  1325. /**
  1326. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1327. * @ha: HA context
  1328. *
  1329. * Beginning of request ring has initialization control block already built
  1330. * by nvram config routine.
  1331. *
  1332. * Returns 0 on success.
  1333. */
  1334. void
  1335. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1336. {
  1337. uint16_t cnt;
  1338. response_t *pkt;
  1339. rsp->ring_ptr = rsp->ring;
  1340. rsp->ring_index = 0;
  1341. rsp->status_srb = NULL;
  1342. pkt = rsp->ring_ptr;
  1343. for (cnt = 0; cnt < rsp->length; cnt++) {
  1344. pkt->signature = RESPONSE_PROCESSED;
  1345. pkt++;
  1346. }
  1347. }
  1348. /**
  1349. * qla2x00_update_fw_options() - Read and process firmware options.
  1350. * @ha: HA context
  1351. *
  1352. * Returns 0 on success.
  1353. */
  1354. void
  1355. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1356. {
  1357. uint16_t swing, emphasis, tx_sens, rx_sens;
  1358. struct qla_hw_data *ha = vha->hw;
  1359. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1360. qla2x00_get_fw_options(vha, ha->fw_options);
  1361. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1362. return;
  1363. /* Serial Link options. */
  1364. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1365. vha->host_no));
  1366. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1367. sizeof(ha->fw_seriallink_options)));
  1368. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1369. if (ha->fw_seriallink_options[3] & BIT_2) {
  1370. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1371. /* 1G settings */
  1372. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1373. emphasis = (ha->fw_seriallink_options[2] &
  1374. (BIT_4 | BIT_3)) >> 3;
  1375. tx_sens = ha->fw_seriallink_options[0] &
  1376. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1377. rx_sens = (ha->fw_seriallink_options[0] &
  1378. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1379. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1380. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1381. if (rx_sens == 0x0)
  1382. rx_sens = 0x3;
  1383. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1384. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1385. ha->fw_options[10] |= BIT_5 |
  1386. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1387. (tx_sens & (BIT_1 | BIT_0));
  1388. /* 2G settings */
  1389. swing = (ha->fw_seriallink_options[2] &
  1390. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1391. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1392. tx_sens = ha->fw_seriallink_options[1] &
  1393. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1394. rx_sens = (ha->fw_seriallink_options[1] &
  1395. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1396. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1397. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1398. if (rx_sens == 0x0)
  1399. rx_sens = 0x3;
  1400. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1401. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1402. ha->fw_options[11] |= BIT_5 |
  1403. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1404. (tx_sens & (BIT_1 | BIT_0));
  1405. }
  1406. /* FCP2 options. */
  1407. /* Return command IOCBs without waiting for an ABTS to complete. */
  1408. ha->fw_options[3] |= BIT_13;
  1409. /* LED scheme. */
  1410. if (ha->flags.enable_led_scheme)
  1411. ha->fw_options[2] |= BIT_12;
  1412. /* Detect ISP6312. */
  1413. if (IS_QLA6312(ha))
  1414. ha->fw_options[2] |= BIT_13;
  1415. /* Update firmware options. */
  1416. qla2x00_set_fw_options(vha, ha->fw_options);
  1417. }
  1418. void
  1419. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1420. {
  1421. int rval;
  1422. struct qla_hw_data *ha = vha->hw;
  1423. if (IS_QLA82XX(ha))
  1424. return;
  1425. /* Update Serial Link options. */
  1426. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1427. return;
  1428. rval = qla2x00_set_serdes_params(vha,
  1429. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1430. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1431. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1432. if (rval != QLA_SUCCESS) {
  1433. qla_printk(KERN_WARNING, ha,
  1434. "Unable to update Serial Link options (%x).\n", rval);
  1435. }
  1436. }
  1437. void
  1438. qla2x00_config_rings(struct scsi_qla_host *vha)
  1439. {
  1440. struct qla_hw_data *ha = vha->hw;
  1441. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1442. struct req_que *req = ha->req_q_map[0];
  1443. struct rsp_que *rsp = ha->rsp_q_map[0];
  1444. /* Setup ring parameters in initialization control block. */
  1445. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1446. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1447. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1448. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1449. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1450. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1451. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1452. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1453. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1454. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1455. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1456. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1457. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1458. }
  1459. void
  1460. qla24xx_config_rings(struct scsi_qla_host *vha)
  1461. {
  1462. struct qla_hw_data *ha = vha->hw;
  1463. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1464. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1465. struct qla_msix_entry *msix;
  1466. struct init_cb_24xx *icb;
  1467. uint16_t rid = 0;
  1468. struct req_que *req = ha->req_q_map[0];
  1469. struct rsp_que *rsp = ha->rsp_q_map[0];
  1470. /* Setup ring parameters in initialization control block. */
  1471. icb = (struct init_cb_24xx *)ha->init_cb;
  1472. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1473. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1474. icb->request_q_length = cpu_to_le16(req->length);
  1475. icb->response_q_length = cpu_to_le16(rsp->length);
  1476. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1477. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1478. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1479. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1480. if (ha->mqenable) {
  1481. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1482. icb->rid = __constant_cpu_to_le16(rid);
  1483. if (ha->flags.msix_enabled) {
  1484. msix = &ha->msix_entries[1];
  1485. DEBUG2_17(printk(KERN_INFO
  1486. "Registering vector 0x%x for base que\n", msix->entry));
  1487. icb->msix = cpu_to_le16(msix->entry);
  1488. }
  1489. /* Use alternate PCI bus number */
  1490. if (MSB(rid))
  1491. icb->firmware_options_2 |=
  1492. __constant_cpu_to_le32(BIT_19);
  1493. /* Use alternate PCI devfn */
  1494. if (LSB(rid))
  1495. icb->firmware_options_2 |=
  1496. __constant_cpu_to_le32(BIT_18);
  1497. /* Use Disable MSIX Handshake mode for capable adapters */
  1498. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1499. icb->firmware_options_2 &=
  1500. __constant_cpu_to_le32(~BIT_22);
  1501. ha->flags.disable_msix_handshake = 1;
  1502. qla_printk(KERN_INFO, ha,
  1503. "MSIX Handshake Disable Mode turned on\n");
  1504. } else {
  1505. icb->firmware_options_2 |=
  1506. __constant_cpu_to_le32(BIT_22);
  1507. }
  1508. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1509. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1510. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1511. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1512. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1513. } else {
  1514. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1515. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1516. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1517. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1518. }
  1519. /* PCI posting */
  1520. RD_REG_DWORD(&ioreg->hccr);
  1521. }
  1522. /**
  1523. * qla2x00_init_rings() - Initializes firmware.
  1524. * @ha: HA context
  1525. *
  1526. * Beginning of request ring has initialization control block already built
  1527. * by nvram config routine.
  1528. *
  1529. * Returns 0 on success.
  1530. */
  1531. static int
  1532. qla2x00_init_rings(scsi_qla_host_t *vha)
  1533. {
  1534. int rval;
  1535. unsigned long flags = 0;
  1536. int cnt, que;
  1537. struct qla_hw_data *ha = vha->hw;
  1538. struct req_que *req;
  1539. struct rsp_que *rsp;
  1540. struct scsi_qla_host *vp;
  1541. struct mid_init_cb_24xx *mid_init_cb =
  1542. (struct mid_init_cb_24xx *) ha->init_cb;
  1543. spin_lock_irqsave(&ha->hardware_lock, flags);
  1544. /* Clear outstanding commands array. */
  1545. for (que = 0; que < ha->max_req_queues; que++) {
  1546. req = ha->req_q_map[que];
  1547. if (!req)
  1548. continue;
  1549. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1550. req->outstanding_cmds[cnt] = NULL;
  1551. req->current_outstanding_cmd = 1;
  1552. /* Initialize firmware. */
  1553. req->ring_ptr = req->ring;
  1554. req->ring_index = 0;
  1555. req->cnt = req->length;
  1556. }
  1557. for (que = 0; que < ha->max_rsp_queues; que++) {
  1558. rsp = ha->rsp_q_map[que];
  1559. if (!rsp)
  1560. continue;
  1561. /* Initialize response queue entries */
  1562. qla2x00_init_response_q_entries(rsp);
  1563. }
  1564. spin_lock(&ha->vport_slock);
  1565. /* Clear RSCN queue. */
  1566. list_for_each_entry(vp, &ha->vp_list, list) {
  1567. vp->rscn_in_ptr = 0;
  1568. vp->rscn_out_ptr = 0;
  1569. }
  1570. spin_unlock(&ha->vport_slock);
  1571. ha->isp_ops->config_rings(vha);
  1572. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1573. /* Update any ISP specific firmware options before initialization. */
  1574. ha->isp_ops->update_fw_options(vha);
  1575. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1576. if (ha->flags.npiv_supported) {
  1577. if (ha->operating_mode == LOOP)
  1578. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1579. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1580. }
  1581. if (IS_FWI2_CAPABLE(ha)) {
  1582. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1583. mid_init_cb->init_cb.execution_throttle =
  1584. cpu_to_le16(ha->fw_xcb_count);
  1585. }
  1586. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1587. if (rval) {
  1588. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1589. vha->host_no));
  1590. } else {
  1591. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1592. vha->host_no));
  1593. }
  1594. return (rval);
  1595. }
  1596. /**
  1597. * qla2x00_fw_ready() - Waits for firmware ready.
  1598. * @ha: HA context
  1599. *
  1600. * Returns 0 on success.
  1601. */
  1602. static int
  1603. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1604. {
  1605. int rval;
  1606. unsigned long wtime, mtime, cs84xx_time;
  1607. uint16_t min_wait; /* Minimum wait time if loop is down */
  1608. uint16_t wait_time; /* Wait time if loop is coming ready */
  1609. uint16_t state[5];
  1610. struct qla_hw_data *ha = vha->hw;
  1611. rval = QLA_SUCCESS;
  1612. /* 20 seconds for loop down. */
  1613. min_wait = 20;
  1614. /*
  1615. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1616. * our own processing.
  1617. */
  1618. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1619. wait_time = min_wait;
  1620. }
  1621. /* Min wait time if loop down */
  1622. mtime = jiffies + (min_wait * HZ);
  1623. /* wait time before firmware ready */
  1624. wtime = jiffies + (wait_time * HZ);
  1625. /* Wait for ISP to finish LIP */
  1626. if (!vha->flags.init_done)
  1627. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1628. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1629. vha->host_no));
  1630. do {
  1631. rval = qla2x00_get_firmware_state(vha, state);
  1632. if (rval == QLA_SUCCESS) {
  1633. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1634. vha->device_flags &= ~DFLG_NO_CABLE;
  1635. }
  1636. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1637. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1638. "84xx=%x.\n", vha->host_no, state[0],
  1639. state[2]));
  1640. if ((state[2] & FSTATE_LOGGED_IN) &&
  1641. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1642. DEBUG16(printk("scsi(%ld): Sending "
  1643. "verify iocb.\n", vha->host_no));
  1644. cs84xx_time = jiffies;
  1645. rval = qla84xx_init_chip(vha);
  1646. if (rval != QLA_SUCCESS)
  1647. break;
  1648. /* Add time taken to initialize. */
  1649. cs84xx_time = jiffies - cs84xx_time;
  1650. wtime += cs84xx_time;
  1651. mtime += cs84xx_time;
  1652. DEBUG16(printk("scsi(%ld): Increasing "
  1653. "wait time by %ld. New time %ld\n",
  1654. vha->host_no, cs84xx_time, wtime));
  1655. }
  1656. } else if (state[0] == FSTATE_READY) {
  1657. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1658. vha->host_no));
  1659. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1660. &ha->login_timeout, &ha->r_a_tov);
  1661. rval = QLA_SUCCESS;
  1662. break;
  1663. }
  1664. rval = QLA_FUNCTION_FAILED;
  1665. if (atomic_read(&vha->loop_down_timer) &&
  1666. state[0] != FSTATE_READY) {
  1667. /* Loop down. Timeout on min_wait for states
  1668. * other than Wait for Login.
  1669. */
  1670. if (time_after_eq(jiffies, mtime)) {
  1671. qla_printk(KERN_INFO, ha,
  1672. "Cable is unplugged...\n");
  1673. vha->device_flags |= DFLG_NO_CABLE;
  1674. break;
  1675. }
  1676. }
  1677. } else {
  1678. /* Mailbox cmd failed. Timeout on min_wait. */
  1679. if (time_after_eq(jiffies, mtime) ||
  1680. ha->flags.isp82xx_fw_hung)
  1681. break;
  1682. }
  1683. if (time_after_eq(jiffies, wtime))
  1684. break;
  1685. /* Delay for a while */
  1686. msleep(500);
  1687. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1688. vha->host_no, state[0], jiffies));
  1689. } while (1);
  1690. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1691. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1692. jiffies));
  1693. if (rval) {
  1694. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1695. vha->host_no));
  1696. }
  1697. return (rval);
  1698. }
  1699. /*
  1700. * qla2x00_configure_hba
  1701. * Setup adapter context.
  1702. *
  1703. * Input:
  1704. * ha = adapter state pointer.
  1705. *
  1706. * Returns:
  1707. * 0 = success
  1708. *
  1709. * Context:
  1710. * Kernel context.
  1711. */
  1712. static int
  1713. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1714. {
  1715. int rval;
  1716. uint16_t loop_id;
  1717. uint16_t topo;
  1718. uint16_t sw_cap;
  1719. uint8_t al_pa;
  1720. uint8_t area;
  1721. uint8_t domain;
  1722. char connect_type[22];
  1723. struct qla_hw_data *ha = vha->hw;
  1724. /* Get host addresses. */
  1725. rval = qla2x00_get_adapter_id(vha,
  1726. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1727. if (rval != QLA_SUCCESS) {
  1728. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1729. IS_QLA8XXX_TYPE(ha) ||
  1730. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1731. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1732. __func__, vha->host_no));
  1733. } else {
  1734. qla_printk(KERN_WARNING, ha,
  1735. "ERROR -- Unable to get host loop ID.\n");
  1736. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1737. }
  1738. return (rval);
  1739. }
  1740. if (topo == 4) {
  1741. qla_printk(KERN_INFO, ha,
  1742. "Cannot get topology - retrying.\n");
  1743. return (QLA_FUNCTION_FAILED);
  1744. }
  1745. vha->loop_id = loop_id;
  1746. /* initialize */
  1747. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1748. ha->operating_mode = LOOP;
  1749. ha->switch_cap = 0;
  1750. switch (topo) {
  1751. case 0:
  1752. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1753. vha->host_no));
  1754. ha->current_topology = ISP_CFG_NL;
  1755. strcpy(connect_type, "(Loop)");
  1756. break;
  1757. case 1:
  1758. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1759. vha->host_no));
  1760. ha->switch_cap = sw_cap;
  1761. ha->current_topology = ISP_CFG_FL;
  1762. strcpy(connect_type, "(FL_Port)");
  1763. break;
  1764. case 2:
  1765. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1766. vha->host_no));
  1767. ha->operating_mode = P2P;
  1768. ha->current_topology = ISP_CFG_N;
  1769. strcpy(connect_type, "(N_Port-to-N_Port)");
  1770. break;
  1771. case 3:
  1772. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1773. vha->host_no));
  1774. ha->switch_cap = sw_cap;
  1775. ha->operating_mode = P2P;
  1776. ha->current_topology = ISP_CFG_F;
  1777. strcpy(connect_type, "(F_Port)");
  1778. break;
  1779. default:
  1780. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1781. "Using NL.\n",
  1782. vha->host_no, topo));
  1783. ha->current_topology = ISP_CFG_NL;
  1784. strcpy(connect_type, "(Loop)");
  1785. break;
  1786. }
  1787. /* Save Host port and loop ID. */
  1788. /* byte order - Big Endian */
  1789. vha->d_id.b.domain = domain;
  1790. vha->d_id.b.area = area;
  1791. vha->d_id.b.al_pa = al_pa;
  1792. if (!vha->flags.init_done)
  1793. qla_printk(KERN_INFO, ha,
  1794. "Topology - %s, Host Loop address 0x%x\n",
  1795. connect_type, vha->loop_id);
  1796. if (rval) {
  1797. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1798. } else {
  1799. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1800. }
  1801. return(rval);
  1802. }
  1803. inline void
  1804. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1805. char *def)
  1806. {
  1807. char *st, *en;
  1808. uint16_t index;
  1809. struct qla_hw_data *ha = vha->hw;
  1810. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1811. !IS_QLA8XXX_TYPE(ha);
  1812. if (memcmp(model, BINZERO, len) != 0) {
  1813. strncpy(ha->model_number, model, len);
  1814. st = en = ha->model_number;
  1815. en += len - 1;
  1816. while (en > st) {
  1817. if (*en != 0x20 && *en != 0x00)
  1818. break;
  1819. *en-- = '\0';
  1820. }
  1821. index = (ha->pdev->subsystem_device & 0xff);
  1822. if (use_tbl &&
  1823. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1824. index < QLA_MODEL_NAMES)
  1825. strncpy(ha->model_desc,
  1826. qla2x00_model_name[index * 2 + 1],
  1827. sizeof(ha->model_desc) - 1);
  1828. } else {
  1829. index = (ha->pdev->subsystem_device & 0xff);
  1830. if (use_tbl &&
  1831. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1832. index < QLA_MODEL_NAMES) {
  1833. strcpy(ha->model_number,
  1834. qla2x00_model_name[index * 2]);
  1835. strncpy(ha->model_desc,
  1836. qla2x00_model_name[index * 2 + 1],
  1837. sizeof(ha->model_desc) - 1);
  1838. } else {
  1839. strcpy(ha->model_number, def);
  1840. }
  1841. }
  1842. if (IS_FWI2_CAPABLE(ha))
  1843. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1844. sizeof(ha->model_desc));
  1845. }
  1846. /* On sparc systems, obtain port and node WWN from firmware
  1847. * properties.
  1848. */
  1849. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1850. {
  1851. #ifdef CONFIG_SPARC
  1852. struct qla_hw_data *ha = vha->hw;
  1853. struct pci_dev *pdev = ha->pdev;
  1854. struct device_node *dp = pci_device_to_OF_node(pdev);
  1855. const u8 *val;
  1856. int len;
  1857. val = of_get_property(dp, "port-wwn", &len);
  1858. if (val && len >= WWN_SIZE)
  1859. memcpy(nv->port_name, val, WWN_SIZE);
  1860. val = of_get_property(dp, "node-wwn", &len);
  1861. if (val && len >= WWN_SIZE)
  1862. memcpy(nv->node_name, val, WWN_SIZE);
  1863. #endif
  1864. }
  1865. /*
  1866. * NVRAM configuration for ISP 2xxx
  1867. *
  1868. * Input:
  1869. * ha = adapter block pointer.
  1870. *
  1871. * Output:
  1872. * initialization control block in response_ring
  1873. * host adapters parameters in host adapter block
  1874. *
  1875. * Returns:
  1876. * 0 = success.
  1877. */
  1878. int
  1879. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1880. {
  1881. int rval;
  1882. uint8_t chksum = 0;
  1883. uint16_t cnt;
  1884. uint8_t *dptr1, *dptr2;
  1885. struct qla_hw_data *ha = vha->hw;
  1886. init_cb_t *icb = ha->init_cb;
  1887. nvram_t *nv = ha->nvram;
  1888. uint8_t *ptr = ha->nvram;
  1889. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1890. rval = QLA_SUCCESS;
  1891. /* Determine NVRAM starting address. */
  1892. ha->nvram_size = sizeof(nvram_t);
  1893. ha->nvram_base = 0;
  1894. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1895. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1896. ha->nvram_base = 0x80;
  1897. /* Get NVRAM data and calculate checksum. */
  1898. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1899. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1900. chksum += *ptr++;
  1901. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1902. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1903. /* Bad NVRAM data, set defaults parameters. */
  1904. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1905. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1906. /* Reset NVRAM data. */
  1907. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1908. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1909. nv->nvram_version);
  1910. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1911. "invalid -- WWPN) defaults.\n");
  1912. /*
  1913. * Set default initialization control block.
  1914. */
  1915. memset(nv, 0, ha->nvram_size);
  1916. nv->parameter_block_version = ICB_VERSION;
  1917. if (IS_QLA23XX(ha)) {
  1918. nv->firmware_options[0] = BIT_2 | BIT_1;
  1919. nv->firmware_options[1] = BIT_7 | BIT_5;
  1920. nv->add_firmware_options[0] = BIT_5;
  1921. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1922. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1923. nv->special_options[1] = BIT_7;
  1924. } else if (IS_QLA2200(ha)) {
  1925. nv->firmware_options[0] = BIT_2 | BIT_1;
  1926. nv->firmware_options[1] = BIT_7 | BIT_5;
  1927. nv->add_firmware_options[0] = BIT_5;
  1928. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1929. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1930. } else if (IS_QLA2100(ha)) {
  1931. nv->firmware_options[0] = BIT_3 | BIT_1;
  1932. nv->firmware_options[1] = BIT_5;
  1933. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1934. }
  1935. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1936. nv->execution_throttle = __constant_cpu_to_le16(16);
  1937. nv->retry_count = 8;
  1938. nv->retry_delay = 1;
  1939. nv->port_name[0] = 33;
  1940. nv->port_name[3] = 224;
  1941. nv->port_name[4] = 139;
  1942. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1943. nv->login_timeout = 4;
  1944. /*
  1945. * Set default host adapter parameters
  1946. */
  1947. nv->host_p[1] = BIT_2;
  1948. nv->reset_delay = 5;
  1949. nv->port_down_retry_count = 8;
  1950. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1951. nv->link_down_timeout = 60;
  1952. rval = 1;
  1953. }
  1954. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1955. /*
  1956. * The SN2 does not provide BIOS emulation which means you can't change
  1957. * potentially bogus BIOS settings. Force the use of default settings
  1958. * for link rate and frame size. Hope that the rest of the settings
  1959. * are valid.
  1960. */
  1961. if (ia64_platform_is("sn2")) {
  1962. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1963. if (IS_QLA23XX(ha))
  1964. nv->special_options[1] = BIT_7;
  1965. }
  1966. #endif
  1967. /* Reset Initialization control block */
  1968. memset(icb, 0, ha->init_cb_size);
  1969. /*
  1970. * Setup driver NVRAM options.
  1971. */
  1972. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1973. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1974. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1975. nv->firmware_options[1] &= ~BIT_4;
  1976. if (IS_QLA23XX(ha)) {
  1977. nv->firmware_options[0] |= BIT_2;
  1978. nv->firmware_options[0] &= ~BIT_3;
  1979. nv->firmware_options[0] &= ~BIT_6;
  1980. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1981. if (IS_QLA2300(ha)) {
  1982. if (ha->fb_rev == FPM_2310) {
  1983. strcpy(ha->model_number, "QLA2310");
  1984. } else {
  1985. strcpy(ha->model_number, "QLA2300");
  1986. }
  1987. } else {
  1988. qla2x00_set_model_info(vha, nv->model_number,
  1989. sizeof(nv->model_number), "QLA23xx");
  1990. }
  1991. } else if (IS_QLA2200(ha)) {
  1992. nv->firmware_options[0] |= BIT_2;
  1993. /*
  1994. * 'Point-to-point preferred, else loop' is not a safe
  1995. * connection mode setting.
  1996. */
  1997. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1998. (BIT_5 | BIT_4)) {
  1999. /* Force 'loop preferred, else point-to-point'. */
  2000. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  2001. nv->add_firmware_options[0] |= BIT_5;
  2002. }
  2003. strcpy(ha->model_number, "QLA22xx");
  2004. } else /*if (IS_QLA2100(ha))*/ {
  2005. strcpy(ha->model_number, "QLA2100");
  2006. }
  2007. /*
  2008. * Copy over NVRAM RISC parameter block to initialization control block.
  2009. */
  2010. dptr1 = (uint8_t *)icb;
  2011. dptr2 = (uint8_t *)&nv->parameter_block_version;
  2012. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  2013. while (cnt--)
  2014. *dptr1++ = *dptr2++;
  2015. /* Copy 2nd half. */
  2016. dptr1 = (uint8_t *)icb->add_firmware_options;
  2017. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2018. while (cnt--)
  2019. *dptr1++ = *dptr2++;
  2020. /* Use alternate WWN? */
  2021. if (nv->host_p[1] & BIT_7) {
  2022. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2023. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2024. }
  2025. /* Prepare nodename */
  2026. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2027. /*
  2028. * Firmware will apply the following mask if the nodename was
  2029. * not provided.
  2030. */
  2031. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2032. icb->node_name[0] &= 0xF0;
  2033. }
  2034. /*
  2035. * Set host adapter parameters.
  2036. */
  2037. if (nv->host_p[0] & BIT_7)
  2038. ql2xextended_error_logging = 1;
  2039. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2040. /* Always load RISC code on non ISP2[12]00 chips. */
  2041. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2042. ha->flags.disable_risc_code_load = 0;
  2043. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2044. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2045. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2046. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2047. ha->flags.disable_serdes = 0;
  2048. ha->operating_mode =
  2049. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2050. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2051. sizeof(ha->fw_seriallink_options));
  2052. /* save HBA serial number */
  2053. ha->serial0 = icb->port_name[5];
  2054. ha->serial1 = icb->port_name[6];
  2055. ha->serial2 = icb->port_name[7];
  2056. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2057. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2058. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2059. ha->retry_count = nv->retry_count;
  2060. /* Set minimum login_timeout to 4 seconds. */
  2061. if (nv->login_timeout != ql2xlogintimeout)
  2062. nv->login_timeout = ql2xlogintimeout;
  2063. if (nv->login_timeout < 4)
  2064. nv->login_timeout = 4;
  2065. ha->login_timeout = nv->login_timeout;
  2066. icb->login_timeout = nv->login_timeout;
  2067. /* Set minimum RATOV to 100 tenths of a second. */
  2068. ha->r_a_tov = 100;
  2069. ha->loop_reset_delay = nv->reset_delay;
  2070. /* Link Down Timeout = 0:
  2071. *
  2072. * When Port Down timer expires we will start returning
  2073. * I/O's to OS with "DID_NO_CONNECT".
  2074. *
  2075. * Link Down Timeout != 0:
  2076. *
  2077. * The driver waits for the link to come up after link down
  2078. * before returning I/Os to OS with "DID_NO_CONNECT".
  2079. */
  2080. if (nv->link_down_timeout == 0) {
  2081. ha->loop_down_abort_time =
  2082. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2083. } else {
  2084. ha->link_down_timeout = nv->link_down_timeout;
  2085. ha->loop_down_abort_time =
  2086. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2087. }
  2088. /*
  2089. * Need enough time to try and get the port back.
  2090. */
  2091. ha->port_down_retry_count = nv->port_down_retry_count;
  2092. if (qlport_down_retry)
  2093. ha->port_down_retry_count = qlport_down_retry;
  2094. /* Set login_retry_count */
  2095. ha->login_retry_count = nv->retry_count;
  2096. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2097. ha->port_down_retry_count > 3)
  2098. ha->login_retry_count = ha->port_down_retry_count;
  2099. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2100. ha->login_retry_count = ha->port_down_retry_count;
  2101. if (ql2xloginretrycount)
  2102. ha->login_retry_count = ql2xloginretrycount;
  2103. icb->lun_enables = __constant_cpu_to_le16(0);
  2104. icb->command_resource_count = 0;
  2105. icb->immediate_notify_resource_count = 0;
  2106. icb->timeout = __constant_cpu_to_le16(0);
  2107. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2108. /* Enable RIO */
  2109. icb->firmware_options[0] &= ~BIT_3;
  2110. icb->add_firmware_options[0] &=
  2111. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2112. icb->add_firmware_options[0] |= BIT_2;
  2113. icb->response_accumulation_timer = 3;
  2114. icb->interrupt_delay_timer = 5;
  2115. vha->flags.process_response_queue = 1;
  2116. } else {
  2117. /* Enable ZIO. */
  2118. if (!vha->flags.init_done) {
  2119. ha->zio_mode = icb->add_firmware_options[0] &
  2120. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2121. ha->zio_timer = icb->interrupt_delay_timer ?
  2122. icb->interrupt_delay_timer: 2;
  2123. }
  2124. icb->add_firmware_options[0] &=
  2125. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2126. vha->flags.process_response_queue = 0;
  2127. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2128. ha->zio_mode = QLA_ZIO_MODE_6;
  2129. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2130. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2131. ha->zio_timer * 100));
  2132. qla_printk(KERN_INFO, ha,
  2133. "ZIO mode %d enabled; timer delay (%d us).\n",
  2134. ha->zio_mode, ha->zio_timer * 100);
  2135. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2136. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2137. vha->flags.process_response_queue = 1;
  2138. }
  2139. }
  2140. if (rval) {
  2141. DEBUG2_3(printk(KERN_WARNING
  2142. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2143. }
  2144. return (rval);
  2145. }
  2146. static void
  2147. qla2x00_rport_del(void *data)
  2148. {
  2149. fc_port_t *fcport = data;
  2150. struct fc_rport *rport;
  2151. unsigned long flags;
  2152. spin_lock_irqsave(fcport->vha->host->host_lock, flags);
  2153. rport = fcport->drport ? fcport->drport: fcport->rport;
  2154. fcport->drport = NULL;
  2155. spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
  2156. if (rport)
  2157. fc_remote_port_delete(rport);
  2158. }
  2159. /**
  2160. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2161. * @ha: HA context
  2162. * @flags: allocation flags
  2163. *
  2164. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2165. */
  2166. fc_port_t *
  2167. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2168. {
  2169. fc_port_t *fcport;
  2170. fcport = kzalloc(sizeof(fc_port_t), flags);
  2171. if (!fcport)
  2172. return NULL;
  2173. /* Setup fcport template structure. */
  2174. fcport->vha = vha;
  2175. fcport->vp_idx = vha->vp_idx;
  2176. fcport->port_type = FCT_UNKNOWN;
  2177. fcport->loop_id = FC_NO_LOOP_ID;
  2178. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2179. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2180. return fcport;
  2181. }
  2182. /*
  2183. * qla2x00_configure_loop
  2184. * Updates Fibre Channel Device Database with what is actually on loop.
  2185. *
  2186. * Input:
  2187. * ha = adapter block pointer.
  2188. *
  2189. * Returns:
  2190. * 0 = success.
  2191. * 1 = error.
  2192. * 2 = database was full and device was not configured.
  2193. */
  2194. static int
  2195. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2196. {
  2197. int rval;
  2198. unsigned long flags, save_flags;
  2199. struct qla_hw_data *ha = vha->hw;
  2200. rval = QLA_SUCCESS;
  2201. /* Get Initiator ID */
  2202. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2203. rval = qla2x00_configure_hba(vha);
  2204. if (rval != QLA_SUCCESS) {
  2205. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2206. vha->host_no));
  2207. return (rval);
  2208. }
  2209. }
  2210. save_flags = flags = vha->dpc_flags;
  2211. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2212. vha->host_no, flags));
  2213. /*
  2214. * If we have both an RSCN and PORT UPDATE pending then handle them
  2215. * both at the same time.
  2216. */
  2217. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2218. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2219. qla2x00_get_data_rate(vha);
  2220. /* Determine what we need to do */
  2221. if (ha->current_topology == ISP_CFG_FL &&
  2222. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2223. vha->flags.rscn_queue_overflow = 1;
  2224. set_bit(RSCN_UPDATE, &flags);
  2225. } else if (ha->current_topology == ISP_CFG_F &&
  2226. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2227. vha->flags.rscn_queue_overflow = 1;
  2228. set_bit(RSCN_UPDATE, &flags);
  2229. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2230. } else if (ha->current_topology == ISP_CFG_N) {
  2231. clear_bit(RSCN_UPDATE, &flags);
  2232. } else if (!vha->flags.online ||
  2233. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2234. vha->flags.rscn_queue_overflow = 1;
  2235. set_bit(RSCN_UPDATE, &flags);
  2236. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2237. }
  2238. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2239. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2240. rval = QLA_FUNCTION_FAILED;
  2241. else
  2242. rval = qla2x00_configure_local_loop(vha);
  2243. }
  2244. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2245. if (LOOP_TRANSITION(vha))
  2246. rval = QLA_FUNCTION_FAILED;
  2247. else
  2248. rval = qla2x00_configure_fabric(vha);
  2249. }
  2250. if (rval == QLA_SUCCESS) {
  2251. if (atomic_read(&vha->loop_down_timer) ||
  2252. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2253. rval = QLA_FUNCTION_FAILED;
  2254. } else {
  2255. atomic_set(&vha->loop_state, LOOP_READY);
  2256. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2257. }
  2258. }
  2259. if (rval) {
  2260. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2261. __func__, vha->host_no));
  2262. } else {
  2263. DEBUG3(printk("%s: exiting normally\n", __func__));
  2264. }
  2265. /* Restore state if a resync event occurred during processing */
  2266. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2267. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2268. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2269. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2270. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2271. if (!IS_ALOGIO_CAPABLE(ha))
  2272. vha->flags.rscn_queue_overflow = 1;
  2273. }
  2274. }
  2275. return (rval);
  2276. }
  2277. /*
  2278. * qla2x00_configure_local_loop
  2279. * Updates Fibre Channel Device Database with local loop devices.
  2280. *
  2281. * Input:
  2282. * ha = adapter block pointer.
  2283. *
  2284. * Returns:
  2285. * 0 = success.
  2286. */
  2287. static int
  2288. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2289. {
  2290. int rval, rval2;
  2291. int found_devs;
  2292. int found;
  2293. fc_port_t *fcport, *new_fcport;
  2294. uint16_t index;
  2295. uint16_t entries;
  2296. char *id_iter;
  2297. uint16_t loop_id;
  2298. uint8_t domain, area, al_pa;
  2299. struct qla_hw_data *ha = vha->hw;
  2300. found_devs = 0;
  2301. new_fcport = NULL;
  2302. entries = MAX_FIBRE_DEVICES;
  2303. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2304. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2305. /* Get list of logged in devices. */
  2306. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2307. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2308. &entries);
  2309. if (rval != QLA_SUCCESS)
  2310. goto cleanup_allocation;
  2311. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2312. vha->host_no, entries));
  2313. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2314. entries * sizeof(struct gid_list_info)));
  2315. /* Allocate temporary fcport for any new fcports discovered. */
  2316. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2317. if (new_fcport == NULL) {
  2318. rval = QLA_MEMORY_ALLOC_FAILED;
  2319. goto cleanup_allocation;
  2320. }
  2321. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2322. /*
  2323. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2324. */
  2325. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2326. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2327. fcport->port_type != FCT_BROADCAST &&
  2328. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2329. DEBUG(printk("scsi(%ld): Marking port lost, "
  2330. "loop_id=0x%04x\n",
  2331. vha->host_no, fcport->loop_id));
  2332. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2333. }
  2334. }
  2335. /* Add devices to port list. */
  2336. id_iter = (char *)ha->gid_list;
  2337. for (index = 0; index < entries; index++) {
  2338. domain = ((struct gid_list_info *)id_iter)->domain;
  2339. area = ((struct gid_list_info *)id_iter)->area;
  2340. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2341. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2342. loop_id = (uint16_t)
  2343. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2344. else
  2345. loop_id = le16_to_cpu(
  2346. ((struct gid_list_info *)id_iter)->loop_id);
  2347. id_iter += ha->gid_list_info_size;
  2348. /* Bypass reserved domain fields. */
  2349. if ((domain & 0xf0) == 0xf0)
  2350. continue;
  2351. /* Bypass if not same domain and area of adapter. */
  2352. if (area && domain &&
  2353. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2354. continue;
  2355. /* Bypass invalid local loop ID. */
  2356. if (loop_id > LAST_LOCAL_LOOP_ID)
  2357. continue;
  2358. /* Fill in member data. */
  2359. new_fcport->d_id.b.domain = domain;
  2360. new_fcport->d_id.b.area = area;
  2361. new_fcport->d_id.b.al_pa = al_pa;
  2362. new_fcport->loop_id = loop_id;
  2363. new_fcport->vp_idx = vha->vp_idx;
  2364. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2365. if (rval2 != QLA_SUCCESS) {
  2366. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2367. "information -- get_port_database=%x, "
  2368. "loop_id=0x%04x\n",
  2369. vha->host_no, rval2, new_fcport->loop_id));
  2370. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2371. vha->host_no));
  2372. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2373. continue;
  2374. }
  2375. /* Check for matching device in port list. */
  2376. found = 0;
  2377. fcport = NULL;
  2378. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2379. if (memcmp(new_fcport->port_name, fcport->port_name,
  2380. WWN_SIZE))
  2381. continue;
  2382. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2383. fcport->loop_id = new_fcport->loop_id;
  2384. fcport->port_type = new_fcport->port_type;
  2385. fcport->d_id.b24 = new_fcport->d_id.b24;
  2386. memcpy(fcport->node_name, new_fcport->node_name,
  2387. WWN_SIZE);
  2388. found++;
  2389. break;
  2390. }
  2391. if (!found) {
  2392. /* New device, add to fcports list. */
  2393. if (vha->vp_idx) {
  2394. new_fcport->vha = vha;
  2395. new_fcport->vp_idx = vha->vp_idx;
  2396. }
  2397. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2398. /* Allocate a new replacement fcport. */
  2399. fcport = new_fcport;
  2400. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2401. if (new_fcport == NULL) {
  2402. rval = QLA_MEMORY_ALLOC_FAILED;
  2403. goto cleanup_allocation;
  2404. }
  2405. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2406. }
  2407. /* Base iIDMA settings on HBA port speed. */
  2408. fcport->fp_speed = ha->link_data_rate;
  2409. qla2x00_update_fcport(vha, fcport);
  2410. found_devs++;
  2411. }
  2412. cleanup_allocation:
  2413. kfree(new_fcport);
  2414. if (rval != QLA_SUCCESS) {
  2415. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2416. "rval=%x\n", vha->host_no, rval));
  2417. }
  2418. return (rval);
  2419. }
  2420. static void
  2421. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2422. {
  2423. #define LS_UNKNOWN 2
  2424. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2425. char *link_speed;
  2426. int rval;
  2427. uint16_t mb[4];
  2428. struct qla_hw_data *ha = vha->hw;
  2429. if (!IS_IIDMA_CAPABLE(ha))
  2430. return;
  2431. if (atomic_read(&fcport->state) != FCS_ONLINE)
  2432. return;
  2433. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2434. fcport->fp_speed > ha->link_data_rate)
  2435. return;
  2436. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2437. mb);
  2438. if (rval != QLA_SUCCESS) {
  2439. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2440. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2441. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2442. fcport->port_name[2], fcport->port_name[3],
  2443. fcport->port_name[4], fcport->port_name[5],
  2444. fcport->port_name[6], fcport->port_name[7], rval,
  2445. fcport->fp_speed, mb[0], mb[1]));
  2446. } else {
  2447. link_speed = link_speeds[LS_UNKNOWN];
  2448. if (fcport->fp_speed < 5)
  2449. link_speed = link_speeds[fcport->fp_speed];
  2450. else if (fcport->fp_speed == 0x13)
  2451. link_speed = link_speeds[5];
  2452. DEBUG2(qla_printk(KERN_INFO, ha,
  2453. "iIDMA adjusted to %s GB/s on "
  2454. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2455. link_speed, fcport->port_name[0],
  2456. fcport->port_name[1], fcport->port_name[2],
  2457. fcport->port_name[3], fcport->port_name[4],
  2458. fcport->port_name[5], fcport->port_name[6],
  2459. fcport->port_name[7]));
  2460. }
  2461. }
  2462. static void
  2463. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2464. {
  2465. struct fc_rport_identifiers rport_ids;
  2466. struct fc_rport *rport;
  2467. struct qla_hw_data *ha = vha->hw;
  2468. unsigned long flags;
  2469. qla2x00_rport_del(fcport);
  2470. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2471. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2472. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2473. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2474. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2475. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2476. if (!rport) {
  2477. qla_printk(KERN_WARNING, ha,
  2478. "Unable to allocate fc remote port!\n");
  2479. return;
  2480. }
  2481. spin_lock_irqsave(fcport->vha->host->host_lock, flags);
  2482. *((fc_port_t **)rport->dd_data) = fcport;
  2483. spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
  2484. rport->supported_classes = fcport->supported_classes;
  2485. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2486. if (fcport->port_type == FCT_INITIATOR)
  2487. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2488. if (fcport->port_type == FCT_TARGET)
  2489. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2490. fc_remote_port_rolechg(rport, rport_ids.roles);
  2491. }
  2492. /*
  2493. * qla2x00_update_fcport
  2494. * Updates device on list.
  2495. *
  2496. * Input:
  2497. * ha = adapter block pointer.
  2498. * fcport = port structure pointer.
  2499. *
  2500. * Return:
  2501. * 0 - Success
  2502. * BIT_0 - error
  2503. *
  2504. * Context:
  2505. * Kernel context.
  2506. */
  2507. void
  2508. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2509. {
  2510. fcport->vha = vha;
  2511. fcport->login_retry = 0;
  2512. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2513. qla2x00_iidma_fcport(vha, fcport);
  2514. qla24xx_update_fcport_fcp_prio(vha, fcport);
  2515. qla2x00_reg_remote_port(vha, fcport);
  2516. atomic_set(&fcport->state, FCS_ONLINE);
  2517. }
  2518. /*
  2519. * qla2x00_configure_fabric
  2520. * Setup SNS devices with loop ID's.
  2521. *
  2522. * Input:
  2523. * ha = adapter block pointer.
  2524. *
  2525. * Returns:
  2526. * 0 = success.
  2527. * BIT_0 = error
  2528. */
  2529. static int
  2530. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2531. {
  2532. int rval, rval2;
  2533. fc_port_t *fcport, *fcptemp;
  2534. uint16_t next_loopid;
  2535. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2536. uint16_t loop_id;
  2537. LIST_HEAD(new_fcports);
  2538. struct qla_hw_data *ha = vha->hw;
  2539. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2540. /* If FL port exists, then SNS is present */
  2541. if (IS_FWI2_CAPABLE(ha))
  2542. loop_id = NPH_F_PORT;
  2543. else
  2544. loop_id = SNS_FL_PORT;
  2545. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2546. if (rval != QLA_SUCCESS) {
  2547. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2548. "Port\n", vha->host_no));
  2549. vha->device_flags &= ~SWITCH_FOUND;
  2550. return (QLA_SUCCESS);
  2551. }
  2552. vha->device_flags |= SWITCH_FOUND;
  2553. /* Mark devices that need re-synchronization. */
  2554. rval2 = qla2x00_device_resync(vha);
  2555. if (rval2 == QLA_RSCNS_HANDLED) {
  2556. /* No point doing the scan, just continue. */
  2557. return (QLA_SUCCESS);
  2558. }
  2559. do {
  2560. /* FDMI support. */
  2561. if (ql2xfdmienable &&
  2562. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2563. qla2x00_fdmi_register(vha);
  2564. /* Ensure we are logged into the SNS. */
  2565. if (IS_FWI2_CAPABLE(ha))
  2566. loop_id = NPH_SNS;
  2567. else
  2568. loop_id = SIMPLE_NAME_SERVER;
  2569. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2570. 0xfc, mb, BIT_1 | BIT_0);
  2571. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2572. DEBUG2(qla_printk(KERN_INFO, ha,
  2573. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2574. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2575. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2576. return (QLA_SUCCESS);
  2577. }
  2578. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2579. if (qla2x00_rft_id(vha)) {
  2580. /* EMPTY */
  2581. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2582. "TYPE failed.\n", vha->host_no));
  2583. }
  2584. if (qla2x00_rff_id(vha)) {
  2585. /* EMPTY */
  2586. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2587. "Features failed.\n", vha->host_no));
  2588. }
  2589. if (qla2x00_rnn_id(vha)) {
  2590. /* EMPTY */
  2591. DEBUG2(printk("scsi(%ld): Register Node Name "
  2592. "failed.\n", vha->host_no));
  2593. } else if (qla2x00_rsnn_nn(vha)) {
  2594. /* EMPTY */
  2595. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2596. "Node Name failed.\n", vha->host_no));
  2597. }
  2598. }
  2599. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2600. if (rval != QLA_SUCCESS)
  2601. break;
  2602. /*
  2603. * Logout all previous fabric devices marked lost, except
  2604. * FCP2 devices.
  2605. */
  2606. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2607. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2608. break;
  2609. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2610. continue;
  2611. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2612. qla2x00_mark_device_lost(vha, fcport,
  2613. ql2xplogiabsentdevice, 0);
  2614. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2615. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2616. fcport->port_type != FCT_INITIATOR &&
  2617. fcport->port_type != FCT_BROADCAST) {
  2618. ha->isp_ops->fabric_logout(vha,
  2619. fcport->loop_id,
  2620. fcport->d_id.b.domain,
  2621. fcport->d_id.b.area,
  2622. fcport->d_id.b.al_pa);
  2623. fcport->loop_id = FC_NO_LOOP_ID;
  2624. }
  2625. }
  2626. }
  2627. /* Starting free loop ID. */
  2628. next_loopid = ha->min_external_loopid;
  2629. /*
  2630. * Scan through our port list and login entries that need to be
  2631. * logged in.
  2632. */
  2633. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2634. if (atomic_read(&vha->loop_down_timer) ||
  2635. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2636. break;
  2637. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2638. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2639. continue;
  2640. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2641. fcport->loop_id = next_loopid;
  2642. rval = qla2x00_find_new_loop_id(
  2643. base_vha, fcport);
  2644. if (rval != QLA_SUCCESS) {
  2645. /* Ran out of IDs to use */
  2646. break;
  2647. }
  2648. }
  2649. /* Login and update database */
  2650. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2651. }
  2652. /* Exit if out of loop IDs. */
  2653. if (rval != QLA_SUCCESS) {
  2654. break;
  2655. }
  2656. /*
  2657. * Login and add the new devices to our port list.
  2658. */
  2659. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2660. if (atomic_read(&vha->loop_down_timer) ||
  2661. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2662. break;
  2663. /* Find a new loop ID to use. */
  2664. fcport->loop_id = next_loopid;
  2665. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2666. if (rval != QLA_SUCCESS) {
  2667. /* Ran out of IDs to use */
  2668. break;
  2669. }
  2670. /* Login and update database */
  2671. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2672. if (vha->vp_idx) {
  2673. fcport->vha = vha;
  2674. fcport->vp_idx = vha->vp_idx;
  2675. }
  2676. list_move_tail(&fcport->list, &vha->vp_fcports);
  2677. }
  2678. } while (0);
  2679. /* Free all new device structures not processed. */
  2680. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2681. list_del(&fcport->list);
  2682. kfree(fcport);
  2683. }
  2684. if (rval) {
  2685. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2686. "rval=%d\n", vha->host_no, rval));
  2687. }
  2688. return (rval);
  2689. }
  2690. /*
  2691. * qla2x00_find_all_fabric_devs
  2692. *
  2693. * Input:
  2694. * ha = adapter block pointer.
  2695. * dev = database device entry pointer.
  2696. *
  2697. * Returns:
  2698. * 0 = success.
  2699. *
  2700. * Context:
  2701. * Kernel context.
  2702. */
  2703. static int
  2704. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2705. struct list_head *new_fcports)
  2706. {
  2707. int rval;
  2708. uint16_t loop_id;
  2709. fc_port_t *fcport, *new_fcport, *fcptemp;
  2710. int found;
  2711. sw_info_t *swl;
  2712. int swl_idx;
  2713. int first_dev, last_dev;
  2714. port_id_t wrap = {}, nxt_d_id;
  2715. struct qla_hw_data *ha = vha->hw;
  2716. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2717. struct scsi_qla_host *tvp;
  2718. rval = QLA_SUCCESS;
  2719. /* Try GID_PT to get device list, else GAN. */
  2720. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2721. if (!swl) {
  2722. /*EMPTY*/
  2723. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2724. "on GA_NXT\n", vha->host_no));
  2725. } else {
  2726. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2727. kfree(swl);
  2728. swl = NULL;
  2729. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2730. kfree(swl);
  2731. swl = NULL;
  2732. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2733. kfree(swl);
  2734. swl = NULL;
  2735. } else if (ql2xiidmaenable &&
  2736. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2737. qla2x00_gpsc(vha, swl);
  2738. }
  2739. /* If other queries succeeded probe for FC-4 type */
  2740. if (swl)
  2741. qla2x00_gff_id(vha, swl);
  2742. }
  2743. swl_idx = 0;
  2744. /* Allocate temporary fcport for any new fcports discovered. */
  2745. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2746. if (new_fcport == NULL) {
  2747. kfree(swl);
  2748. return (QLA_MEMORY_ALLOC_FAILED);
  2749. }
  2750. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2751. /* Set start port ID scan at adapter ID. */
  2752. first_dev = 1;
  2753. last_dev = 0;
  2754. /* Starting free loop ID. */
  2755. loop_id = ha->min_external_loopid;
  2756. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2757. if (qla2x00_is_reserved_id(vha, loop_id))
  2758. continue;
  2759. if (ha->current_topology == ISP_CFG_FL &&
  2760. (atomic_read(&vha->loop_down_timer) ||
  2761. LOOP_TRANSITION(vha))) {
  2762. atomic_set(&vha->loop_down_timer, 0);
  2763. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2764. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2765. break;
  2766. }
  2767. if (swl != NULL) {
  2768. if (last_dev) {
  2769. wrap.b24 = new_fcport->d_id.b24;
  2770. } else {
  2771. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2772. memcpy(new_fcport->node_name,
  2773. swl[swl_idx].node_name, WWN_SIZE);
  2774. memcpy(new_fcport->port_name,
  2775. swl[swl_idx].port_name, WWN_SIZE);
  2776. memcpy(new_fcport->fabric_port_name,
  2777. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2778. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2779. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2780. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2781. last_dev = 1;
  2782. }
  2783. swl_idx++;
  2784. }
  2785. } else {
  2786. /* Send GA_NXT to the switch */
  2787. rval = qla2x00_ga_nxt(vha, new_fcport);
  2788. if (rval != QLA_SUCCESS) {
  2789. qla_printk(KERN_WARNING, ha,
  2790. "SNS scan failed -- assuming zero-entry "
  2791. "result...\n");
  2792. list_for_each_entry_safe(fcport, fcptemp,
  2793. new_fcports, list) {
  2794. list_del(&fcport->list);
  2795. kfree(fcport);
  2796. }
  2797. rval = QLA_SUCCESS;
  2798. break;
  2799. }
  2800. }
  2801. /* If wrap on switch device list, exit. */
  2802. if (first_dev) {
  2803. wrap.b24 = new_fcport->d_id.b24;
  2804. first_dev = 0;
  2805. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2806. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2807. vha->host_no, new_fcport->d_id.b.domain,
  2808. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2809. break;
  2810. }
  2811. /* Bypass if same physical adapter. */
  2812. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2813. continue;
  2814. /* Bypass virtual ports of the same host. */
  2815. found = 0;
  2816. if (ha->num_vhosts) {
  2817. unsigned long flags;
  2818. spin_lock_irqsave(&ha->vport_slock, flags);
  2819. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2820. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2821. found = 1;
  2822. break;
  2823. }
  2824. }
  2825. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2826. if (found)
  2827. continue;
  2828. }
  2829. /* Bypass if same domain and area of adapter. */
  2830. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2831. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2832. ISP_CFG_FL)
  2833. continue;
  2834. /* Bypass reserved domain fields. */
  2835. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2836. continue;
  2837. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2838. if (ql2xgffidenable &&
  2839. (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2840. new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
  2841. continue;
  2842. /* Locate matching device in database. */
  2843. found = 0;
  2844. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2845. if (memcmp(new_fcport->port_name, fcport->port_name,
  2846. WWN_SIZE))
  2847. continue;
  2848. found++;
  2849. /* Update port state. */
  2850. memcpy(fcport->fabric_port_name,
  2851. new_fcport->fabric_port_name, WWN_SIZE);
  2852. fcport->fp_speed = new_fcport->fp_speed;
  2853. /*
  2854. * If address the same and state FCS_ONLINE, nothing
  2855. * changed.
  2856. */
  2857. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2858. atomic_read(&fcport->state) == FCS_ONLINE) {
  2859. break;
  2860. }
  2861. /*
  2862. * If device was not a fabric device before.
  2863. */
  2864. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2865. fcport->d_id.b24 = new_fcport->d_id.b24;
  2866. fcport->loop_id = FC_NO_LOOP_ID;
  2867. fcport->flags |= (FCF_FABRIC_DEVICE |
  2868. FCF_LOGIN_NEEDED);
  2869. break;
  2870. }
  2871. /*
  2872. * Port ID changed or device was marked to be updated;
  2873. * Log it out if still logged in and mark it for
  2874. * relogin later.
  2875. */
  2876. fcport->d_id.b24 = new_fcport->d_id.b24;
  2877. fcport->flags |= FCF_LOGIN_NEEDED;
  2878. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2879. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2880. fcport->port_type != FCT_INITIATOR &&
  2881. fcport->port_type != FCT_BROADCAST) {
  2882. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2883. fcport->d_id.b.domain, fcport->d_id.b.area,
  2884. fcport->d_id.b.al_pa);
  2885. fcport->loop_id = FC_NO_LOOP_ID;
  2886. }
  2887. break;
  2888. }
  2889. if (found)
  2890. continue;
  2891. /* If device was not in our fcports list, then add it. */
  2892. list_add_tail(&new_fcport->list, new_fcports);
  2893. /* Allocate a new replacement fcport. */
  2894. nxt_d_id.b24 = new_fcport->d_id.b24;
  2895. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2896. if (new_fcport == NULL) {
  2897. kfree(swl);
  2898. return (QLA_MEMORY_ALLOC_FAILED);
  2899. }
  2900. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2901. new_fcport->d_id.b24 = nxt_d_id.b24;
  2902. }
  2903. kfree(swl);
  2904. kfree(new_fcport);
  2905. return (rval);
  2906. }
  2907. /*
  2908. * qla2x00_find_new_loop_id
  2909. * Scan through our port list and find a new usable loop ID.
  2910. *
  2911. * Input:
  2912. * ha: adapter state pointer.
  2913. * dev: port structure pointer.
  2914. *
  2915. * Returns:
  2916. * qla2x00 local function return status code.
  2917. *
  2918. * Context:
  2919. * Kernel context.
  2920. */
  2921. int
  2922. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2923. {
  2924. int rval;
  2925. int found;
  2926. fc_port_t *fcport;
  2927. uint16_t first_loop_id;
  2928. struct qla_hw_data *ha = vha->hw;
  2929. struct scsi_qla_host *vp;
  2930. struct scsi_qla_host *tvp;
  2931. unsigned long flags = 0;
  2932. rval = QLA_SUCCESS;
  2933. /* Save starting loop ID. */
  2934. first_loop_id = dev->loop_id;
  2935. for (;;) {
  2936. /* Skip loop ID if already used by adapter. */
  2937. if (dev->loop_id == vha->loop_id)
  2938. dev->loop_id++;
  2939. /* Skip reserved loop IDs. */
  2940. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2941. dev->loop_id++;
  2942. /* Reset loop ID if passed the end. */
  2943. if (dev->loop_id > ha->max_loop_id) {
  2944. /* first loop ID. */
  2945. dev->loop_id = ha->min_external_loopid;
  2946. }
  2947. /* Check for loop ID being already in use. */
  2948. found = 0;
  2949. fcport = NULL;
  2950. spin_lock_irqsave(&ha->vport_slock, flags);
  2951. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2952. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2953. if (fcport->loop_id == dev->loop_id &&
  2954. fcport != dev) {
  2955. /* ID possibly in use */
  2956. found++;
  2957. break;
  2958. }
  2959. }
  2960. if (found)
  2961. break;
  2962. }
  2963. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2964. /* If not in use then it is free to use. */
  2965. if (!found) {
  2966. break;
  2967. }
  2968. /* ID in use. Try next value. */
  2969. dev->loop_id++;
  2970. /* If wrap around. No free ID to use. */
  2971. if (dev->loop_id == first_loop_id) {
  2972. dev->loop_id = FC_NO_LOOP_ID;
  2973. rval = QLA_FUNCTION_FAILED;
  2974. break;
  2975. }
  2976. }
  2977. return (rval);
  2978. }
  2979. /*
  2980. * qla2x00_device_resync
  2981. * Marks devices in the database that needs resynchronization.
  2982. *
  2983. * Input:
  2984. * ha = adapter block pointer.
  2985. *
  2986. * Context:
  2987. * Kernel context.
  2988. */
  2989. static int
  2990. qla2x00_device_resync(scsi_qla_host_t *vha)
  2991. {
  2992. int rval;
  2993. uint32_t mask;
  2994. fc_port_t *fcport;
  2995. uint32_t rscn_entry;
  2996. uint8_t rscn_out_iter;
  2997. uint8_t format;
  2998. port_id_t d_id = {};
  2999. rval = QLA_RSCNS_HANDLED;
  3000. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  3001. vha->flags.rscn_queue_overflow) {
  3002. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  3003. format = MSB(MSW(rscn_entry));
  3004. d_id.b.domain = LSB(MSW(rscn_entry));
  3005. d_id.b.area = MSB(LSW(rscn_entry));
  3006. d_id.b.al_pa = LSB(LSW(rscn_entry));
  3007. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  3008. "[%02x/%02x%02x%02x].\n",
  3009. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  3010. d_id.b.area, d_id.b.al_pa));
  3011. vha->rscn_out_ptr++;
  3012. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  3013. vha->rscn_out_ptr = 0;
  3014. /* Skip duplicate entries. */
  3015. for (rscn_out_iter = vha->rscn_out_ptr;
  3016. !vha->flags.rscn_queue_overflow &&
  3017. rscn_out_iter != vha->rscn_in_ptr;
  3018. rscn_out_iter = (rscn_out_iter ==
  3019. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  3020. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  3021. break;
  3022. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  3023. "entry found at [%d].\n", vha->host_no,
  3024. rscn_out_iter));
  3025. vha->rscn_out_ptr = rscn_out_iter;
  3026. }
  3027. /* Queue overflow, set switch default case. */
  3028. if (vha->flags.rscn_queue_overflow) {
  3029. DEBUG(printk("scsi(%ld): device_resync: rscn "
  3030. "overflow.\n", vha->host_no));
  3031. format = 3;
  3032. vha->flags.rscn_queue_overflow = 0;
  3033. }
  3034. switch (format) {
  3035. case 0:
  3036. mask = 0xffffff;
  3037. break;
  3038. case 1:
  3039. mask = 0xffff00;
  3040. break;
  3041. case 2:
  3042. mask = 0xff0000;
  3043. break;
  3044. default:
  3045. mask = 0x0;
  3046. d_id.b24 = 0;
  3047. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3048. break;
  3049. }
  3050. rval = QLA_SUCCESS;
  3051. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3052. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3053. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3054. fcport->port_type == FCT_BROADCAST)
  3055. continue;
  3056. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3057. if (format != 3 ||
  3058. fcport->port_type != FCT_INITIATOR) {
  3059. qla2x00_mark_device_lost(vha, fcport,
  3060. 0, 0);
  3061. }
  3062. }
  3063. }
  3064. }
  3065. return (rval);
  3066. }
  3067. /*
  3068. * qla2x00_fabric_dev_login
  3069. * Login fabric target device and update FC port database.
  3070. *
  3071. * Input:
  3072. * ha: adapter state pointer.
  3073. * fcport: port structure list pointer.
  3074. * next_loopid: contains value of a new loop ID that can be used
  3075. * by the next login attempt.
  3076. *
  3077. * Returns:
  3078. * qla2x00 local function return status code.
  3079. *
  3080. * Context:
  3081. * Kernel context.
  3082. */
  3083. static int
  3084. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3085. uint16_t *next_loopid)
  3086. {
  3087. int rval;
  3088. int retry;
  3089. uint8_t opts;
  3090. struct qla_hw_data *ha = vha->hw;
  3091. rval = QLA_SUCCESS;
  3092. retry = 0;
  3093. if (IS_ALOGIO_CAPABLE(ha)) {
  3094. if (fcport->flags & FCF_ASYNC_SENT)
  3095. return rval;
  3096. fcport->flags |= FCF_ASYNC_SENT;
  3097. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3098. if (!rval)
  3099. return rval;
  3100. }
  3101. fcport->flags &= ~FCF_ASYNC_SENT;
  3102. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3103. if (rval == QLA_SUCCESS) {
  3104. /* Send an ADISC to FCP2 devices.*/
  3105. opts = 0;
  3106. if (fcport->flags & FCF_FCP2_DEVICE)
  3107. opts |= BIT_1;
  3108. rval = qla2x00_get_port_database(vha, fcport, opts);
  3109. if (rval != QLA_SUCCESS) {
  3110. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3111. fcport->d_id.b.domain, fcport->d_id.b.area,
  3112. fcport->d_id.b.al_pa);
  3113. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3114. } else {
  3115. qla2x00_update_fcport(vha, fcport);
  3116. }
  3117. }
  3118. return (rval);
  3119. }
  3120. /*
  3121. * qla2x00_fabric_login
  3122. * Issue fabric login command.
  3123. *
  3124. * Input:
  3125. * ha = adapter block pointer.
  3126. * device = pointer to FC device type structure.
  3127. *
  3128. * Returns:
  3129. * 0 - Login successfully
  3130. * 1 - Login failed
  3131. * 2 - Initiator device
  3132. * 3 - Fatal error
  3133. */
  3134. int
  3135. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3136. uint16_t *next_loopid)
  3137. {
  3138. int rval;
  3139. int retry;
  3140. uint16_t tmp_loopid;
  3141. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3142. struct qla_hw_data *ha = vha->hw;
  3143. retry = 0;
  3144. tmp_loopid = 0;
  3145. for (;;) {
  3146. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3147. "for port %02x%02x%02x.\n",
  3148. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3149. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3150. /* Login fcport on switch. */
  3151. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3152. fcport->d_id.b.domain, fcport->d_id.b.area,
  3153. fcport->d_id.b.al_pa, mb, BIT_0);
  3154. if (mb[0] == MBS_PORT_ID_USED) {
  3155. /*
  3156. * Device has another loop ID. The firmware team
  3157. * recommends the driver perform an implicit login with
  3158. * the specified ID again. The ID we just used is save
  3159. * here so we return with an ID that can be tried by
  3160. * the next login.
  3161. */
  3162. retry++;
  3163. tmp_loopid = fcport->loop_id;
  3164. fcport->loop_id = mb[1];
  3165. DEBUG(printk("Fabric Login: port in use - next "
  3166. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3167. fcport->loop_id, fcport->d_id.b.domain,
  3168. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3169. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3170. /*
  3171. * Login succeeded.
  3172. */
  3173. if (retry) {
  3174. /* A retry occurred before. */
  3175. *next_loopid = tmp_loopid;
  3176. } else {
  3177. /*
  3178. * No retry occurred before. Just increment the
  3179. * ID value for next login.
  3180. */
  3181. *next_loopid = (fcport->loop_id + 1);
  3182. }
  3183. if (mb[1] & BIT_0) {
  3184. fcport->port_type = FCT_INITIATOR;
  3185. } else {
  3186. fcport->port_type = FCT_TARGET;
  3187. if (mb[1] & BIT_1) {
  3188. fcport->flags |= FCF_FCP2_DEVICE;
  3189. }
  3190. }
  3191. if (mb[10] & BIT_0)
  3192. fcport->supported_classes |= FC_COS_CLASS2;
  3193. if (mb[10] & BIT_1)
  3194. fcport->supported_classes |= FC_COS_CLASS3;
  3195. rval = QLA_SUCCESS;
  3196. break;
  3197. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3198. /*
  3199. * Loop ID already used, try next loop ID.
  3200. */
  3201. fcport->loop_id++;
  3202. rval = qla2x00_find_new_loop_id(vha, fcport);
  3203. if (rval != QLA_SUCCESS) {
  3204. /* Ran out of loop IDs to use */
  3205. break;
  3206. }
  3207. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3208. /*
  3209. * Firmware possibly timed out during login. If NO
  3210. * retries are left to do then the device is declared
  3211. * dead.
  3212. */
  3213. *next_loopid = fcport->loop_id;
  3214. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3215. fcport->d_id.b.domain, fcport->d_id.b.area,
  3216. fcport->d_id.b.al_pa);
  3217. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3218. rval = 1;
  3219. break;
  3220. } else {
  3221. /*
  3222. * unrecoverable / not handled error
  3223. */
  3224. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3225. "loop_id=%x jiffies=%lx.\n",
  3226. __func__, vha->host_no, mb[0],
  3227. fcport->d_id.b.domain, fcport->d_id.b.area,
  3228. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3229. *next_loopid = fcport->loop_id;
  3230. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3231. fcport->d_id.b.domain, fcport->d_id.b.area,
  3232. fcport->d_id.b.al_pa);
  3233. fcport->loop_id = FC_NO_LOOP_ID;
  3234. fcport->login_retry = 0;
  3235. rval = 3;
  3236. break;
  3237. }
  3238. }
  3239. return (rval);
  3240. }
  3241. /*
  3242. * qla2x00_local_device_login
  3243. * Issue local device login command.
  3244. *
  3245. * Input:
  3246. * ha = adapter block pointer.
  3247. * loop_id = loop id of device to login to.
  3248. *
  3249. * Returns (Where's the #define!!!!):
  3250. * 0 - Login successfully
  3251. * 1 - Login failed
  3252. * 3 - Fatal error
  3253. */
  3254. int
  3255. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3256. {
  3257. int rval;
  3258. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3259. memset(mb, 0, sizeof(mb));
  3260. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3261. if (rval == QLA_SUCCESS) {
  3262. /* Interrogate mailbox registers for any errors */
  3263. if (mb[0] == MBS_COMMAND_ERROR)
  3264. rval = 1;
  3265. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3266. /* device not in PCB table */
  3267. rval = 3;
  3268. }
  3269. return (rval);
  3270. }
  3271. /*
  3272. * qla2x00_loop_resync
  3273. * Resync with fibre channel devices.
  3274. *
  3275. * Input:
  3276. * ha = adapter block pointer.
  3277. *
  3278. * Returns:
  3279. * 0 = success
  3280. */
  3281. int
  3282. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3283. {
  3284. int rval = QLA_SUCCESS;
  3285. uint32_t wait_time;
  3286. struct req_que *req;
  3287. struct rsp_que *rsp;
  3288. if (vha->hw->flags.cpu_affinity_enabled)
  3289. req = vha->hw->req_q_map[0];
  3290. else
  3291. req = vha->req;
  3292. rsp = req->rsp;
  3293. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3294. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3295. if (vha->flags.online) {
  3296. if (!(rval = qla2x00_fw_ready(vha))) {
  3297. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3298. wait_time = 256;
  3299. do {
  3300. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3301. /* Issue a marker after FW becomes ready. */
  3302. qla2x00_marker(vha, req, rsp, 0, 0,
  3303. MK_SYNC_ALL);
  3304. vha->marker_needed = 0;
  3305. /* Remap devices on Loop. */
  3306. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3307. qla2x00_configure_loop(vha);
  3308. wait_time--;
  3309. } while (!atomic_read(&vha->loop_down_timer) &&
  3310. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3311. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3312. &vha->dpc_flags)));
  3313. }
  3314. }
  3315. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3316. return (QLA_FUNCTION_FAILED);
  3317. if (rval)
  3318. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3319. return (rval);
  3320. }
  3321. /*
  3322. * qla2x00_perform_loop_resync
  3323. * Description: This function will set the appropriate flags and call
  3324. * qla2x00_loop_resync. If successful loop will be resynced
  3325. * Arguments : scsi_qla_host_t pointer
  3326. * returm : Success or Failure
  3327. */
  3328. int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
  3329. {
  3330. int32_t rval = 0;
  3331. if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
  3332. /*Configure the flags so that resync happens properly*/
  3333. atomic_set(&ha->loop_down_timer, 0);
  3334. if (!(ha->device_flags & DFLG_NO_CABLE)) {
  3335. atomic_set(&ha->loop_state, LOOP_UP);
  3336. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3337. set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
  3338. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3339. rval = qla2x00_loop_resync(ha);
  3340. } else
  3341. atomic_set(&ha->loop_state, LOOP_DEAD);
  3342. clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
  3343. }
  3344. return rval;
  3345. }
  3346. void
  3347. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3348. {
  3349. fc_port_t *fcport;
  3350. struct scsi_qla_host *vha;
  3351. struct qla_hw_data *ha = base_vha->hw;
  3352. unsigned long flags;
  3353. spin_lock_irqsave(&ha->vport_slock, flags);
  3354. /* Go with deferred removal of rport references. */
  3355. list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
  3356. atomic_inc(&vha->vref_count);
  3357. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3358. if (fcport->drport &&
  3359. atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
  3360. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3361. qla2x00_rport_del(fcport);
  3362. spin_lock_irqsave(&ha->vport_slock, flags);
  3363. }
  3364. }
  3365. atomic_dec(&vha->vref_count);
  3366. }
  3367. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3368. }
  3369. /*
  3370. * qla82xx_quiescent_state_cleanup
  3371. * Description: This function will block the new I/Os
  3372. * Its not aborting any I/Os as context
  3373. * is not destroyed during quiescence
  3374. * Arguments: scsi_qla_host_t
  3375. * return : void
  3376. */
  3377. void
  3378. qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
  3379. {
  3380. struct qla_hw_data *ha = vha->hw;
  3381. struct scsi_qla_host *vp;
  3382. qla_printk(KERN_INFO, ha,
  3383. "Performing ISP error recovery - ha= %p.\n", ha);
  3384. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  3385. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3386. atomic_set(&vha->loop_state, LOOP_DOWN);
  3387. qla2x00_mark_all_devices_lost(vha, 0);
  3388. list_for_each_entry(vp, &ha->vp_list, list)
  3389. qla2x00_mark_all_devices_lost(vha, 0);
  3390. } else {
  3391. if (!atomic_read(&vha->loop_down_timer))
  3392. atomic_set(&vha->loop_down_timer,
  3393. LOOP_DOWN_TIME);
  3394. }
  3395. /* Wait for pending cmds to complete */
  3396. qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
  3397. }
  3398. void
  3399. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3400. {
  3401. struct qla_hw_data *ha = vha->hw;
  3402. struct scsi_qla_host *vp;
  3403. unsigned long flags;
  3404. fc_port_t *fcport;
  3405. /* For ISP82XX, driver waits for completion of the commands.
  3406. * online flag should be set.
  3407. */
  3408. if (!IS_QLA82XX(ha))
  3409. vha->flags.online = 0;
  3410. ha->flags.chip_reset_done = 0;
  3411. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3412. ha->qla_stats.total_isp_aborts++;
  3413. qla_printk(KERN_INFO, ha,
  3414. "Performing ISP error recovery - ha= %p.\n", ha);
  3415. /* For ISP82XX, reset_chip is just disabling interrupts.
  3416. * Driver waits for the completion of the commands.
  3417. * the interrupts need to be enabled.
  3418. */
  3419. if (!IS_QLA82XX(ha))
  3420. ha->isp_ops->reset_chip(vha);
  3421. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3422. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3423. atomic_set(&vha->loop_state, LOOP_DOWN);
  3424. qla2x00_mark_all_devices_lost(vha, 0);
  3425. spin_lock_irqsave(&ha->vport_slock, flags);
  3426. list_for_each_entry(vp, &ha->vp_list, list) {
  3427. atomic_inc(&vp->vref_count);
  3428. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3429. qla2x00_mark_all_devices_lost(vp, 0);
  3430. spin_lock_irqsave(&ha->vport_slock, flags);
  3431. atomic_dec(&vp->vref_count);
  3432. }
  3433. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3434. } else {
  3435. if (!atomic_read(&vha->loop_down_timer))
  3436. atomic_set(&vha->loop_down_timer,
  3437. LOOP_DOWN_TIME);
  3438. }
  3439. /* Clear all async request states across all VPs. */
  3440. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3441. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  3442. spin_lock_irqsave(&ha->vport_slock, flags);
  3443. list_for_each_entry(vp, &ha->vp_list, list) {
  3444. atomic_inc(&vp->vref_count);
  3445. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3446. list_for_each_entry(fcport, &vp->vp_fcports, list)
  3447. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  3448. spin_lock_irqsave(&ha->vport_slock, flags);
  3449. atomic_dec(&vp->vref_count);
  3450. }
  3451. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3452. if (!ha->flags.eeh_busy) {
  3453. /* Make sure for ISP 82XX IO DMA is complete */
  3454. if (IS_QLA82XX(ha)) {
  3455. qla82xx_chip_reset_cleanup(vha);
  3456. /* Done waiting for pending commands.
  3457. * Reset the online flag.
  3458. */
  3459. vha->flags.online = 0;
  3460. }
  3461. /* Requeue all commands in outstanding command list. */
  3462. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3463. }
  3464. }
  3465. /*
  3466. * qla2x00_abort_isp
  3467. * Resets ISP and aborts all outstanding commands.
  3468. *
  3469. * Input:
  3470. * ha = adapter block pointer.
  3471. *
  3472. * Returns:
  3473. * 0 = success
  3474. */
  3475. int
  3476. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3477. {
  3478. int rval;
  3479. uint8_t status = 0;
  3480. struct qla_hw_data *ha = vha->hw;
  3481. struct scsi_qla_host *vp;
  3482. struct req_que *req = ha->req_q_map[0];
  3483. unsigned long flags;
  3484. if (vha->flags.online) {
  3485. qla2x00_abort_isp_cleanup(vha);
  3486. if (unlikely(pci_channel_offline(ha->pdev) &&
  3487. ha->flags.pci_channel_io_perm_failure)) {
  3488. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3489. status = 0;
  3490. return status;
  3491. }
  3492. ha->isp_ops->get_flash_version(vha, req->ring);
  3493. ha->isp_ops->nvram_config(vha);
  3494. if (!qla2x00_restart_isp(vha)) {
  3495. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3496. if (!atomic_read(&vha->loop_down_timer)) {
  3497. /*
  3498. * Issue marker command only when we are going
  3499. * to start the I/O .
  3500. */
  3501. vha->marker_needed = 1;
  3502. }
  3503. vha->flags.online = 1;
  3504. ha->isp_ops->enable_intrs(ha);
  3505. ha->isp_abort_cnt = 0;
  3506. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3507. if (IS_QLA81XX(ha))
  3508. qla2x00_get_fw_version(vha,
  3509. &ha->fw_major_version,
  3510. &ha->fw_minor_version,
  3511. &ha->fw_subminor_version,
  3512. &ha->fw_attributes, &ha->fw_memory_size,
  3513. ha->mpi_version, &ha->mpi_capabilities,
  3514. ha->phy_version);
  3515. if (ha->fce) {
  3516. ha->flags.fce_enabled = 1;
  3517. memset(ha->fce, 0,
  3518. fce_calc_size(ha->fce_bufs));
  3519. rval = qla2x00_enable_fce_trace(vha,
  3520. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3521. &ha->fce_bufs);
  3522. if (rval) {
  3523. qla_printk(KERN_WARNING, ha,
  3524. "Unable to reinitialize FCE "
  3525. "(%d).\n", rval);
  3526. ha->flags.fce_enabled = 0;
  3527. }
  3528. }
  3529. if (ha->eft) {
  3530. memset(ha->eft, 0, EFT_SIZE);
  3531. rval = qla2x00_enable_eft_trace(vha,
  3532. ha->eft_dma, EFT_NUM_BUFFERS);
  3533. if (rval) {
  3534. qla_printk(KERN_WARNING, ha,
  3535. "Unable to reinitialize EFT "
  3536. "(%d).\n", rval);
  3537. }
  3538. }
  3539. } else { /* failed the ISP abort */
  3540. vha->flags.online = 1;
  3541. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3542. if (ha->isp_abort_cnt == 0) {
  3543. qla_printk(KERN_WARNING, ha,
  3544. "ISP error recovery failed - "
  3545. "board disabled\n");
  3546. /*
  3547. * The next call disables the board
  3548. * completely.
  3549. */
  3550. ha->isp_ops->reset_adapter(vha);
  3551. vha->flags.online = 0;
  3552. clear_bit(ISP_ABORT_RETRY,
  3553. &vha->dpc_flags);
  3554. status = 0;
  3555. } else { /* schedule another ISP abort */
  3556. ha->isp_abort_cnt--;
  3557. DEBUG(printk("qla%ld: ISP abort - "
  3558. "retry remaining %d\n",
  3559. vha->host_no, ha->isp_abort_cnt));
  3560. status = 1;
  3561. }
  3562. } else {
  3563. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3564. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3565. "- retrying (%d) more times\n",
  3566. vha->host_no, ha->isp_abort_cnt));
  3567. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3568. status = 1;
  3569. }
  3570. }
  3571. }
  3572. if (!status) {
  3573. DEBUG(printk(KERN_INFO
  3574. "qla2x00_abort_isp(%ld): succeeded.\n",
  3575. vha->host_no));
  3576. spin_lock_irqsave(&ha->vport_slock, flags);
  3577. list_for_each_entry(vp, &ha->vp_list, list) {
  3578. if (vp->vp_idx) {
  3579. atomic_inc(&vp->vref_count);
  3580. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3581. qla2x00_vp_abort_isp(vp);
  3582. spin_lock_irqsave(&ha->vport_slock, flags);
  3583. atomic_dec(&vp->vref_count);
  3584. }
  3585. }
  3586. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3587. } else {
  3588. qla_printk(KERN_INFO, ha,
  3589. "qla2x00_abort_isp: **** FAILED ****\n");
  3590. }
  3591. return(status);
  3592. }
  3593. /*
  3594. * qla2x00_restart_isp
  3595. * restarts the ISP after a reset
  3596. *
  3597. * Input:
  3598. * ha = adapter block pointer.
  3599. *
  3600. * Returns:
  3601. * 0 = success
  3602. */
  3603. static int
  3604. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3605. {
  3606. int status = 0;
  3607. uint32_t wait_time;
  3608. struct qla_hw_data *ha = vha->hw;
  3609. struct req_que *req = ha->req_q_map[0];
  3610. struct rsp_que *rsp = ha->rsp_q_map[0];
  3611. /* If firmware needs to be loaded */
  3612. if (qla2x00_isp_firmware(vha)) {
  3613. vha->flags.online = 0;
  3614. status = ha->isp_ops->chip_diag(vha);
  3615. if (!status)
  3616. status = qla2x00_setup_chip(vha);
  3617. }
  3618. if (!status && !(status = qla2x00_init_rings(vha))) {
  3619. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3620. ha->flags.chip_reset_done = 1;
  3621. /* Initialize the queues in use */
  3622. qla25xx_init_queues(ha);
  3623. status = qla2x00_fw_ready(vha);
  3624. if (!status) {
  3625. DEBUG(printk("%s(): Start configure loop, "
  3626. "status = %d\n", __func__, status));
  3627. /* Issue a marker after FW becomes ready. */
  3628. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3629. vha->flags.online = 1;
  3630. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3631. wait_time = 256;
  3632. do {
  3633. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3634. qla2x00_configure_loop(vha);
  3635. wait_time--;
  3636. } while (!atomic_read(&vha->loop_down_timer) &&
  3637. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3638. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3639. &vha->dpc_flags)));
  3640. }
  3641. /* if no cable then assume it's good */
  3642. if ((vha->device_flags & DFLG_NO_CABLE))
  3643. status = 0;
  3644. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3645. __func__,
  3646. status));
  3647. }
  3648. return (status);
  3649. }
  3650. static int
  3651. qla25xx_init_queues(struct qla_hw_data *ha)
  3652. {
  3653. struct rsp_que *rsp = NULL;
  3654. struct req_que *req = NULL;
  3655. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3656. int ret = -1;
  3657. int i;
  3658. for (i = 1; i < ha->max_rsp_queues; i++) {
  3659. rsp = ha->rsp_q_map[i];
  3660. if (rsp) {
  3661. rsp->options &= ~BIT_0;
  3662. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3663. if (ret != QLA_SUCCESS)
  3664. DEBUG2_17(printk(KERN_WARNING
  3665. "%s Rsp que:%d init failed\n", __func__,
  3666. rsp->id));
  3667. else
  3668. DEBUG2_17(printk(KERN_INFO
  3669. "%s Rsp que:%d inited\n", __func__,
  3670. rsp->id));
  3671. }
  3672. }
  3673. for (i = 1; i < ha->max_req_queues; i++) {
  3674. req = ha->req_q_map[i];
  3675. if (req) {
  3676. /* Clear outstanding commands array. */
  3677. req->options &= ~BIT_0;
  3678. ret = qla25xx_init_req_que(base_vha, req);
  3679. if (ret != QLA_SUCCESS)
  3680. DEBUG2_17(printk(KERN_WARNING
  3681. "%s Req que:%d init failed\n", __func__,
  3682. req->id));
  3683. else
  3684. DEBUG2_17(printk(KERN_WARNING
  3685. "%s Req que:%d inited\n", __func__,
  3686. req->id));
  3687. }
  3688. }
  3689. return ret;
  3690. }
  3691. /*
  3692. * qla2x00_reset_adapter
  3693. * Reset adapter.
  3694. *
  3695. * Input:
  3696. * ha = adapter block pointer.
  3697. */
  3698. void
  3699. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3700. {
  3701. unsigned long flags = 0;
  3702. struct qla_hw_data *ha = vha->hw;
  3703. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3704. vha->flags.online = 0;
  3705. ha->isp_ops->disable_intrs(ha);
  3706. spin_lock_irqsave(&ha->hardware_lock, flags);
  3707. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3708. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3709. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3710. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3711. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3712. }
  3713. void
  3714. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3715. {
  3716. unsigned long flags = 0;
  3717. struct qla_hw_data *ha = vha->hw;
  3718. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3719. if (IS_QLA82XX(ha))
  3720. return;
  3721. vha->flags.online = 0;
  3722. ha->isp_ops->disable_intrs(ha);
  3723. spin_lock_irqsave(&ha->hardware_lock, flags);
  3724. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3725. RD_REG_DWORD(&reg->hccr);
  3726. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3727. RD_REG_DWORD(&reg->hccr);
  3728. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3729. if (IS_NOPOLLING_TYPE(ha))
  3730. ha->isp_ops->enable_intrs(ha);
  3731. }
  3732. /* On sparc systems, obtain port and node WWN from firmware
  3733. * properties.
  3734. */
  3735. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3736. struct nvram_24xx *nv)
  3737. {
  3738. #ifdef CONFIG_SPARC
  3739. struct qla_hw_data *ha = vha->hw;
  3740. struct pci_dev *pdev = ha->pdev;
  3741. struct device_node *dp = pci_device_to_OF_node(pdev);
  3742. const u8 *val;
  3743. int len;
  3744. val = of_get_property(dp, "port-wwn", &len);
  3745. if (val && len >= WWN_SIZE)
  3746. memcpy(nv->port_name, val, WWN_SIZE);
  3747. val = of_get_property(dp, "node-wwn", &len);
  3748. if (val && len >= WWN_SIZE)
  3749. memcpy(nv->node_name, val, WWN_SIZE);
  3750. #endif
  3751. }
  3752. int
  3753. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3754. {
  3755. int rval;
  3756. struct init_cb_24xx *icb;
  3757. struct nvram_24xx *nv;
  3758. uint32_t *dptr;
  3759. uint8_t *dptr1, *dptr2;
  3760. uint32_t chksum;
  3761. uint16_t cnt;
  3762. struct qla_hw_data *ha = vha->hw;
  3763. rval = QLA_SUCCESS;
  3764. icb = (struct init_cb_24xx *)ha->init_cb;
  3765. nv = ha->nvram;
  3766. /* Determine NVRAM starting address. */
  3767. if (ha->flags.port0) {
  3768. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3769. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3770. } else {
  3771. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3772. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3773. }
  3774. ha->nvram_size = sizeof(struct nvram_24xx);
  3775. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3776. if (IS_QLA82XX(ha))
  3777. ha->vpd_size = FA_VPD_SIZE_82XX;
  3778. /* Get VPD data into cache */
  3779. ha->vpd = ha->nvram + VPD_OFFSET;
  3780. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3781. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3782. /* Get NVRAM data into cache and calculate checksum. */
  3783. dptr = (uint32_t *)nv;
  3784. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3785. ha->nvram_size);
  3786. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3787. chksum += le32_to_cpu(*dptr++);
  3788. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3789. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3790. /* Bad NVRAM data, set defaults parameters. */
  3791. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3792. || nv->id[3] != ' ' ||
  3793. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3794. /* Reset NVRAM data. */
  3795. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3796. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3797. le16_to_cpu(nv->nvram_version));
  3798. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3799. "invalid -- WWPN) defaults.\n");
  3800. /*
  3801. * Set default initialization control block.
  3802. */
  3803. memset(nv, 0, ha->nvram_size);
  3804. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3805. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3806. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3807. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3808. nv->exchange_count = __constant_cpu_to_le16(0);
  3809. nv->hard_address = __constant_cpu_to_le16(124);
  3810. nv->port_name[0] = 0x21;
  3811. nv->port_name[1] = 0x00 + ha->port_no;
  3812. nv->port_name[2] = 0x00;
  3813. nv->port_name[3] = 0xe0;
  3814. nv->port_name[4] = 0x8b;
  3815. nv->port_name[5] = 0x1c;
  3816. nv->port_name[6] = 0x55;
  3817. nv->port_name[7] = 0x86;
  3818. nv->node_name[0] = 0x20;
  3819. nv->node_name[1] = 0x00;
  3820. nv->node_name[2] = 0x00;
  3821. nv->node_name[3] = 0xe0;
  3822. nv->node_name[4] = 0x8b;
  3823. nv->node_name[5] = 0x1c;
  3824. nv->node_name[6] = 0x55;
  3825. nv->node_name[7] = 0x86;
  3826. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3827. nv->login_retry_count = __constant_cpu_to_le16(8);
  3828. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3829. nv->login_timeout = __constant_cpu_to_le16(0);
  3830. nv->firmware_options_1 =
  3831. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3832. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3833. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3834. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3835. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3836. nv->efi_parameters = __constant_cpu_to_le32(0);
  3837. nv->reset_delay = 5;
  3838. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3839. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3840. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3841. rval = 1;
  3842. }
  3843. /* Reset Initialization control block */
  3844. memset(icb, 0, ha->init_cb_size);
  3845. /* Copy 1st segment. */
  3846. dptr1 = (uint8_t *)icb;
  3847. dptr2 = (uint8_t *)&nv->version;
  3848. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3849. while (cnt--)
  3850. *dptr1++ = *dptr2++;
  3851. icb->login_retry_count = nv->login_retry_count;
  3852. icb->link_down_on_nos = nv->link_down_on_nos;
  3853. /* Copy 2nd segment. */
  3854. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3855. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3856. cnt = (uint8_t *)&icb->reserved_3 -
  3857. (uint8_t *)&icb->interrupt_delay_timer;
  3858. while (cnt--)
  3859. *dptr1++ = *dptr2++;
  3860. /*
  3861. * Setup driver NVRAM options.
  3862. */
  3863. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3864. "QLA2462");
  3865. /* Use alternate WWN? */
  3866. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3867. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3868. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3869. }
  3870. /* Prepare nodename */
  3871. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3872. /*
  3873. * Firmware will apply the following mask if the nodename was
  3874. * not provided.
  3875. */
  3876. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3877. icb->node_name[0] &= 0xF0;
  3878. }
  3879. /* Set host adapter parameters. */
  3880. ha->flags.disable_risc_code_load = 0;
  3881. ha->flags.enable_lip_reset = 0;
  3882. ha->flags.enable_lip_full_login =
  3883. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3884. ha->flags.enable_target_reset =
  3885. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3886. ha->flags.enable_led_scheme = 0;
  3887. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3888. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3889. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3890. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3891. sizeof(ha->fw_seriallink_options24));
  3892. /* save HBA serial number */
  3893. ha->serial0 = icb->port_name[5];
  3894. ha->serial1 = icb->port_name[6];
  3895. ha->serial2 = icb->port_name[7];
  3896. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3897. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3898. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3899. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3900. /* Set minimum login_timeout to 4 seconds. */
  3901. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3902. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3903. if (le16_to_cpu(nv->login_timeout) < 4)
  3904. nv->login_timeout = __constant_cpu_to_le16(4);
  3905. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3906. icb->login_timeout = nv->login_timeout;
  3907. /* Set minimum RATOV to 100 tenths of a second. */
  3908. ha->r_a_tov = 100;
  3909. ha->loop_reset_delay = nv->reset_delay;
  3910. /* Link Down Timeout = 0:
  3911. *
  3912. * When Port Down timer expires we will start returning
  3913. * I/O's to OS with "DID_NO_CONNECT".
  3914. *
  3915. * Link Down Timeout != 0:
  3916. *
  3917. * The driver waits for the link to come up after link down
  3918. * before returning I/Os to OS with "DID_NO_CONNECT".
  3919. */
  3920. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3921. ha->loop_down_abort_time =
  3922. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3923. } else {
  3924. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3925. ha->loop_down_abort_time =
  3926. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3927. }
  3928. /* Need enough time to try and get the port back. */
  3929. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3930. if (qlport_down_retry)
  3931. ha->port_down_retry_count = qlport_down_retry;
  3932. /* Set login_retry_count */
  3933. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3934. if (ha->port_down_retry_count ==
  3935. le16_to_cpu(nv->port_down_retry_count) &&
  3936. ha->port_down_retry_count > 3)
  3937. ha->login_retry_count = ha->port_down_retry_count;
  3938. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3939. ha->login_retry_count = ha->port_down_retry_count;
  3940. if (ql2xloginretrycount)
  3941. ha->login_retry_count = ql2xloginretrycount;
  3942. /* Enable ZIO. */
  3943. if (!vha->flags.init_done) {
  3944. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3945. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3946. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3947. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3948. }
  3949. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3950. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3951. vha->flags.process_response_queue = 0;
  3952. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3953. ha->zio_mode = QLA_ZIO_MODE_6;
  3954. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3955. "(%d us).\n", vha->host_no, ha->zio_mode,
  3956. ha->zio_timer * 100));
  3957. qla_printk(KERN_INFO, ha,
  3958. "ZIO mode %d enabled; timer delay (%d us).\n",
  3959. ha->zio_mode, ha->zio_timer * 100);
  3960. icb->firmware_options_2 |= cpu_to_le32(
  3961. (uint32_t)ha->zio_mode);
  3962. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3963. vha->flags.process_response_queue = 1;
  3964. }
  3965. if (rval) {
  3966. DEBUG2_3(printk(KERN_WARNING
  3967. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3968. }
  3969. return (rval);
  3970. }
  3971. static int
  3972. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3973. uint32_t faddr)
  3974. {
  3975. int rval = QLA_SUCCESS;
  3976. int segments, fragment;
  3977. uint32_t *dcode, dlen;
  3978. uint32_t risc_addr;
  3979. uint32_t risc_size;
  3980. uint32_t i;
  3981. struct qla_hw_data *ha = vha->hw;
  3982. struct req_que *req = ha->req_q_map[0];
  3983. qla_printk(KERN_INFO, ha,
  3984. "FW: Loading from flash (%x)...\n", faddr);
  3985. rval = QLA_SUCCESS;
  3986. segments = FA_RISC_CODE_SEGMENTS;
  3987. dcode = (uint32_t *)req->ring;
  3988. *srisc_addr = 0;
  3989. /* Validate firmware image by checking version. */
  3990. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3991. for (i = 0; i < 4; i++)
  3992. dcode[i] = be32_to_cpu(dcode[i]);
  3993. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3994. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3995. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3996. dcode[3] == 0)) {
  3997. qla_printk(KERN_WARNING, ha,
  3998. "Unable to verify integrity of flash firmware image!\n");
  3999. qla_printk(KERN_WARNING, ha,
  4000. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4001. dcode[1], dcode[2], dcode[3]);
  4002. return QLA_FUNCTION_FAILED;
  4003. }
  4004. while (segments && rval == QLA_SUCCESS) {
  4005. /* Read segment's load information. */
  4006. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  4007. risc_addr = be32_to_cpu(dcode[2]);
  4008. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4009. risc_size = be32_to_cpu(dcode[3]);
  4010. fragment = 0;
  4011. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4012. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4013. if (dlen > risc_size)
  4014. dlen = risc_size;
  4015. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4016. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  4017. vha->host_no, risc_addr, dlen, faddr));
  4018. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  4019. for (i = 0; i < dlen; i++)
  4020. dcode[i] = swab32(dcode[i]);
  4021. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4022. dlen);
  4023. if (rval) {
  4024. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4025. "segment %d of firmware\n", vha->host_no,
  4026. fragment));
  4027. qla_printk(KERN_WARNING, ha,
  4028. "[ERROR] Failed to load segment %d of "
  4029. "firmware\n", fragment);
  4030. break;
  4031. }
  4032. faddr += dlen;
  4033. risc_addr += dlen;
  4034. risc_size -= dlen;
  4035. fragment++;
  4036. }
  4037. /* Next segment. */
  4038. segments--;
  4039. }
  4040. return rval;
  4041. }
  4042. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  4043. int
  4044. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4045. {
  4046. int rval;
  4047. int i, fragment;
  4048. uint16_t *wcode, *fwcode;
  4049. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  4050. struct fw_blob *blob;
  4051. struct qla_hw_data *ha = vha->hw;
  4052. struct req_que *req = ha->req_q_map[0];
  4053. /* Load firmware blob. */
  4054. blob = qla2x00_request_firmware(vha);
  4055. if (!blob) {
  4056. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4057. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4058. "from: " QLA_FW_URL ".\n");
  4059. return QLA_FUNCTION_FAILED;
  4060. }
  4061. rval = QLA_SUCCESS;
  4062. wcode = (uint16_t *)req->ring;
  4063. *srisc_addr = 0;
  4064. fwcode = (uint16_t *)blob->fw->data;
  4065. fwclen = 0;
  4066. /* Validate firmware image by checking version. */
  4067. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  4068. qla_printk(KERN_WARNING, ha,
  4069. "Unable to verify integrity of firmware image (%Zd)!\n",
  4070. blob->fw->size);
  4071. goto fail_fw_integrity;
  4072. }
  4073. for (i = 0; i < 4; i++)
  4074. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  4075. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  4076. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  4077. wcode[2] == 0 && wcode[3] == 0)) {
  4078. qla_printk(KERN_WARNING, ha,
  4079. "Unable to verify integrity of firmware image!\n");
  4080. qla_printk(KERN_WARNING, ha,
  4081. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  4082. wcode[1], wcode[2], wcode[3]);
  4083. goto fail_fw_integrity;
  4084. }
  4085. seg = blob->segs;
  4086. while (*seg && rval == QLA_SUCCESS) {
  4087. risc_addr = *seg;
  4088. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  4089. risc_size = be16_to_cpu(fwcode[3]);
  4090. /* Validate firmware image size. */
  4091. fwclen += risc_size * sizeof(uint16_t);
  4092. if (blob->fw->size < fwclen) {
  4093. qla_printk(KERN_WARNING, ha,
  4094. "Unable to verify integrity of firmware image "
  4095. "(%Zd)!\n", blob->fw->size);
  4096. goto fail_fw_integrity;
  4097. }
  4098. fragment = 0;
  4099. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4100. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  4101. if (wlen > risc_size)
  4102. wlen = risc_size;
  4103. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4104. "addr %x, number of words 0x%x.\n", vha->host_no,
  4105. risc_addr, wlen));
  4106. for (i = 0; i < wlen; i++)
  4107. wcode[i] = swab16(fwcode[i]);
  4108. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4109. wlen);
  4110. if (rval) {
  4111. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4112. "segment %d of firmware\n", vha->host_no,
  4113. fragment));
  4114. qla_printk(KERN_WARNING, ha,
  4115. "[ERROR] Failed to load segment %d of "
  4116. "firmware\n", fragment);
  4117. break;
  4118. }
  4119. fwcode += wlen;
  4120. risc_addr += wlen;
  4121. risc_size -= wlen;
  4122. fragment++;
  4123. }
  4124. /* Next segment. */
  4125. seg++;
  4126. }
  4127. return rval;
  4128. fail_fw_integrity:
  4129. return QLA_FUNCTION_FAILED;
  4130. }
  4131. static int
  4132. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4133. {
  4134. int rval;
  4135. int segments, fragment;
  4136. uint32_t *dcode, dlen;
  4137. uint32_t risc_addr;
  4138. uint32_t risc_size;
  4139. uint32_t i;
  4140. struct fw_blob *blob;
  4141. uint32_t *fwcode, fwclen;
  4142. struct qla_hw_data *ha = vha->hw;
  4143. struct req_que *req = ha->req_q_map[0];
  4144. /* Load firmware blob. */
  4145. blob = qla2x00_request_firmware(vha);
  4146. if (!blob) {
  4147. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4148. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4149. "from: " QLA_FW_URL ".\n");
  4150. return QLA_FUNCTION_FAILED;
  4151. }
  4152. qla_printk(KERN_INFO, ha,
  4153. "FW: Loading via request-firmware...\n");
  4154. rval = QLA_SUCCESS;
  4155. segments = FA_RISC_CODE_SEGMENTS;
  4156. dcode = (uint32_t *)req->ring;
  4157. *srisc_addr = 0;
  4158. fwcode = (uint32_t *)blob->fw->data;
  4159. fwclen = 0;
  4160. /* Validate firmware image by checking version. */
  4161. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4162. qla_printk(KERN_WARNING, ha,
  4163. "Unable to verify integrity of firmware image (%Zd)!\n",
  4164. blob->fw->size);
  4165. goto fail_fw_integrity;
  4166. }
  4167. for (i = 0; i < 4; i++)
  4168. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4169. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4170. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4171. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4172. dcode[3] == 0)) {
  4173. qla_printk(KERN_WARNING, ha,
  4174. "Unable to verify integrity of firmware image!\n");
  4175. qla_printk(KERN_WARNING, ha,
  4176. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4177. dcode[1], dcode[2], dcode[3]);
  4178. goto fail_fw_integrity;
  4179. }
  4180. while (segments && rval == QLA_SUCCESS) {
  4181. risc_addr = be32_to_cpu(fwcode[2]);
  4182. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4183. risc_size = be32_to_cpu(fwcode[3]);
  4184. /* Validate firmware image size. */
  4185. fwclen += risc_size * sizeof(uint32_t);
  4186. if (blob->fw->size < fwclen) {
  4187. qla_printk(KERN_WARNING, ha,
  4188. "Unable to verify integrity of firmware image "
  4189. "(%Zd)!\n", blob->fw->size);
  4190. goto fail_fw_integrity;
  4191. }
  4192. fragment = 0;
  4193. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4194. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4195. if (dlen > risc_size)
  4196. dlen = risc_size;
  4197. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4198. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4199. risc_addr, dlen));
  4200. for (i = 0; i < dlen; i++)
  4201. dcode[i] = swab32(fwcode[i]);
  4202. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4203. dlen);
  4204. if (rval) {
  4205. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4206. "segment %d of firmware\n", vha->host_no,
  4207. fragment));
  4208. qla_printk(KERN_WARNING, ha,
  4209. "[ERROR] Failed to load segment %d of "
  4210. "firmware\n", fragment);
  4211. break;
  4212. }
  4213. fwcode += dlen;
  4214. risc_addr += dlen;
  4215. risc_size -= dlen;
  4216. fragment++;
  4217. }
  4218. /* Next segment. */
  4219. segments--;
  4220. }
  4221. return rval;
  4222. fail_fw_integrity:
  4223. return QLA_FUNCTION_FAILED;
  4224. }
  4225. int
  4226. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4227. {
  4228. int rval;
  4229. if (ql2xfwloadbin == 1)
  4230. return qla81xx_load_risc(vha, srisc_addr);
  4231. /*
  4232. * FW Load priority:
  4233. * 1) Firmware via request-firmware interface (.bin file).
  4234. * 2) Firmware residing in flash.
  4235. */
  4236. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4237. if (rval == QLA_SUCCESS)
  4238. return rval;
  4239. return qla24xx_load_risc_flash(vha, srisc_addr,
  4240. vha->hw->flt_region_fw);
  4241. }
  4242. int
  4243. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4244. {
  4245. int rval;
  4246. struct qla_hw_data *ha = vha->hw;
  4247. if (ql2xfwloadbin == 2)
  4248. goto try_blob_fw;
  4249. /*
  4250. * FW Load priority:
  4251. * 1) Firmware residing in flash.
  4252. * 2) Firmware via request-firmware interface (.bin file).
  4253. * 3) Golden-Firmware residing in flash -- limited operation.
  4254. */
  4255. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4256. if (rval == QLA_SUCCESS)
  4257. return rval;
  4258. try_blob_fw:
  4259. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4260. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4261. return rval;
  4262. qla_printk(KERN_ERR, ha,
  4263. "FW: Attempting to fallback to golden firmware...\n");
  4264. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4265. if (rval != QLA_SUCCESS)
  4266. return rval;
  4267. qla_printk(KERN_ERR, ha,
  4268. "FW: Please update operational firmware...\n");
  4269. ha->flags.running_gold_fw = 1;
  4270. return rval;
  4271. }
  4272. void
  4273. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4274. {
  4275. int ret, retries;
  4276. struct qla_hw_data *ha = vha->hw;
  4277. if (ha->flags.pci_channel_io_perm_failure)
  4278. return;
  4279. if (!IS_FWI2_CAPABLE(ha))
  4280. return;
  4281. if (!ha->fw_major_version)
  4282. return;
  4283. ret = qla2x00_stop_firmware(vha);
  4284. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4285. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4286. ha->isp_ops->reset_chip(vha);
  4287. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4288. continue;
  4289. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4290. continue;
  4291. qla_printk(KERN_INFO, ha,
  4292. "Attempting retry of stop-firmware command...\n");
  4293. ret = qla2x00_stop_firmware(vha);
  4294. }
  4295. }
  4296. int
  4297. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4298. {
  4299. int rval = QLA_SUCCESS;
  4300. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4301. struct qla_hw_data *ha = vha->hw;
  4302. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4303. struct req_que *req;
  4304. struct rsp_que *rsp;
  4305. if (!vha->vp_idx)
  4306. return -EINVAL;
  4307. rval = qla2x00_fw_ready(base_vha);
  4308. if (ha->flags.cpu_affinity_enabled)
  4309. req = ha->req_q_map[0];
  4310. else
  4311. req = vha->req;
  4312. rsp = req->rsp;
  4313. if (rval == QLA_SUCCESS) {
  4314. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4315. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4316. }
  4317. vha->flags.management_server_logged_in = 0;
  4318. /* Login to SNS first */
  4319. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4320. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4321. DEBUG15(qla_printk(KERN_INFO, ha,
  4322. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4323. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4324. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4325. return (QLA_FUNCTION_FAILED);
  4326. }
  4327. atomic_set(&vha->loop_down_timer, 0);
  4328. atomic_set(&vha->loop_state, LOOP_UP);
  4329. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4330. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4331. rval = qla2x00_loop_resync(base_vha);
  4332. return rval;
  4333. }
  4334. /* 84XX Support **************************************************************/
  4335. static LIST_HEAD(qla_cs84xx_list);
  4336. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4337. static struct qla_chip_state_84xx *
  4338. qla84xx_get_chip(struct scsi_qla_host *vha)
  4339. {
  4340. struct qla_chip_state_84xx *cs84xx;
  4341. struct qla_hw_data *ha = vha->hw;
  4342. mutex_lock(&qla_cs84xx_mutex);
  4343. /* Find any shared 84xx chip. */
  4344. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4345. if (cs84xx->bus == ha->pdev->bus) {
  4346. kref_get(&cs84xx->kref);
  4347. goto done;
  4348. }
  4349. }
  4350. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4351. if (!cs84xx)
  4352. goto done;
  4353. kref_init(&cs84xx->kref);
  4354. spin_lock_init(&cs84xx->access_lock);
  4355. mutex_init(&cs84xx->fw_update_mutex);
  4356. cs84xx->bus = ha->pdev->bus;
  4357. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4358. done:
  4359. mutex_unlock(&qla_cs84xx_mutex);
  4360. return cs84xx;
  4361. }
  4362. static void
  4363. __qla84xx_chip_release(struct kref *kref)
  4364. {
  4365. struct qla_chip_state_84xx *cs84xx =
  4366. container_of(kref, struct qla_chip_state_84xx, kref);
  4367. mutex_lock(&qla_cs84xx_mutex);
  4368. list_del(&cs84xx->list);
  4369. mutex_unlock(&qla_cs84xx_mutex);
  4370. kfree(cs84xx);
  4371. }
  4372. void
  4373. qla84xx_put_chip(struct scsi_qla_host *vha)
  4374. {
  4375. struct qla_hw_data *ha = vha->hw;
  4376. if (ha->cs84xx)
  4377. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4378. }
  4379. static int
  4380. qla84xx_init_chip(scsi_qla_host_t *vha)
  4381. {
  4382. int rval;
  4383. uint16_t status[2];
  4384. struct qla_hw_data *ha = vha->hw;
  4385. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4386. rval = qla84xx_verify_chip(vha, status);
  4387. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4388. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4389. QLA_SUCCESS;
  4390. }
  4391. /* 81XX Support **************************************************************/
  4392. int
  4393. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4394. {
  4395. int rval;
  4396. struct init_cb_81xx *icb;
  4397. struct nvram_81xx *nv;
  4398. uint32_t *dptr;
  4399. uint8_t *dptr1, *dptr2;
  4400. uint32_t chksum;
  4401. uint16_t cnt;
  4402. struct qla_hw_data *ha = vha->hw;
  4403. rval = QLA_SUCCESS;
  4404. icb = (struct init_cb_81xx *)ha->init_cb;
  4405. nv = ha->nvram;
  4406. /* Determine NVRAM starting address. */
  4407. ha->nvram_size = sizeof(struct nvram_81xx);
  4408. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4409. /* Get VPD data into cache */
  4410. ha->vpd = ha->nvram + VPD_OFFSET;
  4411. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4412. ha->vpd_size);
  4413. /* Get NVRAM data into cache and calculate checksum. */
  4414. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4415. ha->nvram_size);
  4416. dptr = (uint32_t *)nv;
  4417. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4418. chksum += le32_to_cpu(*dptr++);
  4419. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4420. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4421. /* Bad NVRAM data, set defaults parameters. */
  4422. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4423. || nv->id[3] != ' ' ||
  4424. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4425. /* Reset NVRAM data. */
  4426. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4427. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4428. le16_to_cpu(nv->nvram_version));
  4429. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4430. "invalid -- WWPN) defaults.\n");
  4431. /*
  4432. * Set default initialization control block.
  4433. */
  4434. memset(nv, 0, ha->nvram_size);
  4435. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4436. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4437. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4438. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4439. nv->exchange_count = __constant_cpu_to_le16(0);
  4440. nv->port_name[0] = 0x21;
  4441. nv->port_name[1] = 0x00 + ha->port_no;
  4442. nv->port_name[2] = 0x00;
  4443. nv->port_name[3] = 0xe0;
  4444. nv->port_name[4] = 0x8b;
  4445. nv->port_name[5] = 0x1c;
  4446. nv->port_name[6] = 0x55;
  4447. nv->port_name[7] = 0x86;
  4448. nv->node_name[0] = 0x20;
  4449. nv->node_name[1] = 0x00;
  4450. nv->node_name[2] = 0x00;
  4451. nv->node_name[3] = 0xe0;
  4452. nv->node_name[4] = 0x8b;
  4453. nv->node_name[5] = 0x1c;
  4454. nv->node_name[6] = 0x55;
  4455. nv->node_name[7] = 0x86;
  4456. nv->login_retry_count = __constant_cpu_to_le16(8);
  4457. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4458. nv->login_timeout = __constant_cpu_to_le16(0);
  4459. nv->firmware_options_1 =
  4460. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4461. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4462. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4463. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4464. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4465. nv->efi_parameters = __constant_cpu_to_le32(0);
  4466. nv->reset_delay = 5;
  4467. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4468. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4469. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4470. nv->enode_mac[0] = 0x00;
  4471. nv->enode_mac[1] = 0x02;
  4472. nv->enode_mac[2] = 0x03;
  4473. nv->enode_mac[3] = 0x04;
  4474. nv->enode_mac[4] = 0x05;
  4475. nv->enode_mac[5] = 0x06 + ha->port_no;
  4476. rval = 1;
  4477. }
  4478. /* Reset Initialization control block */
  4479. memset(icb, 0, sizeof(struct init_cb_81xx));
  4480. /* Copy 1st segment. */
  4481. dptr1 = (uint8_t *)icb;
  4482. dptr2 = (uint8_t *)&nv->version;
  4483. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4484. while (cnt--)
  4485. *dptr1++ = *dptr2++;
  4486. icb->login_retry_count = nv->login_retry_count;
  4487. /* Copy 2nd segment. */
  4488. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4489. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4490. cnt = (uint8_t *)&icb->reserved_5 -
  4491. (uint8_t *)&icb->interrupt_delay_timer;
  4492. while (cnt--)
  4493. *dptr1++ = *dptr2++;
  4494. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4495. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4496. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4497. icb->enode_mac[0] = 0x01;
  4498. icb->enode_mac[1] = 0x02;
  4499. icb->enode_mac[2] = 0x03;
  4500. icb->enode_mac[3] = 0x04;
  4501. icb->enode_mac[4] = 0x05;
  4502. icb->enode_mac[5] = 0x06 + ha->port_no;
  4503. }
  4504. /* Use extended-initialization control block. */
  4505. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4506. /*
  4507. * Setup driver NVRAM options.
  4508. */
  4509. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4510. "QLE8XXX");
  4511. /* Use alternate WWN? */
  4512. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4513. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4514. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4515. }
  4516. /* Prepare nodename */
  4517. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4518. /*
  4519. * Firmware will apply the following mask if the nodename was
  4520. * not provided.
  4521. */
  4522. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4523. icb->node_name[0] &= 0xF0;
  4524. }
  4525. /* Set host adapter parameters. */
  4526. ha->flags.disable_risc_code_load = 0;
  4527. ha->flags.enable_lip_reset = 0;
  4528. ha->flags.enable_lip_full_login =
  4529. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4530. ha->flags.enable_target_reset =
  4531. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4532. ha->flags.enable_led_scheme = 0;
  4533. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4534. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4535. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4536. /* save HBA serial number */
  4537. ha->serial0 = icb->port_name[5];
  4538. ha->serial1 = icb->port_name[6];
  4539. ha->serial2 = icb->port_name[7];
  4540. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4541. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4542. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4543. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4544. /* Set minimum login_timeout to 4 seconds. */
  4545. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4546. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4547. if (le16_to_cpu(nv->login_timeout) < 4)
  4548. nv->login_timeout = __constant_cpu_to_le16(4);
  4549. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4550. icb->login_timeout = nv->login_timeout;
  4551. /* Set minimum RATOV to 100 tenths of a second. */
  4552. ha->r_a_tov = 100;
  4553. ha->loop_reset_delay = nv->reset_delay;
  4554. /* Link Down Timeout = 0:
  4555. *
  4556. * When Port Down timer expires we will start returning
  4557. * I/O's to OS with "DID_NO_CONNECT".
  4558. *
  4559. * Link Down Timeout != 0:
  4560. *
  4561. * The driver waits for the link to come up after link down
  4562. * before returning I/Os to OS with "DID_NO_CONNECT".
  4563. */
  4564. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4565. ha->loop_down_abort_time =
  4566. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4567. } else {
  4568. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4569. ha->loop_down_abort_time =
  4570. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4571. }
  4572. /* Need enough time to try and get the port back. */
  4573. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4574. if (qlport_down_retry)
  4575. ha->port_down_retry_count = qlport_down_retry;
  4576. /* Set login_retry_count */
  4577. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4578. if (ha->port_down_retry_count ==
  4579. le16_to_cpu(nv->port_down_retry_count) &&
  4580. ha->port_down_retry_count > 3)
  4581. ha->login_retry_count = ha->port_down_retry_count;
  4582. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4583. ha->login_retry_count = ha->port_down_retry_count;
  4584. if (ql2xloginretrycount)
  4585. ha->login_retry_count = ql2xloginretrycount;
  4586. /* Enable ZIO. */
  4587. if (!vha->flags.init_done) {
  4588. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4589. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4590. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4591. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4592. }
  4593. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4594. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4595. vha->flags.process_response_queue = 0;
  4596. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4597. ha->zio_mode = QLA_ZIO_MODE_6;
  4598. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4599. "(%d us).\n", vha->host_no, ha->zio_mode,
  4600. ha->zio_timer * 100));
  4601. qla_printk(KERN_INFO, ha,
  4602. "ZIO mode %d enabled; timer delay (%d us).\n",
  4603. ha->zio_mode, ha->zio_timer * 100);
  4604. icb->firmware_options_2 |= cpu_to_le32(
  4605. (uint32_t)ha->zio_mode);
  4606. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4607. vha->flags.process_response_queue = 1;
  4608. }
  4609. if (rval) {
  4610. DEBUG2_3(printk(KERN_WARNING
  4611. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4612. }
  4613. return (rval);
  4614. }
  4615. int
  4616. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4617. {
  4618. int status, rval;
  4619. uint32_t wait_time;
  4620. struct qla_hw_data *ha = vha->hw;
  4621. struct req_que *req = ha->req_q_map[0];
  4622. struct rsp_que *rsp = ha->rsp_q_map[0];
  4623. struct scsi_qla_host *vp;
  4624. unsigned long flags;
  4625. status = qla2x00_init_rings(vha);
  4626. if (!status) {
  4627. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4628. ha->flags.chip_reset_done = 1;
  4629. status = qla2x00_fw_ready(vha);
  4630. if (!status) {
  4631. qla_printk(KERN_INFO, ha,
  4632. "%s(): Start configure loop, "
  4633. "status = %d\n", __func__, status);
  4634. /* Issue a marker after FW becomes ready. */
  4635. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4636. vha->flags.online = 1;
  4637. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4638. wait_time = 256;
  4639. do {
  4640. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4641. qla2x00_configure_loop(vha);
  4642. wait_time--;
  4643. } while (!atomic_read(&vha->loop_down_timer) &&
  4644. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4645. wait_time &&
  4646. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4647. }
  4648. /* if no cable then assume it's good */
  4649. if ((vha->device_flags & DFLG_NO_CABLE))
  4650. status = 0;
  4651. qla_printk(KERN_INFO, ha,
  4652. "%s(): Configure loop done, status = 0x%x\n",
  4653. __func__, status);
  4654. }
  4655. if (!status) {
  4656. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4657. if (!atomic_read(&vha->loop_down_timer)) {
  4658. /*
  4659. * Issue marker command only when we are going
  4660. * to start the I/O .
  4661. */
  4662. vha->marker_needed = 1;
  4663. }
  4664. vha->flags.online = 1;
  4665. ha->isp_ops->enable_intrs(ha);
  4666. ha->isp_abort_cnt = 0;
  4667. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4668. if (ha->fce) {
  4669. ha->flags.fce_enabled = 1;
  4670. memset(ha->fce, 0,
  4671. fce_calc_size(ha->fce_bufs));
  4672. rval = qla2x00_enable_fce_trace(vha,
  4673. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4674. &ha->fce_bufs);
  4675. if (rval) {
  4676. qla_printk(KERN_WARNING, ha,
  4677. "Unable to reinitialize FCE "
  4678. "(%d).\n", rval);
  4679. ha->flags.fce_enabled = 0;
  4680. }
  4681. }
  4682. if (ha->eft) {
  4683. memset(ha->eft, 0, EFT_SIZE);
  4684. rval = qla2x00_enable_eft_trace(vha,
  4685. ha->eft_dma, EFT_NUM_BUFFERS);
  4686. if (rval) {
  4687. qla_printk(KERN_WARNING, ha,
  4688. "Unable to reinitialize EFT "
  4689. "(%d).\n", rval);
  4690. }
  4691. }
  4692. }
  4693. if (!status) {
  4694. DEBUG(printk(KERN_INFO
  4695. "qla82xx_restart_isp(%ld): succeeded.\n",
  4696. vha->host_no));
  4697. spin_lock_irqsave(&ha->vport_slock, flags);
  4698. list_for_each_entry(vp, &ha->vp_list, list) {
  4699. if (vp->vp_idx) {
  4700. atomic_inc(&vp->vref_count);
  4701. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4702. qla2x00_vp_abort_isp(vp);
  4703. spin_lock_irqsave(&ha->vport_slock, flags);
  4704. atomic_dec(&vp->vref_count);
  4705. }
  4706. }
  4707. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4708. } else {
  4709. qla_printk(KERN_INFO, ha,
  4710. "qla82xx_restart_isp: **** FAILED ****\n");
  4711. }
  4712. return status;
  4713. }
  4714. void
  4715. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4716. {
  4717. struct qla_hw_data *ha = vha->hw;
  4718. if (!ql2xetsenable)
  4719. return;
  4720. /* Enable ETS Burst. */
  4721. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4722. ha->fw_options[2] |= BIT_9;
  4723. qla2x00_set_fw_options(vha, ha->fw_options);
  4724. }
  4725. /*
  4726. * qla24xx_get_fcp_prio
  4727. * Gets the fcp cmd priority value for the logged in port.
  4728. * Looks for a match of the port descriptors within
  4729. * each of the fcp prio config entries. If a match is found,
  4730. * the tag (priority) value is returned.
  4731. *
  4732. * Input:
  4733. * vha = scsi host structure pointer.
  4734. * fcport = port structure pointer.
  4735. *
  4736. * Return:
  4737. * non-zero (if found)
  4738. * -1 (if not found)
  4739. *
  4740. * Context:
  4741. * Kernel context
  4742. */
  4743. static int
  4744. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4745. {
  4746. int i, entries;
  4747. uint8_t pid_match, wwn_match;
  4748. int priority;
  4749. uint32_t pid1, pid2;
  4750. uint64_t wwn1, wwn2;
  4751. struct qla_fcp_prio_entry *pri_entry;
  4752. struct qla_hw_data *ha = vha->hw;
  4753. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4754. return -1;
  4755. priority = -1;
  4756. entries = ha->fcp_prio_cfg->num_entries;
  4757. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4758. for (i = 0; i < entries; i++) {
  4759. pid_match = wwn_match = 0;
  4760. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4761. pri_entry++;
  4762. continue;
  4763. }
  4764. /* check source pid for a match */
  4765. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4766. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4767. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4768. if (pid1 == INVALID_PORT_ID)
  4769. pid_match++;
  4770. else if (pid1 == pid2)
  4771. pid_match++;
  4772. }
  4773. /* check destination pid for a match */
  4774. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4775. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4776. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4777. if (pid1 == INVALID_PORT_ID)
  4778. pid_match++;
  4779. else if (pid1 == pid2)
  4780. pid_match++;
  4781. }
  4782. /* check source WWN for a match */
  4783. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4784. wwn1 = wwn_to_u64(vha->port_name);
  4785. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4786. if (wwn2 == (uint64_t)-1)
  4787. wwn_match++;
  4788. else if (wwn1 == wwn2)
  4789. wwn_match++;
  4790. }
  4791. /* check destination WWN for a match */
  4792. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4793. wwn1 = wwn_to_u64(fcport->port_name);
  4794. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4795. if (wwn2 == (uint64_t)-1)
  4796. wwn_match++;
  4797. else if (wwn1 == wwn2)
  4798. wwn_match++;
  4799. }
  4800. if (pid_match == 2 || wwn_match == 2) {
  4801. /* Found a matching entry */
  4802. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4803. priority = pri_entry->tag;
  4804. break;
  4805. }
  4806. pri_entry++;
  4807. }
  4808. return priority;
  4809. }
  4810. /*
  4811. * qla24xx_update_fcport_fcp_prio
  4812. * Activates fcp priority for the logged in fc port
  4813. *
  4814. * Input:
  4815. * vha = scsi host structure pointer.
  4816. * fcp = port structure pointer.
  4817. *
  4818. * Return:
  4819. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4820. *
  4821. * Context:
  4822. * Kernel context.
  4823. */
  4824. int
  4825. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4826. {
  4827. int ret;
  4828. int priority;
  4829. uint16_t mb[5];
  4830. if (fcport->port_type != FCT_TARGET ||
  4831. fcport->loop_id == FC_NO_LOOP_ID)
  4832. return QLA_FUNCTION_FAILED;
  4833. priority = qla24xx_get_fcp_prio(vha, fcport);
  4834. if (priority < 0)
  4835. return QLA_FUNCTION_FAILED;
  4836. ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
  4837. if (ret == QLA_SUCCESS)
  4838. fcport->fcp_prio = priority;
  4839. else
  4840. DEBUG2(printk(KERN_WARNING
  4841. "scsi(%ld): Unable to activate fcp priority, "
  4842. " ret=0x%x\n", vha->host_no, ret));
  4843. return ret;
  4844. }
  4845. /*
  4846. * qla24xx_update_all_fcp_prio
  4847. * Activates fcp priority for all the logged in ports
  4848. *
  4849. * Input:
  4850. * ha = adapter block pointer.
  4851. *
  4852. * Return:
  4853. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4854. *
  4855. * Context:
  4856. * Kernel context.
  4857. */
  4858. int
  4859. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4860. {
  4861. int ret;
  4862. fc_port_t *fcport;
  4863. ret = QLA_FUNCTION_FAILED;
  4864. /* We need to set priority for all logged in ports */
  4865. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4866. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4867. return ret;
  4868. }