patch_hdmi.c 79 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
  45. struct hdmi_spec_per_cvt {
  46. hda_nid_t cvt_nid;
  47. int assigned;
  48. unsigned int channels_min;
  49. unsigned int channels_max;
  50. u32 rates;
  51. u64 formats;
  52. unsigned int maxbps;
  53. };
  54. /* max. connections to a widget */
  55. #define HDA_MAX_CONNECTIONS 32
  56. struct hdmi_spec_per_pin {
  57. hda_nid_t pin_nid;
  58. int num_mux_nids;
  59. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  60. hda_nid_t cvt_nid;
  61. struct hda_codec *codec;
  62. struct hdmi_eld sink_eld;
  63. struct mutex lock;
  64. struct delayed_work work;
  65. struct snd_kcontrol *eld_ctl;
  66. int repoll_count;
  67. bool setup; /* the stream has been set up by prepare callback */
  68. int channels; /* current number of channels */
  69. bool non_pcm;
  70. bool chmap_set; /* channel-map override by ALSA API? */
  71. unsigned char chmap[8]; /* ALSA API channel-map */
  72. char pcm_name[8]; /* filled in build_pcm callbacks */
  73. #ifdef CONFIG_PROC_FS
  74. struct snd_info_entry *proc_entry;
  75. #endif
  76. };
  77. struct hdmi_spec {
  78. int num_cvts;
  79. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  80. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  81. int num_pins;
  82. struct snd_array pins; /* struct hdmi_spec_per_pin */
  83. struct snd_array pcm_rec; /* struct hda_pcm */
  84. unsigned int channels_max; /* max over all cvts */
  85. struct hdmi_eld temp_eld;
  86. /*
  87. * Non-generic ATI/NVIDIA specific
  88. */
  89. struct hda_multi_out multiout;
  90. struct hda_pcm_stream pcm_playback;
  91. };
  92. struct hdmi_audio_infoframe {
  93. u8 type; /* 0x84 */
  94. u8 ver; /* 0x01 */
  95. u8 len; /* 0x0a */
  96. u8 checksum;
  97. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  98. u8 SS01_SF24;
  99. u8 CXT04;
  100. u8 CA;
  101. u8 LFEPBL01_LSV36_DM_INH7;
  102. };
  103. struct dp_audio_infoframe {
  104. u8 type; /* 0x84 */
  105. u8 len; /* 0x1b */
  106. u8 ver; /* 0x11 << 2 */
  107. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  108. u8 SS01_SF24;
  109. u8 CXT04;
  110. u8 CA;
  111. u8 LFEPBL01_LSV36_DM_INH7;
  112. };
  113. union audio_infoframe {
  114. struct hdmi_audio_infoframe hdmi;
  115. struct dp_audio_infoframe dp;
  116. u8 bytes[0];
  117. };
  118. /*
  119. * CEA speaker placement:
  120. *
  121. * FLH FCH FRH
  122. * FLW FL FLC FC FRC FR FRW
  123. *
  124. * LFE
  125. * TC
  126. *
  127. * RL RLC RC RRC RR
  128. *
  129. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  130. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  131. */
  132. enum cea_speaker_placement {
  133. FL = (1 << 0), /* Front Left */
  134. FC = (1 << 1), /* Front Center */
  135. FR = (1 << 2), /* Front Right */
  136. FLC = (1 << 3), /* Front Left Center */
  137. FRC = (1 << 4), /* Front Right Center */
  138. RL = (1 << 5), /* Rear Left */
  139. RC = (1 << 6), /* Rear Center */
  140. RR = (1 << 7), /* Rear Right */
  141. RLC = (1 << 8), /* Rear Left Center */
  142. RRC = (1 << 9), /* Rear Right Center */
  143. LFE = (1 << 10), /* Low Frequency Effect */
  144. FLW = (1 << 11), /* Front Left Wide */
  145. FRW = (1 << 12), /* Front Right Wide */
  146. FLH = (1 << 13), /* Front Left High */
  147. FCH = (1 << 14), /* Front Center High */
  148. FRH = (1 << 15), /* Front Right High */
  149. TC = (1 << 16), /* Top Center */
  150. };
  151. /*
  152. * ELD SA bits in the CEA Speaker Allocation data block
  153. */
  154. static int eld_speaker_allocation_bits[] = {
  155. [0] = FL | FR,
  156. [1] = LFE,
  157. [2] = FC,
  158. [3] = RL | RR,
  159. [4] = RC,
  160. [5] = FLC | FRC,
  161. [6] = RLC | RRC,
  162. /* the following are not defined in ELD yet */
  163. [7] = FLW | FRW,
  164. [8] = FLH | FRH,
  165. [9] = TC,
  166. [10] = FCH,
  167. };
  168. struct cea_channel_speaker_allocation {
  169. int ca_index;
  170. int speakers[8];
  171. /* derived values, just for convenience */
  172. int channels;
  173. int spk_mask;
  174. };
  175. /*
  176. * ALSA sequence is:
  177. *
  178. * surround40 surround41 surround50 surround51 surround71
  179. * ch0 front left = = = =
  180. * ch1 front right = = = =
  181. * ch2 rear left = = = =
  182. * ch3 rear right = = = =
  183. * ch4 LFE center center center
  184. * ch5 LFE LFE
  185. * ch6 side left
  186. * ch7 side right
  187. *
  188. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  189. */
  190. static int hdmi_channel_mapping[0x32][8] = {
  191. /* stereo */
  192. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  193. /* 2.1 */
  194. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  195. /* Dolby Surround */
  196. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  197. /* surround40 */
  198. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  199. /* 4ch */
  200. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  201. /* surround41 */
  202. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  203. /* surround50 */
  204. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  205. /* surround51 */
  206. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  207. /* 7.1 */
  208. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  209. };
  210. /*
  211. * This is an ordered list!
  212. *
  213. * The preceding ones have better chances to be selected by
  214. * hdmi_channel_allocation().
  215. */
  216. static struct cea_channel_speaker_allocation channel_allocations[] = {
  217. /* channel: 7 6 5 4 3 2 1 0 */
  218. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  219. /* 2.1 */
  220. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  221. /* Dolby Surround */
  222. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  223. /* surround40 */
  224. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  225. /* surround41 */
  226. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  227. /* surround50 */
  228. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  229. /* surround51 */
  230. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  231. /* 6.1 */
  232. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  233. /* surround71 */
  234. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  235. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  236. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  237. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  238. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  239. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  240. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  241. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  242. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  243. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  244. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  245. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  246. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  247. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  248. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  249. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  250. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  251. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  252. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  253. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  254. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  255. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  256. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  257. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  258. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  259. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  260. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  261. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  262. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  263. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  264. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  265. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  266. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  268. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  269. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  270. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  271. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  272. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  273. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  274. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  275. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  276. };
  277. /*
  278. * HDMI routines
  279. */
  280. #define get_pin(spec, idx) \
  281. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  282. #define get_cvt(spec, idx) \
  283. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  284. #define get_pcm_rec(spec, idx) \
  285. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  286. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  287. {
  288. int pin_idx;
  289. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  290. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  291. return pin_idx;
  292. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  293. return -EINVAL;
  294. }
  295. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  296. struct hda_pcm_stream *hinfo)
  297. {
  298. int pin_idx;
  299. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  300. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  301. return pin_idx;
  302. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  303. return -EINVAL;
  304. }
  305. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  306. {
  307. int cvt_idx;
  308. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  309. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  310. return cvt_idx;
  311. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  312. return -EINVAL;
  313. }
  314. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  315. struct snd_ctl_elem_info *uinfo)
  316. {
  317. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  318. struct hdmi_spec *spec = codec->spec;
  319. struct hdmi_spec_per_pin *per_pin;
  320. struct hdmi_eld *eld;
  321. int pin_idx;
  322. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  323. pin_idx = kcontrol->private_value;
  324. per_pin = get_pin(spec, pin_idx);
  325. eld = &per_pin->sink_eld;
  326. mutex_lock(&per_pin->lock);
  327. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  328. mutex_unlock(&per_pin->lock);
  329. return 0;
  330. }
  331. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  332. struct snd_ctl_elem_value *ucontrol)
  333. {
  334. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  335. struct hdmi_spec *spec = codec->spec;
  336. struct hdmi_spec_per_pin *per_pin;
  337. struct hdmi_eld *eld;
  338. int pin_idx;
  339. pin_idx = kcontrol->private_value;
  340. per_pin = get_pin(spec, pin_idx);
  341. eld = &per_pin->sink_eld;
  342. mutex_lock(&per_pin->lock);
  343. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  344. mutex_unlock(&per_pin->lock);
  345. snd_BUG();
  346. return -EINVAL;
  347. }
  348. memset(ucontrol->value.bytes.data, 0,
  349. ARRAY_SIZE(ucontrol->value.bytes.data));
  350. if (eld->eld_valid)
  351. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  352. eld->eld_size);
  353. mutex_unlock(&per_pin->lock);
  354. return 0;
  355. }
  356. static struct snd_kcontrol_new eld_bytes_ctl = {
  357. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  358. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  359. .name = "ELD",
  360. .info = hdmi_eld_ctl_info,
  361. .get = hdmi_eld_ctl_get,
  362. };
  363. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  364. int device)
  365. {
  366. struct snd_kcontrol *kctl;
  367. struct hdmi_spec *spec = codec->spec;
  368. int err;
  369. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  370. if (!kctl)
  371. return -ENOMEM;
  372. kctl->private_value = pin_idx;
  373. kctl->id.device = device;
  374. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  375. if (err < 0)
  376. return err;
  377. get_pin(spec, pin_idx)->eld_ctl = kctl;
  378. return 0;
  379. }
  380. #ifdef BE_PARANOID
  381. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  382. int *packet_index, int *byte_index)
  383. {
  384. int val;
  385. val = snd_hda_codec_read(codec, pin_nid, 0,
  386. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  387. *packet_index = val >> 5;
  388. *byte_index = val & 0x1f;
  389. }
  390. #endif
  391. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  392. int packet_index, int byte_index)
  393. {
  394. int val;
  395. val = (packet_index << 5) | (byte_index & 0x1f);
  396. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  397. }
  398. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  399. unsigned char val)
  400. {
  401. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  402. }
  403. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  404. {
  405. /* Unmute */
  406. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  407. snd_hda_codec_write(codec, pin_nid, 0,
  408. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  409. /* Enable pin out: some machines with GM965 gets broken output when
  410. * the pin is disabled or changed while using with HDMI
  411. */
  412. snd_hda_codec_write(codec, pin_nid, 0,
  413. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  414. }
  415. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  416. {
  417. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  418. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  419. }
  420. static void hdmi_set_channel_count(struct hda_codec *codec,
  421. hda_nid_t cvt_nid, int chs)
  422. {
  423. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  424. snd_hda_codec_write(codec, cvt_nid, 0,
  425. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  426. }
  427. /*
  428. * ELD proc files
  429. */
  430. #ifdef CONFIG_PROC_FS
  431. static void print_eld_info(struct snd_info_entry *entry,
  432. struct snd_info_buffer *buffer)
  433. {
  434. struct hdmi_spec_per_pin *per_pin = entry->private_data;
  435. mutex_lock(&per_pin->lock);
  436. snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
  437. mutex_unlock(&per_pin->lock);
  438. }
  439. static void write_eld_info(struct snd_info_entry *entry,
  440. struct snd_info_buffer *buffer)
  441. {
  442. struct hdmi_spec_per_pin *per_pin = entry->private_data;
  443. mutex_lock(&per_pin->lock);
  444. snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
  445. mutex_unlock(&per_pin->lock);
  446. }
  447. static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
  448. {
  449. char name[32];
  450. struct hda_codec *codec = per_pin->codec;
  451. struct snd_info_entry *entry;
  452. int err;
  453. snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
  454. err = snd_card_proc_new(codec->bus->card, name, &entry);
  455. if (err < 0)
  456. return err;
  457. snd_info_set_text_ops(entry, per_pin, print_eld_info);
  458. entry->c.text.write = write_eld_info;
  459. entry->mode |= S_IWUSR;
  460. per_pin->proc_entry = entry;
  461. return 0;
  462. }
  463. static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
  464. {
  465. if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
  466. snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
  467. per_pin->proc_entry = NULL;
  468. }
  469. }
  470. #else
  471. static inline int snd_hda_eld_proc_new(struct hdmi_spec_per_pin *per_pin,
  472. int index)
  473. {
  474. return 0;
  475. }
  476. static inline void snd_hda_eld_proc_free(struct hdmi_spec_per_pin *per_pin)
  477. {
  478. }
  479. #endif
  480. /*
  481. * Channel mapping routines
  482. */
  483. /*
  484. * Compute derived values in channel_allocations[].
  485. */
  486. static void init_channel_allocations(void)
  487. {
  488. int i, j;
  489. struct cea_channel_speaker_allocation *p;
  490. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  491. p = channel_allocations + i;
  492. p->channels = 0;
  493. p->spk_mask = 0;
  494. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  495. if (p->speakers[j]) {
  496. p->channels++;
  497. p->spk_mask |= p->speakers[j];
  498. }
  499. }
  500. }
  501. static int get_channel_allocation_order(int ca)
  502. {
  503. int i;
  504. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  505. if (channel_allocations[i].ca_index == ca)
  506. break;
  507. }
  508. return i;
  509. }
  510. /*
  511. * The transformation takes two steps:
  512. *
  513. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  514. * spk_mask => (channel_allocations[]) => ai->CA
  515. *
  516. * TODO: it could select the wrong CA from multiple candidates.
  517. */
  518. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  519. {
  520. int i;
  521. int ca = 0;
  522. int spk_mask = 0;
  523. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  524. /*
  525. * CA defaults to 0 for basic stereo audio
  526. */
  527. if (channels <= 2)
  528. return 0;
  529. /*
  530. * expand ELD's speaker allocation mask
  531. *
  532. * ELD tells the speaker mask in a compact(paired) form,
  533. * expand ELD's notions to match the ones used by Audio InfoFrame.
  534. */
  535. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  536. if (eld->info.spk_alloc & (1 << i))
  537. spk_mask |= eld_speaker_allocation_bits[i];
  538. }
  539. /* search for the first working match in the CA table */
  540. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  541. if (channels == channel_allocations[i].channels &&
  542. (spk_mask & channel_allocations[i].spk_mask) ==
  543. channel_allocations[i].spk_mask) {
  544. ca = channel_allocations[i].ca_index;
  545. break;
  546. }
  547. }
  548. if (!ca) {
  549. /* if there was no match, select the regular ALSA channel
  550. * allocation with the matching number of channels */
  551. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  552. if (channels == channel_allocations[i].channels) {
  553. ca = channel_allocations[i].ca_index;
  554. break;
  555. }
  556. }
  557. }
  558. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  559. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  560. ca, channels, buf);
  561. return ca;
  562. }
  563. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  564. hda_nid_t pin_nid)
  565. {
  566. #ifdef CONFIG_SND_DEBUG_VERBOSE
  567. int i;
  568. int slot;
  569. for (i = 0; i < 8; i++) {
  570. slot = snd_hda_codec_read(codec, pin_nid, 0,
  571. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  572. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  573. slot >> 4, slot & 0xf);
  574. }
  575. #endif
  576. }
  577. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  578. hda_nid_t pin_nid,
  579. bool non_pcm,
  580. int ca)
  581. {
  582. struct cea_channel_speaker_allocation *ch_alloc;
  583. int i;
  584. int err;
  585. int order;
  586. int non_pcm_mapping[8];
  587. order = get_channel_allocation_order(ca);
  588. ch_alloc = &channel_allocations[order];
  589. if (hdmi_channel_mapping[ca][1] == 0) {
  590. int hdmi_slot = 0;
  591. /* fill actual channel mappings in ALSA channel (i) order */
  592. for (i = 0; i < ch_alloc->channels; i++) {
  593. while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
  594. hdmi_slot++; /* skip zero slots */
  595. hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
  596. }
  597. /* fill the rest of the slots with ALSA channel 0xf */
  598. for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
  599. if (!ch_alloc->speakers[7 - hdmi_slot])
  600. hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
  601. }
  602. if (non_pcm) {
  603. for (i = 0; i < ch_alloc->channels; i++)
  604. non_pcm_mapping[i] = (i << 4) | i;
  605. for (; i < 8; i++)
  606. non_pcm_mapping[i] = (0xf << 4) | i;
  607. }
  608. for (i = 0; i < 8; i++) {
  609. err = snd_hda_codec_write(codec, pin_nid, 0,
  610. AC_VERB_SET_HDMI_CHAN_SLOT,
  611. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  612. if (err) {
  613. snd_printdd(KERN_NOTICE
  614. "HDMI: channel mapping failed\n");
  615. break;
  616. }
  617. }
  618. }
  619. struct channel_map_table {
  620. unsigned char map; /* ALSA API channel map position */
  621. int spk_mask; /* speaker position bit mask */
  622. };
  623. static struct channel_map_table map_tables[] = {
  624. { SNDRV_CHMAP_FL, FL },
  625. { SNDRV_CHMAP_FR, FR },
  626. { SNDRV_CHMAP_RL, RL },
  627. { SNDRV_CHMAP_RR, RR },
  628. { SNDRV_CHMAP_LFE, LFE },
  629. { SNDRV_CHMAP_FC, FC },
  630. { SNDRV_CHMAP_RLC, RLC },
  631. { SNDRV_CHMAP_RRC, RRC },
  632. { SNDRV_CHMAP_RC, RC },
  633. { SNDRV_CHMAP_FLC, FLC },
  634. { SNDRV_CHMAP_FRC, FRC },
  635. { SNDRV_CHMAP_FLH, FLH },
  636. { SNDRV_CHMAP_FRH, FRH },
  637. { SNDRV_CHMAP_FLW, FLW },
  638. { SNDRV_CHMAP_FRW, FRW },
  639. { SNDRV_CHMAP_TC, TC },
  640. { SNDRV_CHMAP_FCH, FCH },
  641. {} /* terminator */
  642. };
  643. /* from ALSA API channel position to speaker bit mask */
  644. static int to_spk_mask(unsigned char c)
  645. {
  646. struct channel_map_table *t = map_tables;
  647. for (; t->map; t++) {
  648. if (t->map == c)
  649. return t->spk_mask;
  650. }
  651. return 0;
  652. }
  653. /* from ALSA API channel position to CEA slot */
  654. static int to_cea_slot(int ordered_ca, unsigned char pos)
  655. {
  656. int mask = to_spk_mask(pos);
  657. int i;
  658. if (mask) {
  659. for (i = 0; i < 8; i++) {
  660. if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
  661. return i;
  662. }
  663. }
  664. return -1;
  665. }
  666. /* from speaker bit mask to ALSA API channel position */
  667. static int spk_to_chmap(int spk)
  668. {
  669. struct channel_map_table *t = map_tables;
  670. for (; t->map; t++) {
  671. if (t->spk_mask == spk)
  672. return t->map;
  673. }
  674. return 0;
  675. }
  676. /* from CEA slot to ALSA API channel position */
  677. static int from_cea_slot(int ordered_ca, unsigned char slot)
  678. {
  679. int mask = channel_allocations[ordered_ca].speakers[7 - slot];
  680. return spk_to_chmap(mask);
  681. }
  682. /* get the CA index corresponding to the given ALSA API channel map */
  683. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  684. {
  685. int i, spks = 0, spk_mask = 0;
  686. for (i = 0; i < chs; i++) {
  687. int mask = to_spk_mask(map[i]);
  688. if (mask) {
  689. spk_mask |= mask;
  690. spks++;
  691. }
  692. }
  693. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  694. if ((chs == channel_allocations[i].channels ||
  695. spks == channel_allocations[i].channels) &&
  696. (spk_mask & channel_allocations[i].spk_mask) ==
  697. channel_allocations[i].spk_mask)
  698. return channel_allocations[i].ca_index;
  699. }
  700. return -1;
  701. }
  702. /* set up the channel slots for the given ALSA API channel map */
  703. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  704. hda_nid_t pin_nid,
  705. int chs, unsigned char *map,
  706. int ca)
  707. {
  708. int ordered_ca = get_channel_allocation_order(ca);
  709. int alsa_pos, hdmi_slot;
  710. int assignments[8] = {[0 ... 7] = 0xf};
  711. for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
  712. hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
  713. if (hdmi_slot < 0)
  714. continue; /* unassigned channel */
  715. assignments[hdmi_slot] = alsa_pos;
  716. }
  717. for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
  718. int val, err;
  719. val = (assignments[hdmi_slot] << 4) | hdmi_slot;
  720. err = snd_hda_codec_write(codec, pin_nid, 0,
  721. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  722. if (err)
  723. return -EINVAL;
  724. }
  725. return 0;
  726. }
  727. /* store ALSA API channel map from the current default map */
  728. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  729. {
  730. int i;
  731. int ordered_ca = get_channel_allocation_order(ca);
  732. for (i = 0; i < 8; i++) {
  733. if (i < channel_allocations[ordered_ca].channels)
  734. map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
  735. else
  736. map[i] = 0;
  737. }
  738. }
  739. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  740. hda_nid_t pin_nid, bool non_pcm, int ca,
  741. int channels, unsigned char *map,
  742. bool chmap_set)
  743. {
  744. if (!non_pcm && chmap_set) {
  745. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  746. channels, map, ca);
  747. } else {
  748. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  749. hdmi_setup_fake_chmap(map, ca);
  750. }
  751. hdmi_debug_channel_mapping(codec, pin_nid);
  752. }
  753. /*
  754. * Audio InfoFrame routines
  755. */
  756. /*
  757. * Enable Audio InfoFrame Transmission
  758. */
  759. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  760. hda_nid_t pin_nid)
  761. {
  762. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  763. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  764. AC_DIPXMIT_BEST);
  765. }
  766. /*
  767. * Disable Audio InfoFrame Transmission
  768. */
  769. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  770. hda_nid_t pin_nid)
  771. {
  772. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  773. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  774. AC_DIPXMIT_DISABLE);
  775. }
  776. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  777. {
  778. #ifdef CONFIG_SND_DEBUG_VERBOSE
  779. int i;
  780. int size;
  781. size = snd_hdmi_get_eld_size(codec, pin_nid);
  782. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  783. for (i = 0; i < 8; i++) {
  784. size = snd_hda_codec_read(codec, pin_nid, 0,
  785. AC_VERB_GET_HDMI_DIP_SIZE, i);
  786. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  787. }
  788. #endif
  789. }
  790. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  791. {
  792. #ifdef BE_PARANOID
  793. int i, j;
  794. int size;
  795. int pi, bi;
  796. for (i = 0; i < 8; i++) {
  797. size = snd_hda_codec_read(codec, pin_nid, 0,
  798. AC_VERB_GET_HDMI_DIP_SIZE, i);
  799. if (size == 0)
  800. continue;
  801. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  802. for (j = 1; j < 1000; j++) {
  803. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  804. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  805. if (pi != i)
  806. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  807. bi, pi, i);
  808. if (bi == 0) /* byte index wrapped around */
  809. break;
  810. }
  811. snd_printd(KERN_INFO
  812. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  813. i, size, j);
  814. }
  815. #endif
  816. }
  817. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  818. {
  819. u8 *bytes = (u8 *)hdmi_ai;
  820. u8 sum = 0;
  821. int i;
  822. hdmi_ai->checksum = 0;
  823. for (i = 0; i < sizeof(*hdmi_ai); i++)
  824. sum += bytes[i];
  825. hdmi_ai->checksum = -sum;
  826. }
  827. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  828. hda_nid_t pin_nid,
  829. u8 *dip, int size)
  830. {
  831. int i;
  832. hdmi_debug_dip_size(codec, pin_nid);
  833. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  834. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  835. for (i = 0; i < size; i++)
  836. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  837. }
  838. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  839. u8 *dip, int size)
  840. {
  841. u8 val;
  842. int i;
  843. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  844. != AC_DIPXMIT_BEST)
  845. return false;
  846. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  847. for (i = 0; i < size; i++) {
  848. val = snd_hda_codec_read(codec, pin_nid, 0,
  849. AC_VERB_GET_HDMI_DIP_DATA, 0);
  850. if (val != dip[i])
  851. return false;
  852. }
  853. return true;
  854. }
  855. static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
  856. struct hdmi_spec_per_pin *per_pin,
  857. bool non_pcm)
  858. {
  859. hda_nid_t pin_nid = per_pin->pin_nid;
  860. int channels = per_pin->channels;
  861. int active_channels;
  862. struct hdmi_eld *eld;
  863. int ca, ordered_ca;
  864. union audio_infoframe ai;
  865. if (!channels)
  866. return;
  867. if (is_haswell(codec))
  868. snd_hda_codec_write(codec, pin_nid, 0,
  869. AC_VERB_SET_AMP_GAIN_MUTE,
  870. AMP_OUT_UNMUTE);
  871. eld = &per_pin->sink_eld;
  872. if (!eld->monitor_present)
  873. return;
  874. if (!non_pcm && per_pin->chmap_set)
  875. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  876. else
  877. ca = hdmi_channel_allocation(eld, channels);
  878. if (ca < 0)
  879. ca = 0;
  880. ordered_ca = get_channel_allocation_order(ca);
  881. active_channels = channel_allocations[ordered_ca].channels;
  882. hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
  883. memset(&ai, 0, sizeof(ai));
  884. if (eld->info.conn_type == 0) { /* HDMI */
  885. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  886. hdmi_ai->type = 0x84;
  887. hdmi_ai->ver = 0x01;
  888. hdmi_ai->len = 0x0a;
  889. hdmi_ai->CC02_CT47 = active_channels - 1;
  890. hdmi_ai->CA = ca;
  891. hdmi_checksum_audio_infoframe(hdmi_ai);
  892. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  893. struct dp_audio_infoframe *dp_ai = &ai.dp;
  894. dp_ai->type = 0x84;
  895. dp_ai->len = 0x1b;
  896. dp_ai->ver = 0x11 << 2;
  897. dp_ai->CC02_CT47 = active_channels - 1;
  898. dp_ai->CA = ca;
  899. } else {
  900. snd_printd("HDMI: unknown connection type at pin %d\n",
  901. pin_nid);
  902. return;
  903. }
  904. /*
  905. * always configure channel mapping, it may have been changed by the
  906. * user in the meantime
  907. */
  908. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  909. channels, per_pin->chmap,
  910. per_pin->chmap_set);
  911. /*
  912. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  913. * sizeof(*dp_ai) to avoid partial match/update problems when
  914. * the user switches between HDMI/DP monitors.
  915. */
  916. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  917. sizeof(ai))) {
  918. snd_printdd("hdmi_setup_audio_infoframe: "
  919. "pin=%d channels=%d ca=0x%02x\n",
  920. pin_nid,
  921. active_channels, ca);
  922. hdmi_stop_infoframe_trans(codec, pin_nid);
  923. hdmi_fill_audio_infoframe(codec, pin_nid,
  924. ai.bytes, sizeof(ai));
  925. hdmi_start_infoframe_trans(codec, pin_nid);
  926. }
  927. per_pin->non_pcm = non_pcm;
  928. }
  929. /*
  930. * Unsolicited events
  931. */
  932. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  933. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  934. {
  935. struct hdmi_spec *spec = codec->spec;
  936. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  937. int pin_nid;
  938. int pin_idx;
  939. struct hda_jack_tbl *jack;
  940. int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
  941. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  942. if (!jack)
  943. return;
  944. pin_nid = jack->nid;
  945. jack->jack_dirty = 1;
  946. _snd_printd(SND_PR_VERBOSE,
  947. "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
  948. codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
  949. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  950. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  951. if (pin_idx < 0)
  952. return;
  953. hdmi_present_sense(get_pin(spec, pin_idx), 1);
  954. snd_hda_jack_report_sync(codec);
  955. }
  956. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  957. {
  958. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  959. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  960. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  961. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  962. printk(KERN_INFO
  963. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  964. codec->addr,
  965. tag,
  966. subtag,
  967. cp_state,
  968. cp_ready);
  969. /* TODO */
  970. if (cp_state)
  971. ;
  972. if (cp_ready)
  973. ;
  974. }
  975. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  976. {
  977. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  978. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  979. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  980. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  981. return;
  982. }
  983. if (subtag == 0)
  984. hdmi_intrinsic_event(codec, res);
  985. else
  986. hdmi_non_intrinsic_event(codec, res);
  987. }
  988. static void haswell_verify_D0(struct hda_codec *codec,
  989. hda_nid_t cvt_nid, hda_nid_t nid)
  990. {
  991. int pwr;
  992. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  993. * thus pins could only choose converter 0 for use. Make sure the
  994. * converters are in correct power state */
  995. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  996. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  997. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  998. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  999. AC_PWRST_D0);
  1000. msleep(40);
  1001. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  1002. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  1003. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  1004. }
  1005. }
  1006. /*
  1007. * Callbacks
  1008. */
  1009. /* HBR should be Non-PCM, 8 channels */
  1010. #define is_hbr_format(format) \
  1011. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  1012. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  1013. hda_nid_t pin_nid, u32 stream_tag, int format)
  1014. {
  1015. int pinctl;
  1016. int new_pinctl = 0;
  1017. if (is_haswell(codec))
  1018. haswell_verify_D0(codec, cvt_nid, pin_nid);
  1019. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  1020. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  1021. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  1022. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  1023. if (is_hbr_format(format))
  1024. new_pinctl |= AC_PINCTL_EPT_HBR;
  1025. else
  1026. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  1027. snd_printdd("hdmi_setup_stream: "
  1028. "NID=0x%x, %spinctl=0x%x\n",
  1029. pin_nid,
  1030. pinctl == new_pinctl ? "" : "new-",
  1031. new_pinctl);
  1032. if (pinctl != new_pinctl)
  1033. snd_hda_codec_write(codec, pin_nid, 0,
  1034. AC_VERB_SET_PIN_WIDGET_CONTROL,
  1035. new_pinctl);
  1036. }
  1037. if (is_hbr_format(format) && !new_pinctl) {
  1038. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  1039. return -EINVAL;
  1040. }
  1041. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  1042. return 0;
  1043. }
  1044. static int hdmi_choose_cvt(struct hda_codec *codec,
  1045. int pin_idx, int *cvt_id, int *mux_id)
  1046. {
  1047. struct hdmi_spec *spec = codec->spec;
  1048. struct hdmi_spec_per_pin *per_pin;
  1049. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1050. int cvt_idx, mux_idx = 0;
  1051. per_pin = get_pin(spec, pin_idx);
  1052. /* Dynamically assign converter to stream */
  1053. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  1054. per_cvt = get_cvt(spec, cvt_idx);
  1055. /* Must not already be assigned */
  1056. if (per_cvt->assigned)
  1057. continue;
  1058. /* Must be in pin's mux's list of converters */
  1059. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  1060. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  1061. break;
  1062. /* Not in mux list */
  1063. if (mux_idx == per_pin->num_mux_nids)
  1064. continue;
  1065. break;
  1066. }
  1067. /* No free converters */
  1068. if (cvt_idx == spec->num_cvts)
  1069. return -ENODEV;
  1070. if (cvt_id)
  1071. *cvt_id = cvt_idx;
  1072. if (mux_id)
  1073. *mux_id = mux_idx;
  1074. return 0;
  1075. }
  1076. static void haswell_config_cvts(struct hda_codec *codec,
  1077. hda_nid_t pin_nid, int mux_idx)
  1078. {
  1079. struct hdmi_spec *spec = codec->spec;
  1080. hda_nid_t nid, end_nid;
  1081. int cvt_idx, curr;
  1082. struct hdmi_spec_per_cvt *per_cvt;
  1083. /* configure all pins, including "no physical connection" ones */
  1084. end_nid = codec->start_nid + codec->num_nodes;
  1085. for (nid = codec->start_nid; nid < end_nid; nid++) {
  1086. unsigned int wid_caps = get_wcaps(codec, nid);
  1087. unsigned int wid_type = get_wcaps_type(wid_caps);
  1088. if (wid_type != AC_WID_PIN)
  1089. continue;
  1090. if (nid == pin_nid)
  1091. continue;
  1092. curr = snd_hda_codec_read(codec, nid, 0,
  1093. AC_VERB_GET_CONNECT_SEL, 0);
  1094. if (curr != mux_idx)
  1095. continue;
  1096. /* choose an unassigned converter. The conveters in the
  1097. * connection list are in the same order as in the codec.
  1098. */
  1099. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  1100. per_cvt = get_cvt(spec, cvt_idx);
  1101. if (!per_cvt->assigned) {
  1102. snd_printdd("choose cvt %d for pin nid %d\n",
  1103. cvt_idx, nid);
  1104. snd_hda_codec_write_cache(codec, nid, 0,
  1105. AC_VERB_SET_CONNECT_SEL,
  1106. cvt_idx);
  1107. break;
  1108. }
  1109. }
  1110. }
  1111. }
  1112. /*
  1113. * HDA PCM callbacks
  1114. */
  1115. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1116. struct hda_codec *codec,
  1117. struct snd_pcm_substream *substream)
  1118. {
  1119. struct hdmi_spec *spec = codec->spec;
  1120. struct snd_pcm_runtime *runtime = substream->runtime;
  1121. int pin_idx, cvt_idx, mux_idx = 0;
  1122. struct hdmi_spec_per_pin *per_pin;
  1123. struct hdmi_eld *eld;
  1124. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1125. int err;
  1126. /* Validate hinfo */
  1127. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1128. if (snd_BUG_ON(pin_idx < 0))
  1129. return -EINVAL;
  1130. per_pin = get_pin(spec, pin_idx);
  1131. eld = &per_pin->sink_eld;
  1132. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1133. if (err < 0)
  1134. return err;
  1135. per_cvt = get_cvt(spec, cvt_idx);
  1136. /* Claim converter */
  1137. per_cvt->assigned = 1;
  1138. per_pin->cvt_nid = per_cvt->cvt_nid;
  1139. hinfo->nid = per_cvt->cvt_nid;
  1140. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1141. AC_VERB_SET_CONNECT_SEL,
  1142. mux_idx);
  1143. /* configure unused pins to choose other converters */
  1144. if (is_haswell(codec))
  1145. haswell_config_cvts(codec, per_pin->pin_nid, mux_idx);
  1146. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1147. /* Initially set the converter's capabilities */
  1148. hinfo->channels_min = per_cvt->channels_min;
  1149. hinfo->channels_max = per_cvt->channels_max;
  1150. hinfo->rates = per_cvt->rates;
  1151. hinfo->formats = per_cvt->formats;
  1152. hinfo->maxbps = per_cvt->maxbps;
  1153. /* Restrict capabilities by ELD if this isn't disabled */
  1154. if (!static_hdmi_pcm && eld->eld_valid) {
  1155. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1156. if (hinfo->channels_min > hinfo->channels_max ||
  1157. !hinfo->rates || !hinfo->formats) {
  1158. per_cvt->assigned = 0;
  1159. hinfo->nid = 0;
  1160. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1161. return -ENODEV;
  1162. }
  1163. }
  1164. /* Store the updated parameters */
  1165. runtime->hw.channels_min = hinfo->channels_min;
  1166. runtime->hw.channels_max = hinfo->channels_max;
  1167. runtime->hw.formats = hinfo->formats;
  1168. runtime->hw.rates = hinfo->rates;
  1169. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1170. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1171. return 0;
  1172. }
  1173. /*
  1174. * HDA/HDMI auto parsing
  1175. */
  1176. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1177. {
  1178. struct hdmi_spec *spec = codec->spec;
  1179. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1180. hda_nid_t pin_nid = per_pin->pin_nid;
  1181. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1182. snd_printk(KERN_WARNING
  1183. "HDMI: pin %d wcaps %#x "
  1184. "does not support connection list\n",
  1185. pin_nid, get_wcaps(codec, pin_nid));
  1186. return -EINVAL;
  1187. }
  1188. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1189. per_pin->mux_nids,
  1190. HDA_MAX_CONNECTIONS);
  1191. return 0;
  1192. }
  1193. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1194. {
  1195. struct hda_codec *codec = per_pin->codec;
  1196. struct hdmi_spec *spec = codec->spec;
  1197. struct hdmi_eld *eld = &spec->temp_eld;
  1198. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1199. hda_nid_t pin_nid = per_pin->pin_nid;
  1200. /*
  1201. * Always execute a GetPinSense verb here, even when called from
  1202. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1203. * response's PD bit is not the real PD value, but indicates that
  1204. * the real PD value changed. An older version of the HD-audio
  1205. * specification worked this way. Hence, we just ignore the data in
  1206. * the unsolicited response to avoid custom WARs.
  1207. */
  1208. int present = snd_hda_pin_sense(codec, pin_nid);
  1209. bool update_eld = false;
  1210. bool eld_changed = false;
  1211. mutex_lock(&per_pin->lock);
  1212. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1213. if (pin_eld->monitor_present)
  1214. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1215. else
  1216. eld->eld_valid = false;
  1217. _snd_printd(SND_PR_VERBOSE,
  1218. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1219. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1220. if (eld->eld_valid) {
  1221. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1222. &eld->eld_size) < 0)
  1223. eld->eld_valid = false;
  1224. else {
  1225. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1226. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1227. eld->eld_size) < 0)
  1228. eld->eld_valid = false;
  1229. }
  1230. if (eld->eld_valid) {
  1231. snd_hdmi_show_eld(&eld->info);
  1232. update_eld = true;
  1233. }
  1234. else if (repoll) {
  1235. queue_delayed_work(codec->bus->workq,
  1236. &per_pin->work,
  1237. msecs_to_jiffies(300));
  1238. goto unlock;
  1239. }
  1240. }
  1241. if (pin_eld->eld_valid && !eld->eld_valid) {
  1242. update_eld = true;
  1243. eld_changed = true;
  1244. }
  1245. if (update_eld) {
  1246. bool old_eld_valid = pin_eld->eld_valid;
  1247. pin_eld->eld_valid = eld->eld_valid;
  1248. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1249. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1250. eld->eld_size) != 0;
  1251. if (eld_changed)
  1252. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1253. eld->eld_size);
  1254. pin_eld->eld_size = eld->eld_size;
  1255. pin_eld->info = eld->info;
  1256. /* Haswell-specific workaround: re-setup when the transcoder is
  1257. * changed during the stream playback
  1258. */
  1259. if (is_haswell(codec) &&
  1260. eld->eld_valid && !old_eld_valid && per_pin->setup)
  1261. hdmi_setup_audio_infoframe(codec, per_pin,
  1262. per_pin->non_pcm);
  1263. }
  1264. if (eld_changed)
  1265. snd_ctl_notify(codec->bus->card,
  1266. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1267. &per_pin->eld_ctl->id);
  1268. unlock:
  1269. mutex_unlock(&per_pin->lock);
  1270. }
  1271. static void hdmi_repoll_eld(struct work_struct *work)
  1272. {
  1273. struct hdmi_spec_per_pin *per_pin =
  1274. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1275. if (per_pin->repoll_count++ > 6)
  1276. per_pin->repoll_count = 0;
  1277. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1278. }
  1279. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1280. hda_nid_t nid);
  1281. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1282. {
  1283. struct hdmi_spec *spec = codec->spec;
  1284. unsigned int caps, config;
  1285. int pin_idx;
  1286. struct hdmi_spec_per_pin *per_pin;
  1287. int err;
  1288. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1289. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1290. return 0;
  1291. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1292. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1293. return 0;
  1294. if (is_haswell(codec))
  1295. intel_haswell_fixup_connect_list(codec, pin_nid);
  1296. pin_idx = spec->num_pins;
  1297. per_pin = snd_array_new(&spec->pins);
  1298. if (!per_pin)
  1299. return -ENOMEM;
  1300. per_pin->pin_nid = pin_nid;
  1301. per_pin->non_pcm = false;
  1302. err = hdmi_read_pin_conn(codec, pin_idx);
  1303. if (err < 0)
  1304. return err;
  1305. spec->num_pins++;
  1306. return 0;
  1307. }
  1308. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1309. {
  1310. struct hdmi_spec *spec = codec->spec;
  1311. struct hdmi_spec_per_cvt *per_cvt;
  1312. unsigned int chans;
  1313. int err;
  1314. chans = get_wcaps(codec, cvt_nid);
  1315. chans = get_wcaps_channels(chans);
  1316. per_cvt = snd_array_new(&spec->cvts);
  1317. if (!per_cvt)
  1318. return -ENOMEM;
  1319. per_cvt->cvt_nid = cvt_nid;
  1320. per_cvt->channels_min = 2;
  1321. if (chans <= 16) {
  1322. per_cvt->channels_max = chans;
  1323. if (chans > spec->channels_max)
  1324. spec->channels_max = chans;
  1325. }
  1326. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1327. &per_cvt->rates,
  1328. &per_cvt->formats,
  1329. &per_cvt->maxbps);
  1330. if (err < 0)
  1331. return err;
  1332. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1333. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1334. spec->num_cvts++;
  1335. return 0;
  1336. }
  1337. static int hdmi_parse_codec(struct hda_codec *codec)
  1338. {
  1339. hda_nid_t nid;
  1340. int i, nodes;
  1341. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1342. if (!nid || nodes < 0) {
  1343. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1344. return -EINVAL;
  1345. }
  1346. for (i = 0; i < nodes; i++, nid++) {
  1347. unsigned int caps;
  1348. unsigned int type;
  1349. caps = get_wcaps(codec, nid);
  1350. type = get_wcaps_type(caps);
  1351. if (!(caps & AC_WCAP_DIGITAL))
  1352. continue;
  1353. switch (type) {
  1354. case AC_WID_AUD_OUT:
  1355. hdmi_add_cvt(codec, nid);
  1356. break;
  1357. case AC_WID_PIN:
  1358. hdmi_add_pin(codec, nid);
  1359. break;
  1360. }
  1361. }
  1362. #ifdef CONFIG_PM
  1363. /* We're seeing some problems with unsolicited hot plug events on
  1364. * PantherPoint after S3, if this is not enabled */
  1365. if (codec->vendor_id == 0x80862806)
  1366. codec->bus->power_keep_link_on = 1;
  1367. /*
  1368. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1369. * can be lost and presence sense verb will become inaccurate if the
  1370. * HDA link is powered off at hot plug or hw initialization time.
  1371. */
  1372. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1373. AC_PWRST_EPSS))
  1374. codec->bus->power_keep_link_on = 1;
  1375. #endif
  1376. return 0;
  1377. }
  1378. /*
  1379. */
  1380. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1381. {
  1382. struct hda_spdif_out *spdif;
  1383. bool non_pcm;
  1384. mutex_lock(&codec->spdif_mutex);
  1385. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1386. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1387. mutex_unlock(&codec->spdif_mutex);
  1388. return non_pcm;
  1389. }
  1390. /*
  1391. * HDMI callbacks
  1392. */
  1393. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1394. struct hda_codec *codec,
  1395. unsigned int stream_tag,
  1396. unsigned int format,
  1397. struct snd_pcm_substream *substream)
  1398. {
  1399. hda_nid_t cvt_nid = hinfo->nid;
  1400. struct hdmi_spec *spec = codec->spec;
  1401. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1402. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1403. hda_nid_t pin_nid = per_pin->pin_nid;
  1404. bool non_pcm;
  1405. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1406. mutex_lock(&per_pin->lock);
  1407. per_pin->channels = substream->runtime->channels;
  1408. per_pin->setup = true;
  1409. hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
  1410. mutex_unlock(&per_pin->lock);
  1411. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1412. }
  1413. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1414. struct hda_codec *codec,
  1415. struct snd_pcm_substream *substream)
  1416. {
  1417. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1418. return 0;
  1419. }
  1420. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1421. struct hda_codec *codec,
  1422. struct snd_pcm_substream *substream)
  1423. {
  1424. struct hdmi_spec *spec = codec->spec;
  1425. int cvt_idx, pin_idx;
  1426. struct hdmi_spec_per_cvt *per_cvt;
  1427. struct hdmi_spec_per_pin *per_pin;
  1428. if (hinfo->nid) {
  1429. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1430. if (snd_BUG_ON(cvt_idx < 0))
  1431. return -EINVAL;
  1432. per_cvt = get_cvt(spec, cvt_idx);
  1433. snd_BUG_ON(!per_cvt->assigned);
  1434. per_cvt->assigned = 0;
  1435. hinfo->nid = 0;
  1436. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1437. if (snd_BUG_ON(pin_idx < 0))
  1438. return -EINVAL;
  1439. per_pin = get_pin(spec, pin_idx);
  1440. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1441. mutex_lock(&per_pin->lock);
  1442. per_pin->chmap_set = false;
  1443. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1444. per_pin->setup = false;
  1445. per_pin->channels = 0;
  1446. mutex_unlock(&per_pin->lock);
  1447. }
  1448. return 0;
  1449. }
  1450. static const struct hda_pcm_ops generic_ops = {
  1451. .open = hdmi_pcm_open,
  1452. .close = hdmi_pcm_close,
  1453. .prepare = generic_hdmi_playback_pcm_prepare,
  1454. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1455. };
  1456. /*
  1457. * ALSA API channel-map control callbacks
  1458. */
  1459. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1460. struct snd_ctl_elem_info *uinfo)
  1461. {
  1462. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1463. struct hda_codec *codec = info->private_data;
  1464. struct hdmi_spec *spec = codec->spec;
  1465. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1466. uinfo->count = spec->channels_max;
  1467. uinfo->value.integer.min = 0;
  1468. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1469. return 0;
  1470. }
  1471. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1472. unsigned int size, unsigned int __user *tlv)
  1473. {
  1474. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1475. struct hda_codec *codec = info->private_data;
  1476. struct hdmi_spec *spec = codec->spec;
  1477. unsigned int __user *dst;
  1478. int chs, count = 0;
  1479. if (size < 8)
  1480. return -ENOMEM;
  1481. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1482. return -EFAULT;
  1483. size -= 8;
  1484. dst = tlv + 2;
  1485. for (chs = 2; chs <= spec->channels_max; chs++) {
  1486. int i, c;
  1487. struct cea_channel_speaker_allocation *cap;
  1488. cap = channel_allocations;
  1489. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1490. int chs_bytes = chs * 4;
  1491. if (cap->channels != chs)
  1492. continue;
  1493. if (size < 8)
  1494. return -ENOMEM;
  1495. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1496. put_user(chs_bytes, dst + 1))
  1497. return -EFAULT;
  1498. dst += 2;
  1499. size -= 8;
  1500. count += 8;
  1501. if (size < chs_bytes)
  1502. return -ENOMEM;
  1503. size -= chs_bytes;
  1504. count += chs_bytes;
  1505. for (c = 7; c >= 0; c--) {
  1506. int spk = cap->speakers[c];
  1507. if (!spk)
  1508. continue;
  1509. if (put_user(spk_to_chmap(spk), dst))
  1510. return -EFAULT;
  1511. dst++;
  1512. }
  1513. }
  1514. }
  1515. if (put_user(count, tlv + 1))
  1516. return -EFAULT;
  1517. return 0;
  1518. }
  1519. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1520. struct snd_ctl_elem_value *ucontrol)
  1521. {
  1522. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1523. struct hda_codec *codec = info->private_data;
  1524. struct hdmi_spec *spec = codec->spec;
  1525. int pin_idx = kcontrol->private_value;
  1526. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1527. int i;
  1528. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1529. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1530. return 0;
  1531. }
  1532. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1533. struct snd_ctl_elem_value *ucontrol)
  1534. {
  1535. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1536. struct hda_codec *codec = info->private_data;
  1537. struct hdmi_spec *spec = codec->spec;
  1538. int pin_idx = kcontrol->private_value;
  1539. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1540. unsigned int ctl_idx;
  1541. struct snd_pcm_substream *substream;
  1542. unsigned char chmap[8];
  1543. int i, ca, prepared = 0;
  1544. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1545. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1546. if (!substream || !substream->runtime)
  1547. return 0; /* just for avoiding error from alsactl restore */
  1548. switch (substream->runtime->status->state) {
  1549. case SNDRV_PCM_STATE_OPEN:
  1550. case SNDRV_PCM_STATE_SETUP:
  1551. break;
  1552. case SNDRV_PCM_STATE_PREPARED:
  1553. prepared = 1;
  1554. break;
  1555. default:
  1556. return -EBUSY;
  1557. }
  1558. memset(chmap, 0, sizeof(chmap));
  1559. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1560. chmap[i] = ucontrol->value.integer.value[i];
  1561. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1562. return 0;
  1563. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1564. if (ca < 0)
  1565. return -EINVAL;
  1566. mutex_lock(&per_pin->lock);
  1567. per_pin->chmap_set = true;
  1568. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1569. if (prepared)
  1570. hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
  1571. mutex_unlock(&per_pin->lock);
  1572. return 0;
  1573. }
  1574. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1575. {
  1576. struct hdmi_spec *spec = codec->spec;
  1577. int pin_idx;
  1578. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1579. struct hda_pcm *info;
  1580. struct hda_pcm_stream *pstr;
  1581. struct hdmi_spec_per_pin *per_pin;
  1582. per_pin = get_pin(spec, pin_idx);
  1583. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1584. info = snd_array_new(&spec->pcm_rec);
  1585. if (!info)
  1586. return -ENOMEM;
  1587. info->name = per_pin->pcm_name;
  1588. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1589. info->own_chmap = true;
  1590. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1591. pstr->substreams = 1;
  1592. pstr->ops = generic_ops;
  1593. /* other pstr fields are set in open */
  1594. }
  1595. codec->num_pcms = spec->num_pins;
  1596. codec->pcm_info = spec->pcm_rec.list;
  1597. return 0;
  1598. }
  1599. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1600. {
  1601. char hdmi_str[32] = "HDMI/DP";
  1602. struct hdmi_spec *spec = codec->spec;
  1603. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1604. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1605. if (pcmdev > 0)
  1606. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1607. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1608. strncat(hdmi_str, " Phantom",
  1609. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1610. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1611. }
  1612. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1613. {
  1614. struct hdmi_spec *spec = codec->spec;
  1615. int err;
  1616. int pin_idx;
  1617. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1618. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1619. err = generic_hdmi_build_jack(codec, pin_idx);
  1620. if (err < 0)
  1621. return err;
  1622. err = snd_hda_create_dig_out_ctls(codec,
  1623. per_pin->pin_nid,
  1624. per_pin->mux_nids[0],
  1625. HDA_PCM_TYPE_HDMI);
  1626. if (err < 0)
  1627. return err;
  1628. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1629. /* add control for ELD Bytes */
  1630. err = hdmi_create_eld_ctl(codec, pin_idx,
  1631. get_pcm_rec(spec, pin_idx)->device);
  1632. if (err < 0)
  1633. return err;
  1634. hdmi_present_sense(per_pin, 0);
  1635. }
  1636. /* add channel maps */
  1637. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1638. struct snd_pcm_chmap *chmap;
  1639. struct snd_kcontrol *kctl;
  1640. int i;
  1641. if (!codec->pcm_info[pin_idx].pcm)
  1642. break;
  1643. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1644. SNDRV_PCM_STREAM_PLAYBACK,
  1645. NULL, 0, pin_idx, &chmap);
  1646. if (err < 0)
  1647. return err;
  1648. /* override handlers */
  1649. chmap->private_data = codec;
  1650. kctl = chmap->kctl;
  1651. for (i = 0; i < kctl->count; i++)
  1652. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1653. kctl->info = hdmi_chmap_ctl_info;
  1654. kctl->get = hdmi_chmap_ctl_get;
  1655. kctl->put = hdmi_chmap_ctl_put;
  1656. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1657. }
  1658. return 0;
  1659. }
  1660. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1661. {
  1662. struct hdmi_spec *spec = codec->spec;
  1663. int pin_idx;
  1664. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1665. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1666. per_pin->codec = codec;
  1667. mutex_init(&per_pin->lock);
  1668. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1669. eld_proc_new(per_pin, pin_idx);
  1670. }
  1671. return 0;
  1672. }
  1673. static int generic_hdmi_init(struct hda_codec *codec)
  1674. {
  1675. struct hdmi_spec *spec = codec->spec;
  1676. int pin_idx;
  1677. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1678. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1679. hda_nid_t pin_nid = per_pin->pin_nid;
  1680. hdmi_init_pin(codec, pin_nid);
  1681. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1682. }
  1683. return 0;
  1684. }
  1685. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1686. {
  1687. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1688. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1689. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1690. }
  1691. static void hdmi_array_free(struct hdmi_spec *spec)
  1692. {
  1693. snd_array_free(&spec->pins);
  1694. snd_array_free(&spec->cvts);
  1695. snd_array_free(&spec->pcm_rec);
  1696. }
  1697. static void generic_hdmi_free(struct hda_codec *codec)
  1698. {
  1699. struct hdmi_spec *spec = codec->spec;
  1700. int pin_idx;
  1701. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1702. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1703. cancel_delayed_work(&per_pin->work);
  1704. eld_proc_free(per_pin);
  1705. }
  1706. flush_workqueue(codec->bus->workq);
  1707. hdmi_array_free(spec);
  1708. kfree(spec);
  1709. }
  1710. #ifdef CONFIG_PM
  1711. static int generic_hdmi_resume(struct hda_codec *codec)
  1712. {
  1713. struct hdmi_spec *spec = codec->spec;
  1714. int pin_idx;
  1715. generic_hdmi_init(codec);
  1716. snd_hda_codec_resume_amp(codec);
  1717. snd_hda_codec_resume_cache(codec);
  1718. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1719. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1720. hdmi_present_sense(per_pin, 1);
  1721. }
  1722. return 0;
  1723. }
  1724. #endif
  1725. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1726. .init = generic_hdmi_init,
  1727. .free = generic_hdmi_free,
  1728. .build_pcms = generic_hdmi_build_pcms,
  1729. .build_controls = generic_hdmi_build_controls,
  1730. .unsol_event = hdmi_unsol_event,
  1731. #ifdef CONFIG_PM
  1732. .resume = generic_hdmi_resume,
  1733. #endif
  1734. };
  1735. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1736. hda_nid_t nid)
  1737. {
  1738. struct hdmi_spec *spec = codec->spec;
  1739. hda_nid_t conns[4];
  1740. int nconns;
  1741. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1742. if (nconns == spec->num_cvts &&
  1743. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1744. return;
  1745. /* override pins connection list */
  1746. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1747. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1748. }
  1749. #define INTEL_VENDOR_NID 0x08
  1750. #define INTEL_GET_VENDOR_VERB 0xf81
  1751. #define INTEL_SET_VENDOR_VERB 0x781
  1752. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1753. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1754. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1755. bool update_tree)
  1756. {
  1757. unsigned int vendor_param;
  1758. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1759. INTEL_GET_VENDOR_VERB, 0);
  1760. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1761. return;
  1762. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1763. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1764. INTEL_SET_VENDOR_VERB, vendor_param);
  1765. if (vendor_param == -1)
  1766. return;
  1767. if (update_tree)
  1768. snd_hda_codec_update_widgets(codec);
  1769. }
  1770. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1771. {
  1772. unsigned int vendor_param;
  1773. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1774. INTEL_GET_VENDOR_VERB, 0);
  1775. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1776. return;
  1777. /* enable DP1.2 mode */
  1778. vendor_param |= INTEL_EN_DP12;
  1779. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1780. INTEL_SET_VENDOR_VERB, vendor_param);
  1781. }
  1782. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1783. * Otherwise you may get severe h/w communication errors.
  1784. */
  1785. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1786. unsigned int power_state)
  1787. {
  1788. if (power_state == AC_PWRST_D0) {
  1789. intel_haswell_enable_all_pins(codec, false);
  1790. intel_haswell_fixup_enable_dp12(codec);
  1791. }
  1792. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1793. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1794. }
  1795. static int patch_generic_hdmi(struct hda_codec *codec)
  1796. {
  1797. struct hdmi_spec *spec;
  1798. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1799. if (spec == NULL)
  1800. return -ENOMEM;
  1801. codec->spec = spec;
  1802. hdmi_array_init(spec, 4);
  1803. if (is_haswell(codec)) {
  1804. intel_haswell_enable_all_pins(codec, true);
  1805. intel_haswell_fixup_enable_dp12(codec);
  1806. }
  1807. if (hdmi_parse_codec(codec) < 0) {
  1808. codec->spec = NULL;
  1809. kfree(spec);
  1810. return -EINVAL;
  1811. }
  1812. codec->patch_ops = generic_hdmi_patch_ops;
  1813. if (is_haswell(codec)) {
  1814. codec->patch_ops.set_power_state = haswell_set_power_state;
  1815. codec->dp_mst = true;
  1816. }
  1817. generic_hdmi_init_per_pins(codec);
  1818. init_channel_allocations();
  1819. return 0;
  1820. }
  1821. /*
  1822. * Shared non-generic implementations
  1823. */
  1824. static int simple_playback_build_pcms(struct hda_codec *codec)
  1825. {
  1826. struct hdmi_spec *spec = codec->spec;
  1827. struct hda_pcm *info;
  1828. unsigned int chans;
  1829. struct hda_pcm_stream *pstr;
  1830. struct hdmi_spec_per_cvt *per_cvt;
  1831. per_cvt = get_cvt(spec, 0);
  1832. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1833. chans = get_wcaps_channels(chans);
  1834. info = snd_array_new(&spec->pcm_rec);
  1835. if (!info)
  1836. return -ENOMEM;
  1837. info->name = get_pin(spec, 0)->pcm_name;
  1838. sprintf(info->name, "HDMI 0");
  1839. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1840. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1841. *pstr = spec->pcm_playback;
  1842. pstr->nid = per_cvt->cvt_nid;
  1843. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1844. pstr->channels_max = chans;
  1845. codec->num_pcms = 1;
  1846. codec->pcm_info = info;
  1847. return 0;
  1848. }
  1849. /* unsolicited event for jack sensing */
  1850. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1851. unsigned int res)
  1852. {
  1853. snd_hda_jack_set_dirty_all(codec);
  1854. snd_hda_jack_report_sync(codec);
  1855. }
  1856. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1857. * as long as spec->pins[] is set correctly
  1858. */
  1859. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1860. static int simple_playback_build_controls(struct hda_codec *codec)
  1861. {
  1862. struct hdmi_spec *spec = codec->spec;
  1863. struct hdmi_spec_per_cvt *per_cvt;
  1864. int err;
  1865. per_cvt = get_cvt(spec, 0);
  1866. err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
  1867. per_cvt->cvt_nid);
  1868. if (err < 0)
  1869. return err;
  1870. return simple_hdmi_build_jack(codec, 0);
  1871. }
  1872. static int simple_playback_init(struct hda_codec *codec)
  1873. {
  1874. struct hdmi_spec *spec = codec->spec;
  1875. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  1876. hda_nid_t pin = per_pin->pin_nid;
  1877. snd_hda_codec_write(codec, pin, 0,
  1878. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1879. /* some codecs require to unmute the pin */
  1880. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1881. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1882. AMP_OUT_UNMUTE);
  1883. snd_hda_jack_detect_enable(codec, pin, pin);
  1884. return 0;
  1885. }
  1886. static void simple_playback_free(struct hda_codec *codec)
  1887. {
  1888. struct hdmi_spec *spec = codec->spec;
  1889. hdmi_array_free(spec);
  1890. kfree(spec);
  1891. }
  1892. /*
  1893. * Nvidia specific implementations
  1894. */
  1895. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1896. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1897. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1898. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1899. #define nvhdmi_master_con_nid_7x 0x04
  1900. #define nvhdmi_master_pin_nid_7x 0x05
  1901. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1902. /*front, rear, clfe, rear_surr */
  1903. 0x6, 0x8, 0xa, 0xc,
  1904. };
  1905. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1906. /* set audio protect on */
  1907. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1908. /* enable digital output on pin widget */
  1909. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1910. {} /* terminator */
  1911. };
  1912. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1913. /* set audio protect on */
  1914. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1915. /* enable digital output on pin widget */
  1916. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1917. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1918. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1919. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1920. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1921. {} /* terminator */
  1922. };
  1923. #ifdef LIMITED_RATE_FMT_SUPPORT
  1924. /* support only the safe format and rate */
  1925. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1926. #define SUPPORTED_MAXBPS 16
  1927. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1928. #else
  1929. /* support all rates and formats */
  1930. #define SUPPORTED_RATES \
  1931. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1932. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1933. SNDRV_PCM_RATE_192000)
  1934. #define SUPPORTED_MAXBPS 24
  1935. #define SUPPORTED_FORMATS \
  1936. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1937. #endif
  1938. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1939. {
  1940. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1941. return 0;
  1942. }
  1943. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1944. {
  1945. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1946. return 0;
  1947. }
  1948. static unsigned int channels_2_6_8[] = {
  1949. 2, 6, 8
  1950. };
  1951. static unsigned int channels_2_8[] = {
  1952. 2, 8
  1953. };
  1954. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1955. .count = ARRAY_SIZE(channels_2_6_8),
  1956. .list = channels_2_6_8,
  1957. .mask = 0,
  1958. };
  1959. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1960. .count = ARRAY_SIZE(channels_2_8),
  1961. .list = channels_2_8,
  1962. .mask = 0,
  1963. };
  1964. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1965. struct hda_codec *codec,
  1966. struct snd_pcm_substream *substream)
  1967. {
  1968. struct hdmi_spec *spec = codec->spec;
  1969. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1970. switch (codec->preset->id) {
  1971. case 0x10de0002:
  1972. case 0x10de0003:
  1973. case 0x10de0005:
  1974. case 0x10de0006:
  1975. hw_constraints_channels = &hw_constraints_2_8_channels;
  1976. break;
  1977. case 0x10de0007:
  1978. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1979. break;
  1980. default:
  1981. break;
  1982. }
  1983. if (hw_constraints_channels != NULL) {
  1984. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1985. SNDRV_PCM_HW_PARAM_CHANNELS,
  1986. hw_constraints_channels);
  1987. } else {
  1988. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1989. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1990. }
  1991. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1992. }
  1993. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1994. struct hda_codec *codec,
  1995. struct snd_pcm_substream *substream)
  1996. {
  1997. struct hdmi_spec *spec = codec->spec;
  1998. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1999. }
  2000. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2001. struct hda_codec *codec,
  2002. unsigned int stream_tag,
  2003. unsigned int format,
  2004. struct snd_pcm_substream *substream)
  2005. {
  2006. struct hdmi_spec *spec = codec->spec;
  2007. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  2008. stream_tag, format, substream);
  2009. }
  2010. static const struct hda_pcm_stream simple_pcm_playback = {
  2011. .substreams = 1,
  2012. .channels_min = 2,
  2013. .channels_max = 2,
  2014. .ops = {
  2015. .open = simple_playback_pcm_open,
  2016. .close = simple_playback_pcm_close,
  2017. .prepare = simple_playback_pcm_prepare
  2018. },
  2019. };
  2020. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  2021. .build_controls = simple_playback_build_controls,
  2022. .build_pcms = simple_playback_build_pcms,
  2023. .init = simple_playback_init,
  2024. .free = simple_playback_free,
  2025. .unsol_event = simple_hdmi_unsol_event,
  2026. };
  2027. static int patch_simple_hdmi(struct hda_codec *codec,
  2028. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  2029. {
  2030. struct hdmi_spec *spec;
  2031. struct hdmi_spec_per_cvt *per_cvt;
  2032. struct hdmi_spec_per_pin *per_pin;
  2033. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2034. if (!spec)
  2035. return -ENOMEM;
  2036. codec->spec = spec;
  2037. hdmi_array_init(spec, 1);
  2038. spec->multiout.num_dacs = 0; /* no analog */
  2039. spec->multiout.max_channels = 2;
  2040. spec->multiout.dig_out_nid = cvt_nid;
  2041. spec->num_cvts = 1;
  2042. spec->num_pins = 1;
  2043. per_pin = snd_array_new(&spec->pins);
  2044. per_cvt = snd_array_new(&spec->cvts);
  2045. if (!per_pin || !per_cvt) {
  2046. simple_playback_free(codec);
  2047. return -ENOMEM;
  2048. }
  2049. per_cvt->cvt_nid = cvt_nid;
  2050. per_pin->pin_nid = pin_nid;
  2051. spec->pcm_playback = simple_pcm_playback;
  2052. codec->patch_ops = simple_hdmi_patch_ops;
  2053. return 0;
  2054. }
  2055. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  2056. int channels)
  2057. {
  2058. unsigned int chanmask;
  2059. int chan = channels ? (channels - 1) : 1;
  2060. switch (channels) {
  2061. default:
  2062. case 0:
  2063. case 2:
  2064. chanmask = 0x00;
  2065. break;
  2066. case 4:
  2067. chanmask = 0x08;
  2068. break;
  2069. case 6:
  2070. chanmask = 0x0b;
  2071. break;
  2072. case 8:
  2073. chanmask = 0x13;
  2074. break;
  2075. }
  2076. /* Set the audio infoframe channel allocation and checksum fields. The
  2077. * channel count is computed implicitly by the hardware. */
  2078. snd_hda_codec_write(codec, 0x1, 0,
  2079. Nv_VERB_SET_Channel_Allocation, chanmask);
  2080. snd_hda_codec_write(codec, 0x1, 0,
  2081. Nv_VERB_SET_Info_Frame_Checksum,
  2082. (0x71 - chan - chanmask));
  2083. }
  2084. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  2085. struct hda_codec *codec,
  2086. struct snd_pcm_substream *substream)
  2087. {
  2088. struct hdmi_spec *spec = codec->spec;
  2089. int i;
  2090. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  2091. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  2092. for (i = 0; i < 4; i++) {
  2093. /* set the stream id */
  2094. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2095. AC_VERB_SET_CHANNEL_STREAMID, 0);
  2096. /* set the stream format */
  2097. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2098. AC_VERB_SET_STREAM_FORMAT, 0);
  2099. }
  2100. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  2101. * streams are disabled. */
  2102. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2103. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2104. }
  2105. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  2106. struct hda_codec *codec,
  2107. unsigned int stream_tag,
  2108. unsigned int format,
  2109. struct snd_pcm_substream *substream)
  2110. {
  2111. int chs;
  2112. unsigned int dataDCC2, channel_id;
  2113. int i;
  2114. struct hdmi_spec *spec = codec->spec;
  2115. struct hda_spdif_out *spdif;
  2116. struct hdmi_spec_per_cvt *per_cvt;
  2117. mutex_lock(&codec->spdif_mutex);
  2118. per_cvt = get_cvt(spec, 0);
  2119. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2120. chs = substream->runtime->channels;
  2121. dataDCC2 = 0x2;
  2122. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2123. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2124. snd_hda_codec_write(codec,
  2125. nvhdmi_master_con_nid_7x,
  2126. 0,
  2127. AC_VERB_SET_DIGI_CONVERT_1,
  2128. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2129. /* set the stream id */
  2130. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2131. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2132. /* set the stream format */
  2133. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2134. AC_VERB_SET_STREAM_FORMAT, format);
  2135. /* turn on again (if needed) */
  2136. /* enable and set the channel status audio/data flag */
  2137. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2138. snd_hda_codec_write(codec,
  2139. nvhdmi_master_con_nid_7x,
  2140. 0,
  2141. AC_VERB_SET_DIGI_CONVERT_1,
  2142. spdif->ctls & 0xff);
  2143. snd_hda_codec_write(codec,
  2144. nvhdmi_master_con_nid_7x,
  2145. 0,
  2146. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2147. }
  2148. for (i = 0; i < 4; i++) {
  2149. if (chs == 2)
  2150. channel_id = 0;
  2151. else
  2152. channel_id = i * 2;
  2153. /* turn off SPDIF once;
  2154. *otherwise the IEC958 bits won't be updated
  2155. */
  2156. if (codec->spdif_status_reset &&
  2157. (spdif->ctls & AC_DIG1_ENABLE))
  2158. snd_hda_codec_write(codec,
  2159. nvhdmi_con_nids_7x[i],
  2160. 0,
  2161. AC_VERB_SET_DIGI_CONVERT_1,
  2162. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2163. /* set the stream id */
  2164. snd_hda_codec_write(codec,
  2165. nvhdmi_con_nids_7x[i],
  2166. 0,
  2167. AC_VERB_SET_CHANNEL_STREAMID,
  2168. (stream_tag << 4) | channel_id);
  2169. /* set the stream format */
  2170. snd_hda_codec_write(codec,
  2171. nvhdmi_con_nids_7x[i],
  2172. 0,
  2173. AC_VERB_SET_STREAM_FORMAT,
  2174. format);
  2175. /* turn on again (if needed) */
  2176. /* enable and set the channel status audio/data flag */
  2177. if (codec->spdif_status_reset &&
  2178. (spdif->ctls & AC_DIG1_ENABLE)) {
  2179. snd_hda_codec_write(codec,
  2180. nvhdmi_con_nids_7x[i],
  2181. 0,
  2182. AC_VERB_SET_DIGI_CONVERT_1,
  2183. spdif->ctls & 0xff);
  2184. snd_hda_codec_write(codec,
  2185. nvhdmi_con_nids_7x[i],
  2186. 0,
  2187. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2188. }
  2189. }
  2190. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2191. mutex_unlock(&codec->spdif_mutex);
  2192. return 0;
  2193. }
  2194. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2195. .substreams = 1,
  2196. .channels_min = 2,
  2197. .channels_max = 8,
  2198. .nid = nvhdmi_master_con_nid_7x,
  2199. .rates = SUPPORTED_RATES,
  2200. .maxbps = SUPPORTED_MAXBPS,
  2201. .formats = SUPPORTED_FORMATS,
  2202. .ops = {
  2203. .open = simple_playback_pcm_open,
  2204. .close = nvhdmi_8ch_7x_pcm_close,
  2205. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2206. },
  2207. };
  2208. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2209. {
  2210. struct hdmi_spec *spec;
  2211. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2212. nvhdmi_master_pin_nid_7x);
  2213. if (err < 0)
  2214. return err;
  2215. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2216. /* override the PCM rates, etc, as the codec doesn't give full list */
  2217. spec = codec->spec;
  2218. spec->pcm_playback.rates = SUPPORTED_RATES;
  2219. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2220. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2221. return 0;
  2222. }
  2223. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2224. {
  2225. struct hdmi_spec *spec = codec->spec;
  2226. int err = simple_playback_build_pcms(codec);
  2227. if (!err) {
  2228. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2229. info->own_chmap = true;
  2230. }
  2231. return err;
  2232. }
  2233. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2234. {
  2235. struct hdmi_spec *spec = codec->spec;
  2236. struct hda_pcm *info;
  2237. struct snd_pcm_chmap *chmap;
  2238. int err;
  2239. err = simple_playback_build_controls(codec);
  2240. if (err < 0)
  2241. return err;
  2242. /* add channel maps */
  2243. info = get_pcm_rec(spec, 0);
  2244. err = snd_pcm_add_chmap_ctls(info->pcm,
  2245. SNDRV_PCM_STREAM_PLAYBACK,
  2246. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2247. if (err < 0)
  2248. return err;
  2249. switch (codec->preset->id) {
  2250. case 0x10de0002:
  2251. case 0x10de0003:
  2252. case 0x10de0005:
  2253. case 0x10de0006:
  2254. chmap->channel_mask = (1U << 2) | (1U << 8);
  2255. break;
  2256. case 0x10de0007:
  2257. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2258. }
  2259. return 0;
  2260. }
  2261. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2262. {
  2263. struct hdmi_spec *spec;
  2264. int err = patch_nvhdmi_2ch(codec);
  2265. if (err < 0)
  2266. return err;
  2267. spec = codec->spec;
  2268. spec->multiout.max_channels = 8;
  2269. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2270. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2271. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2272. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2273. /* Initialize the audio infoframe channel mask and checksum to something
  2274. * valid */
  2275. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2276. return 0;
  2277. }
  2278. /*
  2279. * ATI-specific implementations
  2280. *
  2281. * FIXME: we may omit the whole this and use the generic code once after
  2282. * it's confirmed to work.
  2283. */
  2284. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2285. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2286. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2287. struct hda_codec *codec,
  2288. unsigned int stream_tag,
  2289. unsigned int format,
  2290. struct snd_pcm_substream *substream)
  2291. {
  2292. struct hdmi_spec *spec = codec->spec;
  2293. struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
  2294. int chans = substream->runtime->channels;
  2295. int i, err;
  2296. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2297. substream);
  2298. if (err < 0)
  2299. return err;
  2300. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2301. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2302. /* FIXME: XXX */
  2303. for (i = 0; i < chans; i++) {
  2304. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2305. AC_VERB_SET_HDMI_CHAN_SLOT,
  2306. (i << 4) | i);
  2307. }
  2308. return 0;
  2309. }
  2310. static int patch_atihdmi(struct hda_codec *codec)
  2311. {
  2312. struct hdmi_spec *spec;
  2313. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2314. if (err < 0)
  2315. return err;
  2316. spec = codec->spec;
  2317. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2318. return 0;
  2319. }
  2320. /* VIA HDMI Implementation */
  2321. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2322. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2323. static int patch_via_hdmi(struct hda_codec *codec)
  2324. {
  2325. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2326. }
  2327. /*
  2328. * patch entries
  2329. */
  2330. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2331. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2332. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2333. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2334. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2335. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2336. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2337. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2338. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2339. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2340. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2341. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2342. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2343. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2344. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2345. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2346. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2347. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2348. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2349. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2350. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2351. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2352. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2353. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2354. /* 17 is known to be absent */
  2355. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2356. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2357. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2358. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2359. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2360. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2361. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2362. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2363. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2364. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2365. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2366. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
  2367. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2368. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2369. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2370. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2371. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2372. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2373. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2374. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2375. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2376. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2377. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2378. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2379. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2380. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2381. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2382. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2383. {} /* terminator */
  2384. };
  2385. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2386. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2387. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2388. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2389. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2390. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2391. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2392. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2393. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2394. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2395. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2396. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2397. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2398. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2399. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2400. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2401. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2402. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2403. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2404. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2405. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2406. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2407. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2408. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2409. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2410. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2411. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2412. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2413. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2414. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2415. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2416. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2417. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2418. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2419. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2420. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2421. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2422. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2423. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2424. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2425. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2426. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2427. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2428. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2429. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2430. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2431. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2432. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2433. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2434. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2435. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2436. MODULE_LICENSE("GPL");
  2437. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2438. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2439. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2440. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2441. static struct hda_codec_preset_list intel_list = {
  2442. .preset = snd_hda_preset_hdmi,
  2443. .owner = THIS_MODULE,
  2444. };
  2445. static int __init patch_hdmi_init(void)
  2446. {
  2447. return snd_hda_add_codec_preset(&intel_list);
  2448. }
  2449. static void __exit patch_hdmi_exit(void)
  2450. {
  2451. snd_hda_delete_codec_preset(&intel_list);
  2452. }
  2453. module_init(patch_hdmi_init)
  2454. module_exit(patch_hdmi_exit)