exynos5250.dtsi 13 KB

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  1. /*
  2. * SAMSUNG EXYNOS5250 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
  8. * EXYNOS5250 based board files can include this file and provide
  9. * values for board specfic bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13. * additional nodes can be added to this file.
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. /include/ "skeleton.dtsi"
  20. / {
  21. compatible = "samsung,exynos5250";
  22. interrupt-parent = <&gic>;
  23. aliases {
  24. spi0 = &spi_0;
  25. spi1 = &spi_1;
  26. spi2 = &spi_2;
  27. gsc0 = &gsc_0;
  28. gsc1 = &gsc_1;
  29. gsc2 = &gsc_2;
  30. gsc3 = &gsc_3;
  31. mshc0 = &dwmmc_0;
  32. mshc1 = &dwmmc_1;
  33. mshc2 = &dwmmc_2;
  34. mshc3 = &dwmmc_3;
  35. i2c0 = &i2c_0;
  36. i2c1 = &i2c_1;
  37. i2c2 = &i2c_2;
  38. i2c3 = &i2c_3;
  39. i2c4 = &i2c_4;
  40. i2c5 = &i2c_5;
  41. i2c6 = &i2c_6;
  42. i2c7 = &i2c_7;
  43. i2c8 = &i2c_8;
  44. };
  45. gic:interrupt-controller@10481000 {
  46. compatible = "arm,cortex-a9-gic";
  47. #interrupt-cells = <3>;
  48. interrupt-controller;
  49. reg = <0x10481000 0x1000>, <0x10482000 0x2000>;
  50. };
  51. combiner:interrupt-controller@10440000 {
  52. compatible = "samsung,exynos4210-combiner";
  53. #interrupt-cells = <2>;
  54. interrupt-controller;
  55. samsung,combiner-nr = <32>;
  56. reg = <0x10440000 0x1000>;
  57. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  58. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  59. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  60. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  61. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  62. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  63. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  64. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  65. };
  66. watchdog {
  67. compatible = "samsung,s3c2410-wdt";
  68. reg = <0x101D0000 0x100>;
  69. interrupts = <0 42 0>;
  70. };
  71. codec@11000000 {
  72. compatible = "samsung,mfc-v6";
  73. reg = <0x11000000 0x10000>;
  74. interrupts = <0 96 0>;
  75. };
  76. rtc {
  77. compatible = "samsung,s3c6410-rtc";
  78. reg = <0x101E0000 0x100>;
  79. interrupts = <0 43 0>, <0 44 0>;
  80. };
  81. tmu@10060000 {
  82. compatible = "samsung,exynos5250-tmu";
  83. reg = <0x10060000 0x100>;
  84. interrupts = <0 65 0>;
  85. };
  86. serial@12C00000 {
  87. compatible = "samsung,exynos4210-uart";
  88. reg = <0x12C00000 0x100>;
  89. interrupts = <0 51 0>;
  90. };
  91. serial@12C10000 {
  92. compatible = "samsung,exynos4210-uart";
  93. reg = <0x12C10000 0x100>;
  94. interrupts = <0 52 0>;
  95. };
  96. serial@12C20000 {
  97. compatible = "samsung,exynos4210-uart";
  98. reg = <0x12C20000 0x100>;
  99. interrupts = <0 53 0>;
  100. };
  101. serial@12C30000 {
  102. compatible = "samsung,exynos4210-uart";
  103. reg = <0x12C30000 0x100>;
  104. interrupts = <0 54 0>;
  105. };
  106. sata@122F0000 {
  107. compatible = "samsung,exynos5-sata-ahci";
  108. reg = <0x122F0000 0x1ff>;
  109. interrupts = <0 115 0>;
  110. };
  111. sata-phy@12170000 {
  112. compatible = "samsung,exynos5-sata-phy";
  113. reg = <0x12170000 0x1ff>;
  114. };
  115. i2c_0: i2c@12C60000 {
  116. compatible = "samsung,s3c2440-i2c";
  117. reg = <0x12C60000 0x100>;
  118. interrupts = <0 56 0>;
  119. #address-cells = <1>;
  120. #size-cells = <0>;
  121. };
  122. i2c_1: i2c@12C70000 {
  123. compatible = "samsung,s3c2440-i2c";
  124. reg = <0x12C70000 0x100>;
  125. interrupts = <0 57 0>;
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. };
  129. i2c_2: i2c@12C80000 {
  130. compatible = "samsung,s3c2440-i2c";
  131. reg = <0x12C80000 0x100>;
  132. interrupts = <0 58 0>;
  133. #address-cells = <1>;
  134. #size-cells = <0>;
  135. };
  136. i2c_3: i2c@12C90000 {
  137. compatible = "samsung,s3c2440-i2c";
  138. reg = <0x12C90000 0x100>;
  139. interrupts = <0 59 0>;
  140. #address-cells = <1>;
  141. #size-cells = <0>;
  142. };
  143. i2c_4: i2c@12CA0000 {
  144. compatible = "samsung,s3c2440-i2c";
  145. reg = <0x12CA0000 0x100>;
  146. interrupts = <0 60 0>;
  147. #address-cells = <1>;
  148. #size-cells = <0>;
  149. };
  150. i2c_5: i2c@12CB0000 {
  151. compatible = "samsung,s3c2440-i2c";
  152. reg = <0x12CB0000 0x100>;
  153. interrupts = <0 61 0>;
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. };
  157. i2c_6: i2c@12CC0000 {
  158. compatible = "samsung,s3c2440-i2c";
  159. reg = <0x12CC0000 0x100>;
  160. interrupts = <0 62 0>;
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. };
  164. i2c_7: i2c@12CD0000 {
  165. compatible = "samsung,s3c2440-i2c";
  166. reg = <0x12CD0000 0x100>;
  167. interrupts = <0 63 0>;
  168. #address-cells = <1>;
  169. #size-cells = <0>;
  170. };
  171. i2c_8: i2c@12CE0000 {
  172. compatible = "samsung,s3c2440-hdmiphy-i2c";
  173. reg = <0x12CE0000 0x1000>;
  174. interrupts = <0 64 0>;
  175. #address-cells = <1>;
  176. #size-cells = <0>;
  177. };
  178. i2c@121D0000 {
  179. compatible = "samsung,exynos5-sata-phy-i2c";
  180. reg = <0x121D0000 0x100>;
  181. #address-cells = <1>;
  182. #size-cells = <0>;
  183. };
  184. spi_0: spi@12d20000 {
  185. compatible = "samsung,exynos4210-spi";
  186. reg = <0x12d20000 0x100>;
  187. interrupts = <0 66 0>;
  188. dmas = <&pdma0 5
  189. &pdma0 4>;
  190. dma-names = "tx", "rx";
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. };
  194. spi_1: spi@12d30000 {
  195. compatible = "samsung,exynos4210-spi";
  196. reg = <0x12d30000 0x100>;
  197. interrupts = <0 67 0>;
  198. dmas = <&pdma1 5
  199. &pdma1 4>;
  200. dma-names = "tx", "rx";
  201. #address-cells = <1>;
  202. #size-cells = <0>;
  203. };
  204. spi_2: spi@12d40000 {
  205. compatible = "samsung,exynos4210-spi";
  206. reg = <0x12d40000 0x100>;
  207. interrupts = <0 68 0>;
  208. dmas = <&pdma0 7
  209. &pdma0 6>;
  210. dma-names = "tx", "rx";
  211. #address-cells = <1>;
  212. #size-cells = <0>;
  213. };
  214. dwmmc_0: dwmmc0@12200000 {
  215. compatible = "samsung,exynos5250-dw-mshc";
  216. reg = <0x12200000 0x1000>;
  217. interrupts = <0 75 0>;
  218. #address-cells = <1>;
  219. #size-cells = <0>;
  220. };
  221. dwmmc_1: dwmmc1@12210000 {
  222. compatible = "samsung,exynos5250-dw-mshc";
  223. reg = <0x12210000 0x1000>;
  224. interrupts = <0 76 0>;
  225. #address-cells = <1>;
  226. #size-cells = <0>;
  227. };
  228. dwmmc_2: dwmmc2@12220000 {
  229. compatible = "samsung,exynos5250-dw-mshc";
  230. reg = <0x12220000 0x1000>;
  231. interrupts = <0 77 0>;
  232. #address-cells = <1>;
  233. #size-cells = <0>;
  234. };
  235. dwmmc_3: dwmmc3@12230000 {
  236. compatible = "samsung,exynos5250-dw-mshc";
  237. reg = <0x12230000 0x1000>;
  238. interrupts = <0 78 0>;
  239. #address-cells = <1>;
  240. #size-cells = <0>;
  241. };
  242. i2s0: i2s@03830000 {
  243. compatible = "samsung,i2s-v5";
  244. reg = <0x03830000 0x100>;
  245. dmas = <&pdma0 10
  246. &pdma0 9
  247. &pdma0 8>;
  248. dma-names = "tx", "rx", "tx-sec";
  249. samsung,supports-6ch;
  250. samsung,supports-rstclr;
  251. samsung,supports-secdai;
  252. samsung,idma-addr = <0x03000000>;
  253. };
  254. i2s1: i2s@12D60000 {
  255. compatible = "samsung,i2s-v5";
  256. reg = <0x12D60000 0x100>;
  257. dmas = <&pdma1 12
  258. &pdma1 11>;
  259. dma-names = "tx", "rx";
  260. };
  261. i2s2: i2s@12D70000 {
  262. compatible = "samsung,i2s-v5";
  263. reg = <0x12D70000 0x100>;
  264. dmas = <&pdma0 12
  265. &pdma0 11>;
  266. dma-names = "tx", "rx";
  267. };
  268. amba {
  269. #address-cells = <1>;
  270. #size-cells = <1>;
  271. compatible = "arm,amba-bus";
  272. interrupt-parent = <&gic>;
  273. ranges;
  274. pdma0: pdma@121A0000 {
  275. compatible = "arm,pl330", "arm,primecell";
  276. reg = <0x121A0000 0x1000>;
  277. interrupts = <0 34 0>;
  278. };
  279. pdma1: pdma@121B0000 {
  280. compatible = "arm,pl330", "arm,primecell";
  281. reg = <0x121B0000 0x1000>;
  282. interrupts = <0 35 0>;
  283. };
  284. mdma0: mdma@10800000 {
  285. compatible = "arm,pl330", "arm,primecell";
  286. reg = <0x10800000 0x1000>;
  287. interrupts = <0 33 0>;
  288. };
  289. mdma1: mdma@11C10000 {
  290. compatible = "arm,pl330", "arm,primecell";
  291. reg = <0x11C10000 0x1000>;
  292. interrupts = <0 124 0>;
  293. };
  294. };
  295. gpio-controllers {
  296. #address-cells = <1>;
  297. #size-cells = <1>;
  298. gpio-controller;
  299. ranges;
  300. gpa0: gpio-controller@11400000 {
  301. compatible = "samsung,exynos4-gpio";
  302. reg = <0x11400000 0x20>;
  303. #gpio-cells = <4>;
  304. };
  305. gpa1: gpio-controller@11400020 {
  306. compatible = "samsung,exynos4-gpio";
  307. reg = <0x11400020 0x20>;
  308. #gpio-cells = <4>;
  309. };
  310. gpa2: gpio-controller@11400040 {
  311. compatible = "samsung,exynos4-gpio";
  312. reg = <0x11400040 0x20>;
  313. #gpio-cells = <4>;
  314. };
  315. gpb0: gpio-controller@11400060 {
  316. compatible = "samsung,exynos4-gpio";
  317. reg = <0x11400060 0x20>;
  318. #gpio-cells = <4>;
  319. };
  320. gpb1: gpio-controller@11400080 {
  321. compatible = "samsung,exynos4-gpio";
  322. reg = <0x11400080 0x20>;
  323. #gpio-cells = <4>;
  324. };
  325. gpb2: gpio-controller@114000A0 {
  326. compatible = "samsung,exynos4-gpio";
  327. reg = <0x114000A0 0x20>;
  328. #gpio-cells = <4>;
  329. };
  330. gpb3: gpio-controller@114000C0 {
  331. compatible = "samsung,exynos4-gpio";
  332. reg = <0x114000C0 0x20>;
  333. #gpio-cells = <4>;
  334. };
  335. gpc0: gpio-controller@114000E0 {
  336. compatible = "samsung,exynos4-gpio";
  337. reg = <0x114000E0 0x20>;
  338. #gpio-cells = <4>;
  339. };
  340. gpc1: gpio-controller@11400100 {
  341. compatible = "samsung,exynos4-gpio";
  342. reg = <0x11400100 0x20>;
  343. #gpio-cells = <4>;
  344. };
  345. gpc2: gpio-controller@11400120 {
  346. compatible = "samsung,exynos4-gpio";
  347. reg = <0x11400120 0x20>;
  348. #gpio-cells = <4>;
  349. };
  350. gpc3: gpio-controller@11400140 {
  351. compatible = "samsung,exynos4-gpio";
  352. reg = <0x11400140 0x20>;
  353. #gpio-cells = <4>;
  354. };
  355. gpc4: gpio-controller@114002E0 {
  356. compatible = "samsung,exynos4-gpio";
  357. reg = <0x114002E0 0x20>;
  358. #gpio-cells = <4>;
  359. };
  360. gpd0: gpio-controller@11400160 {
  361. compatible = "samsung,exynos4-gpio";
  362. reg = <0x11400160 0x20>;
  363. #gpio-cells = <4>;
  364. };
  365. gpd1: gpio-controller@11400180 {
  366. compatible = "samsung,exynos4-gpio";
  367. reg = <0x11400180 0x20>;
  368. #gpio-cells = <4>;
  369. };
  370. gpy0: gpio-controller@114001A0 {
  371. compatible = "samsung,exynos4-gpio";
  372. reg = <0x114001A0 0x20>;
  373. #gpio-cells = <4>;
  374. };
  375. gpy1: gpio-controller@114001C0 {
  376. compatible = "samsung,exynos4-gpio";
  377. reg = <0x114001C0 0x20>;
  378. #gpio-cells = <4>;
  379. };
  380. gpy2: gpio-controller@114001E0 {
  381. compatible = "samsung,exynos4-gpio";
  382. reg = <0x114001E0 0x20>;
  383. #gpio-cells = <4>;
  384. };
  385. gpy3: gpio-controller@11400200 {
  386. compatible = "samsung,exynos4-gpio";
  387. reg = <0x11400200 0x20>;
  388. #gpio-cells = <4>;
  389. };
  390. gpy4: gpio-controller@11400220 {
  391. compatible = "samsung,exynos4-gpio";
  392. reg = <0x11400220 0x20>;
  393. #gpio-cells = <4>;
  394. };
  395. gpy5: gpio-controller@11400240 {
  396. compatible = "samsung,exynos4-gpio";
  397. reg = <0x11400240 0x20>;
  398. #gpio-cells = <4>;
  399. };
  400. gpy6: gpio-controller@11400260 {
  401. compatible = "samsung,exynos4-gpio";
  402. reg = <0x11400260 0x20>;
  403. #gpio-cells = <4>;
  404. };
  405. gpx0: gpio-controller@11400C00 {
  406. compatible = "samsung,exynos4-gpio";
  407. reg = <0x11400C00 0x20>;
  408. #gpio-cells = <4>;
  409. };
  410. gpx1: gpio-controller@11400C20 {
  411. compatible = "samsung,exynos4-gpio";
  412. reg = <0x11400C20 0x20>;
  413. #gpio-cells = <4>;
  414. };
  415. gpx2: gpio-controller@11400C40 {
  416. compatible = "samsung,exynos4-gpio";
  417. reg = <0x11400C40 0x20>;
  418. #gpio-cells = <4>;
  419. };
  420. gpx3: gpio-controller@11400C60 {
  421. compatible = "samsung,exynos4-gpio";
  422. reg = <0x11400C60 0x20>;
  423. #gpio-cells = <4>;
  424. };
  425. gpe0: gpio-controller@13400000 {
  426. compatible = "samsung,exynos4-gpio";
  427. reg = <0x13400000 0x20>;
  428. #gpio-cells = <4>;
  429. };
  430. gpe1: gpio-controller@13400020 {
  431. compatible = "samsung,exynos4-gpio";
  432. reg = <0x13400020 0x20>;
  433. #gpio-cells = <4>;
  434. };
  435. gpf0: gpio-controller@13400040 {
  436. compatible = "samsung,exynos4-gpio";
  437. reg = <0x13400040 0x20>;
  438. #gpio-cells = <4>;
  439. };
  440. gpf1: gpio-controller@13400060 {
  441. compatible = "samsung,exynos4-gpio";
  442. reg = <0x13400060 0x20>;
  443. #gpio-cells = <4>;
  444. };
  445. gpg0: gpio-controller@13400080 {
  446. compatible = "samsung,exynos4-gpio";
  447. reg = <0x13400080 0x20>;
  448. #gpio-cells = <4>;
  449. };
  450. gpg1: gpio-controller@134000A0 {
  451. compatible = "samsung,exynos4-gpio";
  452. reg = <0x134000A0 0x20>;
  453. #gpio-cells = <4>;
  454. };
  455. gpg2: gpio-controller@134000C0 {
  456. compatible = "samsung,exynos4-gpio";
  457. reg = <0x134000C0 0x20>;
  458. #gpio-cells = <4>;
  459. };
  460. gph0: gpio-controller@134000E0 {
  461. compatible = "samsung,exynos4-gpio";
  462. reg = <0x134000E0 0x20>;
  463. #gpio-cells = <4>;
  464. };
  465. gph1: gpio-controller@13400100 {
  466. compatible = "samsung,exynos4-gpio";
  467. reg = <0x13400100 0x20>;
  468. #gpio-cells = <4>;
  469. };
  470. gpv0: gpio-controller@10D10000 {
  471. compatible = "samsung,exynos4-gpio";
  472. reg = <0x10D10000 0x20>;
  473. #gpio-cells = <4>;
  474. };
  475. gpv1: gpio-controller@10D10020 {
  476. compatible = "samsung,exynos4-gpio";
  477. reg = <0x10D10020 0x20>;
  478. #gpio-cells = <4>;
  479. };
  480. gpv2: gpio-controller@10D10040 {
  481. compatible = "samsung,exynos4-gpio";
  482. reg = <0x10D10060 0x20>;
  483. #gpio-cells = <4>;
  484. };
  485. gpv3: gpio-controller@10D10060 {
  486. compatible = "samsung,exynos4-gpio";
  487. reg = <0x10D10080 0x20>;
  488. #gpio-cells = <4>;
  489. };
  490. gpv4: gpio-controller@10D10080 {
  491. compatible = "samsung,exynos4-gpio";
  492. reg = <0x10D100C0 0x20>;
  493. #gpio-cells = <4>;
  494. };
  495. gpz: gpio-controller@03860000 {
  496. compatible = "samsung,exynos4-gpio";
  497. reg = <0x03860000 0x20>;
  498. #gpio-cells = <4>;
  499. };
  500. };
  501. gsc_0: gsc@0x13e00000 {
  502. compatible = "samsung,exynos5-gsc";
  503. reg = <0x13e00000 0x1000>;
  504. interrupts = <0 85 0>;
  505. };
  506. gsc_1: gsc@0x13e10000 {
  507. compatible = "samsung,exynos5-gsc";
  508. reg = <0x13e10000 0x1000>;
  509. interrupts = <0 86 0>;
  510. };
  511. gsc_2: gsc@0x13e20000 {
  512. compatible = "samsung,exynos5-gsc";
  513. reg = <0x13e20000 0x1000>;
  514. interrupts = <0 87 0>;
  515. };
  516. gsc_3: gsc@0x13e30000 {
  517. compatible = "samsung,exynos5-gsc";
  518. reg = <0x13e30000 0x1000>;
  519. interrupts = <0 88 0>;
  520. };
  521. hdmi {
  522. compatible = "samsung,exynos5-hdmi";
  523. reg = <0x14530000 0x70000>;
  524. interrupts = <0 95 0>;
  525. };
  526. mixer {
  527. compatible = "samsung,exynos5-mixer";
  528. reg = <0x14450000 0x10000>;
  529. interrupts = <0 94 0>;
  530. };
  531. };