isp.c 60 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. *
  44. * This program is distributed in the hope that it will be useful, but
  45. * WITHOUT ANY WARRANTY; without even the implied warranty of
  46. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  47. * General Public License for more details.
  48. *
  49. * You should have received a copy of the GNU General Public License
  50. * along with this program; if not, write to the Free Software
  51. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  52. * 02110-1301 USA
  53. */
  54. #include <asm/cacheflush.h>
  55. #include <linux/clk.h>
  56. #include <linux/clkdev.h>
  57. #include <linux/delay.h>
  58. #include <linux/device.h>
  59. #include <linux/dma-mapping.h>
  60. #include <linux/i2c.h>
  61. #include <linux/interrupt.h>
  62. #include <linux/module.h>
  63. #include <linux/omap-iommu.h>
  64. #include <linux/platform_device.h>
  65. #include <linux/regulator/consumer.h>
  66. #include <linux/slab.h>
  67. #include <linux/sched.h>
  68. #include <linux/vmalloc.h>
  69. #include <media/v4l2-common.h>
  70. #include <media/v4l2-device.h>
  71. #include "isp.h"
  72. #include "ispreg.h"
  73. #include "ispccdc.h"
  74. #include "isppreview.h"
  75. #include "ispresizer.h"
  76. #include "ispcsi2.h"
  77. #include "ispccp2.h"
  78. #include "isph3a.h"
  79. #include "isphist.h"
  80. static unsigned int autoidle;
  81. module_param(autoidle, int, 0444);
  82. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  83. static void isp_save_ctx(struct isp_device *isp);
  84. static void isp_restore_ctx(struct isp_device *isp);
  85. static const struct isp_res_mapping isp_res_maps[] = {
  86. {
  87. .isp_rev = ISP_REVISION_2_0,
  88. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  89. 1 << OMAP3_ISP_IOMEM_CCP2 |
  90. 1 << OMAP3_ISP_IOMEM_CCDC |
  91. 1 << OMAP3_ISP_IOMEM_HIST |
  92. 1 << OMAP3_ISP_IOMEM_H3A |
  93. 1 << OMAP3_ISP_IOMEM_PREV |
  94. 1 << OMAP3_ISP_IOMEM_RESZ |
  95. 1 << OMAP3_ISP_IOMEM_SBL |
  96. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  97. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  98. 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
  99. },
  100. {
  101. .isp_rev = ISP_REVISION_15_0,
  102. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  103. 1 << OMAP3_ISP_IOMEM_CCP2 |
  104. 1 << OMAP3_ISP_IOMEM_CCDC |
  105. 1 << OMAP3_ISP_IOMEM_HIST |
  106. 1 << OMAP3_ISP_IOMEM_H3A |
  107. 1 << OMAP3_ISP_IOMEM_PREV |
  108. 1 << OMAP3_ISP_IOMEM_RESZ |
  109. 1 << OMAP3_ISP_IOMEM_SBL |
  110. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  111. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  112. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
  113. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
  114. 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
  115. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
  116. 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
  117. },
  118. };
  119. /* Structure for saving/restoring ISP module registers */
  120. static struct isp_reg isp_reg_list[] = {
  121. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  122. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  123. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  124. {0, ISP_TOK_TERM, 0}
  125. };
  126. /*
  127. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  128. * @isp: OMAP3 ISP device
  129. *
  130. * In order to force posting of pending writes, we need to write and
  131. * readback the same register, in this case the revision register.
  132. *
  133. * See this link for reference:
  134. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  135. */
  136. void omap3isp_flush(struct isp_device *isp)
  137. {
  138. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  139. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  140. }
  141. /* -----------------------------------------------------------------------------
  142. * XCLK
  143. */
  144. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  145. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  146. {
  147. switch (xclk->id) {
  148. case ISP_XCLK_A:
  149. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  150. ISPTCTRL_CTRL_DIVA_MASK,
  151. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  152. break;
  153. case ISP_XCLK_B:
  154. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  155. ISPTCTRL_CTRL_DIVB_MASK,
  156. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  157. break;
  158. }
  159. }
  160. static int isp_xclk_prepare(struct clk_hw *hw)
  161. {
  162. struct isp_xclk *xclk = to_isp_xclk(hw);
  163. omap3isp_get(xclk->isp);
  164. return 0;
  165. }
  166. static void isp_xclk_unprepare(struct clk_hw *hw)
  167. {
  168. struct isp_xclk *xclk = to_isp_xclk(hw);
  169. omap3isp_put(xclk->isp);
  170. }
  171. static int isp_xclk_enable(struct clk_hw *hw)
  172. {
  173. struct isp_xclk *xclk = to_isp_xclk(hw);
  174. unsigned long flags;
  175. spin_lock_irqsave(&xclk->lock, flags);
  176. isp_xclk_update(xclk, xclk->divider);
  177. xclk->enabled = true;
  178. spin_unlock_irqrestore(&xclk->lock, flags);
  179. return 0;
  180. }
  181. static void isp_xclk_disable(struct clk_hw *hw)
  182. {
  183. struct isp_xclk *xclk = to_isp_xclk(hw);
  184. unsigned long flags;
  185. spin_lock_irqsave(&xclk->lock, flags);
  186. isp_xclk_update(xclk, 0);
  187. xclk->enabled = false;
  188. spin_unlock_irqrestore(&xclk->lock, flags);
  189. }
  190. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  191. unsigned long parent_rate)
  192. {
  193. struct isp_xclk *xclk = to_isp_xclk(hw);
  194. return parent_rate / xclk->divider;
  195. }
  196. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  197. {
  198. u32 divider;
  199. if (*rate >= parent_rate) {
  200. *rate = parent_rate;
  201. return ISPTCTRL_CTRL_DIV_BYPASS;
  202. }
  203. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  204. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  205. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  206. *rate = parent_rate / divider;
  207. return divider;
  208. }
  209. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  210. unsigned long *parent_rate)
  211. {
  212. isp_xclk_calc_divider(&rate, *parent_rate);
  213. return rate;
  214. }
  215. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  216. unsigned long parent_rate)
  217. {
  218. struct isp_xclk *xclk = to_isp_xclk(hw);
  219. unsigned long flags;
  220. u32 divider;
  221. divider = isp_xclk_calc_divider(&rate, parent_rate);
  222. spin_lock_irqsave(&xclk->lock, flags);
  223. xclk->divider = divider;
  224. if (xclk->enabled)
  225. isp_xclk_update(xclk, divider);
  226. spin_unlock_irqrestore(&xclk->lock, flags);
  227. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  228. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  229. return 0;
  230. }
  231. static const struct clk_ops isp_xclk_ops = {
  232. .prepare = isp_xclk_prepare,
  233. .unprepare = isp_xclk_unprepare,
  234. .enable = isp_xclk_enable,
  235. .disable = isp_xclk_disable,
  236. .recalc_rate = isp_xclk_recalc_rate,
  237. .round_rate = isp_xclk_round_rate,
  238. .set_rate = isp_xclk_set_rate,
  239. };
  240. static const char *isp_xclk_parent_name = "cam_mclk";
  241. static const struct clk_init_data isp_xclk_init_data = {
  242. .name = "cam_xclk",
  243. .ops = &isp_xclk_ops,
  244. .parent_names = &isp_xclk_parent_name,
  245. .num_parents = 1,
  246. };
  247. static int isp_xclk_init(struct isp_device *isp)
  248. {
  249. struct isp_platform_data *pdata = isp->pdata;
  250. struct clk_init_data init;
  251. unsigned int i;
  252. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  253. struct isp_xclk *xclk = &isp->xclks[i];
  254. struct clk *clk;
  255. xclk->isp = isp;
  256. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  257. xclk->divider = 1;
  258. spin_lock_init(&xclk->lock);
  259. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  260. init.ops = &isp_xclk_ops;
  261. init.parent_names = &isp_xclk_parent_name;
  262. init.num_parents = 1;
  263. xclk->hw.init = &init;
  264. clk = devm_clk_register(isp->dev, &xclk->hw);
  265. if (IS_ERR(clk))
  266. return PTR_ERR(clk);
  267. if (pdata->xclks[i].con_id == NULL &&
  268. pdata->xclks[i].dev_id == NULL)
  269. continue;
  270. xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
  271. if (xclk->lookup == NULL)
  272. return -ENOMEM;
  273. xclk->lookup->con_id = pdata->xclks[i].con_id;
  274. xclk->lookup->dev_id = pdata->xclks[i].dev_id;
  275. xclk->lookup->clk = clk;
  276. clkdev_add(xclk->lookup);
  277. }
  278. return 0;
  279. }
  280. static void isp_xclk_cleanup(struct isp_device *isp)
  281. {
  282. unsigned int i;
  283. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  284. struct isp_xclk *xclk = &isp->xclks[i];
  285. if (xclk->lookup)
  286. clkdev_drop(xclk->lookup);
  287. }
  288. }
  289. /* -----------------------------------------------------------------------------
  290. * Interrupts
  291. */
  292. /*
  293. * isp_enable_interrupts - Enable ISP interrupts.
  294. * @isp: OMAP3 ISP device
  295. */
  296. static void isp_enable_interrupts(struct isp_device *isp)
  297. {
  298. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  299. | IRQ0ENABLE_CSIB_IRQ
  300. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  301. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  302. | IRQ0ENABLE_CCDC_VD0_IRQ
  303. | IRQ0ENABLE_CCDC_VD1_IRQ
  304. | IRQ0ENABLE_HS_VS_IRQ
  305. | IRQ0ENABLE_HIST_DONE_IRQ
  306. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  307. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  308. | IRQ0ENABLE_PRV_DONE_IRQ
  309. | IRQ0ENABLE_RSZ_DONE_IRQ;
  310. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  311. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  312. }
  313. /*
  314. * isp_disable_interrupts - Disable ISP interrupts.
  315. * @isp: OMAP3 ISP device
  316. */
  317. static void isp_disable_interrupts(struct isp_device *isp)
  318. {
  319. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  320. }
  321. /*
  322. * isp_core_init - ISP core settings
  323. * @isp: OMAP3 ISP device
  324. * @idle: Consider idle state.
  325. *
  326. * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
  327. * interrupt source.
  328. *
  329. * We need to configure the HS/VS interrupt source before interrupts get
  330. * enabled, as the sensor might be free-running and the ISP default setting
  331. * (HS edge) would put an unnecessary burden on the CPU.
  332. */
  333. static void isp_core_init(struct isp_device *isp, int idle)
  334. {
  335. isp_reg_writel(isp,
  336. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  337. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  338. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  339. ((isp->revision == ISP_REVISION_15_0) ?
  340. ISP_SYSCONFIG_AUTOIDLE : 0),
  341. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  342. isp_reg_writel(isp,
  343. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  344. ISPCTRL_SYNC_DETECT_VSRISE,
  345. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  346. }
  347. /*
  348. * Configure the bridge and lane shifter. Valid inputs are
  349. *
  350. * CCDC_INPUT_PARALLEL: Parallel interface
  351. * CCDC_INPUT_CSI2A: CSI2a receiver
  352. * CCDC_INPUT_CCP2B: CCP2b receiver
  353. * CCDC_INPUT_CSI2C: CSI2c receiver
  354. *
  355. * The bridge and lane shifter are configured according to the selected input
  356. * and the ISP platform data.
  357. */
  358. void omap3isp_configure_bridge(struct isp_device *isp,
  359. enum ccdc_input_entity input,
  360. const struct isp_parallel_platform_data *pdata,
  361. unsigned int shift, unsigned int bridge)
  362. {
  363. u32 ispctrl_val;
  364. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  365. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  366. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  367. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  368. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  369. ispctrl_val |= bridge;
  370. switch (input) {
  371. case CCDC_INPUT_PARALLEL:
  372. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  373. ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  374. shift += pdata->data_lane_shift * 2;
  375. break;
  376. case CCDC_INPUT_CSI2A:
  377. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  378. break;
  379. case CCDC_INPUT_CCP2B:
  380. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  381. break;
  382. case CCDC_INPUT_CSI2C:
  383. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  384. break;
  385. default:
  386. return;
  387. }
  388. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  389. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  390. }
  391. void omap3isp_hist_dma_done(struct isp_device *isp)
  392. {
  393. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  394. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  395. /* Histogram cannot be enabled in this frame anymore */
  396. atomic_set(&isp->isp_hist.buf_err, 1);
  397. dev_dbg(isp->dev, "hist: Out of synchronization with "
  398. "CCDC. Ignoring next buffer.\n");
  399. }
  400. }
  401. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  402. {
  403. static const char *name[] = {
  404. "CSIA_IRQ",
  405. "res1",
  406. "res2",
  407. "CSIB_LCM_IRQ",
  408. "CSIB_IRQ",
  409. "res5",
  410. "res6",
  411. "res7",
  412. "CCDC_VD0_IRQ",
  413. "CCDC_VD1_IRQ",
  414. "CCDC_VD2_IRQ",
  415. "CCDC_ERR_IRQ",
  416. "H3A_AF_DONE_IRQ",
  417. "H3A_AWB_DONE_IRQ",
  418. "res14",
  419. "res15",
  420. "HIST_DONE_IRQ",
  421. "CCDC_LSC_DONE",
  422. "CCDC_LSC_PREFETCH_COMPLETED",
  423. "CCDC_LSC_PREFETCH_ERROR",
  424. "PRV_DONE_IRQ",
  425. "CBUFF_IRQ",
  426. "res22",
  427. "res23",
  428. "RSZ_DONE_IRQ",
  429. "OVF_IRQ",
  430. "res26",
  431. "res27",
  432. "MMU_ERR_IRQ",
  433. "OCP_ERR_IRQ",
  434. "SEC_ERR_IRQ",
  435. "HS_VS_IRQ",
  436. };
  437. int i;
  438. dev_dbg(isp->dev, "ISP IRQ: ");
  439. for (i = 0; i < ARRAY_SIZE(name); i++) {
  440. if ((1 << i) & irqstatus)
  441. printk(KERN_CONT "%s ", name[i]);
  442. }
  443. printk(KERN_CONT "\n");
  444. }
  445. static void isp_isr_sbl(struct isp_device *isp)
  446. {
  447. struct device *dev = isp->dev;
  448. struct isp_pipeline *pipe;
  449. u32 sbl_pcr;
  450. /*
  451. * Handle shared buffer logic overflows for video buffers.
  452. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  453. */
  454. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  455. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  456. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  457. if (sbl_pcr)
  458. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  459. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  460. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  461. if (pipe != NULL)
  462. pipe->error = true;
  463. }
  464. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  465. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  466. if (pipe != NULL)
  467. pipe->error = true;
  468. }
  469. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  470. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  471. if (pipe != NULL)
  472. pipe->error = true;
  473. }
  474. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  475. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  476. if (pipe != NULL)
  477. pipe->error = true;
  478. }
  479. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  480. | ISPSBL_PCR_RSZ2_WBL_OVF
  481. | ISPSBL_PCR_RSZ3_WBL_OVF
  482. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  483. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  484. if (pipe != NULL)
  485. pipe->error = true;
  486. }
  487. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  488. omap3isp_stat_sbl_overflow(&isp->isp_af);
  489. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  490. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  491. }
  492. /*
  493. * isp_isr - Interrupt Service Routine for Camera ISP module.
  494. * @irq: Not used currently.
  495. * @_isp: Pointer to the OMAP3 ISP device
  496. *
  497. * Handles the corresponding callback if plugged in.
  498. *
  499. * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
  500. * IRQ wasn't handled.
  501. */
  502. static irqreturn_t isp_isr(int irq, void *_isp)
  503. {
  504. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  505. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  506. IRQ0STATUS_CCDC_VD0_IRQ |
  507. IRQ0STATUS_CCDC_VD1_IRQ |
  508. IRQ0STATUS_HS_VS_IRQ;
  509. struct isp_device *isp = _isp;
  510. u32 irqstatus;
  511. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  512. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  513. isp_isr_sbl(isp);
  514. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  515. omap3isp_csi2_isr(&isp->isp_csi2a);
  516. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  517. omap3isp_ccp2_isr(&isp->isp_ccp2);
  518. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  519. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  520. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  521. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  522. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  523. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  524. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  525. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  526. }
  527. if (irqstatus & ccdc_events)
  528. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  529. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  530. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  531. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  532. omap3isp_preview_isr(&isp->isp_prev);
  533. }
  534. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  535. omap3isp_resizer_isr(&isp->isp_res);
  536. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  537. omap3isp_stat_isr(&isp->isp_aewb);
  538. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  539. omap3isp_stat_isr(&isp->isp_af);
  540. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  541. omap3isp_stat_isr(&isp->isp_hist);
  542. omap3isp_flush(isp);
  543. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  544. isp_isr_dbg(isp, irqstatus);
  545. #endif
  546. return IRQ_HANDLED;
  547. }
  548. /* -----------------------------------------------------------------------------
  549. * Pipeline power management
  550. *
  551. * Entities must be powered up when part of a pipeline that contains at least
  552. * one open video device node.
  553. *
  554. * To achieve this use the entity use_count field to track the number of users.
  555. * For entities corresponding to video device nodes the use_count field stores
  556. * the users count of the node. For entities corresponding to subdevs the
  557. * use_count field stores the total number of users of all video device nodes
  558. * in the pipeline.
  559. *
  560. * The omap3isp_pipeline_pm_use() function must be called in the open() and
  561. * close() handlers of video device nodes. It increments or decrements the use
  562. * count of all subdev entities in the pipeline.
  563. *
  564. * To react to link management on powered pipelines, the link setup notification
  565. * callback updates the use count of all entities in the source and sink sides
  566. * of the link.
  567. */
  568. /*
  569. * isp_pipeline_pm_use_count - Count the number of users of a pipeline
  570. * @entity: The entity
  571. *
  572. * Return the total number of users of all video device nodes in the pipeline.
  573. */
  574. static int isp_pipeline_pm_use_count(struct media_entity *entity)
  575. {
  576. struct media_entity_graph graph;
  577. int use = 0;
  578. media_entity_graph_walk_start(&graph, entity);
  579. while ((entity = media_entity_graph_walk_next(&graph))) {
  580. if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
  581. use += entity->use_count;
  582. }
  583. return use;
  584. }
  585. /*
  586. * isp_pipeline_pm_power_one - Apply power change to an entity
  587. * @entity: The entity
  588. * @change: Use count change
  589. *
  590. * Change the entity use count by @change. If the entity is a subdev update its
  591. * power state by calling the core::s_power operation when the use count goes
  592. * from 0 to != 0 or from != 0 to 0.
  593. *
  594. * Return 0 on success or a negative error code on failure.
  595. */
  596. static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
  597. {
  598. struct v4l2_subdev *subdev;
  599. int ret;
  600. subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
  601. ? media_entity_to_v4l2_subdev(entity) : NULL;
  602. if (entity->use_count == 0 && change > 0 && subdev != NULL) {
  603. ret = v4l2_subdev_call(subdev, core, s_power, 1);
  604. if (ret < 0 && ret != -ENOIOCTLCMD)
  605. return ret;
  606. }
  607. entity->use_count += change;
  608. WARN_ON(entity->use_count < 0);
  609. if (entity->use_count == 0 && change < 0 && subdev != NULL)
  610. v4l2_subdev_call(subdev, core, s_power, 0);
  611. return 0;
  612. }
  613. /*
  614. * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
  615. * @entity: The entity
  616. * @change: Use count change
  617. *
  618. * Walk the pipeline to update the use count and the power state of all non-node
  619. * entities.
  620. *
  621. * Return 0 on success or a negative error code on failure.
  622. */
  623. static int isp_pipeline_pm_power(struct media_entity *entity, int change)
  624. {
  625. struct media_entity_graph graph;
  626. struct media_entity *first = entity;
  627. int ret = 0;
  628. if (!change)
  629. return 0;
  630. media_entity_graph_walk_start(&graph, entity);
  631. while (!ret && (entity = media_entity_graph_walk_next(&graph)))
  632. if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
  633. ret = isp_pipeline_pm_power_one(entity, change);
  634. if (!ret)
  635. return 0;
  636. media_entity_graph_walk_start(&graph, first);
  637. while ((first = media_entity_graph_walk_next(&graph))
  638. && first != entity)
  639. if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
  640. isp_pipeline_pm_power_one(first, -change);
  641. return ret;
  642. }
  643. /*
  644. * omap3isp_pipeline_pm_use - Update the use count of an entity
  645. * @entity: The entity
  646. * @use: Use (1) or stop using (0) the entity
  647. *
  648. * Update the use count of all entities in the pipeline and power entities on or
  649. * off accordingly.
  650. *
  651. * Return 0 on success or a negative error code on failure. Powering entities
  652. * off is assumed to never fail. No failure can occur when the use parameter is
  653. * set to 0.
  654. */
  655. int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
  656. {
  657. int change = use ? 1 : -1;
  658. int ret;
  659. mutex_lock(&entity->parent->graph_mutex);
  660. /* Apply use count to node. */
  661. entity->use_count += change;
  662. WARN_ON(entity->use_count < 0);
  663. /* Apply power change to connected non-nodes. */
  664. ret = isp_pipeline_pm_power(entity, change);
  665. if (ret < 0)
  666. entity->use_count -= change;
  667. mutex_unlock(&entity->parent->graph_mutex);
  668. return ret;
  669. }
  670. /*
  671. * isp_pipeline_link_notify - Link management notification callback
  672. * @source: Pad at the start of the link
  673. * @sink: Pad at the end of the link
  674. * @flags: New link flags that will be applied
  675. *
  676. * React to link management on powered pipelines by updating the use count of
  677. * all entities in the source and sink sides of the link. Entities are powered
  678. * on or off accordingly.
  679. *
  680. * Return 0 on success or a negative error code on failure. Powering entities
  681. * off is assumed to never fail. This function will not fail for disconnection
  682. * events.
  683. */
  684. static int isp_pipeline_link_notify(struct media_pad *source,
  685. struct media_pad *sink, u32 flags)
  686. {
  687. int source_use = isp_pipeline_pm_use_count(source->entity);
  688. int sink_use = isp_pipeline_pm_use_count(sink->entity);
  689. int ret;
  690. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  691. /* Powering off entities is assumed to never fail. */
  692. isp_pipeline_pm_power(source->entity, -sink_use);
  693. isp_pipeline_pm_power(sink->entity, -source_use);
  694. return 0;
  695. }
  696. ret = isp_pipeline_pm_power(source->entity, sink_use);
  697. if (ret < 0)
  698. return ret;
  699. ret = isp_pipeline_pm_power(sink->entity, source_use);
  700. if (ret < 0)
  701. isp_pipeline_pm_power(source->entity, -sink_use);
  702. return ret;
  703. }
  704. /* -----------------------------------------------------------------------------
  705. * Pipeline stream management
  706. */
  707. /*
  708. * isp_pipeline_enable - Enable streaming on a pipeline
  709. * @pipe: ISP pipeline
  710. * @mode: Stream mode (single shot or continuous)
  711. *
  712. * Walk the entities chain starting at the pipeline output video node and start
  713. * all modules in the chain in the given mode.
  714. *
  715. * Return 0 if successful, or the return value of the failed video::s_stream
  716. * operation otherwise.
  717. */
  718. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  719. enum isp_pipeline_stream_state mode)
  720. {
  721. struct isp_device *isp = pipe->output->isp;
  722. struct media_entity *entity;
  723. struct media_pad *pad;
  724. struct v4l2_subdev *subdev;
  725. unsigned long flags;
  726. int ret;
  727. /* If the preview engine crashed it might not respond to read/write
  728. * operations on the L4 bus. This would result in a bus fault and a
  729. * kernel oops. Refuse to start streaming in that case. This check must
  730. * be performed before the loop below to avoid starting entities if the
  731. * pipeline won't start anyway (those entities would then likely fail to
  732. * stop, making the problem worse).
  733. */
  734. if ((pipe->entities & isp->crashed) &
  735. (1U << isp->isp_prev.subdev.entity.id))
  736. return -EIO;
  737. spin_lock_irqsave(&pipe->lock, flags);
  738. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  739. spin_unlock_irqrestore(&pipe->lock, flags);
  740. pipe->do_propagation = false;
  741. entity = &pipe->output->video.entity;
  742. while (1) {
  743. pad = &entity->pads[0];
  744. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  745. break;
  746. pad = media_entity_remote_source(pad);
  747. if (pad == NULL ||
  748. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  749. break;
  750. entity = pad->entity;
  751. subdev = media_entity_to_v4l2_subdev(entity);
  752. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  753. if (ret < 0 && ret != -ENOIOCTLCMD)
  754. return ret;
  755. if (subdev == &isp->isp_ccdc.subdev) {
  756. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  757. s_stream, mode);
  758. v4l2_subdev_call(&isp->isp_af.subdev, video,
  759. s_stream, mode);
  760. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  761. s_stream, mode);
  762. pipe->do_propagation = true;
  763. }
  764. }
  765. return 0;
  766. }
  767. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  768. {
  769. return omap3isp_resizer_busy(&isp->isp_res);
  770. }
  771. static int isp_pipeline_wait_preview(struct isp_device *isp)
  772. {
  773. return omap3isp_preview_busy(&isp->isp_prev);
  774. }
  775. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  776. {
  777. return omap3isp_stat_busy(&isp->isp_af)
  778. || omap3isp_stat_busy(&isp->isp_aewb)
  779. || omap3isp_stat_busy(&isp->isp_hist)
  780. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  781. }
  782. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  783. static int isp_pipeline_wait(struct isp_device *isp,
  784. int(*busy)(struct isp_device *isp))
  785. {
  786. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  787. while (!time_after(jiffies, timeout)) {
  788. if (!busy(isp))
  789. return 0;
  790. }
  791. return 1;
  792. }
  793. /*
  794. * isp_pipeline_disable - Disable streaming on a pipeline
  795. * @pipe: ISP pipeline
  796. *
  797. * Walk the entities chain starting at the pipeline output video node and stop
  798. * all modules in the chain. Wait synchronously for the modules to be stopped if
  799. * necessary.
  800. *
  801. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  802. * can't be stopped (in which case a software reset of the ISP is probably
  803. * necessary).
  804. */
  805. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  806. {
  807. struct isp_device *isp = pipe->output->isp;
  808. struct media_entity *entity;
  809. struct media_pad *pad;
  810. struct v4l2_subdev *subdev;
  811. int failure = 0;
  812. int ret;
  813. /*
  814. * We need to stop all the modules after CCDC first or they'll
  815. * never stop since they may not get a full frame from CCDC.
  816. */
  817. entity = &pipe->output->video.entity;
  818. while (1) {
  819. pad = &entity->pads[0];
  820. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  821. break;
  822. pad = media_entity_remote_source(pad);
  823. if (pad == NULL ||
  824. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  825. break;
  826. entity = pad->entity;
  827. subdev = media_entity_to_v4l2_subdev(entity);
  828. if (subdev == &isp->isp_ccdc.subdev) {
  829. v4l2_subdev_call(&isp->isp_aewb.subdev,
  830. video, s_stream, 0);
  831. v4l2_subdev_call(&isp->isp_af.subdev,
  832. video, s_stream, 0);
  833. v4l2_subdev_call(&isp->isp_hist.subdev,
  834. video, s_stream, 0);
  835. }
  836. v4l2_subdev_call(subdev, video, s_stream, 0);
  837. if (subdev == &isp->isp_res.subdev)
  838. ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  839. else if (subdev == &isp->isp_prev.subdev)
  840. ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  841. else if (subdev == &isp->isp_ccdc.subdev)
  842. ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  843. else
  844. ret = 0;
  845. if (ret) {
  846. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  847. /* If the entity failed to stopped, assume it has
  848. * crashed. Mark it as such, the ISP will be reset when
  849. * applications will release it.
  850. */
  851. isp->crashed |= 1U << subdev->entity.id;
  852. failure = -ETIMEDOUT;
  853. }
  854. }
  855. return failure;
  856. }
  857. /*
  858. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  859. * @pipe: ISP pipeline
  860. * @state: Stream state (stopped, single shot or continuous)
  861. *
  862. * Set the pipeline to the given stream state. Pipelines can be started in
  863. * single-shot or continuous mode.
  864. *
  865. * Return 0 if successful, or the return value of the failed video::s_stream
  866. * operation otherwise. The pipeline state is not updated when the operation
  867. * fails, except when stopping the pipeline.
  868. */
  869. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  870. enum isp_pipeline_stream_state state)
  871. {
  872. int ret;
  873. if (state == ISP_PIPELINE_STREAM_STOPPED)
  874. ret = isp_pipeline_disable(pipe);
  875. else
  876. ret = isp_pipeline_enable(pipe, state);
  877. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  878. pipe->stream_state = state;
  879. return ret;
  880. }
  881. /*
  882. * isp_pipeline_resume - Resume streaming on a pipeline
  883. * @pipe: ISP pipeline
  884. *
  885. * Resume video output and input and re-enable pipeline.
  886. */
  887. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  888. {
  889. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  890. omap3isp_video_resume(pipe->output, !singleshot);
  891. if (singleshot)
  892. omap3isp_video_resume(pipe->input, 0);
  893. isp_pipeline_enable(pipe, pipe->stream_state);
  894. }
  895. /*
  896. * isp_pipeline_suspend - Suspend streaming on a pipeline
  897. * @pipe: ISP pipeline
  898. *
  899. * Suspend pipeline.
  900. */
  901. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  902. {
  903. isp_pipeline_disable(pipe);
  904. }
  905. /*
  906. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  907. * video node
  908. * @me: ISP module's media entity
  909. *
  910. * Returns 1 if the entity has an enabled link to the output video node or 0
  911. * otherwise. It's true only while pipeline can have no more than one output
  912. * node.
  913. */
  914. static int isp_pipeline_is_last(struct media_entity *me)
  915. {
  916. struct isp_pipeline *pipe;
  917. struct media_pad *pad;
  918. if (!me->pipe)
  919. return 0;
  920. pipe = to_isp_pipeline(me);
  921. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  922. return 0;
  923. pad = media_entity_remote_source(&pipe->output->pad);
  924. return pad->entity == me;
  925. }
  926. /*
  927. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  928. * @me: ISP module's media entity
  929. *
  930. * Suspend the whole pipeline if module's entity has an enabled link to the
  931. * output video node. It works only while pipeline can have no more than one
  932. * output node.
  933. */
  934. static void isp_suspend_module_pipeline(struct media_entity *me)
  935. {
  936. if (isp_pipeline_is_last(me))
  937. isp_pipeline_suspend(to_isp_pipeline(me));
  938. }
  939. /*
  940. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  941. * @me: ISP module's media entity
  942. *
  943. * Resume the whole pipeline if module's entity has an enabled link to the
  944. * output video node. It works only while pipeline can have no more than one
  945. * output node.
  946. */
  947. static void isp_resume_module_pipeline(struct media_entity *me)
  948. {
  949. if (isp_pipeline_is_last(me))
  950. isp_pipeline_resume(to_isp_pipeline(me));
  951. }
  952. /*
  953. * isp_suspend_modules - Suspend ISP submodules.
  954. * @isp: OMAP3 ISP device
  955. *
  956. * Returns 0 if suspend left in idle state all the submodules properly,
  957. * or returns 1 if a general Reset is required to suspend the submodules.
  958. */
  959. static int isp_suspend_modules(struct isp_device *isp)
  960. {
  961. unsigned long timeout;
  962. omap3isp_stat_suspend(&isp->isp_aewb);
  963. omap3isp_stat_suspend(&isp->isp_af);
  964. omap3isp_stat_suspend(&isp->isp_hist);
  965. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  966. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  967. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  968. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  969. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  970. timeout = jiffies + ISP_STOP_TIMEOUT;
  971. while (omap3isp_stat_busy(&isp->isp_af)
  972. || omap3isp_stat_busy(&isp->isp_aewb)
  973. || omap3isp_stat_busy(&isp->isp_hist)
  974. || omap3isp_preview_busy(&isp->isp_prev)
  975. || omap3isp_resizer_busy(&isp->isp_res)
  976. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  977. if (time_after(jiffies, timeout)) {
  978. dev_info(isp->dev, "can't stop modules.\n");
  979. return 1;
  980. }
  981. msleep(1);
  982. }
  983. return 0;
  984. }
  985. /*
  986. * isp_resume_modules - Resume ISP submodules.
  987. * @isp: OMAP3 ISP device
  988. */
  989. static void isp_resume_modules(struct isp_device *isp)
  990. {
  991. omap3isp_stat_resume(&isp->isp_aewb);
  992. omap3isp_stat_resume(&isp->isp_af);
  993. omap3isp_stat_resume(&isp->isp_hist);
  994. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  995. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  996. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  997. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  998. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  999. }
  1000. /*
  1001. * isp_reset - Reset ISP with a timeout wait for idle.
  1002. * @isp: OMAP3 ISP device
  1003. */
  1004. static int isp_reset(struct isp_device *isp)
  1005. {
  1006. unsigned long timeout = 0;
  1007. isp_reg_writel(isp,
  1008. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  1009. | ISP_SYSCONFIG_SOFTRESET,
  1010. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  1011. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  1012. ISP_SYSSTATUS) & 0x1)) {
  1013. if (timeout++ > 10000) {
  1014. dev_alert(isp->dev, "cannot reset ISP\n");
  1015. return -ETIMEDOUT;
  1016. }
  1017. udelay(1);
  1018. }
  1019. isp->crashed = 0;
  1020. return 0;
  1021. }
  1022. /*
  1023. * isp_save_context - Saves the values of the ISP module registers.
  1024. * @isp: OMAP3 ISP device
  1025. * @reg_list: Structure containing pairs of register address and value to
  1026. * modify on OMAP.
  1027. */
  1028. static void
  1029. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  1030. {
  1031. struct isp_reg *next = reg_list;
  1032. for (; next->reg != ISP_TOK_TERM; next++)
  1033. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  1034. }
  1035. /*
  1036. * isp_restore_context - Restores the values of the ISP module registers.
  1037. * @isp: OMAP3 ISP device
  1038. * @reg_list: Structure containing pairs of register address and value to
  1039. * modify on OMAP.
  1040. */
  1041. static void
  1042. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  1043. {
  1044. struct isp_reg *next = reg_list;
  1045. for (; next->reg != ISP_TOK_TERM; next++)
  1046. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  1047. }
  1048. /*
  1049. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1050. * @isp: OMAP3 ISP device
  1051. *
  1052. * Routine for saving the context of each module in the ISP.
  1053. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1054. */
  1055. static void isp_save_ctx(struct isp_device *isp)
  1056. {
  1057. isp_save_context(isp, isp_reg_list);
  1058. omap_iommu_save_ctx(isp->dev);
  1059. }
  1060. /*
  1061. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1062. * @isp: OMAP3 ISP device
  1063. *
  1064. * Routine for restoring the context of each module in the ISP.
  1065. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1066. */
  1067. static void isp_restore_ctx(struct isp_device *isp)
  1068. {
  1069. isp_restore_context(isp, isp_reg_list);
  1070. omap_iommu_restore_ctx(isp->dev);
  1071. omap3isp_ccdc_restore_context(isp);
  1072. omap3isp_preview_restore_context(isp);
  1073. }
  1074. /* -----------------------------------------------------------------------------
  1075. * SBL resources management
  1076. */
  1077. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  1078. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  1079. OMAP3_ISP_SBL_PREVIEW_READ | \
  1080. OMAP3_ISP_SBL_RESIZER_READ)
  1081. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  1082. OMAP3_ISP_SBL_CSI2A_WRITE | \
  1083. OMAP3_ISP_SBL_CSI2C_WRITE | \
  1084. OMAP3_ISP_SBL_CCDC_WRITE | \
  1085. OMAP3_ISP_SBL_PREVIEW_WRITE)
  1086. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  1087. {
  1088. u32 sbl = 0;
  1089. isp->sbl_resources |= res;
  1090. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  1091. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1092. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  1093. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1094. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  1095. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1096. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  1097. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1098. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  1099. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1100. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  1101. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1102. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1103. }
  1104. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  1105. {
  1106. u32 sbl = 0;
  1107. isp->sbl_resources &= ~res;
  1108. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  1109. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1110. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  1111. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1112. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  1113. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1114. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1115. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1116. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1117. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1118. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1119. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1120. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1121. }
  1122. /*
  1123. * isp_module_sync_idle - Helper to sync module with its idle state
  1124. * @me: ISP submodule's media entity
  1125. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1126. * @stopping: flag which tells module wants to stop
  1127. *
  1128. * This function checks if ISP submodule needs to wait for next interrupt. If
  1129. * yes, makes the caller to sleep while waiting for such event.
  1130. */
  1131. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1132. atomic_t *stopping)
  1133. {
  1134. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1135. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1136. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1137. !isp_pipeline_ready(pipe)))
  1138. return 0;
  1139. /*
  1140. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1141. * scenario. We'll call it here to avoid race conditions.
  1142. */
  1143. atomic_set(stopping, 1);
  1144. smp_mb();
  1145. /*
  1146. * If module is the last one, it's writing to memory. In this case,
  1147. * it's necessary to check if the module is already paused due to
  1148. * DMA queue underrun or if it has to wait for next interrupt to be
  1149. * idle.
  1150. * If it isn't the last one, the function won't sleep but *stopping
  1151. * will still be set to warn next submodule caller's interrupt the
  1152. * module wants to be idle.
  1153. */
  1154. if (isp_pipeline_is_last(me)) {
  1155. struct isp_video *video = pipe->output;
  1156. unsigned long flags;
  1157. spin_lock_irqsave(&video->queue->irqlock, flags);
  1158. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1159. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1160. atomic_set(stopping, 0);
  1161. smp_mb();
  1162. return 0;
  1163. }
  1164. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1165. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1166. msecs_to_jiffies(1000))) {
  1167. atomic_set(stopping, 0);
  1168. smp_mb();
  1169. return -ETIMEDOUT;
  1170. }
  1171. }
  1172. return 0;
  1173. }
  1174. /*
  1175. * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
  1176. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1177. * @stopping: flag which tells module wants to stop
  1178. *
  1179. * This function checks if ISP submodule was stopping. In case of yes, it
  1180. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1181. * Returns 1 if it was stopping or 0 otherwise.
  1182. */
  1183. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1184. atomic_t *stopping)
  1185. {
  1186. if (atomic_cmpxchg(stopping, 1, 0)) {
  1187. wake_up(wait);
  1188. return 1;
  1189. }
  1190. return 0;
  1191. }
  1192. /* --------------------------------------------------------------------------
  1193. * Clock management
  1194. */
  1195. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1196. ISPCTRL_HIST_CLK_EN | \
  1197. ISPCTRL_RSZ_CLK_EN | \
  1198. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1199. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1200. static void __isp_subclk_update(struct isp_device *isp)
  1201. {
  1202. u32 clk = 0;
  1203. /* AEWB and AF share the same clock. */
  1204. if (isp->subclk_resources &
  1205. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1206. clk |= ISPCTRL_H3A_CLK_EN;
  1207. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1208. clk |= ISPCTRL_HIST_CLK_EN;
  1209. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1210. clk |= ISPCTRL_RSZ_CLK_EN;
  1211. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1212. * RAM as well.
  1213. */
  1214. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1215. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1216. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1217. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1218. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1219. ISPCTRL_CLKS_MASK, clk);
  1220. }
  1221. void omap3isp_subclk_enable(struct isp_device *isp,
  1222. enum isp_subclk_resource res)
  1223. {
  1224. isp->subclk_resources |= res;
  1225. __isp_subclk_update(isp);
  1226. }
  1227. void omap3isp_subclk_disable(struct isp_device *isp,
  1228. enum isp_subclk_resource res)
  1229. {
  1230. isp->subclk_resources &= ~res;
  1231. __isp_subclk_update(isp);
  1232. }
  1233. /*
  1234. * isp_enable_clocks - Enable ISP clocks
  1235. * @isp: OMAP3 ISP device
  1236. *
  1237. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1238. * fails.
  1239. */
  1240. static int isp_enable_clocks(struct isp_device *isp)
  1241. {
  1242. int r;
  1243. unsigned long rate;
  1244. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1245. if (r) {
  1246. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1247. goto out_clk_enable_ick;
  1248. }
  1249. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1250. if (r) {
  1251. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1252. goto out_clk_enable_mclk;
  1253. }
  1254. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1255. if (r) {
  1256. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1257. goto out_clk_enable_mclk;
  1258. }
  1259. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1260. if (rate != CM_CAM_MCLK_HZ)
  1261. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1262. " expected : %d\n"
  1263. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1264. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1265. if (r) {
  1266. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1267. goto out_clk_enable_csi2_fclk;
  1268. }
  1269. return 0;
  1270. out_clk_enable_csi2_fclk:
  1271. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1272. out_clk_enable_mclk:
  1273. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1274. out_clk_enable_ick:
  1275. return r;
  1276. }
  1277. /*
  1278. * isp_disable_clocks - Disable ISP clocks
  1279. * @isp: OMAP3 ISP device
  1280. */
  1281. static void isp_disable_clocks(struct isp_device *isp)
  1282. {
  1283. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1284. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1285. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1286. }
  1287. static const char *isp_clocks[] = {
  1288. "cam_ick",
  1289. "cam_mclk",
  1290. "csi2_96m_fck",
  1291. "l3_ick",
  1292. };
  1293. static int isp_get_clocks(struct isp_device *isp)
  1294. {
  1295. struct clk *clk;
  1296. unsigned int i;
  1297. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1298. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1299. if (IS_ERR(clk)) {
  1300. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1301. return PTR_ERR(clk);
  1302. }
  1303. isp->clock[i] = clk;
  1304. }
  1305. return 0;
  1306. }
  1307. /*
  1308. * omap3isp_get - Acquire the ISP resource.
  1309. *
  1310. * Initializes the clocks for the first acquire.
  1311. *
  1312. * Increment the reference count on the ISP. If the first reference is taken,
  1313. * enable clocks and power-up all submodules.
  1314. *
  1315. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1316. */
  1317. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1318. {
  1319. struct isp_device *__isp = isp;
  1320. if (isp == NULL)
  1321. return NULL;
  1322. mutex_lock(&isp->isp_mutex);
  1323. if (isp->ref_count > 0)
  1324. goto out;
  1325. if (isp_enable_clocks(isp) < 0) {
  1326. __isp = NULL;
  1327. goto out;
  1328. }
  1329. /* We don't want to restore context before saving it! */
  1330. if (isp->has_context)
  1331. isp_restore_ctx(isp);
  1332. if (irq)
  1333. isp_enable_interrupts(isp);
  1334. out:
  1335. if (__isp != NULL)
  1336. isp->ref_count++;
  1337. mutex_unlock(&isp->isp_mutex);
  1338. return __isp;
  1339. }
  1340. struct isp_device *omap3isp_get(struct isp_device *isp)
  1341. {
  1342. return __omap3isp_get(isp, true);
  1343. }
  1344. /*
  1345. * omap3isp_put - Release the ISP
  1346. *
  1347. * Decrement the reference count on the ISP. If the last reference is released,
  1348. * power-down all submodules, disable clocks and free temporary buffers.
  1349. */
  1350. void omap3isp_put(struct isp_device *isp)
  1351. {
  1352. if (isp == NULL)
  1353. return;
  1354. mutex_lock(&isp->isp_mutex);
  1355. BUG_ON(isp->ref_count == 0);
  1356. if (--isp->ref_count == 0) {
  1357. isp_disable_interrupts(isp);
  1358. if (isp->domain) {
  1359. isp_save_ctx(isp);
  1360. isp->has_context = 1;
  1361. }
  1362. /* Reset the ISP if an entity has failed to stop. This is the
  1363. * only way to recover from such conditions.
  1364. */
  1365. if (isp->crashed)
  1366. isp_reset(isp);
  1367. isp_disable_clocks(isp);
  1368. }
  1369. mutex_unlock(&isp->isp_mutex);
  1370. }
  1371. /* --------------------------------------------------------------------------
  1372. * Platform device driver
  1373. */
  1374. /*
  1375. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1376. * @isp: OMAP3 ISP device
  1377. */
  1378. #define ISP_PRINT_REGISTER(isp, name)\
  1379. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1380. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1381. #define SBL_PRINT_REGISTER(isp, name)\
  1382. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1383. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1384. void omap3isp_print_status(struct isp_device *isp)
  1385. {
  1386. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1387. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1388. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1389. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1390. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1391. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1392. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1393. ISP_PRINT_REGISTER(isp, CTRL);
  1394. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1395. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1396. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1397. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1398. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1399. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1400. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1401. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1402. SBL_PRINT_REGISTER(isp, PCR);
  1403. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1404. dev_dbg(isp->dev, "--------------------------------------------\n");
  1405. }
  1406. #ifdef CONFIG_PM
  1407. /*
  1408. * Power management support.
  1409. *
  1410. * As the ISP can't properly handle an input video stream interruption on a non
  1411. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1412. * suspended. However, as suspending the sensors can require a running clock,
  1413. * which can be provided by the ISP, the ISP can't be completely suspended
  1414. * before the sensor.
  1415. *
  1416. * To solve this problem power management support is split into prepare/complete
  1417. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1418. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1419. * resume(), and the the pipelines are restarted in complete().
  1420. *
  1421. * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
  1422. * yet.
  1423. */
  1424. static int isp_pm_prepare(struct device *dev)
  1425. {
  1426. struct isp_device *isp = dev_get_drvdata(dev);
  1427. int reset;
  1428. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1429. if (isp->ref_count == 0)
  1430. return 0;
  1431. reset = isp_suspend_modules(isp);
  1432. isp_disable_interrupts(isp);
  1433. isp_save_ctx(isp);
  1434. if (reset)
  1435. isp_reset(isp);
  1436. return 0;
  1437. }
  1438. static int isp_pm_suspend(struct device *dev)
  1439. {
  1440. struct isp_device *isp = dev_get_drvdata(dev);
  1441. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1442. if (isp->ref_count)
  1443. isp_disable_clocks(isp);
  1444. return 0;
  1445. }
  1446. static int isp_pm_resume(struct device *dev)
  1447. {
  1448. struct isp_device *isp = dev_get_drvdata(dev);
  1449. if (isp->ref_count == 0)
  1450. return 0;
  1451. return isp_enable_clocks(isp);
  1452. }
  1453. static void isp_pm_complete(struct device *dev)
  1454. {
  1455. struct isp_device *isp = dev_get_drvdata(dev);
  1456. if (isp->ref_count == 0)
  1457. return;
  1458. isp_restore_ctx(isp);
  1459. isp_enable_interrupts(isp);
  1460. isp_resume_modules(isp);
  1461. }
  1462. #else
  1463. #define isp_pm_prepare NULL
  1464. #define isp_pm_suspend NULL
  1465. #define isp_pm_resume NULL
  1466. #define isp_pm_complete NULL
  1467. #endif /* CONFIG_PM */
  1468. static void isp_unregister_entities(struct isp_device *isp)
  1469. {
  1470. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1471. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1472. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1473. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1474. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1475. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1476. omap3isp_stat_unregister_entities(&isp->isp_af);
  1477. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1478. v4l2_device_unregister(&isp->v4l2_dev);
  1479. media_device_unregister(&isp->media_dev);
  1480. }
  1481. /*
  1482. * isp_register_subdev_group - Register a group of subdevices
  1483. * @isp: OMAP3 ISP device
  1484. * @board_info: I2C subdevs board information array
  1485. *
  1486. * Register all I2C subdevices in the board_info array. The array must be
  1487. * terminated by a NULL entry, and the first entry must be the sensor.
  1488. *
  1489. * Return a pointer to the sensor media entity if it has been successfully
  1490. * registered, or NULL otherwise.
  1491. */
  1492. static struct v4l2_subdev *
  1493. isp_register_subdev_group(struct isp_device *isp,
  1494. struct isp_subdev_i2c_board_info *board_info)
  1495. {
  1496. struct v4l2_subdev *sensor = NULL;
  1497. unsigned int first;
  1498. if (board_info->board_info == NULL)
  1499. return NULL;
  1500. for (first = 1; board_info->board_info; ++board_info, first = 0) {
  1501. struct v4l2_subdev *subdev;
  1502. struct i2c_adapter *adapter;
  1503. adapter = i2c_get_adapter(board_info->i2c_adapter_id);
  1504. if (adapter == NULL) {
  1505. dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
  1506. "device %s\n", __func__,
  1507. board_info->i2c_adapter_id,
  1508. board_info->board_info->type);
  1509. continue;
  1510. }
  1511. subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
  1512. board_info->board_info, NULL);
  1513. if (subdev == NULL) {
  1514. dev_err(isp->dev, "%s: Unable to register subdev %s\n",
  1515. __func__, board_info->board_info->type);
  1516. continue;
  1517. }
  1518. if (first)
  1519. sensor = subdev;
  1520. }
  1521. return sensor;
  1522. }
  1523. static int isp_register_entities(struct isp_device *isp)
  1524. {
  1525. struct isp_platform_data *pdata = isp->pdata;
  1526. struct isp_v4l2_subdevs_group *subdevs;
  1527. int ret;
  1528. isp->media_dev.dev = isp->dev;
  1529. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1530. sizeof(isp->media_dev.model));
  1531. isp->media_dev.hw_revision = isp->revision;
  1532. isp->media_dev.link_notify = isp_pipeline_link_notify;
  1533. ret = media_device_register(&isp->media_dev);
  1534. if (ret < 0) {
  1535. dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
  1536. __func__, ret);
  1537. return ret;
  1538. }
  1539. isp->v4l2_dev.mdev = &isp->media_dev;
  1540. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1541. if (ret < 0) {
  1542. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1543. __func__, ret);
  1544. goto done;
  1545. }
  1546. /* Register internal entities */
  1547. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1548. if (ret < 0)
  1549. goto done;
  1550. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1551. if (ret < 0)
  1552. goto done;
  1553. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1554. if (ret < 0)
  1555. goto done;
  1556. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1557. &isp->v4l2_dev);
  1558. if (ret < 0)
  1559. goto done;
  1560. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1561. if (ret < 0)
  1562. goto done;
  1563. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1564. if (ret < 0)
  1565. goto done;
  1566. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1567. if (ret < 0)
  1568. goto done;
  1569. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1570. if (ret < 0)
  1571. goto done;
  1572. /* Register external entities */
  1573. for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
  1574. struct v4l2_subdev *sensor;
  1575. struct media_entity *input;
  1576. unsigned int flags;
  1577. unsigned int pad;
  1578. unsigned int i;
  1579. sensor = isp_register_subdev_group(isp, subdevs->subdevs);
  1580. if (sensor == NULL)
  1581. continue;
  1582. sensor->host_priv = subdevs;
  1583. /* Connect the sensor to the correct interface module. Parallel
  1584. * sensors are connected directly to the CCDC, while serial
  1585. * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
  1586. * through CSIPHY1 or CSIPHY2.
  1587. */
  1588. switch (subdevs->interface) {
  1589. case ISP_INTERFACE_PARALLEL:
  1590. input = &isp->isp_ccdc.subdev.entity;
  1591. pad = CCDC_PAD_SINK;
  1592. flags = 0;
  1593. break;
  1594. case ISP_INTERFACE_CSI2A_PHY2:
  1595. input = &isp->isp_csi2a.subdev.entity;
  1596. pad = CSI2_PAD_SINK;
  1597. flags = MEDIA_LNK_FL_IMMUTABLE
  1598. | MEDIA_LNK_FL_ENABLED;
  1599. break;
  1600. case ISP_INTERFACE_CCP2B_PHY1:
  1601. case ISP_INTERFACE_CCP2B_PHY2:
  1602. input = &isp->isp_ccp2.subdev.entity;
  1603. pad = CCP2_PAD_SINK;
  1604. flags = 0;
  1605. break;
  1606. case ISP_INTERFACE_CSI2C_PHY1:
  1607. input = &isp->isp_csi2c.subdev.entity;
  1608. pad = CSI2_PAD_SINK;
  1609. flags = MEDIA_LNK_FL_IMMUTABLE
  1610. | MEDIA_LNK_FL_ENABLED;
  1611. break;
  1612. default:
  1613. dev_err(isp->dev, "%s: invalid interface type %u\n",
  1614. __func__, subdevs->interface);
  1615. ret = -EINVAL;
  1616. goto done;
  1617. }
  1618. for (i = 0; i < sensor->entity.num_pads; i++) {
  1619. if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1620. break;
  1621. }
  1622. if (i == sensor->entity.num_pads) {
  1623. dev_err(isp->dev,
  1624. "%s: no source pad in external entity\n",
  1625. __func__);
  1626. ret = -EINVAL;
  1627. goto done;
  1628. }
  1629. ret = media_entity_create_link(&sensor->entity, i, input, pad,
  1630. flags);
  1631. if (ret < 0)
  1632. goto done;
  1633. }
  1634. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1635. done:
  1636. if (ret < 0)
  1637. isp_unregister_entities(isp);
  1638. return ret;
  1639. }
  1640. static void isp_cleanup_modules(struct isp_device *isp)
  1641. {
  1642. omap3isp_h3a_aewb_cleanup(isp);
  1643. omap3isp_h3a_af_cleanup(isp);
  1644. omap3isp_hist_cleanup(isp);
  1645. omap3isp_resizer_cleanup(isp);
  1646. omap3isp_preview_cleanup(isp);
  1647. omap3isp_ccdc_cleanup(isp);
  1648. omap3isp_ccp2_cleanup(isp);
  1649. omap3isp_csi2_cleanup(isp);
  1650. }
  1651. static int isp_initialize_modules(struct isp_device *isp)
  1652. {
  1653. int ret;
  1654. ret = omap3isp_csiphy_init(isp);
  1655. if (ret < 0) {
  1656. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1657. goto error_csiphy;
  1658. }
  1659. ret = omap3isp_csi2_init(isp);
  1660. if (ret < 0) {
  1661. dev_err(isp->dev, "CSI2 initialization failed\n");
  1662. goto error_csi2;
  1663. }
  1664. ret = omap3isp_ccp2_init(isp);
  1665. if (ret < 0) {
  1666. dev_err(isp->dev, "CCP2 initialization failed\n");
  1667. goto error_ccp2;
  1668. }
  1669. ret = omap3isp_ccdc_init(isp);
  1670. if (ret < 0) {
  1671. dev_err(isp->dev, "CCDC initialization failed\n");
  1672. goto error_ccdc;
  1673. }
  1674. ret = omap3isp_preview_init(isp);
  1675. if (ret < 0) {
  1676. dev_err(isp->dev, "Preview initialization failed\n");
  1677. goto error_preview;
  1678. }
  1679. ret = omap3isp_resizer_init(isp);
  1680. if (ret < 0) {
  1681. dev_err(isp->dev, "Resizer initialization failed\n");
  1682. goto error_resizer;
  1683. }
  1684. ret = omap3isp_hist_init(isp);
  1685. if (ret < 0) {
  1686. dev_err(isp->dev, "Histogram initialization failed\n");
  1687. goto error_hist;
  1688. }
  1689. ret = omap3isp_h3a_aewb_init(isp);
  1690. if (ret < 0) {
  1691. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1692. goto error_h3a_aewb;
  1693. }
  1694. ret = omap3isp_h3a_af_init(isp);
  1695. if (ret < 0) {
  1696. dev_err(isp->dev, "H3A AF initialization failed\n");
  1697. goto error_h3a_af;
  1698. }
  1699. /* Connect the submodules. */
  1700. ret = media_entity_create_link(
  1701. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1702. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1703. if (ret < 0)
  1704. goto error_link;
  1705. ret = media_entity_create_link(
  1706. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1707. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1708. if (ret < 0)
  1709. goto error_link;
  1710. ret = media_entity_create_link(
  1711. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1712. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1713. if (ret < 0)
  1714. goto error_link;
  1715. ret = media_entity_create_link(
  1716. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1717. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1718. if (ret < 0)
  1719. goto error_link;
  1720. ret = media_entity_create_link(
  1721. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1722. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1723. if (ret < 0)
  1724. goto error_link;
  1725. ret = media_entity_create_link(
  1726. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1727. &isp->isp_aewb.subdev.entity, 0,
  1728. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1729. if (ret < 0)
  1730. goto error_link;
  1731. ret = media_entity_create_link(
  1732. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1733. &isp->isp_af.subdev.entity, 0,
  1734. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1735. if (ret < 0)
  1736. goto error_link;
  1737. ret = media_entity_create_link(
  1738. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1739. &isp->isp_hist.subdev.entity, 0,
  1740. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1741. if (ret < 0)
  1742. goto error_link;
  1743. return 0;
  1744. error_link:
  1745. omap3isp_h3a_af_cleanup(isp);
  1746. error_h3a_af:
  1747. omap3isp_h3a_aewb_cleanup(isp);
  1748. error_h3a_aewb:
  1749. omap3isp_hist_cleanup(isp);
  1750. error_hist:
  1751. omap3isp_resizer_cleanup(isp);
  1752. error_resizer:
  1753. omap3isp_preview_cleanup(isp);
  1754. error_preview:
  1755. omap3isp_ccdc_cleanup(isp);
  1756. error_ccdc:
  1757. omap3isp_ccp2_cleanup(isp);
  1758. error_ccp2:
  1759. omap3isp_csi2_cleanup(isp);
  1760. error_csi2:
  1761. error_csiphy:
  1762. return ret;
  1763. }
  1764. /*
  1765. * isp_remove - Remove ISP platform device
  1766. * @pdev: Pointer to ISP platform device
  1767. *
  1768. * Always returns 0.
  1769. */
  1770. static int isp_remove(struct platform_device *pdev)
  1771. {
  1772. struct isp_device *isp = platform_get_drvdata(pdev);
  1773. isp_unregister_entities(isp);
  1774. isp_cleanup_modules(isp);
  1775. isp_xclk_cleanup(isp);
  1776. __omap3isp_get(isp, false);
  1777. iommu_detach_device(isp->domain, &pdev->dev);
  1778. iommu_domain_free(isp->domain);
  1779. isp->domain = NULL;
  1780. omap3isp_put(isp);
  1781. return 0;
  1782. }
  1783. static int isp_map_mem_resource(struct platform_device *pdev,
  1784. struct isp_device *isp,
  1785. enum isp_mem_resources res)
  1786. {
  1787. struct resource *mem;
  1788. /* request the mem region for the camera registers */
  1789. mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
  1790. if (!mem) {
  1791. dev_err(isp->dev, "no mem resource?\n");
  1792. return -ENODEV;
  1793. }
  1794. if (!devm_request_mem_region(isp->dev, mem->start, resource_size(mem),
  1795. pdev->name)) {
  1796. dev_err(isp->dev,
  1797. "cannot reserve camera register I/O region\n");
  1798. return -ENODEV;
  1799. }
  1800. isp->mmio_base_phys[res] = mem->start;
  1801. isp->mmio_size[res] = resource_size(mem);
  1802. /* map the region */
  1803. isp->mmio_base[res] = devm_ioremap_nocache(isp->dev,
  1804. isp->mmio_base_phys[res],
  1805. isp->mmio_size[res]);
  1806. if (!isp->mmio_base[res]) {
  1807. dev_err(isp->dev, "cannot map camera register I/O region\n");
  1808. return -ENODEV;
  1809. }
  1810. return 0;
  1811. }
  1812. /*
  1813. * isp_probe - Probe ISP platform device
  1814. * @pdev: Pointer to ISP platform device
  1815. *
  1816. * Returns 0 if successful,
  1817. * -ENOMEM if no memory available,
  1818. * -ENODEV if no platform device resources found
  1819. * or no space for remapping registers,
  1820. * -EINVAL if couldn't install ISR,
  1821. * or clk_get return error value.
  1822. */
  1823. static int isp_probe(struct platform_device *pdev)
  1824. {
  1825. struct isp_platform_data *pdata = pdev->dev.platform_data;
  1826. struct isp_device *isp;
  1827. int ret;
  1828. int i, m;
  1829. if (pdata == NULL)
  1830. return -EINVAL;
  1831. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  1832. if (!isp) {
  1833. dev_err(&pdev->dev, "could not allocate memory\n");
  1834. return -ENOMEM;
  1835. }
  1836. isp->autoidle = autoidle;
  1837. mutex_init(&isp->isp_mutex);
  1838. spin_lock_init(&isp->stat_lock);
  1839. isp->dev = &pdev->dev;
  1840. isp->pdata = pdata;
  1841. isp->ref_count = 0;
  1842. isp->raw_dmamask = DMA_BIT_MASK(32);
  1843. isp->dev->dma_mask = &isp->raw_dmamask;
  1844. isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  1845. platform_set_drvdata(pdev, isp);
  1846. /* Regulators */
  1847. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
  1848. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
  1849. /* Clocks
  1850. *
  1851. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  1852. * manually to read the revision before calling __omap3isp_get().
  1853. */
  1854. ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
  1855. if (ret < 0)
  1856. goto error;
  1857. ret = isp_get_clocks(isp);
  1858. if (ret < 0)
  1859. goto error;
  1860. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1861. if (ret < 0)
  1862. goto error;
  1863. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  1864. dev_info(isp->dev, "Revision %d.%d found\n",
  1865. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  1866. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1867. if (__omap3isp_get(isp, false) == NULL) {
  1868. ret = -ENODEV;
  1869. goto error;
  1870. }
  1871. ret = isp_reset(isp);
  1872. if (ret < 0)
  1873. goto error_isp;
  1874. ret = isp_xclk_init(isp);
  1875. if (ret < 0)
  1876. goto error_isp;
  1877. /* Memory resources */
  1878. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  1879. if (isp->revision == isp_res_maps[m].isp_rev)
  1880. break;
  1881. if (m == ARRAY_SIZE(isp_res_maps)) {
  1882. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  1883. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  1884. ret = -ENODEV;
  1885. goto error_isp;
  1886. }
  1887. for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
  1888. if (isp_res_maps[m].map & 1 << i) {
  1889. ret = isp_map_mem_resource(pdev, isp, i);
  1890. if (ret)
  1891. goto error_isp;
  1892. }
  1893. }
  1894. isp->domain = iommu_domain_alloc(pdev->dev.bus);
  1895. if (!isp->domain) {
  1896. dev_err(isp->dev, "can't alloc iommu domain\n");
  1897. ret = -ENOMEM;
  1898. goto error_isp;
  1899. }
  1900. ret = iommu_attach_device(isp->domain, &pdev->dev);
  1901. if (ret) {
  1902. dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
  1903. goto free_domain;
  1904. }
  1905. /* Interrupt */
  1906. isp->irq_num = platform_get_irq(pdev, 0);
  1907. if (isp->irq_num <= 0) {
  1908. dev_err(isp->dev, "No IRQ resource\n");
  1909. ret = -ENODEV;
  1910. goto detach_dev;
  1911. }
  1912. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  1913. "OMAP3 ISP", isp)) {
  1914. dev_err(isp->dev, "Unable to request IRQ\n");
  1915. ret = -EINVAL;
  1916. goto detach_dev;
  1917. }
  1918. /* Entities */
  1919. ret = isp_initialize_modules(isp);
  1920. if (ret < 0)
  1921. goto detach_dev;
  1922. ret = isp_register_entities(isp);
  1923. if (ret < 0)
  1924. goto error_modules;
  1925. isp_core_init(isp, 1);
  1926. omap3isp_put(isp);
  1927. return 0;
  1928. error_modules:
  1929. isp_cleanup_modules(isp);
  1930. detach_dev:
  1931. iommu_detach_device(isp->domain, &pdev->dev);
  1932. free_domain:
  1933. iommu_domain_free(isp->domain);
  1934. error_isp:
  1935. isp_xclk_cleanup(isp);
  1936. omap3isp_put(isp);
  1937. error:
  1938. platform_set_drvdata(pdev, NULL);
  1939. mutex_destroy(&isp->isp_mutex);
  1940. return ret;
  1941. }
  1942. static const struct dev_pm_ops omap3isp_pm_ops = {
  1943. .prepare = isp_pm_prepare,
  1944. .suspend = isp_pm_suspend,
  1945. .resume = isp_pm_resume,
  1946. .complete = isp_pm_complete,
  1947. };
  1948. static struct platform_device_id omap3isp_id_table[] = {
  1949. { "omap3isp", 0 },
  1950. { },
  1951. };
  1952. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  1953. static struct platform_driver omap3isp_driver = {
  1954. .probe = isp_probe,
  1955. .remove = isp_remove,
  1956. .id_table = omap3isp_id_table,
  1957. .driver = {
  1958. .owner = THIS_MODULE,
  1959. .name = "omap3isp",
  1960. .pm = &omap3isp_pm_ops,
  1961. },
  1962. };
  1963. module_platform_driver(omap3isp_driver);
  1964. MODULE_AUTHOR("Nokia Corporation");
  1965. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  1966. MODULE_LICENSE("GPL");
  1967. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);