vfio_pci.c 16 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #include <linux/device.h>
  14. #include <linux/eventfd.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/iommu.h>
  17. #include <linux/module.h>
  18. #include <linux/mutex.h>
  19. #include <linux/notifier.h>
  20. #include <linux/pci.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/uaccess.h>
  25. #include <linux/vfio.h>
  26. #include "vfio_pci_private.h"
  27. #define DRIVER_VERSION "0.2"
  28. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  29. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  30. static bool nointxmask;
  31. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  32. MODULE_PARM_DESC(nointxmask,
  33. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  34. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  35. {
  36. struct pci_dev *pdev = vdev->pdev;
  37. int ret;
  38. u16 cmd;
  39. u8 msix_pos;
  40. ret = pci_enable_device(pdev);
  41. if (ret)
  42. return ret;
  43. vdev->reset_works = (pci_reset_function(pdev) == 0);
  44. pci_save_state(pdev);
  45. vdev->pci_saved_state = pci_store_saved_state(pdev);
  46. if (!vdev->pci_saved_state)
  47. pr_debug("%s: Couldn't store %s saved state\n",
  48. __func__, dev_name(&pdev->dev));
  49. ret = vfio_config_init(vdev);
  50. if (ret) {
  51. pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state);
  52. pci_disable_device(pdev);
  53. return ret;
  54. }
  55. if (likely(!nointxmask))
  56. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  57. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  58. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  59. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  60. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  61. }
  62. msix_pos = pdev->msix_cap;
  63. if (msix_pos) {
  64. u16 flags;
  65. u32 table;
  66. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  67. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  68. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  69. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  70. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  71. } else
  72. vdev->msix_bar = 0xFF;
  73. #ifdef CONFIG_VFIO_PCI_VGA
  74. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  75. vdev->has_vga = true;
  76. #endif
  77. return 0;
  78. }
  79. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  80. {
  81. struct pci_dev *pdev = vdev->pdev;
  82. int bar;
  83. pci_disable_device(pdev);
  84. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  85. VFIO_IRQ_SET_ACTION_TRIGGER,
  86. vdev->irq_type, 0, 0, NULL);
  87. vdev->virq_disabled = false;
  88. vfio_config_free(vdev);
  89. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  90. if (!vdev->barmap[bar])
  91. continue;
  92. pci_iounmap(pdev, vdev->barmap[bar]);
  93. pci_release_selected_regions(pdev, 1 << bar);
  94. vdev->barmap[bar] = NULL;
  95. }
  96. /*
  97. * If we have saved state, restore it. If we can reset the device,
  98. * even better. Resetting with current state seems better than
  99. * nothing, but saving and restoring current state without reset
  100. * is just busy work.
  101. */
  102. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  103. pr_info("%s: Couldn't reload %s saved state\n",
  104. __func__, dev_name(&pdev->dev));
  105. if (!vdev->reset_works)
  106. return;
  107. pci_save_state(pdev);
  108. }
  109. /*
  110. * Disable INTx and MSI, presumably to avoid spurious interrupts
  111. * during reset. Stolen from pci_reset_function()
  112. */
  113. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  114. if (vdev->reset_works)
  115. __pci_reset_function(pdev);
  116. pci_restore_state(pdev);
  117. }
  118. static void vfio_pci_release(void *device_data)
  119. {
  120. struct vfio_pci_device *vdev = device_data;
  121. if (atomic_dec_and_test(&vdev->refcnt))
  122. vfio_pci_disable(vdev);
  123. module_put(THIS_MODULE);
  124. }
  125. static int vfio_pci_open(void *device_data)
  126. {
  127. struct vfio_pci_device *vdev = device_data;
  128. if (!try_module_get(THIS_MODULE))
  129. return -ENODEV;
  130. if (atomic_inc_return(&vdev->refcnt) == 1) {
  131. int ret = vfio_pci_enable(vdev);
  132. if (ret) {
  133. module_put(THIS_MODULE);
  134. return ret;
  135. }
  136. }
  137. return 0;
  138. }
  139. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  140. {
  141. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  142. u8 pin;
  143. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  144. if (pin)
  145. return 1;
  146. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  147. u8 pos;
  148. u16 flags;
  149. pos = vdev->pdev->msi_cap;
  150. if (pos) {
  151. pci_read_config_word(vdev->pdev,
  152. pos + PCI_MSI_FLAGS, &flags);
  153. return 1 << (flags & PCI_MSI_FLAGS_QMASK);
  154. }
  155. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  156. u8 pos;
  157. u16 flags;
  158. pos = vdev->pdev->msix_cap;
  159. if (pos) {
  160. pci_read_config_word(vdev->pdev,
  161. pos + PCI_MSIX_FLAGS, &flags);
  162. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  163. }
  164. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX)
  165. if (pci_is_pcie(vdev->pdev))
  166. return 1;
  167. return 0;
  168. }
  169. static long vfio_pci_ioctl(void *device_data,
  170. unsigned int cmd, unsigned long arg)
  171. {
  172. struct vfio_pci_device *vdev = device_data;
  173. unsigned long minsz;
  174. if (cmd == VFIO_DEVICE_GET_INFO) {
  175. struct vfio_device_info info;
  176. minsz = offsetofend(struct vfio_device_info, num_irqs);
  177. if (copy_from_user(&info, (void __user *)arg, minsz))
  178. return -EFAULT;
  179. if (info.argsz < minsz)
  180. return -EINVAL;
  181. info.flags = VFIO_DEVICE_FLAGS_PCI;
  182. if (vdev->reset_works)
  183. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  184. info.num_regions = VFIO_PCI_NUM_REGIONS;
  185. info.num_irqs = VFIO_PCI_NUM_IRQS;
  186. return copy_to_user((void __user *)arg, &info, minsz);
  187. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  188. struct pci_dev *pdev = vdev->pdev;
  189. struct vfio_region_info info;
  190. minsz = offsetofend(struct vfio_region_info, offset);
  191. if (copy_from_user(&info, (void __user *)arg, minsz))
  192. return -EFAULT;
  193. if (info.argsz < minsz)
  194. return -EINVAL;
  195. switch (info.index) {
  196. case VFIO_PCI_CONFIG_REGION_INDEX:
  197. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  198. info.size = pdev->cfg_size;
  199. info.flags = VFIO_REGION_INFO_FLAG_READ |
  200. VFIO_REGION_INFO_FLAG_WRITE;
  201. break;
  202. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  203. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  204. info.size = pci_resource_len(pdev, info.index);
  205. if (!info.size) {
  206. info.flags = 0;
  207. break;
  208. }
  209. info.flags = VFIO_REGION_INFO_FLAG_READ |
  210. VFIO_REGION_INFO_FLAG_WRITE;
  211. if (pci_resource_flags(pdev, info.index) &
  212. IORESOURCE_MEM && info.size >= PAGE_SIZE)
  213. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  214. break;
  215. case VFIO_PCI_ROM_REGION_INDEX:
  216. {
  217. void __iomem *io;
  218. size_t size;
  219. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  220. info.flags = 0;
  221. /* Report the BAR size, not the ROM size */
  222. info.size = pci_resource_len(pdev, info.index);
  223. if (!info.size)
  224. break;
  225. /* Is it really there? */
  226. io = pci_map_rom(pdev, &size);
  227. if (!io || !size) {
  228. info.size = 0;
  229. break;
  230. }
  231. pci_unmap_rom(pdev, io);
  232. info.flags = VFIO_REGION_INFO_FLAG_READ;
  233. break;
  234. }
  235. case VFIO_PCI_VGA_REGION_INDEX:
  236. if (!vdev->has_vga)
  237. return -EINVAL;
  238. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  239. info.size = 0xc0000;
  240. info.flags = VFIO_REGION_INFO_FLAG_READ |
  241. VFIO_REGION_INFO_FLAG_WRITE;
  242. break;
  243. default:
  244. return -EINVAL;
  245. }
  246. return copy_to_user((void __user *)arg, &info, minsz);
  247. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  248. struct vfio_irq_info info;
  249. minsz = offsetofend(struct vfio_irq_info, count);
  250. if (copy_from_user(&info, (void __user *)arg, minsz))
  251. return -EFAULT;
  252. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  253. return -EINVAL;
  254. switch (info.index) {
  255. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  256. break;
  257. case VFIO_PCI_ERR_IRQ_INDEX:
  258. if (pci_is_pcie(vdev->pdev))
  259. break;
  260. /* pass thru to return error */
  261. default:
  262. return -EINVAL;
  263. }
  264. info.flags = VFIO_IRQ_INFO_EVENTFD;
  265. info.count = vfio_pci_get_irq_count(vdev, info.index);
  266. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  267. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  268. VFIO_IRQ_INFO_AUTOMASKED);
  269. else
  270. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  271. return copy_to_user((void __user *)arg, &info, minsz);
  272. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  273. struct vfio_irq_set hdr;
  274. u8 *data = NULL;
  275. int ret = 0;
  276. minsz = offsetofend(struct vfio_irq_set, count);
  277. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  278. return -EFAULT;
  279. if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
  280. hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
  281. VFIO_IRQ_SET_ACTION_TYPE_MASK))
  282. return -EINVAL;
  283. if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
  284. size_t size;
  285. int max = vfio_pci_get_irq_count(vdev, hdr.index);
  286. if (hdr.flags & VFIO_IRQ_SET_DATA_BOOL)
  287. size = sizeof(uint8_t);
  288. else if (hdr.flags & VFIO_IRQ_SET_DATA_EVENTFD)
  289. size = sizeof(int32_t);
  290. else
  291. return -EINVAL;
  292. if (hdr.argsz - minsz < hdr.count * size ||
  293. hdr.start >= max || hdr.start + hdr.count > max)
  294. return -EINVAL;
  295. data = memdup_user((void __user *)(arg + minsz),
  296. hdr.count * size);
  297. if (IS_ERR(data))
  298. return PTR_ERR(data);
  299. }
  300. mutex_lock(&vdev->igate);
  301. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  302. hdr.start, hdr.count, data);
  303. mutex_unlock(&vdev->igate);
  304. kfree(data);
  305. return ret;
  306. } else if (cmd == VFIO_DEVICE_RESET)
  307. return vdev->reset_works ?
  308. pci_reset_function(vdev->pdev) : -EINVAL;
  309. return -ENOTTY;
  310. }
  311. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  312. size_t count, loff_t *ppos, bool iswrite)
  313. {
  314. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  315. struct vfio_pci_device *vdev = device_data;
  316. if (index >= VFIO_PCI_NUM_REGIONS)
  317. return -EINVAL;
  318. switch (index) {
  319. case VFIO_PCI_CONFIG_REGION_INDEX:
  320. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  321. case VFIO_PCI_ROM_REGION_INDEX:
  322. if (iswrite)
  323. return -EINVAL;
  324. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  325. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  326. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  327. case VFIO_PCI_VGA_REGION_INDEX:
  328. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  329. }
  330. return -EINVAL;
  331. }
  332. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  333. size_t count, loff_t *ppos)
  334. {
  335. if (!count)
  336. return 0;
  337. return vfio_pci_rw(device_data, buf, count, ppos, false);
  338. }
  339. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  340. size_t count, loff_t *ppos)
  341. {
  342. if (!count)
  343. return 0;
  344. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  345. }
  346. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  347. {
  348. struct vfio_pci_device *vdev = device_data;
  349. struct pci_dev *pdev = vdev->pdev;
  350. unsigned int index;
  351. u64 phys_len, req_len, pgoff, req_start;
  352. int ret;
  353. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  354. if (vma->vm_end < vma->vm_start)
  355. return -EINVAL;
  356. if ((vma->vm_flags & VM_SHARED) == 0)
  357. return -EINVAL;
  358. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  359. return -EINVAL;
  360. if (!(pci_resource_flags(pdev, index) & IORESOURCE_MEM))
  361. return -EINVAL;
  362. phys_len = pci_resource_len(pdev, index);
  363. req_len = vma->vm_end - vma->vm_start;
  364. pgoff = vma->vm_pgoff &
  365. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  366. req_start = pgoff << PAGE_SHIFT;
  367. if (phys_len < PAGE_SIZE || req_start + req_len > phys_len)
  368. return -EINVAL;
  369. if (index == vdev->msix_bar) {
  370. /*
  371. * Disallow mmaps overlapping the MSI-X table; users don't
  372. * get to touch this directly. We could find somewhere
  373. * else to map the overlap, but page granularity is only
  374. * a recommendation, not a requirement, so the user needs
  375. * to know which bits are real. Requiring them to mmap
  376. * around the table makes that clear.
  377. */
  378. /* If neither entirely above nor below, then it overlaps */
  379. if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
  380. req_start + req_len <= vdev->msix_offset))
  381. return -EINVAL;
  382. }
  383. /*
  384. * Even though we don't make use of the barmap for the mmap,
  385. * we need to request the region and the barmap tracks that.
  386. */
  387. if (!vdev->barmap[index]) {
  388. ret = pci_request_selected_regions(pdev,
  389. 1 << index, "vfio-pci");
  390. if (ret)
  391. return ret;
  392. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  393. }
  394. vma->vm_private_data = vdev;
  395. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  396. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  397. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  398. req_len, vma->vm_page_prot);
  399. }
  400. static const struct vfio_device_ops vfio_pci_ops = {
  401. .name = "vfio-pci",
  402. .open = vfio_pci_open,
  403. .release = vfio_pci_release,
  404. .ioctl = vfio_pci_ioctl,
  405. .read = vfio_pci_read,
  406. .write = vfio_pci_write,
  407. .mmap = vfio_pci_mmap,
  408. };
  409. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  410. {
  411. u8 type;
  412. struct vfio_pci_device *vdev;
  413. struct iommu_group *group;
  414. int ret;
  415. pci_read_config_byte(pdev, PCI_HEADER_TYPE, &type);
  416. if ((type & PCI_HEADER_TYPE) != PCI_HEADER_TYPE_NORMAL)
  417. return -EINVAL;
  418. group = iommu_group_get(&pdev->dev);
  419. if (!group)
  420. return -EINVAL;
  421. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  422. if (!vdev) {
  423. iommu_group_put(group);
  424. return -ENOMEM;
  425. }
  426. vdev->pdev = pdev;
  427. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  428. mutex_init(&vdev->igate);
  429. spin_lock_init(&vdev->irqlock);
  430. atomic_set(&vdev->refcnt, 0);
  431. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  432. if (ret) {
  433. iommu_group_put(group);
  434. kfree(vdev);
  435. }
  436. return ret;
  437. }
  438. static void vfio_pci_remove(struct pci_dev *pdev)
  439. {
  440. struct vfio_pci_device *vdev;
  441. vdev = vfio_del_group_dev(&pdev->dev);
  442. if (!vdev)
  443. return;
  444. iommu_group_put(pdev->dev.iommu_group);
  445. kfree(vdev);
  446. }
  447. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  448. pci_channel_state_t state)
  449. {
  450. struct vfio_pci_device *vdev;
  451. struct vfio_device *device;
  452. device = vfio_device_get_from_dev(&pdev->dev);
  453. if (device == NULL)
  454. return PCI_ERS_RESULT_DISCONNECT;
  455. vdev = vfio_device_data(device);
  456. if (vdev == NULL) {
  457. vfio_device_put(device);
  458. return PCI_ERS_RESULT_DISCONNECT;
  459. }
  460. if (vdev->err_trigger)
  461. eventfd_signal(vdev->err_trigger, 1);
  462. vfio_device_put(device);
  463. return PCI_ERS_RESULT_CAN_RECOVER;
  464. }
  465. static struct pci_error_handlers vfio_err_handlers = {
  466. .error_detected = vfio_pci_aer_err_detected,
  467. };
  468. static struct pci_driver vfio_pci_driver = {
  469. .name = "vfio-pci",
  470. .id_table = NULL, /* only dynamic ids */
  471. .probe = vfio_pci_probe,
  472. .remove = vfio_pci_remove,
  473. .err_handler = &vfio_err_handlers,
  474. };
  475. static void __exit vfio_pci_cleanup(void)
  476. {
  477. pci_unregister_driver(&vfio_pci_driver);
  478. vfio_pci_virqfd_exit();
  479. vfio_pci_uninit_perm_bits();
  480. }
  481. static int __init vfio_pci_init(void)
  482. {
  483. int ret;
  484. /* Allocate shared config space permision data used by all devices */
  485. ret = vfio_pci_init_perm_bits();
  486. if (ret)
  487. return ret;
  488. /* Start the virqfd cleanup handler */
  489. ret = vfio_pci_virqfd_init();
  490. if (ret)
  491. goto out_virqfd;
  492. /* Register and scan for devices */
  493. ret = pci_register_driver(&vfio_pci_driver);
  494. if (ret)
  495. goto out_driver;
  496. return 0;
  497. out_driver:
  498. vfio_pci_virqfd_exit();
  499. out_virqfd:
  500. vfio_pci_uninit_perm_bits();
  501. return ret;
  502. }
  503. module_init(vfio_pci_init);
  504. module_exit(vfio_pci_cleanup);
  505. MODULE_VERSION(DRIVER_VERSION);
  506. MODULE_LICENSE("GPL v2");
  507. MODULE_AUTHOR(DRIVER_AUTHOR);
  508. MODULE_DESCRIPTION(DRIVER_DESC);