tegra-kbc.c 21 KB

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  1. /*
  2. * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
  3. * keyboard controller
  4. *
  5. * Copyright (c) 2009-2011, NVIDIA Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/input.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/of.h>
  29. #include <linux/clk.h>
  30. #include <linux/slab.h>
  31. #include <mach/clk.h>
  32. #include <mach/kbc.h>
  33. #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
  34. /* KBC row scan time and delay for beginning the row scan. */
  35. #define KBC_ROW_SCAN_TIME 16
  36. #define KBC_ROW_SCAN_DLY 5
  37. /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  38. #define KBC_CYCLE_MS 32
  39. /* KBC Registers */
  40. /* KBC Control Register */
  41. #define KBC_CONTROL_0 0x0
  42. #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
  43. #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
  44. #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
  45. #define KBC_CONTROL_KBC_EN (1 << 0)
  46. /* KBC Interrupt Register */
  47. #define KBC_INT_0 0x4
  48. #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
  49. #define KBC_ROW_CFG0_0 0x8
  50. #define KBC_COL_CFG0_0 0x18
  51. #define KBC_TO_CNT_0 0x24
  52. #define KBC_INIT_DLY_0 0x28
  53. #define KBC_RPT_DLY_0 0x2c
  54. #define KBC_KP_ENT0_0 0x30
  55. #define KBC_KP_ENT1_0 0x34
  56. #define KBC_ROW0_MASK_0 0x38
  57. #define KBC_ROW_SHIFT 3
  58. struct tegra_kbc {
  59. void __iomem *mmio;
  60. struct input_dev *idev;
  61. unsigned int irq;
  62. spinlock_t lock;
  63. unsigned int repoll_dly;
  64. unsigned long cp_dly_jiffies;
  65. unsigned int cp_to_wkup_dly;
  66. bool use_fn_map;
  67. bool use_ghost_filter;
  68. const struct tegra_kbc_platform_data *pdata;
  69. unsigned short keycode[KBC_MAX_KEY * 2];
  70. unsigned short current_keys[KBC_MAX_KPENT];
  71. unsigned int num_pressed_keys;
  72. struct timer_list timer;
  73. struct clk *clk;
  74. };
  75. static const u32 tegra_kbc_default_keymap[] __devinitdata = {
  76. KEY(0, 2, KEY_W),
  77. KEY(0, 3, KEY_S),
  78. KEY(0, 4, KEY_A),
  79. KEY(0, 5, KEY_Z),
  80. KEY(0, 7, KEY_FN),
  81. KEY(1, 7, KEY_LEFTMETA),
  82. KEY(2, 6, KEY_RIGHTALT),
  83. KEY(2, 7, KEY_LEFTALT),
  84. KEY(3, 0, KEY_5),
  85. KEY(3, 1, KEY_4),
  86. KEY(3, 2, KEY_R),
  87. KEY(3, 3, KEY_E),
  88. KEY(3, 4, KEY_F),
  89. KEY(3, 5, KEY_D),
  90. KEY(3, 6, KEY_X),
  91. KEY(4, 0, KEY_7),
  92. KEY(4, 1, KEY_6),
  93. KEY(4, 2, KEY_T),
  94. KEY(4, 3, KEY_H),
  95. KEY(4, 4, KEY_G),
  96. KEY(4, 5, KEY_V),
  97. KEY(4, 6, KEY_C),
  98. KEY(4, 7, KEY_SPACE),
  99. KEY(5, 0, KEY_9),
  100. KEY(5, 1, KEY_8),
  101. KEY(5, 2, KEY_U),
  102. KEY(5, 3, KEY_Y),
  103. KEY(5, 4, KEY_J),
  104. KEY(5, 5, KEY_N),
  105. KEY(5, 6, KEY_B),
  106. KEY(5, 7, KEY_BACKSLASH),
  107. KEY(6, 0, KEY_MINUS),
  108. KEY(6, 1, KEY_0),
  109. KEY(6, 2, KEY_O),
  110. KEY(6, 3, KEY_I),
  111. KEY(6, 4, KEY_L),
  112. KEY(6, 5, KEY_K),
  113. KEY(6, 6, KEY_COMMA),
  114. KEY(6, 7, KEY_M),
  115. KEY(7, 1, KEY_EQUAL),
  116. KEY(7, 2, KEY_RIGHTBRACE),
  117. KEY(7, 3, KEY_ENTER),
  118. KEY(7, 7, KEY_MENU),
  119. KEY(8, 4, KEY_RIGHTSHIFT),
  120. KEY(8, 5, KEY_LEFTSHIFT),
  121. KEY(9, 5, KEY_RIGHTCTRL),
  122. KEY(9, 7, KEY_LEFTCTRL),
  123. KEY(11, 0, KEY_LEFTBRACE),
  124. KEY(11, 1, KEY_P),
  125. KEY(11, 2, KEY_APOSTROPHE),
  126. KEY(11, 3, KEY_SEMICOLON),
  127. KEY(11, 4, KEY_SLASH),
  128. KEY(11, 5, KEY_DOT),
  129. KEY(12, 0, KEY_F10),
  130. KEY(12, 1, KEY_F9),
  131. KEY(12, 2, KEY_BACKSPACE),
  132. KEY(12, 3, KEY_3),
  133. KEY(12, 4, KEY_2),
  134. KEY(12, 5, KEY_UP),
  135. KEY(12, 6, KEY_PRINT),
  136. KEY(12, 7, KEY_PAUSE),
  137. KEY(13, 0, KEY_INSERT),
  138. KEY(13, 1, KEY_DELETE),
  139. KEY(13, 3, KEY_PAGEUP),
  140. KEY(13, 4, KEY_PAGEDOWN),
  141. KEY(13, 5, KEY_RIGHT),
  142. KEY(13, 6, KEY_DOWN),
  143. KEY(13, 7, KEY_LEFT),
  144. KEY(14, 0, KEY_F11),
  145. KEY(14, 1, KEY_F12),
  146. KEY(14, 2, KEY_F8),
  147. KEY(14, 3, KEY_Q),
  148. KEY(14, 4, KEY_F4),
  149. KEY(14, 5, KEY_F3),
  150. KEY(14, 6, KEY_1),
  151. KEY(14, 7, KEY_F7),
  152. KEY(15, 0, KEY_ESC),
  153. KEY(15, 1, KEY_GRAVE),
  154. KEY(15, 2, KEY_F5),
  155. KEY(15, 3, KEY_TAB),
  156. KEY(15, 4, KEY_F1),
  157. KEY(15, 5, KEY_F2),
  158. KEY(15, 6, KEY_CAPSLOCK),
  159. KEY(15, 7, KEY_F6),
  160. /* Software Handled Function Keys */
  161. KEY(20, 0, KEY_KP7),
  162. KEY(21, 0, KEY_KP9),
  163. KEY(21, 1, KEY_KP8),
  164. KEY(21, 2, KEY_KP4),
  165. KEY(21, 4, KEY_KP1),
  166. KEY(22, 1, KEY_KPSLASH),
  167. KEY(22, 2, KEY_KP6),
  168. KEY(22, 3, KEY_KP5),
  169. KEY(22, 4, KEY_KP3),
  170. KEY(22, 5, KEY_KP2),
  171. KEY(22, 7, KEY_KP0),
  172. KEY(27, 1, KEY_KPASTERISK),
  173. KEY(27, 3, KEY_KPMINUS),
  174. KEY(27, 4, KEY_KPPLUS),
  175. KEY(27, 5, KEY_KPDOT),
  176. KEY(28, 5, KEY_VOLUMEUP),
  177. KEY(29, 3, KEY_HOME),
  178. KEY(29, 4, KEY_END),
  179. KEY(29, 5, KEY_BRIGHTNESSDOWN),
  180. KEY(29, 6, KEY_VOLUMEDOWN),
  181. KEY(29, 7, KEY_BRIGHTNESSUP),
  182. KEY(30, 0, KEY_NUMLOCK),
  183. KEY(30, 1, KEY_SCROLLLOCK),
  184. KEY(30, 2, KEY_MUTE),
  185. KEY(31, 4, KEY_HELP),
  186. };
  187. static const
  188. struct matrix_keymap_data tegra_kbc_default_keymap_data __devinitdata = {
  189. .keymap = tegra_kbc_default_keymap,
  190. .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
  191. };
  192. static void tegra_kbc_report_released_keys(struct input_dev *input,
  193. unsigned short old_keycodes[],
  194. unsigned int old_num_keys,
  195. unsigned short new_keycodes[],
  196. unsigned int new_num_keys)
  197. {
  198. unsigned int i, j;
  199. for (i = 0; i < old_num_keys; i++) {
  200. for (j = 0; j < new_num_keys; j++)
  201. if (old_keycodes[i] == new_keycodes[j])
  202. break;
  203. if (j == new_num_keys)
  204. input_report_key(input, old_keycodes[i], 0);
  205. }
  206. }
  207. static void tegra_kbc_report_pressed_keys(struct input_dev *input,
  208. unsigned char scancodes[],
  209. unsigned short keycodes[],
  210. unsigned int num_pressed_keys)
  211. {
  212. unsigned int i;
  213. for (i = 0; i < num_pressed_keys; i++) {
  214. input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
  215. input_report_key(input, keycodes[i], 1);
  216. }
  217. }
  218. static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
  219. {
  220. unsigned char scancodes[KBC_MAX_KPENT];
  221. unsigned short keycodes[KBC_MAX_KPENT];
  222. u32 val = 0;
  223. unsigned int i;
  224. unsigned int num_down = 0;
  225. bool fn_keypress = false;
  226. bool key_in_same_row = false;
  227. bool key_in_same_col = false;
  228. for (i = 0; i < KBC_MAX_KPENT; i++) {
  229. if ((i % 4) == 0)
  230. val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
  231. if (val & 0x80) {
  232. unsigned int col = val & 0x07;
  233. unsigned int row = (val >> 3) & 0x0f;
  234. unsigned char scancode =
  235. MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
  236. scancodes[num_down] = scancode;
  237. keycodes[num_down] = kbc->keycode[scancode];
  238. /* If driver uses Fn map, do not report the Fn key. */
  239. if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
  240. fn_keypress = true;
  241. else
  242. num_down++;
  243. }
  244. val >>= 8;
  245. }
  246. /*
  247. * Matrix keyboard designs are prone to keyboard ghosting.
  248. * Ghosting occurs if there are 3 keys such that -
  249. * any 2 of the 3 keys share a row, and any 2 of them share a column.
  250. * If so ignore the key presses for this iteration.
  251. */
  252. if (kbc->use_ghost_filter && num_down >= 3) {
  253. for (i = 0; i < num_down; i++) {
  254. unsigned int j;
  255. u8 curr_col = scancodes[i] & 0x07;
  256. u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
  257. /*
  258. * Find 2 keys such that one key is in the same row
  259. * and the other is in the same column as the i-th key.
  260. */
  261. for (j = i + 1; j < num_down; j++) {
  262. u8 col = scancodes[j] & 0x07;
  263. u8 row = scancodes[j] >> KBC_ROW_SHIFT;
  264. if (col == curr_col)
  265. key_in_same_col = true;
  266. if (row == curr_row)
  267. key_in_same_row = true;
  268. }
  269. }
  270. }
  271. /*
  272. * If the platform uses Fn keymaps, translate keys on a Fn keypress.
  273. * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
  274. */
  275. if (fn_keypress) {
  276. for (i = 0; i < num_down; i++) {
  277. scancodes[i] += KBC_MAX_KEY;
  278. keycodes[i] = kbc->keycode[scancodes[i]];
  279. }
  280. }
  281. /* Ignore the key presses for this iteration? */
  282. if (key_in_same_col && key_in_same_row)
  283. return;
  284. tegra_kbc_report_released_keys(kbc->idev,
  285. kbc->current_keys, kbc->num_pressed_keys,
  286. keycodes, num_down);
  287. tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
  288. input_sync(kbc->idev);
  289. memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
  290. kbc->num_pressed_keys = num_down;
  291. }
  292. static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
  293. {
  294. u32 val;
  295. val = readl(kbc->mmio + KBC_CONTROL_0);
  296. if (enable)
  297. val |= KBC_CONTROL_FIFO_CNT_INT_EN;
  298. else
  299. val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
  300. writel(val, kbc->mmio + KBC_CONTROL_0);
  301. }
  302. static void tegra_kbc_keypress_timer(unsigned long data)
  303. {
  304. struct tegra_kbc *kbc = (struct tegra_kbc *)data;
  305. unsigned long flags;
  306. u32 val;
  307. unsigned int i;
  308. spin_lock_irqsave(&kbc->lock, flags);
  309. val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
  310. if (val) {
  311. unsigned long dly;
  312. tegra_kbc_report_keys(kbc);
  313. /*
  314. * If more than one keys are pressed we need not wait
  315. * for the repoll delay.
  316. */
  317. dly = (val == 1) ? kbc->repoll_dly : 1;
  318. mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
  319. } else {
  320. /* Release any pressed keys and exit the polling loop */
  321. for (i = 0; i < kbc->num_pressed_keys; i++)
  322. input_report_key(kbc->idev, kbc->current_keys[i], 0);
  323. input_sync(kbc->idev);
  324. kbc->num_pressed_keys = 0;
  325. /* All keys are released so enable the keypress interrupt */
  326. tegra_kbc_set_fifo_interrupt(kbc, true);
  327. }
  328. spin_unlock_irqrestore(&kbc->lock, flags);
  329. }
  330. static irqreturn_t tegra_kbc_isr(int irq, void *args)
  331. {
  332. struct tegra_kbc *kbc = args;
  333. unsigned long flags;
  334. u32 val;
  335. spin_lock_irqsave(&kbc->lock, flags);
  336. /*
  337. * Quickly bail out & reenable interrupts if the fifo threshold
  338. * count interrupt wasn't the interrupt source
  339. */
  340. val = readl(kbc->mmio + KBC_INT_0);
  341. writel(val, kbc->mmio + KBC_INT_0);
  342. if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
  343. /*
  344. * Until all keys are released, defer further processing to
  345. * the polling loop in tegra_kbc_keypress_timer.
  346. */
  347. tegra_kbc_set_fifo_interrupt(kbc, false);
  348. mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
  349. }
  350. spin_unlock_irqrestore(&kbc->lock, flags);
  351. return IRQ_HANDLED;
  352. }
  353. static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
  354. {
  355. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  356. int i;
  357. unsigned int rst_val;
  358. /* Either mask all keys or none. */
  359. rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
  360. for (i = 0; i < KBC_MAX_ROW; i++)
  361. writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
  362. }
  363. static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
  364. {
  365. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  366. int i;
  367. for (i = 0; i < KBC_MAX_GPIO; i++) {
  368. u32 r_shft = 5 * (i % 6);
  369. u32 c_shft = 4 * (i % 8);
  370. u32 r_mask = 0x1f << r_shft;
  371. u32 c_mask = 0x0f << c_shft;
  372. u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
  373. u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
  374. u32 row_cfg = readl(kbc->mmio + r_offs);
  375. u32 col_cfg = readl(kbc->mmio + c_offs);
  376. row_cfg &= ~r_mask;
  377. col_cfg &= ~c_mask;
  378. if (pdata->pin_cfg[i].is_row)
  379. row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
  380. else
  381. col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
  382. writel(row_cfg, kbc->mmio + r_offs);
  383. writel(col_cfg, kbc->mmio + c_offs);
  384. }
  385. }
  386. static int tegra_kbc_start(struct tegra_kbc *kbc)
  387. {
  388. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  389. unsigned int debounce_cnt;
  390. u32 val = 0;
  391. clk_enable(kbc->clk);
  392. /* Reset the KBC controller to clear all previous status.*/
  393. tegra_periph_reset_assert(kbc->clk);
  394. udelay(100);
  395. tegra_periph_reset_deassert(kbc->clk);
  396. udelay(100);
  397. tegra_kbc_config_pins(kbc);
  398. tegra_kbc_setup_wakekeys(kbc, false);
  399. writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
  400. /* Keyboard debounce count is maximum of 12 bits. */
  401. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  402. val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
  403. val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
  404. val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
  405. val |= KBC_CONTROL_KBC_EN; /* enable */
  406. writel(val, kbc->mmio + KBC_CONTROL_0);
  407. /*
  408. * Compute the delay(ns) from interrupt mode to continuous polling
  409. * mode so the timer routine is scheduled appropriately.
  410. */
  411. val = readl(kbc->mmio + KBC_INIT_DLY_0);
  412. kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
  413. kbc->num_pressed_keys = 0;
  414. /*
  415. * Atomically clear out any remaining entries in the key FIFO
  416. * and enable keyboard interrupts.
  417. */
  418. while (1) {
  419. val = readl(kbc->mmio + KBC_INT_0);
  420. val >>= 4;
  421. if (!val)
  422. break;
  423. val = readl(kbc->mmio + KBC_KP_ENT0_0);
  424. val = readl(kbc->mmio + KBC_KP_ENT1_0);
  425. }
  426. writel(0x7, kbc->mmio + KBC_INT_0);
  427. enable_irq(kbc->irq);
  428. return 0;
  429. }
  430. static void tegra_kbc_stop(struct tegra_kbc *kbc)
  431. {
  432. unsigned long flags;
  433. u32 val;
  434. spin_lock_irqsave(&kbc->lock, flags);
  435. val = readl(kbc->mmio + KBC_CONTROL_0);
  436. val &= ~1;
  437. writel(val, kbc->mmio + KBC_CONTROL_0);
  438. spin_unlock_irqrestore(&kbc->lock, flags);
  439. disable_irq(kbc->irq);
  440. del_timer_sync(&kbc->timer);
  441. clk_disable(kbc->clk);
  442. }
  443. static int tegra_kbc_open(struct input_dev *dev)
  444. {
  445. struct tegra_kbc *kbc = input_get_drvdata(dev);
  446. return tegra_kbc_start(kbc);
  447. }
  448. static void tegra_kbc_close(struct input_dev *dev)
  449. {
  450. struct tegra_kbc *kbc = input_get_drvdata(dev);
  451. return tegra_kbc_stop(kbc);
  452. }
  453. static bool __devinit
  454. tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
  455. struct device *dev, unsigned int *num_rows)
  456. {
  457. int i;
  458. *num_rows = 0;
  459. for (i = 0; i < KBC_MAX_GPIO; i++) {
  460. const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
  461. if (pin_cfg->is_row) {
  462. if (pin_cfg->num >= KBC_MAX_ROW) {
  463. dev_err(dev,
  464. "pin_cfg[%d]: invalid row number %d\n",
  465. i, pin_cfg->num);
  466. return false;
  467. }
  468. (*num_rows)++;
  469. } else {
  470. if (pin_cfg->num >= KBC_MAX_COL) {
  471. dev_err(dev,
  472. "pin_cfg[%d]: invalid column number %d\n",
  473. i, pin_cfg->num);
  474. return false;
  475. }
  476. }
  477. }
  478. return true;
  479. }
  480. #ifdef CONFIG_OF
  481. static struct tegra_kbc_platform_data * __devinit
  482. tegra_kbc_dt_parse_pdata(struct platform_device *pdev)
  483. {
  484. struct tegra_kbc_platform_data *pdata;
  485. struct device_node *np = pdev->dev.of_node;
  486. if (!np)
  487. return NULL;
  488. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  489. if (!pdata)
  490. return NULL;
  491. if (!of_property_read_u32(np, "debounce-delay", &prop))
  492. pdata->debounce_cnt = prop;
  493. if (!of_property_read_u32(np, "repeat-delay", &prop))
  494. pdata->repeat_cnt = prop;
  495. if (of_find_property(np, "needs-ghost-filter", NULL))
  496. pdata->use_ghost_filter = true;
  497. if (of_find_property(np, "wakeup-source", NULL))
  498. pdata->wakeup = true;
  499. /*
  500. * All currently known keymaps with device tree support use the same
  501. * pin_cfg, so set it up here.
  502. */
  503. for (i = 0; i < KBC_MAX_ROW; i++) {
  504. pdata->pin_cfg[i].num = i;
  505. pdata->pin_cfg[i].is_row = true;
  506. }
  507. for (i = 0; i < KBC_MAX_COL; i++) {
  508. pdata->pin_cfg[KBC_MAX_ROW + i].num = i;
  509. pdata->pin_cfg[KBC_MAX_ROW + i].is_row = false;
  510. }
  511. return pdata;
  512. }
  513. #else
  514. static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(
  515. struct platform_device *pdev)
  516. {
  517. return NULL;
  518. }
  519. #endif
  520. static int __devinit tegra_kbc_probe(struct platform_device *pdev)
  521. {
  522. const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
  523. const struct matrix_keymap_data *keymap_data;
  524. struct tegra_kbc *kbc;
  525. struct input_dev *input_dev;
  526. struct resource *res;
  527. int irq;
  528. int err;
  529. int num_rows = 0;
  530. unsigned int debounce_cnt;
  531. unsigned int scan_time_rows;
  532. if (!pdata)
  533. pdata = tegra_kbc_dt_parse_pdata(pdev);
  534. if (!pdata)
  535. return -EINVAL;
  536. if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) {
  537. err = -EINVAL;
  538. goto err_free_pdata;
  539. }
  540. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  541. if (!res) {
  542. dev_err(&pdev->dev, "failed to get I/O memory\n");
  543. err = -ENXIO;
  544. goto err_free_pdata;
  545. }
  546. irq = platform_get_irq(pdev, 0);
  547. if (irq < 0) {
  548. dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
  549. err = -ENXIO;
  550. goto err_free_pdata;
  551. }
  552. kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
  553. input_dev = input_allocate_device();
  554. if (!kbc || !input_dev) {
  555. err = -ENOMEM;
  556. goto err_free_mem;
  557. }
  558. kbc->pdata = pdata;
  559. kbc->idev = input_dev;
  560. kbc->irq = irq;
  561. spin_lock_init(&kbc->lock);
  562. setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
  563. res = request_mem_region(res->start, resource_size(res), pdev->name);
  564. if (!res) {
  565. dev_err(&pdev->dev, "failed to request I/O memory\n");
  566. err = -EBUSY;
  567. goto err_free_mem;
  568. }
  569. kbc->mmio = ioremap(res->start, resource_size(res));
  570. if (!kbc->mmio) {
  571. dev_err(&pdev->dev, "failed to remap I/O memory\n");
  572. err = -ENXIO;
  573. goto err_free_mem_region;
  574. }
  575. kbc->clk = clk_get(&pdev->dev, NULL);
  576. if (IS_ERR(kbc->clk)) {
  577. dev_err(&pdev->dev, "failed to get keyboard clock\n");
  578. err = PTR_ERR(kbc->clk);
  579. goto err_iounmap;
  580. }
  581. /*
  582. * The time delay between two consecutive reads of the FIFO is
  583. * the sum of the repeat time and the time taken for scanning
  584. * the rows. There is an additional delay before the row scanning
  585. * starts. The repoll delay is computed in milliseconds.
  586. */
  587. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  588. scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
  589. kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
  590. kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
  591. input_dev->name = pdev->name;
  592. input_dev->id.bustype = BUS_HOST;
  593. input_dev->dev.parent = &pdev->dev;
  594. input_dev->open = tegra_kbc_open;
  595. input_dev->close = tegra_kbc_close;
  596. input_set_drvdata(input_dev, kbc);
  597. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
  598. input_set_capability(input_dev, EV_MSC, MSC_SCAN);
  599. input_dev->keycode = kbc->keycode;
  600. input_dev->keycodesize = sizeof(kbc->keycode[0]);
  601. input_dev->keycodemax = KBC_MAX_KEY;
  602. if (pdata->use_fn_map)
  603. input_dev->keycodemax *= 2;
  604. kbc->use_fn_map = pdata->use_fn_map;
  605. kbc->use_ghost_filter = pdata->use_ghost_filter;
  606. keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
  607. matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
  608. input_dev->keycode, input_dev->keybit);
  609. err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
  610. pdev->name, kbc);
  611. if (err) {
  612. dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
  613. goto err_put_clk;
  614. }
  615. disable_irq(kbc->irq);
  616. err = input_register_device(kbc->idev);
  617. if (err) {
  618. dev_err(&pdev->dev, "failed to register input device\n");
  619. goto err_free_irq;
  620. }
  621. platform_set_drvdata(pdev, kbc);
  622. device_init_wakeup(&pdev->dev, pdata->wakeup);
  623. return 0;
  624. err_free_irq:
  625. free_irq(kbc->irq, pdev);
  626. err_put_clk:
  627. clk_put(kbc->clk);
  628. err_iounmap:
  629. iounmap(kbc->mmio);
  630. err_free_mem_region:
  631. release_mem_region(res->start, resource_size(res));
  632. err_free_mem:
  633. input_free_device(input_dev);
  634. kfree(kbc);
  635. err_free_pdata:
  636. if (!pdev->dev.platform_data)
  637. kfree(pdata);
  638. return err;
  639. }
  640. static int __devexit tegra_kbc_remove(struct platform_device *pdev)
  641. {
  642. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  643. struct resource *res;
  644. platform_set_drvdata(pdev, NULL);
  645. free_irq(kbc->irq, pdev);
  646. clk_put(kbc->clk);
  647. input_unregister_device(kbc->idev);
  648. iounmap(kbc->mmio);
  649. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  650. release_mem_region(res->start, resource_size(res));
  651. /*
  652. * If we do not have platform data attached to the device we
  653. * allocated it ourselves and thus need to free it.
  654. */
  655. if (!pdev->dev.platform_data)
  656. kfree(kbc->pdata);
  657. kfree(kbc);
  658. return 0;
  659. }
  660. #ifdef CONFIG_PM_SLEEP
  661. static int tegra_kbc_suspend(struct device *dev)
  662. {
  663. struct platform_device *pdev = to_platform_device(dev);
  664. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  665. mutex_lock(&kbc->idev->mutex);
  666. if (device_may_wakeup(&pdev->dev)) {
  667. disable_irq(kbc->irq);
  668. del_timer_sync(&kbc->timer);
  669. tegra_kbc_set_fifo_interrupt(kbc, false);
  670. /* Forcefully clear the interrupt status */
  671. writel(0x7, kbc->mmio + KBC_INT_0);
  672. /*
  673. * Store the previous resident time of continuous polling mode.
  674. * Force the keyboard into interrupt mode.
  675. */
  676. kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
  677. writel(0, kbc->mmio + KBC_TO_CNT_0);
  678. tegra_kbc_setup_wakekeys(kbc, true);
  679. msleep(30);
  680. enable_irq_wake(kbc->irq);
  681. } else {
  682. if (kbc->idev->users)
  683. tegra_kbc_stop(kbc);
  684. }
  685. mutex_unlock(&kbc->idev->mutex);
  686. return 0;
  687. }
  688. static int tegra_kbc_resume(struct device *dev)
  689. {
  690. struct platform_device *pdev = to_platform_device(dev);
  691. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  692. int err = 0;
  693. mutex_lock(&kbc->idev->mutex);
  694. if (device_may_wakeup(&pdev->dev)) {
  695. disable_irq_wake(kbc->irq);
  696. tegra_kbc_setup_wakekeys(kbc, false);
  697. /* Restore the resident time of continuous polling mode. */
  698. writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
  699. tegra_kbc_set_fifo_interrupt(kbc, true);
  700. enable_irq(kbc->irq);
  701. } else {
  702. if (kbc->idev->users)
  703. err = tegra_kbc_start(kbc);
  704. }
  705. mutex_unlock(&kbc->idev->mutex);
  706. return err;
  707. }
  708. #endif
  709. static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
  710. static const struct of_device_id tegra_kbc_of_match[] = {
  711. { .compatible = "nvidia,tegra20-kbc", },
  712. { },
  713. };
  714. MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
  715. static struct platform_driver tegra_kbc_driver = {
  716. .probe = tegra_kbc_probe,
  717. .remove = __devexit_p(tegra_kbc_remove),
  718. .driver = {
  719. .name = "tegra-kbc",
  720. .owner = THIS_MODULE,
  721. .pm = &tegra_kbc_pm_ops,
  722. .of_match_table = tegra_kbc_of_match,
  723. },
  724. };
  725. module_platform_driver(tegra_kbc_driver);
  726. MODULE_LICENSE("GPL");
  727. MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
  728. MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
  729. MODULE_ALIAS("platform:tegra-kbc");