rt2x00queue.c 18 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/dma-mapping.h>
  24. #include "rt2x00.h"
  25. #include "rt2x00lib.h"
  26. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  27. struct queue_entry *entry)
  28. {
  29. unsigned int frame_size;
  30. unsigned int reserved_size;
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. /*
  34. * The frame size includes descriptor size, because the
  35. * hardware directly receive the frame into the skbuffer.
  36. */
  37. frame_size = entry->queue->data_size + entry->queue->desc_size;
  38. /*
  39. * The payload should be aligned to a 4-byte boundary,
  40. * this means we need at least 3 bytes for moving the frame
  41. * into the correct offset.
  42. */
  43. reserved_size = 4;
  44. /*
  45. * Allocate skbuffer.
  46. */
  47. skb = dev_alloc_skb(frame_size + reserved_size);
  48. if (!skb)
  49. return NULL;
  50. skb_reserve(skb, reserved_size);
  51. skb_put(skb, frame_size);
  52. /*
  53. * Populate skbdesc.
  54. */
  55. skbdesc = get_skb_frame_desc(skb);
  56. memset(skbdesc, 0, sizeof(*skbdesc));
  57. skbdesc->entry = entry;
  58. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  59. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  60. skb->data,
  61. skb->len,
  62. DMA_FROM_DEVICE);
  63. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  64. }
  65. return skb;
  66. }
  67. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  68. {
  69. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  70. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  71. DMA_TO_DEVICE);
  72. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  73. }
  74. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  75. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  76. {
  77. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  78. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  79. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  80. DMA_FROM_DEVICE);
  81. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  82. }
  83. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  84. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  85. DMA_TO_DEVICE);
  86. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  87. }
  88. }
  89. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  90. {
  91. if (!skb)
  92. return;
  93. rt2x00queue_unmap_skb(rt2x00dev, skb);
  94. dev_kfree_skb_any(skb);
  95. }
  96. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  97. struct txentry_desc *txdesc)
  98. {
  99. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  100. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  101. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  102. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  103. struct ieee80211_rate *rate =
  104. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  105. const struct rt2x00_rate *hwrate;
  106. unsigned int data_length;
  107. unsigned int duration;
  108. unsigned int residual;
  109. memset(txdesc, 0, sizeof(*txdesc));
  110. /*
  111. * Initialize information from queue
  112. */
  113. txdesc->queue = entry->queue->qid;
  114. txdesc->cw_min = entry->queue->cw_min;
  115. txdesc->cw_max = entry->queue->cw_max;
  116. txdesc->aifs = entry->queue->aifs;
  117. /* Data length should be extended with 4 bytes for CRC */
  118. data_length = entry->skb->len + 4;
  119. /*
  120. * Check whether this frame is to be acked.
  121. */
  122. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  123. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  124. /*
  125. * Check if this is a RTS/CTS frame
  126. */
  127. if (ieee80211_is_rts(hdr->frame_control) ||
  128. ieee80211_is_cts(hdr->frame_control)) {
  129. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  130. if (ieee80211_is_rts(hdr->frame_control))
  131. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  132. else
  133. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  134. if (tx_info->control.rts_cts_rate_idx >= 0)
  135. rate =
  136. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  137. }
  138. /*
  139. * Determine retry information.
  140. */
  141. txdesc->retry_limit = tx_info->control.retry_limit;
  142. if (tx_info->flags & IEEE80211_TX_CTL_LONG_RETRY_LIMIT)
  143. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  144. /*
  145. * Check if more fragments are pending
  146. */
  147. if (ieee80211_has_morefrags(hdr->frame_control)) {
  148. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  149. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  150. }
  151. /*
  152. * Beacons and probe responses require the tsf timestamp
  153. * to be inserted into the frame.
  154. */
  155. if (ieee80211_is_beacon(hdr->frame_control) ||
  156. ieee80211_is_probe_resp(hdr->frame_control))
  157. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  158. /*
  159. * Determine with what IFS priority this frame should be send.
  160. * Set ifs to IFS_SIFS when the this is not the first fragment,
  161. * or this fragment came after RTS/CTS.
  162. */
  163. if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  164. txdesc->ifs = IFS_SIFS;
  165. } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
  166. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  167. txdesc->ifs = IFS_BACKOFF;
  168. } else {
  169. txdesc->ifs = IFS_SIFS;
  170. }
  171. /*
  172. * Hardware should insert sequence counter.
  173. * FIXME: We insert a software sequence counter first for
  174. * hardware that doesn't support hardware sequence counting.
  175. *
  176. * This is wrong because beacons are not getting sequence
  177. * numbers assigned properly.
  178. *
  179. * A secondary problem exists for drivers that cannot toggle
  180. * sequence counting per-frame, since those will override the
  181. * sequence counter given by mac80211.
  182. */
  183. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  184. spin_lock(&intf->lock);
  185. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  186. intf->seqno += 0x10;
  187. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  188. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  189. spin_unlock(&intf->lock);
  190. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  191. }
  192. /*
  193. * PLCP setup
  194. * Length calculation depends on OFDM/CCK rate.
  195. */
  196. hwrate = rt2x00_get_rate(rate->hw_value);
  197. txdesc->signal = hwrate->plcp;
  198. txdesc->service = 0x04;
  199. if (hwrate->flags & DEV_RATE_OFDM) {
  200. __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
  201. txdesc->length_high = (data_length >> 6) & 0x3f;
  202. txdesc->length_low = data_length & 0x3f;
  203. } else {
  204. /*
  205. * Convert length to microseconds.
  206. */
  207. residual = get_duration_res(data_length, hwrate->bitrate);
  208. duration = get_duration(data_length, hwrate->bitrate);
  209. if (residual != 0) {
  210. duration++;
  211. /*
  212. * Check if we need to set the Length Extension
  213. */
  214. if (hwrate->bitrate == 110 && residual <= 30)
  215. txdesc->service |= 0x80;
  216. }
  217. txdesc->length_high = (duration >> 8) & 0xff;
  218. txdesc->length_low = duration & 0xff;
  219. /*
  220. * When preamble is enabled we should set the
  221. * preamble bit for the signal.
  222. */
  223. if (rt2x00_get_rate_preamble(rate->hw_value))
  224. txdesc->signal |= 0x08;
  225. }
  226. }
  227. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  228. struct txentry_desc *txdesc)
  229. {
  230. struct data_queue *queue = entry->queue;
  231. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  232. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  233. /*
  234. * All processing on the frame has been completed, this means
  235. * it is now ready to be dumped to userspace through debugfs.
  236. */
  237. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  238. /*
  239. * Check if we need to kick the queue, there are however a few rules
  240. * 1) Don't kick beacon queue
  241. * 2) Don't kick unless this is the last in frame in a burst.
  242. * When the burst flag is set, this frame is always followed
  243. * by another frame which in some way are related to eachother.
  244. * This is true for fragments, RTS or CTS-to-self frames.
  245. * 3) Rule 2 can be broken when the available entries
  246. * in the queue are less then a certain threshold.
  247. */
  248. if (entry->queue->qid == QID_BEACON)
  249. return;
  250. if (rt2x00queue_threshold(queue) ||
  251. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  252. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  253. }
  254. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
  255. {
  256. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  257. struct txentry_desc txdesc;
  258. struct skb_frame_desc *skbdesc;
  259. if (unlikely(rt2x00queue_full(queue)))
  260. return -EINVAL;
  261. if (__test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  262. ERROR(queue->rt2x00dev,
  263. "Arrived at non-free entry in the non-full queue %d.\n"
  264. "Please file bug report to %s.\n",
  265. queue->qid, DRV_PROJECT);
  266. return -EINVAL;
  267. }
  268. /*
  269. * Copy all TX descriptor information into txdesc,
  270. * after that we are free to use the skb->cb array
  271. * for our information.
  272. */
  273. entry->skb = skb;
  274. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  275. /*
  276. * skb->cb array is now ours and we are free to use it.
  277. */
  278. skbdesc = get_skb_frame_desc(entry->skb);
  279. memset(skbdesc, 0, sizeof(*skbdesc));
  280. skbdesc->entry = entry;
  281. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  282. __clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  283. return -EIO;
  284. }
  285. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  286. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  287. __set_bit(ENTRY_DATA_PENDING, &entry->flags);
  288. rt2x00queue_index_inc(queue, Q_INDEX);
  289. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  290. return 0;
  291. }
  292. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  293. struct ieee80211_vif *vif)
  294. {
  295. struct rt2x00_intf *intf = vif_to_intf(vif);
  296. struct skb_frame_desc *skbdesc;
  297. struct txentry_desc txdesc;
  298. __le32 desc[16];
  299. if (unlikely(!intf->beacon))
  300. return -ENOBUFS;
  301. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  302. if (!intf->beacon->skb)
  303. return -ENOMEM;
  304. /*
  305. * Copy all TX descriptor information into txdesc,
  306. * after that we are free to use the skb->cb array
  307. * for our information.
  308. */
  309. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  310. /*
  311. * For the descriptor we use a local array from where the
  312. * driver can move it to the correct location required for
  313. * the hardware.
  314. */
  315. memset(desc, 0, sizeof(desc));
  316. /*
  317. * Fill in skb descriptor
  318. */
  319. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  320. memset(skbdesc, 0, sizeof(*skbdesc));
  321. skbdesc->desc = desc;
  322. skbdesc->desc_len = intf->beacon->queue->desc_size;
  323. skbdesc->entry = intf->beacon;
  324. /*
  325. * Write TX descriptor into reserved room in front of the beacon.
  326. */
  327. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  328. /*
  329. * Send beacon to hardware.
  330. * Also enable beacon generation, which might have been disabled
  331. * by the driver during the config_beacon() callback function.
  332. */
  333. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  334. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  335. return 0;
  336. }
  337. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  338. const enum data_queue_qid queue)
  339. {
  340. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  341. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  342. return &rt2x00dev->tx[queue];
  343. if (!rt2x00dev->bcn)
  344. return NULL;
  345. if (queue == QID_BEACON)
  346. return &rt2x00dev->bcn[0];
  347. else if (queue == QID_ATIM && atim)
  348. return &rt2x00dev->bcn[1];
  349. return NULL;
  350. }
  351. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  352. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  353. enum queue_index index)
  354. {
  355. struct queue_entry *entry;
  356. unsigned long irqflags;
  357. if (unlikely(index >= Q_INDEX_MAX)) {
  358. ERROR(queue->rt2x00dev,
  359. "Entry requested from invalid index type (%d)\n", index);
  360. return NULL;
  361. }
  362. spin_lock_irqsave(&queue->lock, irqflags);
  363. entry = &queue->entries[queue->index[index]];
  364. spin_unlock_irqrestore(&queue->lock, irqflags);
  365. return entry;
  366. }
  367. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  368. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  369. {
  370. unsigned long irqflags;
  371. if (unlikely(index >= Q_INDEX_MAX)) {
  372. ERROR(queue->rt2x00dev,
  373. "Index change on invalid index type (%d)\n", index);
  374. return;
  375. }
  376. spin_lock_irqsave(&queue->lock, irqflags);
  377. queue->index[index]++;
  378. if (queue->index[index] >= queue->limit)
  379. queue->index[index] = 0;
  380. if (index == Q_INDEX) {
  381. queue->length++;
  382. } else if (index == Q_INDEX_DONE) {
  383. queue->length--;
  384. queue->count ++;
  385. }
  386. spin_unlock_irqrestore(&queue->lock, irqflags);
  387. }
  388. static void rt2x00queue_reset(struct data_queue *queue)
  389. {
  390. unsigned long irqflags;
  391. spin_lock_irqsave(&queue->lock, irqflags);
  392. queue->count = 0;
  393. queue->length = 0;
  394. memset(queue->index, 0, sizeof(queue->index));
  395. spin_unlock_irqrestore(&queue->lock, irqflags);
  396. }
  397. void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev)
  398. {
  399. struct data_queue *queue = rt2x00dev->rx;
  400. unsigned int i;
  401. rt2x00queue_reset(queue);
  402. if (!rt2x00dev->ops->lib->init_rxentry)
  403. return;
  404. for (i = 0; i < queue->limit; i++) {
  405. queue->entries[i].flags = 0;
  406. rt2x00dev->ops->lib->init_rxentry(rt2x00dev,
  407. &queue->entries[i]);
  408. }
  409. }
  410. void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev)
  411. {
  412. struct data_queue *queue;
  413. unsigned int i;
  414. txall_queue_for_each(rt2x00dev, queue) {
  415. rt2x00queue_reset(queue);
  416. if (!rt2x00dev->ops->lib->init_txentry)
  417. continue;
  418. for (i = 0; i < queue->limit; i++) {
  419. queue->entries[i].flags = 0;
  420. rt2x00dev->ops->lib->init_txentry(rt2x00dev,
  421. &queue->entries[i]);
  422. }
  423. }
  424. }
  425. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  426. const struct data_queue_desc *qdesc)
  427. {
  428. struct queue_entry *entries;
  429. unsigned int entry_size;
  430. unsigned int i;
  431. rt2x00queue_reset(queue);
  432. queue->limit = qdesc->entry_num;
  433. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  434. queue->data_size = qdesc->data_size;
  435. queue->desc_size = qdesc->desc_size;
  436. /*
  437. * Allocate all queue entries.
  438. */
  439. entry_size = sizeof(*entries) + qdesc->priv_size;
  440. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  441. if (!entries)
  442. return -ENOMEM;
  443. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  444. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  445. ((__index) * (__psize)) )
  446. for (i = 0; i < queue->limit; i++) {
  447. entries[i].flags = 0;
  448. entries[i].queue = queue;
  449. entries[i].skb = NULL;
  450. entries[i].entry_idx = i;
  451. entries[i].priv_data =
  452. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  453. sizeof(*entries), qdesc->priv_size);
  454. }
  455. #undef QUEUE_ENTRY_PRIV_OFFSET
  456. queue->entries = entries;
  457. return 0;
  458. }
  459. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  460. struct data_queue *queue)
  461. {
  462. unsigned int i;
  463. if (!queue->entries)
  464. return;
  465. for (i = 0; i < queue->limit; i++) {
  466. if (queue->entries[i].skb)
  467. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  468. }
  469. }
  470. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  471. struct data_queue *queue)
  472. {
  473. unsigned int i;
  474. struct sk_buff *skb;
  475. for (i = 0; i < queue->limit; i++) {
  476. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  477. if (!skb)
  478. return -ENOMEM;
  479. queue->entries[i].skb = skb;
  480. }
  481. return 0;
  482. }
  483. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  484. {
  485. struct data_queue *queue;
  486. int status;
  487. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  488. if (status)
  489. goto exit;
  490. tx_queue_for_each(rt2x00dev, queue) {
  491. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  492. if (status)
  493. goto exit;
  494. }
  495. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  496. if (status)
  497. goto exit;
  498. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  499. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  500. rt2x00dev->ops->atim);
  501. if (status)
  502. goto exit;
  503. }
  504. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  505. if (status)
  506. goto exit;
  507. return 0;
  508. exit:
  509. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  510. rt2x00queue_uninitialize(rt2x00dev);
  511. return status;
  512. }
  513. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  514. {
  515. struct data_queue *queue;
  516. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  517. queue_for_each(rt2x00dev, queue) {
  518. kfree(queue->entries);
  519. queue->entries = NULL;
  520. }
  521. }
  522. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  523. struct data_queue *queue, enum data_queue_qid qid)
  524. {
  525. spin_lock_init(&queue->lock);
  526. queue->rt2x00dev = rt2x00dev;
  527. queue->qid = qid;
  528. queue->aifs = 2;
  529. queue->cw_min = 5;
  530. queue->cw_max = 10;
  531. }
  532. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  533. {
  534. struct data_queue *queue;
  535. enum data_queue_qid qid;
  536. unsigned int req_atim =
  537. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  538. /*
  539. * We need the following queues:
  540. * RX: 1
  541. * TX: ops->tx_queues
  542. * Beacon: 1
  543. * Atim: 1 (if required)
  544. */
  545. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  546. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  547. if (!queue) {
  548. ERROR(rt2x00dev, "Queue allocation failed.\n");
  549. return -ENOMEM;
  550. }
  551. /*
  552. * Initialize pointers
  553. */
  554. rt2x00dev->rx = queue;
  555. rt2x00dev->tx = &queue[1];
  556. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  557. /*
  558. * Initialize queue parameters.
  559. * RX: qid = QID_RX
  560. * TX: qid = QID_AC_BE + index
  561. * TX: cw_min: 2^5 = 32.
  562. * TX: cw_max: 2^10 = 1024.
  563. * BCN: qid = QID_BEACON
  564. * ATIM: qid = QID_ATIM
  565. */
  566. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  567. qid = QID_AC_BE;
  568. tx_queue_for_each(rt2x00dev, queue)
  569. rt2x00queue_init(rt2x00dev, queue, qid++);
  570. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  571. if (req_atim)
  572. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  573. return 0;
  574. }
  575. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  576. {
  577. kfree(rt2x00dev->rx);
  578. rt2x00dev->rx = NULL;
  579. rt2x00dev->tx = NULL;
  580. rt2x00dev->bcn = NULL;
  581. }