mc13783.c 21 KB

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  1. /*
  2. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
  3. * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
  4. * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
  5. *
  6. * Initial development of this code was funded by
  7. * Phytec Messtechnik GmbH, http://www.phytec.de
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/device.h>
  25. #include <linux/mfd/mc13xxx.h>
  26. #include <linux/slab.h>
  27. #include <sound/core.h>
  28. #include <sound/control.h>
  29. #include <sound/pcm.h>
  30. #include <sound/soc.h>
  31. #include <sound/initval.h>
  32. #include <sound/soc-dapm.h>
  33. #include "mc13783.h"
  34. #define MC13783_AUDIO_RX0 36
  35. #define MC13783_AUDIO_RX1 37
  36. #define MC13783_AUDIO_TX 38
  37. #define MC13783_SSI_NETWORK 39
  38. #define MC13783_AUDIO_CODEC 40
  39. #define MC13783_AUDIO_DAC 41
  40. #define AUDIO_RX0_ALSPEN (1 << 5)
  41. #define AUDIO_RX0_ALSPSEL (1 << 7)
  42. #define AUDIO_RX0_ADDCDC (1 << 21)
  43. #define AUDIO_RX0_ADDSTDC (1 << 22)
  44. #define AUDIO_RX0_ADDRXIN (1 << 23)
  45. #define AUDIO_RX1_PGARXEN (1 << 0);
  46. #define AUDIO_RX1_PGASTEN (1 << 5)
  47. #define AUDIO_RX1_ARXINEN (1 << 10)
  48. #define AUDIO_TX_AMC1REN (1 << 5)
  49. #define AUDIO_TX_AMC1LEN (1 << 7)
  50. #define AUDIO_TX_AMC2EN (1 << 9)
  51. #define AUDIO_TX_ATXINEN (1 << 11)
  52. #define AUDIO_TX_RXINREC (1 << 13)
  53. #define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2)
  54. #define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4)
  55. #define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6)
  56. #define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8)
  57. #define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10)
  58. #define SSI_NETWORK_CDCFSDLY(x) (1 << 11)
  59. #define SSI_NETWORK_DAC_SLOTS_8 (1 << 12)
  60. #define SSI_NETWORK_DAC_SLOTS_4 (2 << 12)
  61. #define SSI_NETWORK_DAC_SLOTS_2 (3 << 12)
  62. #define SSI_NETWORK_DAC_SLOT_MASK (3 << 12)
  63. #define SSI_NETWORK_DAC_RXSLOT_0_1 (0 << 14)
  64. #define SSI_NETWORK_DAC_RXSLOT_2_3 (1 << 14)
  65. #define SSI_NETWORK_DAC_RXSLOT_4_5 (2 << 14)
  66. #define SSI_NETWORK_DAC_RXSLOT_6_7 (3 << 14)
  67. #define SSI_NETWORK_DAC_RXSLOT_MASK (3 << 14)
  68. #define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16)
  69. #define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18)
  70. #define SSI_NETWORK_STDCSUMGAIN (1 << 20)
  71. /*
  72. * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
  73. * register layout
  74. */
  75. #define AUDIO_SSI_SEL (1 << 0)
  76. #define AUDIO_CLK_SEL (1 << 1)
  77. #define AUDIO_CSM (1 << 2)
  78. #define AUDIO_BCL_INV (1 << 3)
  79. #define AUDIO_CFS_INV (1 << 4)
  80. #define AUDIO_CFS(x) (((x) & 0x3) << 5)
  81. #define AUDIO_CLK(x) (((x) & 0x7) << 7)
  82. #define AUDIO_C_EN (1 << 11)
  83. #define AUDIO_C_CLK_EN (1 << 12)
  84. #define AUDIO_C_RESET (1 << 15)
  85. #define AUDIO_CODEC_CDCFS8K16K (1 << 10)
  86. #define AUDIO_DAC_CFS_DLY_B (1 << 10)
  87. struct mc13783_priv {
  88. struct snd_soc_codec codec;
  89. struct mc13xxx *mc13xxx;
  90. enum mc13783_ssi_port adc_ssi_port;
  91. enum mc13783_ssi_port dac_ssi_port;
  92. };
  93. static unsigned int mc13783_read(struct snd_soc_codec *codec,
  94. unsigned int reg)
  95. {
  96. struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
  97. unsigned int value = 0;
  98. mc13xxx_lock(priv->mc13xxx);
  99. mc13xxx_reg_read(priv->mc13xxx, reg, &value);
  100. mc13xxx_unlock(priv->mc13xxx);
  101. return value;
  102. }
  103. static int mc13783_write(struct snd_soc_codec *codec,
  104. unsigned int reg, unsigned int value)
  105. {
  106. struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
  107. int ret;
  108. mc13xxx_lock(priv->mc13xxx);
  109. ret = mc13xxx_reg_write(priv->mc13xxx, reg, value);
  110. mc13xxx_unlock(priv->mc13xxx);
  111. return ret;
  112. }
  113. /* Mapping between sample rates and register value */
  114. static unsigned int mc13783_rates[] = {
  115. 8000, 11025, 12000, 16000,
  116. 22050, 24000, 32000, 44100,
  117. 48000, 64000, 96000
  118. };
  119. static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream *substream,
  120. struct snd_pcm_hw_params *params,
  121. struct snd_soc_dai *dai)
  122. {
  123. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  124. struct snd_soc_codec *codec = rtd->codec;
  125. unsigned int rate = params_rate(params);
  126. int i;
  127. for (i = 0; i < ARRAY_SIZE(mc13783_rates); i++) {
  128. if (rate == mc13783_rates[i]) {
  129. snd_soc_update_bits(codec, MC13783_AUDIO_DAC,
  130. 0xf << 17, i << 17);
  131. return 0;
  132. }
  133. }
  134. return -EINVAL;
  135. }
  136. static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream *substream,
  137. struct snd_pcm_hw_params *params,
  138. struct snd_soc_dai *dai)
  139. {
  140. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  141. struct snd_soc_codec *codec = rtd->codec;
  142. unsigned int rate = params_rate(params);
  143. unsigned int val;
  144. switch (rate) {
  145. case 8000:
  146. val = 0;
  147. break;
  148. case 16000:
  149. val = AUDIO_CODEC_CDCFS8K16K;
  150. break;
  151. default:
  152. return -EINVAL;
  153. }
  154. snd_soc_update_bits(codec, MC13783_AUDIO_CODEC, AUDIO_CODEC_CDCFS8K16K,
  155. val);
  156. return 0;
  157. }
  158. static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream *substream,
  159. struct snd_pcm_hw_params *params,
  160. struct snd_soc_dai *dai)
  161. {
  162. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  163. return mc13783_pcm_hw_params_dac(substream, params, dai);
  164. else
  165. return mc13783_pcm_hw_params_codec(substream, params, dai);
  166. }
  167. static int mc13783_set_fmt(struct snd_soc_dai *dai, unsigned int fmt,
  168. unsigned int reg)
  169. {
  170. struct snd_soc_codec *codec = dai->codec;
  171. unsigned int val = 0;
  172. unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV |
  173. AUDIO_CSM | AUDIO_C_CLK_EN | AUDIO_C_RESET;
  174. /* DAI mode */
  175. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  176. case SND_SOC_DAIFMT_I2S:
  177. val |= AUDIO_CFS(2);
  178. break;
  179. case SND_SOC_DAIFMT_DSP_A:
  180. val |= AUDIO_CFS(1);
  181. break;
  182. default:
  183. return -EINVAL;
  184. }
  185. /* DAI clock inversion */
  186. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  187. case SND_SOC_DAIFMT_NB_NF:
  188. val |= AUDIO_BCL_INV;
  189. break;
  190. case SND_SOC_DAIFMT_NB_IF:
  191. val |= AUDIO_BCL_INV | AUDIO_CFS_INV;
  192. break;
  193. case SND_SOC_DAIFMT_IB_NF:
  194. break;
  195. case SND_SOC_DAIFMT_IB_IF:
  196. val |= AUDIO_CFS_INV;
  197. break;
  198. }
  199. /* DAI clock master masks */
  200. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  201. case SND_SOC_DAIFMT_CBM_CFM:
  202. val |= AUDIO_C_CLK_EN;
  203. break;
  204. case SND_SOC_DAIFMT_CBS_CFS:
  205. val |= AUDIO_CSM;
  206. break;
  207. case SND_SOC_DAIFMT_CBM_CFS:
  208. case SND_SOC_DAIFMT_CBS_CFM:
  209. return -EINVAL;
  210. }
  211. val |= AUDIO_C_RESET;
  212. snd_soc_update_bits(codec, reg, mask, val);
  213. return 0;
  214. }
  215. static int mc13783_set_fmt_async(struct snd_soc_dai *dai, unsigned int fmt)
  216. {
  217. if (dai->id == MC13783_ID_STEREO_DAC)
  218. return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
  219. else
  220. return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
  221. }
  222. static int mc13783_set_fmt_sync(struct snd_soc_dai *dai, unsigned int fmt)
  223. {
  224. int ret;
  225. ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
  226. if (ret)
  227. return ret;
  228. /*
  229. * In synchronous mode force the voice codec into slave mode
  230. * so that the clock / framesync from the stereo DAC is used
  231. */
  232. fmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
  233. fmt |= SND_SOC_DAIFMT_CBS_CFS;
  234. ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
  235. return ret;
  236. }
  237. static int mc13783_sysclk[] = {
  238. 13000000,
  239. 15360000,
  240. 16800000,
  241. -1,
  242. 26000000,
  243. -1, /* 12000000, invalid for voice codec */
  244. -1, /* 3686400, invalid for voice codec */
  245. 33600000,
  246. };
  247. static int mc13783_set_sysclk(struct snd_soc_dai *dai,
  248. int clk_id, unsigned int freq, int dir,
  249. unsigned int reg)
  250. {
  251. struct snd_soc_codec *codec = dai->codec;
  252. int clk;
  253. unsigned int val = 0;
  254. unsigned int mask = AUDIO_CLK(0x7) | AUDIO_CLK_SEL;
  255. for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {
  256. if (mc13783_sysclk[clk] < 0)
  257. continue;
  258. if (mc13783_sysclk[clk] == freq)
  259. break;
  260. }
  261. if (clk == ARRAY_SIZE(mc13783_sysclk))
  262. return -EINVAL;
  263. if (clk_id == MC13783_CLK_CLIB)
  264. val |= AUDIO_CLK_SEL;
  265. val |= AUDIO_CLK(clk);
  266. snd_soc_update_bits(codec, reg, mask, val);
  267. return 0;
  268. }
  269. static int mc13783_set_sysclk_dac(struct snd_soc_dai *dai,
  270. int clk_id, unsigned int freq, int dir)
  271. {
  272. return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
  273. }
  274. static int mc13783_set_sysclk_codec(struct snd_soc_dai *dai,
  275. int clk_id, unsigned int freq, int dir)
  276. {
  277. return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
  278. }
  279. static int mc13783_set_sysclk_sync(struct snd_soc_dai *dai,
  280. int clk_id, unsigned int freq, int dir)
  281. {
  282. int ret;
  283. ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
  284. if (ret)
  285. return ret;
  286. return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
  287. }
  288. static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai,
  289. unsigned int tx_mask, unsigned int rx_mask, int slots,
  290. int slot_width)
  291. {
  292. struct snd_soc_codec *codec = dai->codec;
  293. unsigned int val = 0;
  294. unsigned int mask = SSI_NETWORK_DAC_SLOT_MASK |
  295. SSI_NETWORK_DAC_RXSLOT_MASK;
  296. switch (slots) {
  297. case 2:
  298. val |= SSI_NETWORK_DAC_SLOTS_2;
  299. break;
  300. case 4:
  301. val |= SSI_NETWORK_DAC_SLOTS_4;
  302. break;
  303. case 8:
  304. val |= SSI_NETWORK_DAC_SLOTS_8;
  305. break;
  306. default:
  307. return -EINVAL;
  308. }
  309. switch (rx_mask) {
  310. case 0xfffffffc:
  311. val |= SSI_NETWORK_DAC_RXSLOT_0_1;
  312. break;
  313. case 0xfffffff3:
  314. val |= SSI_NETWORK_DAC_RXSLOT_2_3;
  315. break;
  316. case 0xffffffcf:
  317. val |= SSI_NETWORK_DAC_RXSLOT_4_5;
  318. break;
  319. case 0xffffff3f:
  320. val |= SSI_NETWORK_DAC_RXSLOT_6_7;
  321. break;
  322. default:
  323. return -EINVAL;
  324. };
  325. snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
  326. return 0;
  327. }
  328. static int mc13783_set_tdm_slot_codec(struct snd_soc_dai *dai,
  329. unsigned int tx_mask, unsigned int rx_mask, int slots,
  330. int slot_width)
  331. {
  332. struct snd_soc_codec *codec = dai->codec;
  333. unsigned int val = 0;
  334. unsigned int mask = 0x3f;
  335. if (slots != 4)
  336. return -EINVAL;
  337. if (tx_mask != 0xfffffffc)
  338. return -EINVAL;
  339. val |= (0x00 << 2); /* primary timeslot RX/TX(?) is 0 */
  340. val |= (0x01 << 4); /* secondary timeslot TX is 1 */
  341. snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
  342. return 0;
  343. }
  344. static int mc13783_set_tdm_slot_sync(struct snd_soc_dai *dai,
  345. unsigned int tx_mask, unsigned int rx_mask, int slots,
  346. int slot_width)
  347. {
  348. int ret;
  349. ret = mc13783_set_tdm_slot_dac(dai, tx_mask, rx_mask, slots,
  350. slot_width);
  351. if (ret)
  352. return ret;
  353. ret = mc13783_set_tdm_slot_codec(dai, tx_mask, rx_mask, slots,
  354. slot_width);
  355. return ret;
  356. }
  357. static const struct snd_kcontrol_new mc1l_amp_ctl =
  358. SOC_DAPM_SINGLE("Switch", 38, 7, 1, 0);
  359. static const struct snd_kcontrol_new mc1r_amp_ctl =
  360. SOC_DAPM_SINGLE("Switch", 38, 5, 1, 0);
  361. static const struct snd_kcontrol_new mc2_amp_ctl =
  362. SOC_DAPM_SINGLE("Switch", 38, 9, 1, 0);
  363. static const struct snd_kcontrol_new atx_amp_ctl =
  364. SOC_DAPM_SINGLE("Switch", 38, 11, 1, 0);
  365. /* Virtual mux. The chip does the input selection automatically
  366. * as soon as we enable one input. */
  367. static const char * const adcl_enum_text[] = {
  368. "MC1L", "RXINL",
  369. };
  370. static const struct soc_enum adcl_enum =
  371. SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcl_enum_text), adcl_enum_text);
  372. static const struct snd_kcontrol_new left_input_mux =
  373. SOC_DAPM_ENUM_VIRT("Route", adcl_enum);
  374. static const char * const adcr_enum_text[] = {
  375. "MC1R", "MC2", "RXINR", "TXIN",
  376. };
  377. static const struct soc_enum adcr_enum =
  378. SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcr_enum_text), adcr_enum_text);
  379. static const struct snd_kcontrol_new right_input_mux =
  380. SOC_DAPM_ENUM_VIRT("Route", adcr_enum);
  381. static const struct snd_kcontrol_new samp_ctl =
  382. SOC_DAPM_SINGLE("Switch", 36, 3, 1, 0);
  383. static const struct snd_kcontrol_new lamp_ctl =
  384. SOC_DAPM_SINGLE("Switch", 36, 5, 1, 0);
  385. static const struct snd_kcontrol_new hlamp_ctl =
  386. SOC_DAPM_SINGLE("Switch", 36, 10, 1, 0);
  387. static const struct snd_kcontrol_new hramp_ctl =
  388. SOC_DAPM_SINGLE("Switch", 36, 9, 1, 0);
  389. static const struct snd_kcontrol_new llamp_ctl =
  390. SOC_DAPM_SINGLE("Switch", 36, 16, 1, 0);
  391. static const struct snd_kcontrol_new lramp_ctl =
  392. SOC_DAPM_SINGLE("Switch", 36, 15, 1, 0);
  393. static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
  394. /* Input */
  395. SND_SOC_DAPM_INPUT("MC1LIN"),
  396. SND_SOC_DAPM_INPUT("MC1RIN"),
  397. SND_SOC_DAPM_INPUT("MC2IN"),
  398. SND_SOC_DAPM_INPUT("RXINR"),
  399. SND_SOC_DAPM_INPUT("RXINL"),
  400. SND_SOC_DAPM_INPUT("TXIN"),
  401. SND_SOC_DAPM_SUPPLY("MC1 Bias", 38, 0, 0, NULL, 0),
  402. SND_SOC_DAPM_SUPPLY("MC2 Bias", 38, 1, 0, NULL, 0),
  403. SND_SOC_DAPM_SWITCH("MC1L Amp", 38, 7, 0, &mc1l_amp_ctl),
  404. SND_SOC_DAPM_SWITCH("MC1R Amp", 38, 5, 0, &mc1r_amp_ctl),
  405. SND_SOC_DAPM_SWITCH("MC2 Amp", 38, 9, 0, &mc2_amp_ctl),
  406. SND_SOC_DAPM_SWITCH("TXIN Amp", 38, 11, 0, &atx_amp_ctl),
  407. SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
  408. &left_input_mux),
  409. SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
  410. &right_input_mux),
  411. SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0),
  412. SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0),
  413. SND_SOC_DAPM_ADC("ADC", "Capture", 40, 11, 0),
  414. SND_SOC_DAPM_SUPPLY("ADC_Reset", 40, 15, 0, NULL, 0),
  415. /* Output */
  416. SND_SOC_DAPM_SUPPLY("DAC_E", 41, 11, 0, NULL, 0),
  417. SND_SOC_DAPM_SUPPLY("DAC_Reset", 41, 15, 0, NULL, 0),
  418. SND_SOC_DAPM_OUTPUT("RXOUTL"),
  419. SND_SOC_DAPM_OUTPUT("RXOUTR"),
  420. SND_SOC_DAPM_OUTPUT("HSL"),
  421. SND_SOC_DAPM_OUTPUT("HSR"),
  422. SND_SOC_DAPM_OUTPUT("LSP"),
  423. SND_SOC_DAPM_OUTPUT("SP"),
  424. SND_SOC_DAPM_SWITCH("Speaker Amp", 36, 3, 0, &samp_ctl),
  425. SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl),
  426. SND_SOC_DAPM_SWITCH("Headset Amp Left", 36, 10, 0, &hlamp_ctl),
  427. SND_SOC_DAPM_SWITCH("Headset Amp Right", 36, 9, 0, &hramp_ctl),
  428. SND_SOC_DAPM_SWITCH("Line out Amp Left", 36, 16, 0, &llamp_ctl),
  429. SND_SOC_DAPM_SWITCH("Line out Amp Right", 36, 15, 0, &lramp_ctl),
  430. SND_SOC_DAPM_DAC("DAC", "Playback", 36, 22, 0),
  431. SND_SOC_DAPM_PGA("DAC PGA", 37, 5, 0, NULL, 0),
  432. };
  433. static struct snd_soc_dapm_route mc13783_routes[] = {
  434. /* Input */
  435. { "MC1L Amp", NULL, "MC1LIN"},
  436. { "MC1R Amp", NULL, "MC1RIN" },
  437. { "MC2 Amp", NULL, "MC2IN" },
  438. { "TXIN Amp", NULL, "TXIN"},
  439. { "PGA Left Input Mux", "MC1L", "MC1L Amp" },
  440. { "PGA Left Input Mux", "RXINL", "RXINL"},
  441. { "PGA Right Input Mux", "MC1R", "MC1R Amp" },
  442. { "PGA Right Input Mux", "MC2", "MC2 Amp"},
  443. { "PGA Right Input Mux", "TXIN", "TXIN Amp"},
  444. { "PGA Right Input Mux", "RXINR", "RXINR"},
  445. { "PGA Left Input", NULL, "PGA Left Input Mux"},
  446. { "PGA Right Input", NULL, "PGA Right Input Mux"},
  447. { "ADC", NULL, "PGA Left Input"},
  448. { "ADC", NULL, "PGA Right Input"},
  449. { "ADC", NULL, "ADC_Reset"},
  450. /* Output */
  451. { "HSL", NULL, "Headset Amp Left" },
  452. { "HSR", NULL, "Headset Amp Right"},
  453. { "RXOUTL", NULL, "Line out Amp Left"},
  454. { "RXOUTR", NULL, "Line out Amp Right"},
  455. { "SP", NULL, "Speaker Amp"},
  456. { "Speaker Amp", NULL, "DAC PGA"},
  457. { "LSP", NULL, "DAC PGA"},
  458. { "Headset Amp Left", NULL, "DAC PGA"},
  459. { "Headset Amp Right", NULL, "DAC PGA"},
  460. { "Line out Amp Left", NULL, "DAC PGA"},
  461. { "Line out Amp Right", NULL, "DAC PGA"},
  462. { "DAC PGA", NULL, "DAC"},
  463. { "DAC", NULL, "DAC_E"},
  464. };
  465. static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix",
  466. "Mono", "Mono Mix"};
  467. static const struct soc_enum mc13783_enum_3d_mixer =
  468. SOC_ENUM_SINGLE(MC13783_AUDIO_RX1, 16, ARRAY_SIZE(mc13783_3d_mixer),
  469. mc13783_3d_mixer);
  470. static struct snd_kcontrol_new mc13783_control_list[] = {
  471. SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0),
  472. SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0),
  473. SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0),
  474. SOC_ENUM("3D Control", mc13783_enum_3d_mixer),
  475. };
  476. static int mc13783_probe(struct snd_soc_codec *codec)
  477. {
  478. struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
  479. mc13xxx_lock(priv->mc13xxx);
  480. /* these are the reset values */
  481. mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
  482. mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A);
  483. mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000);
  484. mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060);
  485. mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027);
  486. mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004);
  487. if (priv->adc_ssi_port == MC13783_SSI1_PORT)
  488. mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
  489. AUDIO_SSI_SEL, 0);
  490. else
  491. mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
  492. 0, AUDIO_SSI_SEL);
  493. if (priv->dac_ssi_port == MC13783_SSI1_PORT)
  494. mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
  495. AUDIO_SSI_SEL, 0);
  496. else
  497. mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
  498. 0, AUDIO_SSI_SEL);
  499. mc13xxx_unlock(priv->mc13xxx);
  500. return 0;
  501. }
  502. static int mc13783_remove(struct snd_soc_codec *codec)
  503. {
  504. struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
  505. mc13xxx_lock(priv->mc13xxx);
  506. /* Make sure VAUDIOON is off */
  507. mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0);
  508. mc13xxx_unlock(priv->mc13xxx);
  509. return 0;
  510. }
  511. #define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
  512. #define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  513. SNDRV_PCM_FMTBIT_S24_LE)
  514. static struct snd_soc_dai_ops mc13783_ops_dac = {
  515. .hw_params = mc13783_pcm_hw_params_dac,
  516. .set_fmt = mc13783_set_fmt_async,
  517. .set_sysclk = mc13783_set_sysclk_dac,
  518. .set_tdm_slot = mc13783_set_tdm_slot_dac,
  519. };
  520. static struct snd_soc_dai_ops mc13783_ops_codec = {
  521. .hw_params = mc13783_pcm_hw_params_codec,
  522. .set_fmt = mc13783_set_fmt_async,
  523. .set_sysclk = mc13783_set_sysclk_codec,
  524. .set_tdm_slot = mc13783_set_tdm_slot_codec,
  525. };
  526. /*
  527. * The mc13783 has two SSI ports, both of them can be routed either
  528. * to the voice codec or the stereo DAC. When two different SSI ports
  529. * are used for the voice codec and the stereo DAC we can do different
  530. * formats and sysclock settings for playback and capture
  531. * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
  532. * forces us to use symmetric rates (mc13783-hifi).
  533. */
  534. static struct snd_soc_dai_driver mc13783_dai_async[] = {
  535. {
  536. .name = "mc13783-hifi-playback",
  537. .id = MC13783_ID_STEREO_DAC,
  538. .playback = {
  539. .stream_name = "Playback",
  540. .channels_min = 1,
  541. .channels_max = 2,
  542. .rates = SNDRV_PCM_RATE_8000_96000,
  543. .formats = MC13783_FORMATS,
  544. },
  545. .ops = &mc13783_ops_dac,
  546. }, {
  547. .name = "mc13783-hifi-capture",
  548. .id = MC13783_ID_STEREO_CODEC,
  549. .capture = {
  550. .stream_name = "Capture",
  551. .channels_min = 1,
  552. .channels_max = 2,
  553. .rates = MC13783_RATES_RECORD,
  554. .formats = MC13783_FORMATS,
  555. },
  556. .ops = &mc13783_ops_codec,
  557. },
  558. };
  559. static struct snd_soc_dai_ops mc13783_ops_sync = {
  560. .hw_params = mc13783_pcm_hw_params_sync,
  561. .set_fmt = mc13783_set_fmt_sync,
  562. .set_sysclk = mc13783_set_sysclk_sync,
  563. .set_tdm_slot = mc13783_set_tdm_slot_sync,
  564. };
  565. static struct snd_soc_dai_driver mc13783_dai_sync[] = {
  566. {
  567. .name = "mc13783-hifi",
  568. .id = MC13783_ID_SYNC,
  569. .playback = {
  570. .stream_name = "Playback",
  571. .channels_min = 1,
  572. .channels_max = 2,
  573. .rates = SNDRV_PCM_RATE_8000_96000,
  574. .formats = MC13783_FORMATS,
  575. },
  576. .capture = {
  577. .stream_name = "Capture",
  578. .channels_min = 1,
  579. .channels_max = 2,
  580. .rates = MC13783_RATES_RECORD,
  581. .formats = MC13783_FORMATS,
  582. },
  583. .ops = &mc13783_ops_sync,
  584. .symmetric_rates = 1,
  585. }
  586. };
  587. static struct snd_soc_codec_driver soc_codec_dev_mc13783 = {
  588. .probe = mc13783_probe,
  589. .remove = mc13783_remove,
  590. .read = mc13783_read,
  591. .write = mc13783_write,
  592. .controls = mc13783_control_list,
  593. .num_controls = ARRAY_SIZE(mc13783_control_list),
  594. .dapm_widgets = mc13783_dapm_widgets,
  595. .num_dapm_widgets = ARRAY_SIZE(mc13783_dapm_widgets),
  596. .dapm_routes = mc13783_routes,
  597. .num_dapm_routes = ARRAY_SIZE(mc13783_routes),
  598. };
  599. static int mc13783_codec_probe(struct platform_device *pdev)
  600. {
  601. struct mc13xxx *mc13xxx;
  602. struct mc13783_priv *priv;
  603. struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
  604. int ret;
  605. mc13xxx = dev_get_drvdata(pdev->dev.parent);
  606. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  607. if (priv == NULL)
  608. return -ENOMEM;
  609. dev_set_drvdata(&pdev->dev, priv);
  610. priv->mc13xxx = mc13xxx;
  611. if (pdata) {
  612. priv->adc_ssi_port = pdata->adc_ssi_port;
  613. priv->dac_ssi_port = pdata->dac_ssi_port;
  614. } else {
  615. priv->adc_ssi_port = MC13783_SSI1_PORT;
  616. priv->dac_ssi_port = MC13783_SSI2_PORT;
  617. }
  618. if (priv->adc_ssi_port == priv->dac_ssi_port)
  619. ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
  620. mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync));
  621. else
  622. ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
  623. mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async));
  624. if (ret)
  625. goto err_register_codec;
  626. return 0;
  627. err_register_codec:
  628. dev_err(&pdev->dev, "register codec failed with %d\n", ret);
  629. return ret;
  630. }
  631. static int mc13783_codec_remove(struct platform_device *pdev)
  632. {
  633. snd_soc_unregister_codec(&pdev->dev);
  634. return 0;
  635. }
  636. static struct platform_driver mc13783_codec_driver = {
  637. .driver = {
  638. .name = "mc13783-codec",
  639. .owner = THIS_MODULE,
  640. },
  641. .probe = mc13783_codec_probe,
  642. .remove = __devexit_p(mc13783_codec_remove),
  643. };
  644. module_platform_driver(mc13783_codec_driver);
  645. MODULE_DESCRIPTION("ASoC MC13783 driver");
  646. MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
  647. MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
  648. MODULE_LICENSE("GPL");